soc/intel/apollolake/acpi: Replace Add(a,b) with ASL 2.0 syntax

Replace `Add (a, b)` with `a + b`.

Change-Id: Id465558f054494d3273d5cd6077476d878d7c183
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60504
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2021-12-30 02:47:08 +01:00
parent d190cdd25e
commit f3c313b47c
2 changed files with 5 additions and 5 deletions

View File

@ -31,7 +31,7 @@ Scope (\_SB)
Method (GPC1, 0x1, Serialized)
{
/* Arg0 - GPIO DW0 address */
Store (Add (Arg0, 0x4), Local0)
Store (Arg0 + 4, Local0)
OperationRegion (PDW1, SystemMemory, Local0, 4)
Field (PDW1, AnyAcc, NoLock, Preserve) {
TEMP, 32
@ -44,7 +44,7 @@ Scope (\_SB)
{
/* Arg0 - GPIO DW0 address */
/* Arg1 - Value for DW1 register */
Store (Add (Arg0, 0x4), Local0)
Store (Arg0 + 4, Local0)
OperationRegion (PDW1, SystemMemory, Local0, 4)
Field(PDW1, AnyAcc, NoLock, Preserve) {
TEMP,32
@ -60,8 +60,8 @@ Scope (\_SB)
Store (0, Local1)
Or( Or (ShiftLeft (Arg0, 16), CONFIG_PCR_BASE_ADDRESS),
Local1, Local1)
Or( Add (PAD_CFG_BASE, Multiply (Arg1, Multiply (
GPIO_NUM_PAD_CFG_REGS, 4))), Local1, Local1)
Or(PAD_CFG_BASE + Multiply (Arg1, Multiply (
GPIO_NUM_PAD_CFG_REGS, 4)), Local1, Local1)
Return (Local1)
}

View File

@ -109,7 +109,7 @@ Method (_CRS, 0, Serialized)
/* Set 64bit MMIO resource base and length */
Store (A4GS, MLEN)
Store (A4GB, MMIN)
MMAX = Add (MMIN, MLEN) - 1
MMAX = MMIN + MLEN - 1
}
Return (MCRS)