mb/asrock/h110m: Make use of the chipset devicetree
Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Change-Id: I9f92246da4a500e85c878d865d621033f6b35f1b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
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@ -43,10 +43,10 @@ chip soc/intel/skylake
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 00.0 on # Host Bridge
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device ref system_agent on
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subsystemid 0x1849 0x191f
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end
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device pci 01.0 on # PEG
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device ref peg0 on
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subsystemid 0x1849 0x1901
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register "Peg0MaxLinkWidth" = "Peg0_x16"
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@ -55,12 +55,11 @@ chip soc/intel/skylake
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register "PcieRpClkReqNumber[0]" = "0"
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register "PcieRpClkSrcNumber[0]" = "0"
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end
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device pci 02.0 on # Integrated Graphics Device
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device ref igpu on
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subsystemid 0x1849 0x1912
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end
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device pci 04.0 on end # Thermal Subsystem
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device pci 08.0 off end # Gaussian Mixture Model
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device pci 14.0 on # USB xHCI
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device ref sa_thermal on end
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device ref south_xhci on
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subsystemid 0x1849 0xa131
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register "usb2_ports" = "{
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@ -92,22 +91,13 @@ chip soc/intel/skylake
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[9] = USB3_PORT_DEFAULT(OC_SKIP),
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}"
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end
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.2 on # Thermal Subsystem
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device ref thermal on
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subsystemid 0x1849 0xa131
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end
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device pci 15.0 off end # I2C #0
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device pci 15.1 off end # I2C #1
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 16.0 on # Management Engine Interface 1
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device ref heci1 on
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subsystemid 0x1849 0xa131
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end
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 17.0 on # SATA
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device ref sata on
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subsystemid 0x1849 0xa102
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register "SataSalpSupport" = "1"
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# SATA4 and SATA5 are located in the lower right corner of the board,
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@ -122,14 +112,8 @@ chip soc/intel/skylake
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[3] = 1,
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}"
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end
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device pci 19.0 off end # UART #2
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device pci 19.1 off end # I2C #5
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device pci 19.2 off end # I2C #4
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device pci 1c.0 on end # PCI Express Port 1
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device pci 1c.1 off end # PCI Express Port 2
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device pci 1c.2 off end # PCI Express Port 3
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device pci 1c.3 off end # PCI Express Port 4
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device pci 1c.4 on # PCI Express Port 5 - PCIE slot
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device ref pcie_rp1 on end
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device ref pcie_rp5 on
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register "PcieRpEnable[4]" = "1"
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register "PcieRpClkReqSupport[4]" = "1"
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register "PcieRpClkReqNumber[4]" = "2"
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@ -138,7 +122,7 @@ chip soc/intel/skylake
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register "PcieRpClkSrcNumber[4]" = "2"
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register "PcieRpHotPlug[4]" = "1"
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end
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device pci 1c.5 on # PCI Express Port 6 - Onboard LAN
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device ref pcie_rp6 on
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register "PcieRpEnable[5]" = "1"
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# Disable CLKREQ#, since onboard LAN is always present
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@ -147,7 +131,7 @@ chip soc/intel/skylake
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register "PcieRpLtrEnable[5]" = "1"
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register "PcieRpClkSrcNumber[5]" = "1"
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end
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device pci 1c.6 on # PCI Express Port 7 - PCIE slot
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device ref pcie_rp7 on
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register "PcieRpEnable[6]" = "1"
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register "PcieRpClkReqSupport[6]" = "1"
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register "PcieRpClkReqNumber[6]" = "3"
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@ -156,19 +140,7 @@ chip soc/intel/skylake
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register "PcieRpClkSrcNumber[6]" = "3"
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register "PcieRpHotPlug[6]" = "1"
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end
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 off end # PCI Express Port 9
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1e.0 off end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.4 off end # eMMC
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device pci 1e.5 off end # SDIO
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device pci 1e.6 off end # SDCard
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device pci 1f.0 on # LPC bridge
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device ref lpc_espi on
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subsystemid 0x1849 0x1a43
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# Set @0x280-0x2ff I/O Range for SuperIO HWM
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@ -281,14 +253,11 @@ chip soc/intel/skylake
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chip drivers/pc80/tpm
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device pnp 4e.0 on end # TPM module
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end
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end # LPC Interface
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device pci 1f.1 on end # P2SB
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device pci 1f.2 on end # Power Management Controller
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device pci 1f.3 on # Intel HDA
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end
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device ref hda on
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register "PchHdaVcType" = "Vc1"
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end
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device pci 1f.4 on end # SMBus
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device pci 1f.5 on end # PCH SPI
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device pci 1f.6 off end # GbE
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device ref smbus on end
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device ref fast_spi on end
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end
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end
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