nb/amdk8: Link coherent_ht.c

Change-Id: I1ef1323dc1f3005ed194ad82b75c87ef41864217
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19367
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/include/cpu/amd/model_fxx_rev.h

@@ -1,4 +1,5 @@
 #include <arch/cpu.h>
+#include <arch/io.h>
 
 int init_processor_name(void);
 

src/mainboard/amd/dbm690t/romstage.c

@@ -46,7 +46,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/amd/mahogany/romstage.c

@@ -49,7 +49,6 @@ int spd_read_byte(u32 device, u32 address)
 #include "southbridge/amd/rs780/early_setup.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/amd/pistachio/romstage.c

@@ -42,7 +42,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/amd/serengeti_cheetah/romstage.c

@@ -67,7 +67,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 #include "southbridge/amd/amd8111/early_ctrl.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asrock/939a785gmh/romstage.c

@@ -52,7 +52,6 @@ int spd_read_byte(u32 device, u32 address)
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/a8n_e/romstage.c

@@ -40,7 +40,6 @@
 
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <spd.h>
 #include <northbridge/amd/amdk8/pre_f.h>

src/mainboard/asus/a8v-e_deluxe/romstage.c

@@ -73,7 +73,6 @@ void soft_reset(void)
 #include "southbridge/via/k8t890/early_car.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/a8v-e_se/romstage.c

@@ -73,7 +73,6 @@ void soft_reset(void)
 #include "southbridge/via/k8t890/early_car.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/k8v-x/romstage.c

@@ -71,7 +71,6 @@ void soft_reset(void)
 #include "southbridge/via/k8t890/early_car.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/kfsn4-dre_k8/romstage.c

@@ -52,7 +52,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/m2n-e/romstage.c

@@ -64,7 +64,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/asus/m2v-mx_se/romstage.c

@@ -56,7 +56,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/via/k8t890/early_car.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include "cpu/amd/model_fxx/init_cpus.c"

src/mainboard/asus/m2v/romstage.c

@@ -58,7 +58,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/via/k8t890/early_car.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include "cpu/amd/model_fxx/init_cpus.c"

src/mainboard/broadcom/blast/romstage.c

@@ -39,7 +39,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include "southbridge/broadcom/bcm5785/early_setup.c"
 #include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -53,7 +53,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/gigabyte/m57sli/romstage.c

@@ -71,7 +71,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/hp/dl145_g1/romstage.c

@@ -84,7 +84,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
 #include "resourcemap.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <spd.h>

src/mainboard/hp/dl145_g3/romstage.c

@@ -65,7 +65,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/broadcom/bcm5785/early_setup.c"
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include <spd.h>
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/iwill/dk8_htx/romstage.c

@@ -58,7 +58,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/amd/amd8111/early_ctrl.c"
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"

src/mainboard/kontron/kt690/romstage.c

@@ -47,7 +47,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/msi/ms7135/romstage.c

@@ -37,7 +37,6 @@
 
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <spd.h>
 #include <northbridge/amd/amdk8/pre_f.h>

src/mainboard/msi/ms7260/romstage.c

@@ -63,7 +63,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/msi/ms9185/romstage.c

@@ -63,7 +63,6 @@ int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/broadcom/bcm5785/early_setup.c"
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/msi/ms9282/romstage.c

@@ -72,7 +72,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/nvidia/l1_2pvv/romstage.c

@@ -62,7 +62,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/siemens/sitemp_g1p1/romstage.c

@@ -62,7 +62,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/sunw/ultra40/romstage.c

@@ -47,7 +47,6 @@ int spd_read_byte(unsigned device, unsigned address)
 }
 
 #include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/sunw/ultra40m2/romstage.c

@@ -61,7 +61,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/supermicro/h8dme/romstage.c

@@ -71,7 +71,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/supermicro/h8dmr/romstage.c

@@ -63,7 +63,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/technexion/tim5690/romstage.c

@@ -47,7 +47,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/technexion/tim8690/romstage.c

@@ -48,7 +48,6 @@ int spd_read_byte(u32 device, u32 address)
 
 #include <northbridge/amd/amdk8/amdk8.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/tyan/s2912/romstage.c

@@ -62,7 +62,6 @@ int spd_read_byte(unsigned device, unsigned address)
 
 #include <northbridge/amd/amdk8/f.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
 #include "cpu/amd/dualcore/dualcore.c"

src/mainboard/winent/mb6047/romstage.c

@@ -32,7 +32,6 @@ int spd_read_byte(unsigned device, unsigned address)
 }
 
 #include "northbridge/amd/amdk8/raminit.c"
-#include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <southbridge/nvidia/ck804/early_setup_ss.h>

src/northbridge/amd/amdk8/Makefile.inc

@@ -12,6 +12,7 @@ romstage-y += raminit_f.c
 endif
 
 romstage-y += reset_test.c
+romstage-y += coherent_ht.c
 
 # Enable this if you want to check the values of the PCI routing registers.
 # Call show_all_routes() anywhere amdk8.h is included.

src/northbridge/amd/amdk8/amdk8.h

@@ -15,10 +15,22 @@
 #define HTIC_BIOSR_Detect  (1<<5)
 #define HTIC_INIT_Detect   (1<<6)
 
+#define NODE_HT(x) PCI_DEV(0,24+x,0)
+#define NODE_MP(x) PCI_DEV(0,24+x,1)
+#define NODE_MC(x) PCI_DEV(0,24+x,3)
+
+
 #ifdef __PRE_RAM__
 void showallroutes(int level, pci_devfn_t dev);
 void setup_resource_map_offset(const unsigned int *register_values, int max, unsigned offset_pci_dev, unsigned offset_io_base);
 void fill_mem_ctrl(int controllers, struct mem_controller *ctrl_a, const uint16_t *spd_addr);
+int optimize_link_coherent_ht(void);
+unsigned int get_nodes(void);
+#if CONFIG_RAMINIT_SYSINFO
+void setup_coherent_ht_domain(void);
+#else
+int setup_coherent_ht_domain(void);
+#endif
 #endif
 
 void set_bios_reset(void);

src/northbridge/amd/amdk8/coherent_ht.c

@@ -63,11 +63,14 @@
 			CPU1-------------CPU0
  */
 
+#include <console/console.h>
+#include <cpu/amd/model_fxx_rev.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/hypertransport_def.h>
 #include <lib.h>
 #include <stdlib.h>
+#include <stdint.h>
 #include <arch/io.h>
 #include <pc80/mc146818rtc.h>
 #if CONFIG_HAVE_OPTION_TABLE
@@ -78,10 +81,6 @@
 
 #define enable_bsp_routing()	enable_routing(0)
 
-#define NODE_HT(x) PCI_DEV(0,24+x,0)
-#define NODE_MP(x) PCI_DEV(0,24+x,1)
-#define NODE_MC(x) PCI_DEV(0,24+x,3)
-
 #define DEFAULT 0x00010101	/* default row entry */
 
 
@@ -1703,12 +1702,12 @@ static int optimize_link_read_pointers(unsigned nodes)
 	return needs_reset;
 }
 
-static inline unsigned get_nodes(void)
+unsigned int get_nodes(void)
 {
 	return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
 }
 
-static int optimize_link_coherent_ht(void)
+int optimize_link_coherent_ht(void)
 {
 	int needs_reset = 0;
 
@@ -1772,9 +1771,9 @@ static int optimize_link_coherent_ht(void)
 }
 
 #if CONFIG_RAMINIT_SYSINFO
-static void setup_coherent_ht_domain(void)
+void setup_coherent_ht_domain(void)
 #else
-static int setup_coherent_ht_domain(void)
+int setup_coherent_ht_domain(void)
 #endif
 {
 	unsigned nodes;

src/northbridge/amd/amdk8/incoherent_ht.c

@@ -7,6 +7,7 @@
 #include <device/pci_ids.h>
 #include <device/hypertransport_def.h>
 #include <lib.h>
+#include "amdk8.h"
 
 // Do we need allocate MMIO? Current We direct last 64M to sblink only, We can not lose access to last 4M range to ROM
 #ifndef K8_ALLOCATE_MMIO_RANGE
@@ -649,8 +650,6 @@ static int ht_setup_chains(uint8_t ht_c_num)
 
 }
 
-static inline unsigned get_nodes(void);
-
 #if CONFIG_RAMINIT_SYSINFO
 static void ht_setup_chains_x(struct sys_info *sysinfo)
 #else