Felix Singer
c92c87b2fd
mb/google/zork/acpi: Use Printf() for debug prints
...
Change-Id: I433b7138da84b57e45e816ab116f8ca874fdc0e0
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:30:44 +00:00
Felix Singer
3884a411dc
mb/google/auron/acpi: Use Printf() for debug prints
...
Change-Id: Ib06452c7b89c328d124e98669178b5dd3fc235f8
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60422
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:30:20 +00:00
Felix Singer
7f25f14e00
mb/hp/pavilion_m6_1035dx/acpi: Use Printf() for debug prints
...
Change-Id: Idf84b7333e94dfa9caf0aa477b87e3156c24d5cd
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60421
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:30:09 +00:00
Felix Singer
4878940de3
mb/lenovo/g505s/acpi: Use Printf() for debug prints
...
Change-Id: Ibc775cda61134523dc03a073676b9d035ea48472
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60420
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:29:54 +00:00
Felix Singer
a8b0c1a024
mb/roda/rk886ex/acpi: Use Printf() for debug prints
...
Change-Id: I6091d81d49e5ae6bf30a03d2fb2d54f0ec6533d1
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60419
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:29:41 +00:00
Felix Singer
b385640e83
mb/roda/rk9/acpi: Use Printf() for debug prints
...
Change-Id: Ic461c109b3c6d08cc3cda60f23e673157cd782f9
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr >
2021-12-29 18:29:28 +00:00
Felix Singer
58e6789e5f
ec/quanta/ene_kb3940q/acpi: Use Printf() for debug prints
...
Change-Id: I4b829a54bbbb8e7442e59feaf2e7dbf8556b590d
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-29 18:29:16 +00:00
Felix Singer
dcebf6c791
ec/purism/librem-ec/acpi: Use Printf() for debug prints
...
Change-Id: Ic26c24d1246f8a40191e02229e66f6a893e488fa
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-29 13:36:27 +00:00
Felix Singer
e0625f8c8b
ec/hp/kbc1126/acpi: Use Printf() for debug prints
...
Built with BUILD_TIMELESS=1 and coreboot.rom remains identical.
Change-Id: Id343bde61706d4d1de2102c3567141e427d8126d
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60383
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-29 13:35:48 +00:00
Felix Singer
3462a1b858
ec/chromeec/ec/acpi: Use Printf() for debug prints
...
Built with BUILD_TIMELESS=1 and coreboot.rom remains identical.
Change-Id: I2b06f74be155e0c4053a38a1c5fd30ff6715111e
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-29 13:35:38 +00:00
Felix Singer
acc2ce9758
ec/starlabs/merlin: Use Printf() for debug prints
...
Built with BUILD_TIMELESS=1 and coreboot.rom remains identical.
Change-Id: Ib59cba7bf553e8323c20fd9aa3474f3ecccf465a
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-29 13:35:23 +00:00
Rex-BC Chen
d05f2319df
mb/google/corsola: Initialize kingler display
...
ANX7625 is used on Kingler board as the eDP bridge IC. Enable ANX7625
and configure display in mainboard_init() to support display in
firmware screen.
BUG=b:209930699
TEST=saw firmware display on eDP panel of kingler board.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: Ie8de5d8ba150d3ae086c7635601dbc0846aebe91
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-29 07:53:26 +00:00
Rex-BC Chen
d67de90708
soc/mediatek/mt8186: Add DSI driver
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Enable DSI for display.
BUG=b:209930699
TEST=Firmware display looked good
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: Idb6bd3a1d32ac96a9d1a2553b8a70db4e59eec16
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-29 07:53:12 +00:00
Rex-BC Chen
783e2bff53
soc/mediatek/mt8186: Add DDP driver
...
Add DDP (display controller) driver that supports main path to
eDP panel. The output goes to display interface DSI.
BUG=b:209930699
TEST=saw firmware display
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: Ic4fb40832b5dc7a815b37266259b2e3281ee79f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-29 07:52:35 +00:00
Rex-BC Chen
1f796dacf7
mb/google/corsola: Add board common config for kingler and krabby
...
Add common configs to help implementing board-specific logic
(for example using different eDP bridge IC drivers).
BUG=b:209930699
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: If775532c1a262f3e8b3f11b24cae555844f2bfec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-29 07:52:22 +00:00
Ryan Chuang
550c072365
mb/google/corsola: Fully calibrate DRAM
...
Initialize and calibrate DRAM in romstage.
DRAM full calibration logs:
dram_init: dram init end (result: 1)
DRAM-K: Full calibration passed in 20014 msecs
TEST=DRAM full calibration pass.
BUG=b:202871018
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com >
Change-Id: I80a18a8be5b1d47a5f0f7afed9601c0884e69035
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-29 07:52:06 +00:00
Ryan Chuang
31531eab35
soc/mediatek/mt8186: Add DRAM full calibration support
...
Use common SoC drivers for DRAM calibration support.
TEST=build pass.
BUG=b:202871018
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com >
Change-Id: Ie1a1e04da0cce9aaf86588a94c64d2242e7cb4b7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
Reviewed-by: Paul Menzel <paulepanter@mailbox.org >
2021-12-29 07:46:00 +00:00
Ryan Chuang
773c007af4
soc/mediatek/mt8186: Add header files to support DRAM calibration
...
Remove emi.h because emi.h is defined in common/include/soc.
Add dramc_param.h and dramc_soc.h to prepare for implementation of
DRAM full calibration.
TEST=build pass.
BUG=b:202871018
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com >
Change-Id: If8662ed43088ea5aa1fe6cb5b2c4bda2338c4387
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60385
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-29 07:45:26 +00:00
Felix Singer
7b168c92f6
mb/google/brya: Reorder selects alphabetically
...
Change-Id: Ie03f7049b013648372b002ce9b731589b1fffabd
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60371
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-28 12:30:30 +00:00
Felix Singer
bb3300c14a
mb/google/volteer/Kconfig: Reorder selects alphabetically
...
Change-Id: I2416456bd447a6296ca3fac6cf90aa2e78f6de57
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:56:34 +00:00
Felix Singer
1a0b557822
mb/google/deltaur/Kconfig: Reorder selects alphabetically
...
Change-Id: I36a02f8d509ef39983b4162188abc0cbc3d570cf
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:54:09 +00:00
Felix Singer
2b222a0a1a
mb/google/cyan/Kconfig: Reorder selects alphabetically
...
Change-Id: I445dbe5d1f744c6512d618efdc927509d5ba291f
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60361
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:53:33 +00:00
Felix Singer
994541e8a3
mb/google/auron/Kconfig: Reorder selects alphabetically
...
Change-Id: I1c438e53adc835df0a3f9436f94e0f5341cf79dd
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:52:44 +00:00
Felix Singer
4cadff28aa
mb/google/beltino/Kconfig: Reorder selects alphabetically
...
Change-Id: If4ba4b2a7a358ad86b547b16a12593b912f9bd8f
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:52:07 +00:00
Felix Singer
43ff69626d
mb/google/jecht/Kconfig: Reorder selects alphabetically
...
Change-Id: I2287ae1357e0f02a42ebd770ee799613fd29c033
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:51:30 +00:00
Felix Singer
b8ea301e71
mb/google/slippy/Kconfig: Reorder selects alphabetically
...
Change-Id: I7691cf37da03e6a689efcb84527ba519fe661258
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60351
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:50:46 +00:00
Felix Singer
2ab680ed44
mb/google/butterfly/Kconfig: Reorder selects alphabetically
...
Change-Id: Ifc6708c2e864e5dcba12d53af24993dc173fca7f
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:50:01 +00:00
Felix Singer
bdcf92f5c3
mb/google/link/Kconfig: Reorder selects alphabetically
...
Change-Id: I019ba38015b245f69c9663fd93775409c7d9cb1b
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:48:26 +00:00
Felix Singer
c584476fda
mb/google/parrot/Kconfig: Reorder selects alphabetically
...
Change-Id: I7e99a44dcb512f0eb4355663cdc8dac690211dab
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60348
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:47:25 +00:00
Felix Singer
27b9b5b72e
mb/google/stout/Kconfig: Reorder selects alphabetically
...
Change-Id: Icd58cd466c8e85625170bb14e66fc068758883f5
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:45:03 +00:00
Felix Singer
1fe5c61b75
mb/google/rambi/Kconfig: Reorder selects alphabetically
...
Change-Id: I22e189dfa9b8944341aafcafe4e97dca65558937
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:44:12 +00:00
Felix Singer
7cfaa5d74c
mb/google/octopus/Kconfig: Reorder selects alphabetically
...
Change-Id: I545a1111e24f45f732f1c325c808737dfb6bcae6
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2021-12-28 10:42:55 +00:00
Yu-Ping Wu
f8f5062430
soc/mediatek: Prevent passing NULL MIPI commands
...
Previously (before CB:56965 [1]) mtk_dsi_send_init_command() would
ignore NULL initialization commands passed to it. However, in the
current code mipi_panel_parse_init_commands() doesn't check that (see
CB:57150 [2]), so we should check it on the caller side from
mtk_dsi_init().
[1] b2a14801914757a7ea33yupingso@chromium.org >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60392
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Hung-Te Lin <hungte@chromium.org >
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
2021-12-28 09:36:42 +00:00
Rex-BC Chen
db01d1e2fc
soc/mediatek/mt8186: Enable VRF12 software control for MT6366
...
PS8640 is a low power MIPI-to-eDP video format converter.
VRF12 does not provide power to PS8640 on krabby.
In original patch, VRF12 is not used, and is set to hardware control
for low power. We change the setting to remove hardware control.
Therefore, if we want to control VRF12 by software, we can control
it directly.
BUG=b:210806060
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: I87d6a94b6fb343590d563ac1554ff87b11c01549
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-28 09:34:34 +00:00
Runyang Chen
a0583a46b9
soc/mediatek/mt8186: Add devapc basic drivers
...
Add basic devapc (device access permission control) drivers.
DAPC driver is used to set up bus fabric security and data protection
among hardwares. DAPC driver groups the master hardwares into different
domains and gives secure and non-secure property. The slave hardware can
configure different access permissions for different domains via DAPC
driver.
1. Initialize devapc.
2. Set master domain and secure side band.
3. Set default permission.
BUG=b:202871018
TEST=build pass
Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com >
Change-Id: I5dad4f342eef3136c24c38259ad176dc86b7c0d7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-28 09:34:07 +00:00
Rex-BC Chen
800b24f7f7
soc/mediatek/mt8195: Move some definations of devapc to common folder
...
Move some definations of devapc for sharing between MT8195 and MT8186.
BUG=b:202871018
TEST=emerge-cherry coreboot; emerge-corsola coreboot;
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: Ia1769ede790f106a320ead9be7e2a596fe96930a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-28 09:33:35 +00:00
Rex-BC Chen
32992f264f
soc/mediatek/mt8186: Adjust usage of SRAM L2C
...
We use parts of SRAM_L2C as the memory of PRERAM_CBMEM_CONSOLE before
DRAM calibration. When we check cbmem, we found the content of this
memory is unreadable.
The L3 (can be used as SRAM_L2C) is 1MB in total. However the BootROM
has configured only half of L2/L3 cache as SRAM. Therefore, decrease
the size of each SRAM region to fit into the first half of the cache.
BUG=b:207725851
TEST=Bootblock log looked good in `cbmem -c`
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Change-Id: I6041767a1ac0a48ecdda29a0c35d90acf6ad0ef2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60316
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
2021-12-28 09:32:56 +00:00
Subrata Banik
e226aabf79
mb/google/brya: Rework BOARD_GOOGLE_BASEBOARD_* Kconfig
...
Current mainboard code supports different baseboard binding
example: brya uses BOARD_GOOGLE_BASEBOARD_BRYA and brask uses
BOARD_GOOGLE_BASEBOARD_BRASK Kconfig.
This patch makes the `BOARD_GOOGLE_BRYA_COMMON` Kconfig default
`n` and specific baseboard binding Kconfig can select this Kconfig.
It would also avoid adding if clause for specific baseboard binding
Kconfig everytime with introduction of newer mainboard in future.
TEST=Verified CONFIG_BOARD_GOOGLE_BRYA_COMMON=y while building brya
and brya coreboot.rom remains the same.
Signed-off-by: Subrata Banik <subratabanik@google.com >
Change-Id: I754159447e68b8ac2ea21009cc801fc5ba5df56e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-by: Felix Singer <felixsinger@posteo.net >
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com >
2021-12-26 19:37:09 +00:00
Subrata Banik
c1e46bde50
mb/google/brya: Move PCH selection to variant config
...
This patch ensures ADL-P PCH can get selected by mainboard
variants to accommodate mainboards with ADL-N PCH in future.
TEST=Able to build and boot brya without any Kconfig change.
Signed-off-by: Subrata Banik <subratabanik@google.com >
Change-Id: Ifbcd1cd7f8ecafee22d50c3f3f20decc4cc62797
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60378
Reviewed-by: Felix Singer <felixsinger@posteo.net >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-26 19:35:43 +00:00
Felix Singer
9758ef9c84
util/liveiso: Install mtdutils
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Change-Id: I1416d8f783518eca0606efef4314a3d86837b016
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de >
2021-12-26 12:07:16 +00:00
Felix Singer
eb4edc3ef1
util/liveiso: Disable write protection of the intel-spi driver
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The intel-spi driver maps the BIOS region of the flash as an mtd device
at /dev/mtdX. Since this system is intended for development purposes,
disable its write protection.
Change-Id: Ib73d14eb4e7df6e29433b8dfbeb77dbab4a85f08
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de >
2021-12-26 12:06:53 +00:00
Felix Singer
edb4f759ea
util/liveiso: Ensure compatible NixOS channel is used
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Config options and package names might change from channel to channel.
Thus, don't let nix-build depend on the locally configured NixOS
channel, but instead let `nixpkgs` point to a specific channel to ensure
that always a compatible channel is used.
For now, let `nixpkgs` point to NixOS 21.11, which is currently the
latest stable release. This needs to be updated after a new release.
Change-Id: Ia77c34f93f0e2c3d351ae229830adfce75a56ae4
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de >
2021-12-26 12:06:37 +00:00
Felix Singer
5e4232d389
util/liveiso: Merge build scripts
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Merge build scripts to `build.sh`. The new one takes the desired NixOS
config as an argument.
Example:
$ build.sh console.nix
Change-Id: I49360a5c57954a205c697a4ae07361779db2aa83
Signed-off-by: Felix Singer <felixsinger@posteo.net >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60372
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-26 12:05:23 +00:00
Rex-BC Chen
f371a78d90
soc/medaitek/mt8195: adjust USB phy shift value
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There is a design issue of bit shift which will drop a bit for
USB3 phy on MT8195. Therefore, we add this patch to set USB phy
registers from value of efuse.
BUG=b:211528577
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com >
Signed-off-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com >
Tested-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com >
Change-Id: I43cb6c1c795dd181d6eba7f3bc52e4eb1a602081
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60312
Reviewed-by: Yu-Ping Wu <yupingso@google.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-26 10:05:22 +00:00
Joey Peng
d22cdbe73f
mb/google/brya/var/taeko4es: Set vGPIO reset type
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Copied from commit df72b18djoey.peng@lcfc.corp-partner.google.com >
Change-Id: Id0df489fe5513c4975747d52c97cb3ee8e691782
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60186
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: YH Lin <yueherngl@google.com >
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org >
2021-12-26 10:04:06 +00:00
Angel Pons
d45b113fb5
soc/intel/{skl,cnl}: Guard USB macro parameters
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Add parentheses around the parameter of the `USB_PORT_WAKE_ENABLE`
macro to prevent unintentional operator precedence problems.
Change-Id: I61fbacc129cbfb42ade7e64ee40cd07c98d87683
Signed-off-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org >
Reviewed-by: Felix Singer <felixsinger@posteo.net >
2021-12-26 10:03:41 +00:00
Michael Büchler
b84476bcea
mb/acer/g43t-am3: Add documentation
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Signed-off-by: Michael Büchler <michael.buechler@posteo.net >
Change-Id: I0e296b3efbff0260f32badc699f1062f9885fa53
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
2021-12-26 10:03:14 +00:00
Tim Wawrzynczak
b09459fcef
Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02""
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This reverts commit a4dddfc3a3twawrzynczak@chromium.org >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-by: Felix Singer <felixsinger@posteo.net >
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com >
2021-12-26 10:02:55 +00:00
Kenneth Chan
647dd8a6bf
mb/google/guybrush/var/dewatt: update telemetry value
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AMD SDLE testing had been done and apply the following telemetry settings for dewatt:
vdd scale: 95359
vdd offset: 449
soc scale: 31481
soc offset: 193
BUG=b:211566312
TEST=1. emerge-guybrush coreboot
2. pass AMD SDLE test
Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com >
Change-Id: I597a51ca599eff2abc9640aba5f3c804a686f057
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Rob Barnes <robbarnes@google.com >
2021-12-26 10:01:49 +00:00
Angel Pons
ec3c2e2e6b
include/types.h: #include <limits.h>
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It makes sense to provide limits.h via the types.h header.
Change-Id: I3ba189b998644c68068b85f25b11cff4d70c037d
Signed-off-by: Angel Pons <th3fanbus@gmail.com >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55320
Reviewed-by: Nico Huber <nico.h@gmx.de >
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org >
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2021-12-26 09:59:12 +00:00
