Zheng Bao
695d86243e
amd/microcode: Change equivalant ID width to 16bit
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The definition of processor_rev_id in struct microcode
is 16 bits. So we need to change the a series of parameters
passing to 16 bits.
Change-Id: Iacabee7e571bd37f3aca106d515d755969daf8f3
Signed-off-by: Zheng Bao <zheng.bao@amd.com >
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
2020-06-02 18:55:01 +00:00
Elyes HAOUAS
52648623e0
Remove empty lines at end of file
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Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;
Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2015-06-08 00:55:07 +02:00
Kyösti Mälkki
5fe1fb7a5f
cpu/amd (non-AGESA): Load microcode updates from CBFS
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Change-Id: Ic67856414ea2fea9a9eb95d72136cb05da9483fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com >
Reviewed-on: http://review.coreboot.org/4502
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com >
2015-02-03 04:51:52 +01:00
Alexandru Gagniuc
893b81f79f
cpu/amd/model_10xxx: Remove UPDATE_CPU_MICROCODE option
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This option is now deperecated by loading microcode updates from cbfs.
Remove this option in anticipation of implementing CBFS loading for
AMD cpus. Removing it beforehand results in less patch overhead.
Change-Id: Ibdef7843db686734e2b6b1568692720fb543b240
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com >
Reviewed-on: http://review.coreboot.org/8322
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com >
2015-02-03 04:51:43 +01:00
Kyösti Mälkki
f0a13ceb63
AMD boards: Fix includes for microcode updates
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No ROMCC involved, no need to include .c files in romstage.c.
Change-Id: I8a2aaf84276f2931d0a0557ba29e359fa06e2fba
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: http://review.coreboot.org/4501
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com >
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
2013-12-09 23:28:43 +01:00
Myles Watson
83cce3e8de
Fix a typo to remove a few more warnings.
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Signed-off-by: Myles Watson <mylesgw@gmail.com >
Acked-by: Myles Watson <mylesgw@gmail.com >
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-16 13:43:49 +00:00
Myles Watson
075fbe8201
Remove a few more warnings from fam10.
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Signed-off-by: Myles Watson <mylesgw@gmail.com >
Acked-by: Myles Watson <mylesgw@gmail.com >
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-04-15 05:19:29 +00:00
Stefan Reinauer
50776fab1c
trivial warning fixes, mostly for ACPI code
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de >
Acked-by: Stefan Reinauer <stepan@coresystems.de >
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-17 04:40:15 +00:00
Yinghai Lu
d4b278c02c
AMD Rev F support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04 20:46:15 +00:00
Li-Ta Lo
c7a96514e3
added missing microcode.h
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-23 21:51:30 +00:00
