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Author SHA1 Message Date
Jeremy Soller
751ea90c7d Set correct EFS flags 
Change-Id: Ib5daf6083745ad28b9d9387ed5148ea66976b9d6
 2021-11-02 19:44:08 -06:00
Jeremy Soller
7c48e249eb Use DDR4 ABL0 
Change-Id: I250140f236a8801ea59c0a5f0fdda14db278f984
 2021-11-02 18:52:34 -06:00
Jeremy Soller
a824ce0adc Add amdfw.cfg 
Change-Id: I64d94874a33973206352a772d77f80112083d78f
 2021-11-02 18:35:54 -06:00
Jeremy Soller
b74e887089 Add APCB 
Change-Id: I7ba14d6ea9fdad113da7466b0ed093e2d510fac0
 2021-11-02 17:05:40 -06:00
Jeremy Soller
d3e7769bd5 Use LPC 
Change-Id: I77f68d7098dc89fb92ed328fee7ccdfcff32fe03
 2021-11-02 15:06:50 -06:00
Jeremy Soller
f5b781a0d6 Add more AMD firmware settings 
Change-Id: I8834f04a7945370d7454ef41252ad5db20762054
 2021-11-02 09:21:15 -06:00
Jeremy Soller
2d39e517de WIP 
Change-Id: I72b2008b6d67d53d618d453eb0ea7af7d0475e65
 2021-11-02 08:41:33 -06:00
Jeremy Soller
c0c283a0f2 mb/system76/lemp9: Fix TPM error message 
Change-Id: Id5456c0d6abee6d79761fae0bed78cc6def351f3
 2021-11-01 14:22:37 -06:00
Jeremy Soller
36e83227f2 mb/system76: select TPM_RDRESP_NEED_DELAY 
Change-Id: I7909b05e9203ce9ad07c8e87a847bc46cf281b34
 2021-11-01 14:22:37 -06:00
Jeremy Soller
a9646c604d soc/intel: Add Cometlake-H/S Q0 (10+2) CPU 
Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453
 2021-11-01 14:22:37 -06:00
Jeremy Soller
9315674b5c intel/block/pcie/rtd3: Also implement _PR3 
Change-Id: Id7f4373989dffe8c3bc68a034f59a94d2160dd15
Signed-off-by: Jeremy Soller <jeremy@system76.com>
 2021-11-01 14:22:37 -06:00
Jeremy Soller
5751903cb0 intel/block/pcie/rtd3: ACPI debug messages 
Change-Id: Icc4a882ff73f62a134b92f1afb0dc298ea809189
 2021-11-01 14:22:37 -06:00
Jeremy Soller
97014a5ab9 soc/intel/tigerlake: Remove write to IOP TCSS_IN_D3 
Change-Id: Ibbf6b5e0bf627536d10c8dee2f632e66da427151
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:37 -06:00
Tim Crawford
a377b8b744 mb/system76/*: Disable IME by CMOS option 
Add CMOS option to set IME mode. Default to "Disable" for CNL and TGL-H,
and "Enable" for TGL-U. Not set for KBL, which uses ME_CLEANER.

HECI device must be enabled in devicetree for switching modes to
function correctly.

Change-Id: I9b400c05c38bf76c02c4a2b113bf843b0240a75f
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:37 -06:00
Tim Crawford
386654ac73 soc/intel/common/cse: Add option to set IME mode 
Add function to have CSME firmware enter Soft Temporary Disable mode,
and a corresponding function to put it back into Normal mode. A global
reset is required for the CSME to change modes.

Control changing modes by a new option "ime_mode". Possible values are

- Enable (0): Set the current operation mode to Normal
- Disable (1): Set the current operation mode to Soft Temporary Disable

Reference:
- Intel doc #612229 (CSME 15.0 BIOS Specification)

Change-Id: I38d320fbb157a628c5decc90e6ced78efbf85e0d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:37 -06:00
Jeremy Soller
3be5988d50 mb/system76/*: Add dGPU fan/temp reporting 
Change-Id: I360e1c96b4893997efa003910937b03fafcc3b91
 2021-11-01 14:22:37 -06:00
Tim Crawford
809eb8d9e1 mb/system76/*: Enable dGPUs 
Change-Id: Ib5bab02801407c8bf05e6028bf8f9fa7ccc5ecd0
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:37 -06:00
Tim Crawford
65e010815e drivers/gfx/nvidia: Add driver for NVIDIA Optimus 
Add a driver for systems with NVIDIA Optimus (hybrid) graphics using
GC6 3.0. The driver provides ACPI support for dynamically powering on
and off the GPU, and a function for enabling the GPU power in romstage.

Tested on system76/gaze15.

Change-Id: I2dec7aa2c8db7994f78a7cc1220502676e248465
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:37 -06:00
Tim Crawford
1648fb16f7 mb/system76/*: Remove power_on_after_fail 
Setting this causes boot to fail when upgrading from a version that did
not have it already set to Enabled.

Change-Id: I3d04cd659d5d53745de618703ec1590ca499f70a
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:35 -06:00
Tim Crawford
df3056e91e mb/system76/*: Apply custom backlight levels 
Change-Id: Ibea37f19acca0d718211fc41706019a92a240c70
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:11 -06:00
Jeremy Soller
c22e86f5ac mb/system76/oryp8: Add System76 Oryx Pro 8 
Tested with TianoCore (UeifPayloadPkg).

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots
- Both M.2 SSD slots
- All USB ports
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone & microphone jack
- Combined 3.5mm microphone & S/PDIF jack*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.10 and Windows 10 20H2
- Flashing with flashrom

Not working:

- Discrete/Hybrid graphics

Not tested:

- Thunderbolt functionality
- S/PDIF output

Change-Id: Iabc8e273f997d7f5852ddec63e0c1bf0c9434acb
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:11 -06:00
Jeremy Soller
af76549f85 mb/system76/gaze16: Add System76 Gazelle 16 
https://tech-docs.system76.com/models/gaze16/README.html

The gaze16 comes in 3 variants due to differences in the discrete GPU
and network controller used.

- NVIDIA RTX 3050, using Realtek Ethernet controller
- NVIDIA RTX 3060, using Realtek Ethernet controller
- NVIDIA RTX 3060, using onboard Intel I219-V Ethernet controller

Tested on the 3050 variant.
Tested with TianoCore (UefiPayloadPkg).

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- M.2 SATA SSD
- 2.5" SSD
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio*
- 3.5mm microphone input*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.04 and Windows 10 20H2
- Flashing with flashrom

Not working:

- Discrete/Hybrid graphics
- Mini DisplayPort output (requires NVIDIA GPU)
- 3.5mm audio input/output detection on Windows

Change-Id: Ifb90f9b73a10abf53a21738e2c466d539df9a37c
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 14:22:11 -06:00
Jeremy Soller
77ff4cff6a mb/system76/oryp6: Add Oryx Pro 7 as a variant 
Change-Id: Id00a45a6a6acf0880934c55f1a3f18e63f2aed43
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:26 -06:00
Tim Crawford
94aa223b8e mb/system76/oryp6: Convert to variant setup 
The Oryx Pro 6 has the same board layout as the next model in series,
Oryx Pro 7. The primary difference between the two is the dGPU (20
series to 30 series). Convert oryp6 to a variant setup in preparation
for adding the oryp7.

Change-Id: I976750c7724d23b303d0012f2d83c21a459e5eed
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:26 -06:00
Tim Crawford
edbaa9a751 mb/system76/gaze15: Add Gazelle 14 as a variant 
Change-Id: Ib455951d1d26ddfa010d4eb579905235bd1385a9
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:26 -06:00
Tim Crawford
5cb77c9dcc mb/system76/gaze15: Convert to variant setup 
Change-Id: I6d8a97d71ff3b4408f5e11230ed3ff00357f7123
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:25 -06:00
Jeremy Soller
9d11df6b52 mb/system76/bonw14: Add System76 Bonobo Workstation 14 
Change-Id: I55a827f8d6a5421c36f77049935630f4db4ba04d
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:25 -06:00
Tim Crawford
91ad629e0e mb/system76/kbl-u: Add Galago Pro 2 as a variant 
Change-Id: Ia277b3ad50c9f821ab3e1dcb8327314ba955fa79
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:25 -06:00
Tim Crawford
954ec2a152 mb/system76/kbl-u: Add Galago Pro 3 as a variant 
Change-Id: Ie203883cc9418585da4f9c7acd89e7624234caf1
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:25 -06:00
Tim Crawford
4cff301ce9 mb/system76/kbl-u: Add System76 Galago Pro 3 Rev B 
Change-Id: I25464d3a2dd02e613a8392db90b1eaf0f9b3ca70
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2021-11-01 13:59:25 -06:00
Raul E Rangel
0f4b8a24db commonlib/region: Add rdev_readat_full helper method 
This helper method makes the code a bit cleaner.

BUG=b:179699789
TEST=none

Suggested-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ie442217eba2e8f99de1407d61f965428b5c6f3bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
 2021-11-01 18:01:53 +00:00
Matt DeVillier
67258983e6 payloads/Tianocore: re-add CorebootPayload build option 
Some older devices, like the x230 Thinkpad, do not boot with the
newer Tianocore UefiPayloadPkg build target, and cannot easily be
debugged without serial UART output. As a stopgap solution, re-add
the older (now deprecated/removed) CorebootPayloadPkg build target.

This partially reverts commit d3b49b4c,
"payloads/Tianocore: Update default build target, simplify build options"

Change-Id: I81490c277626fc69d95920868d80cb24c0763de4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
 2021-11-01 16:36:03 +00:00
Patrick Georgi
f32eed1695 buildgcc: Remove GDB from crossgcc 
It was added for a specific defunct project by a specific defunct
company.

Change-Id: Ib56ae0fdc1a50d24ff44c7879c43f8e94a5bfa95
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
 2021-11-01 16:26:50 +00:00
Sean Rhodes
b5b22a74a6 soc/intel: Don't send CSE EOP if CSME is disabled 
CSE EOP will fail if the CSE is disabled (CB:52800)

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ic00fdb0d97fefac977c0878d1d5893d07d4481ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2021-11-01 16:13:31 +00:00
Angel Pons
8d5b674739 soc/intel/braswell: Set GNVS DPTE via devicetree 
Introduce the `dptf_enable` devicetree setting to set the DPTE GNVS
field, as newer Intel platforms do.

Change-Id: I88b746c64ca57604f946eefb00a70487a2fb27c0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57988
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
 2021-11-01 16:02:13 +00:00
Angel Pons
fbca40c9cc soc/intel/braswell/chip.h: Use bool type 
Use `bool` type where applicable.

Change-Id: I4d5422c16381676738b8614e8e50737b59739921
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
 2021-11-01 16:01:16 +00:00
Arthur Heymans
083aa9ecf7 security/intel/txt: Get addr bits at runtime 
This removes the need for a Kconfig value.

Change-Id: Ia9f39aa1c7fb9a64c2e5412bac6e2600b222a635
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
 2021-11-01 15:59:54 +00:00
Zhi Li
af207a5279 mb/google/dedede/var/storo: Add fw_config probe for multi audio codec 
Compatible headphone codec "Realtek ALC5682I-VD" and "ALC5682I-VS"

BUG=b:202463494
BRANCH=dedede
TEST=ALC5682I-VD or VS audio codec can work normally

Signed-off-by: Zhi Li <lizhi7@huaqin.corp-partner.google.com>
Change-Id: Ib808ddadef1029d3f06eb2d68164243c386d4905
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
 2021-11-01 15:58:31 +00:00
Dan Callaghan
4e6c915fcc mb/google/brya/var/brya0: add HPS as generic I2C peripheral 
Some brya0 units have HPS fitted and connected to PCH I2C2, rather than
a user-facing camera.

Because HPS uses I2C address 0x51, which may conflict with the
user-facing camera EEPROM, introduce a new fw_config bit to indicate
whether HPS is present.

BUG=b:202784200
TEST=FW_NAME=brya0 emerge-brya coreboot chromeos-bootimage
TEST=ectool cbi set 6 0x28191 4  # set bit 17 for HPS
TEST=flashrom -p internal -w image-brya0.serial.bin

Signed-off-by: Dan Callaghan <dcallagh@google.com>
Change-Id: I322548bcfccf16ba571396bc88fd6fc03c036a4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58646
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2021-11-01 15:58:25 +00:00
Mike Banon
2a83085a06 MAINTAINERS: Add myself as a maintainer for ASUS A88XM-E 
I also have this board in addition to G505S and AM1I-A.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I0fe3ee6524209980a463b7835128b5c40f5d4ca5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
 2021-11-01 15:57:35 +00:00
Ryan Chuang
39277554a4 vc/mediatek/mt8195: Remove unused code and comments 
Remove unused code and comment to align with the latest MTK memory
reference code which is from MTK internal dram driver code without
upstream.
version: Ib59134533ced8de09d23dd9f347c934d315166e2

TEST=boot to kernel

Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: I95ab3cf8809ad22a341ceb7fd53a68e13fb0420d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58635
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2021-11-01 15:57:11 +00:00
Zheng Bao
19b3102910 amd/lpc: Remove the weak function 
BUG=b:140165023

Change-Id: Idb4613dc08c8dee6c92b4dabb39c2f5c189471aa
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2021-11-01 15:55:56 +00:00
Johnny Lin
72e76676fc soc/intel/common/block/cse: Add get_me_fw_version function 
Modify print_me_fw_version to get ME firmware version by
calling it.

Tested=On a not yet to be public platform, verified the function
can get ME FW version successfully.

Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Change-Id: I50d472a413bcaaaa085955657bde6a0e6ec2c1db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58520
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2021-11-01 15:55:12 +00:00
Bora Guvendik
c1a55f73eb commonlib: Add new TS for IA pre-cpu reset entities 
The idea here is to capture the various boot entities prior
to IA cpu reset.

BUG=b:182575295
TEST=Boot to OS, check cbmem -t output

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: If89befa362d7852a2c0743d05155a0b6c1634672
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2021-11-01 15:53:57 +00:00
David Wu
cbcc361def mb/google/brya: Enable DRIVERS_GENESYSLOGIC_GL9755 for brask 
Enable DRIVERS_GENESYSLOGIC_GL9755 support for brask.

BUG=b:197385770
TEST=build pass

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: If421e0df058b6f2b87267d5e3822940b90062f71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58729
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2021-11-01 15:53:36 +00:00
Joey Peng
b0c1e73928 mb/google/brya/var/taeko: Add probe for MAX98357+ALC5682I_VS 
Add probe function for the "VS" version of the audio amplifier so taeko
can recgonize MAX98357 with ALC5682I_VS.

BUG=b:202913837
TEST=FW_NAME=taeko emerge-brya coreboot and check taeko can recgonize
MAX98357 with ALC5682I_VS
Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: Id4ff2003ee6a6f6f4ad98694996689e1a84092c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58645
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: YH Lin <yueherngl@google.com>
 2021-11-01 15:47:43 +00:00
RobertChen
f6c29165b2 mb/google/dedede/var/kracko: Add Wifi SAR for kracko 
Add wifi sar for kracko

BUG=b:194460420
TEST=emerge-dedede coreboot-private-files-baseboard-dedede coreboot chromeos-bootimage

Change-Id: I83bca544c9f71142f95ea1137f732c182b3f29b7
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@google.com>
Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
 2021-11-01 10:29:23 +00:00
Felix Singer
8bea7027cd Documentation/releases/4.15: Fix typo 
Change-Id: I3e64793c58f2acfbfc42e46782d68bec97088601
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
 2021-11-01 03:24:04 +00:00
Jason Glenesk
18b34f98ba Documentation/releases: Update index.md 
Change-Id: I0fa24b233383bdc778b2c641f68e4e87f92206d1
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2021-10-30 19:05:28 +00:00
Jason Glenesk
079c3f28ce Documentation/releases: Add 4.16 release notes template 
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: I42ce11914d7e7b32017747bbc6d3c7ac77e2868b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58758
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2021-10-30 19:04:35 +00:00