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1005 Commits

Author SHA1 Message Date
Felix Singer
7bf014f0ad ec/smsc/mec1308/acpi: Replace LEqual(a,b) with ASL 2.0 syntax 
Replace `LEqual(a, b)` with `a == b`.

Change-Id: Ic58e22046aa13549747692f4b21184cf573aa4d3
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:15:56 +00:00
Felix Singer
d40d0b0398 ec/quanta/it8518/acpi: Replace LGreaterEqual(a,b) with ASL 2.0 syntax 
Replace `LGreaterEqual(a, b)` with `a >= b`.

Change-Id: I99cc4cf08ad74f2cb84e0ad16e615e03bbf388af
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60691
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:15:37 +00:00
Felix Singer
3f53ee3269 ec/quanta/it8518/acpi: Replace Divide(a,b,,c) with ASL 2.0 syntax 
Replace `Divide (a, b, , c)` with `c = a / b`.

Change-Id: I9b8262396755197dfbe044e3dc6a6a75c903f093
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60654
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:15:14 +00:00
Felix Singer
1e96554846 ec/quanta/it8518/acpi: Replace LEqual(a,b) with ASL 2.0 syntax 
Replace `LEqual(a, b)` with `a == b`.

Change-Id: I6732fd876524feab924a58434bec381dcdb87bce
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:14:38 +00:00
Felix Singer
f1f861ebf5 ec/quanta/it8518/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntax 
Replace `Multiply (a, b, c)` with `c = a * b`.

Change-Id: Ied407753ee3bb024c8c0350c45312c337ac799e5
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:14:13 +00:00
Felix Singer
d5d4b4459f ec/quanta/ene_kb3940q/acpi: Replace LLess(a,b) with ASL 2.0 syntax 
Replace `LLess(a, b)` with `a < b`.

Change-Id: Ic04ce82fbfd36bbd2e0cfda1a92ca0a18e1fcd73
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:13:31 +00:00
Felix Singer
6119303a39 ec/kontron/it8516e/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntax 
Replace `Multiply (a, b, c)` with `c = a * b`.

Change-Id: I81e976de964f6ae3528884debaf2b24ddf8ed28a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:13:15 +00:00
Felix Singer
8ab0975683 ec/google/chromeec/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntax 
Replace `LNotEqual(a, b)` with `a != b`.

Change-Id: I2e0c5961fcc90c97666f49837a71f6c0bdc429b3
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:03:15 +00:00
Felix Singer
9fa818d763 ec/lenovo/h8/acpi: Replace LLessEqual(a,b) with ASL 2.0 syntax 
Replace `LLessEqual(a, b)` with `a <= b`.

Change-Id: I256e56841e1c7037fe8ba5e9a963ad2301092325
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:02:47 +00:00
Felix Singer
cc03951016 ec/lenovo/h8/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntax 
Replace `LNotEqual(a, b)` with `a != b`.

Change-Id: Ic114e097a08488106554ce2dec61fa219d7cf1d0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:02:32 +00:00
Felix Singer
c253368e46 ec/lenovo/h8/acpi: Replace LGreater(a,b) with ASL 2.0 syntax 
Replace `LGreater(a, b)` with `a > b`.

Change-Id: I1dbe6c325ed33a4dd15e4d6315b2308d8351974e
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:02:13 +00:00
Felix Singer
95bfa033c7 ec/lenovo/h8/acpi: Replace LEqual(a,b) with ASL 2.0 syntax 
Replace `LEqual(a, b)` with `a == b`.

Change-Id: I49a7ed2d57124746815478f3ead8a8f7c54d048a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60661
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-06-09 09:01:56 +00:00
Felix Singer
0e6f7a23e4 ec/google/chromeec/acpi: Replace LGreater(a,b) with ASL 2.0 syntax 
Replace `LGreater(a, b)` with `a > b`.

Change-Id: Ie6238ead464d79b3576846f3b5b92b658972eec8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:29:36 +00:00
Abel Briggs
c3bfbafda5 ec/acpi: Rework to reduce code duplication 
- Move EC send/receive polling code to their own functions
- Add named constants for poll timeouts and delay interval
- Use human-readable timeout values
- Add `send`/`recv` functions which support custom timeouts
- Remove extra 10us delays between polling and performing a given
  transaction
- Use constants from `ec.h` for standard EC command opcodes

Tested on a Lenovo Edge E530, which takes similar code paths to
the Lenovo Twist S230u.

Change-Id: Ifda5c030ff81f1046be58aa1fcafdcf71a27cd41
Signed-off-by: Abel Briggs <abelbriggs1@hotmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
 2022-06-03 15:28:00 +00:00
Felix Singer
89818d1da7 ec/google/chromeec/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntax 
Replace `Multiply (a, b, c)` with `c = a * b`.

Change-Id: Iea86e77df6c76756ed336f57a906ac0757aef1cf
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:26:15 +00:00
Felix Singer
81623fbd96 ec/google/chromeec/acpi: Replace Divide(a,b,,c) with ASL 2.0 syntax 
Replace `Divide (a, b, , c)` with `c = a / b`.

Change-Id: I26117087c09109cfc480cbe01d3761a02a12c61b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:26:04 +00:00
Felix Singer
3c799fa311 ec/google/chromeec/acpi: Replace LEqual(a,b) with ASL 2.0 syntax 
Replace `LEqual(a, b)` with `a == b`.

Change-Id: I4d79080ecfe457766983b20a0217ccadcd188fcf
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:25:56 +00:00
Felix Singer
29821febc3 ec/google/chromeec/acpi: Replace LLess(a,b) with ASL 2.0 syntax 
Replace `LLess(a, b)` with `a < b`.

Change-Id: I65225a890f9085574a2295e6ccd2cdc3e84f71e0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:25:47 +00:00
Felix Singer
9b13bfc6c9 ec/google/chromeec/acpi: Replace LGreaterEqual(a,b) with ASL 2.0 syntax 
Replace `LGreaterEqual(a, b)` with `a >= b`.

Change-Id: I72875f68e143f9384c91588cd453d2987fda526d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-06-03 15:25:34 +00:00
Sean Rhodes
0b3789f376 ec/starlabs/merlin/kbl: Add required headers for dead_code_t 
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ia6c3ba80d5e6ac3d4fd8a935732ef7e32cf33998
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64718
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
 2022-05-28 14:16:19 +00:00
Sean Rhodes
07d3668d97 ec/starlabs/merlin/glk: Add Trackpad enable/disable Q events 
Add Q60 and Q61 events to disable or enable the trackpad. The
support for this Q event was added in Star Labs EC version 1.11

Add Q events Q60 and Q61 which are bound to the F10 key. The event
is select based on the value of 0x14, 0x11 will send Q60 and 0x22
will send Q61. Q60 will pull GPIO_177 to low, consequently disabling
the trackpad and Q61 will reset it to the default configuration.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I091b0eb268d4d6d2109559765be71e2746b85f54
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
 2022-05-28 04:31:20 +00:00
Sean Rhodes
e40ca124c6 ec/starlabs/merlin/glk: Correct offset of USCI 
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I54b01b1974822c155cb49634fff8616326d55705
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
 2022-05-25 12:50:27 +00:00
Arthur Heymans
6acc05ed31 rules.h: Use more consistent naming 
Use 'ENV' consistently and drop the redundant 'STAGE' in the naming.

Change-Id: I51f2a7e70eefad12aa214e92f23e5fd2edf46698
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
 2022-05-16 21:52:22 +00:00
Sean Rhodes
6c921c8f06 ec/starlabs/merlin: Remove offset for Max Charge when not supported 
Set the MAX_CHARGE offset to dead_code_t for boards that don't support
the function. The avoids erroneous values being written to the EC.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I306c8a60818b780ef3bfb842e7fcc4d8500d6b03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
 2022-05-12 18:33:51 +00:00
Prashant Malani
da6e9a0472 ec/google/chromeec: Add retimer handle to Type C conn 
Some platforms have retimers which can be configured via the EC. Add a
handle to these retimer devices to the Type C connector device, using
devicetree references.

BUG=b:208883648
TEST=Verify disassembled SSDT on brya.
BRANCH=None

Signed-off-by: Prashant Malani <pmalani@chromium.org>
Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63793
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-05-04 13:15:30 +00:00
Prashant Malani
688105bc60 ec/google/chromeec: Add EC Mux device 
Introduce an EC Mux ACPI device, which will control retimer and discrete
(off-AP) mux configuration.

BUG=b:208883648
TEST=None
BRANCH=None

Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-05-04 13:14:57 +00:00
Peter Lemenkov
b470361e02 lenovo: correct typo in macro H8_HAS_BAT_THRESHOLDS_IMPL 
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Change-Id: Ia0550a115d75183cd72e478ae739731001febe22
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
 2022-05-03 20:06:26 +00:00
Eric Lai
c3e4f67005 ec/google/chromeec: Add empty string check for OEM string 
If set OEM string as "", it shows "Not Specified" with dmidecode.
Use default string if it is empty.

BUG=b:230039300
TEST=set OEM string "" and show google with dmidecode -t 2.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I097e1be696ae974aadc47feb8d0c1dae672a5c82
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63772
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
 2022-04-27 12:26:22 +00:00
Elyes Haouas
849f7634d9 ec/purism/librem: Remove unused Kconfig file 
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I0d8dff53d98ae70b72d1850d18fd6408d3293356
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62363
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Martin L Roth <martinroth@google.com>
 2022-04-24 21:26:21 +00:00
Angel Pons
fbf58d9f89 ec/google/chromeec: Drop _PRS from static devices 
The `_PRS` ACPI object is not needed for static (non-configurable)
devices. For devices where `_CRS` always provides the same set of
resource settings, drop the `_PRS` object. Note that every dropped
`_PRS` object only provides one set of resource settings, which is
identical to the resource settings provided by the `_CRS` object.

Change-Id: Ief40e790fdee336fd6c786e18cd01c41fa658c2c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
 2022-04-20 10:03:35 +00:00
Akihiko Odaki
f0be9e3472 ec/google/chromeec: Initialize device_path subid 
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com>
Change-Id: I910998a5555319cf9840493a31df4934054e08ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-04-07 16:20:59 +00:00
Sean Rhodes
36b6e79f1c ec/starlabs/merlin: Add EC related files for Cezanne boards 
Add EC memory layout and Q events for AMD Cezanne based boards, "Byte"
and "Fighter", which both use the ITE 5570E.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I3f837263d24e6b642cf33fd2995d8c90529706f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62994
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-04-06 16:21:31 +00:00
Sean Rhodes
e8b090c509 ec/starlabs/merlin: Correct Q event for CPU DN SPEED 
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ieea1c8d0923f6ea6b13cf76525c9c4c686a92c40
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62901
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-04-06 16:21:03 +00:00
Sean Rhodes
32ec4526a0 ec/starlabs/merlin: Remove comment about OPWE 
OPWE offset didn't exist, but it does now so remove the comment about
this.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4a1310c779002dfb00d01a22437ea223bb406609
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-04-04 21:54:45 +00:00
Sean Rhodes
b5fbb55f0c ec/starlabs/merlin: Add GLKR variant 
Add GLKR (N5030) Lite Mk IV variant

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1e17130caa16a605d0d3207d41527df3db6ada81
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-30 14:22:50 +00:00
Sean Rhodes
78342989c4 ec/starlabs/merlin: Add support for Nuvoton EC's 
Support was created for the NPCE9m5x series, using version 1.1
of the datasheet. The specific model tested was the NPCE985P/G,
on the StarLite Mk IV with version 1.00 of the EC firmware.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib66baf1e88f5d548ce955dffa00c9b88255b2f95
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
 2022-03-30 14:22:08 +00:00
Sean Rhodes
6082ee5281 ec/starlabs/merlin: Make EC function names generic 
Rather than using `ite_`, use `ec_` so the same functions
can be called for different ECs.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ie61af233f731eb47772af1c82c6abdc515bc89cc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62700
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-30 13:49:22 +00:00
Sean Rhodes
36e2b4b2b4 ec/starlabs/merlin: Rename ec.c to more specific ite.c 
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I0bac5e4c101792dd4c6a0d4a1ae4a4c7fcd837d5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62677
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-30 13:48:11 +00:00
Sean Rhodes
629f8c5da1 ec/starlabs/merlin: Don't store EC values on change 
Since CB:62741, the EC values are backed up to the CMOS when entering
S3, S4 and S5. Consequently, they don't need to be stored when they're
changed.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: If0ea392afae4a4d3c605cdea3c5896fbff606215
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-21 16:57:54 +00:00
Sean Rhodes
fbb46c5438 ec/starlabs/merlin: Always store EC values 
The EC values will be changed when entering S3, S4 or S5, so move
the function that stores the current settings outside of logic
that restricts it to S4 or S5. This means the state isn't lost
when entering S3.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
 2022-03-21 16:57:37 +00:00
Wisley Chen
de7cac82d6 ec/google/chromeec: Change loglevel prefix 
In most boards, it doesn't write OEM_NAME in CBI to override the
manufacturer name in the SMBIOS table. It' better use the "BIOS_INFO" than "BIOS_ERR"

BUG=b:222038287
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot

Change-Id: I52eb1e6926eaac30b1dbee13ab750ef15b466d89
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
 2022-03-17 14:43:04 +00:00
Matt DeVillier
23be41880c ec/chromeec/ec_smbios: Set system manufacturer for ChromeOS devices 
Currently, many Linux drivers use DMI quirks to identify ChromeOS
devices and handle them accordingly: namely they look for the SMBIOS
system manufactuer to be "GOOGLE" or "Google", and the bios-vendor to be
coreboot. Historically this was consistently the case, but recent model
ChromeOS devices allow the OEM to set the mainboard manufacturer, which
is also the default system manufacturer. This breaks many DMI quirks,
notably ones used by SOF (sound open firmware) for audio.

To fix this, set the system manufactuer for ChromeOS devices to "Google"
for devices selecting CONFIG_EC_GOOGLE_CHROMEEC_SKUID, leaving the OEM
customization in place for the mainboard manufacturer. Since boards
selecting CONFIG_EC_GOOGLE_CHROMEEC_SKUID are the only ones overriding
the default mainboard manufacturer, they are the only ones which need
this correction.

Test: build/boot google/bloog with Linux 5.16, verify SOF drivers
correctly detect device as a Chromebook and load the appropriate
audio firmware.

Change-Id: I9de17fa12689ab4e627b995818aa3d2653102b04
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62796
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-03-17 14:35:33 +00:00
Sean Rhodes
18a7c0fc7a ec/starlabs/merlin: Use ECWR function 
Use ECWR function, instead of writing raw values to emem, to avoid a
lack of syncronisation as it uses a mutex.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I90cfd3e1752fe25493bd72ea6bcab1fd9318d2e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62637
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-10 15:08:40 +00:00
Sean Rhodes
26cf0f954e ec/starlabs: Write the correct value for KLBE when suspending 
The current code will write the raw value from the CMOS, which doesn't
match the respective setting in EC.

Switch argument will write the correct value, and prevent the setting
being reset.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I40dc78c743f4201a11ea0c26a8af716cab42b805
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-10 15:08:14 +00:00
Sean Rhodes
40455e9478 ec/starlabs: Write the correct value for KLSE when suspending 
The current code will write the raw value from the CMOS, which doesn't
match the respective setting in EC.

Switch argument will write the correct value, and prevent the setting
being reset.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I93444cdb96eaf729630b48551d0853511b584634
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-10 15:07:57 +00:00
Sean Rhodes
7b0239d8ca ec/starlabs: Write the correct value for TPLE when suspending 
The current code will write the raw value from the CMOS, which doesn't
match the respective setting in EC.

Switch argument will write the correct value, and prevent the setting
being reset.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iabeec47bf492b698f95d86aa2d08ba9caedd75f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2022-03-10 15:07:39 +00:00
Sean Rhodes
141e6fd245 ec/starlabs: Store the correct value for KLBE when suspending 
The current code will read the raw value from the EC, which doesn't
match the respective setting in CMOS.

Switch argument will store the correct value.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ic2a83df9a270de6d7bab295e732a6c13accbe17c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62606
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-03-10 15:07:21 +00:00
Sean Rhodes
f58134b4ca ec/starlabs: Store the correct value for KLSE when suspending 
The current code will read the raw value from the EC, which doesn't
match the respective setting in CMOS.

Switch argument will store the correct value.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I62e0fc3b6fcae72f2d8eacf37a390b4e4b1f0783
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62605
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-03-10 15:06:59 +00:00
Sean Rhodes
700b5155ac ec/starlabs: Store the correct value for TPLE when suspending 
The current code will read the raw value from the EC, which doesn't
match the respective setting in CMOS.

Switch argument will store the correct value.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I921be8aea55b95f1ba233d2640d9bae80f8c3703
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62604
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-03-10 15:06:23 +00:00
Sean Rhodes
6074b20bd1 ec/starlabs/merlin: Change RPTS method to Serialized 
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Id64d321846dc042d4092d39ce9598d028ab15ed0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Andy Pont <andy.pont@sdcsystems.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
 2022-03-10 15:05:24 +00:00