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5 Commits

Author SHA1 Message Date
Jeremy Soller
d98ae8039d lemp13: make sure to configure GPP_E11 in romstage
Change-Id: Iea28473c3a1dcf05e7c6701d61109b413cd04501
Signed-off-by: Jeremy Soller <jackpot51@gmail.com>
2024-06-28 13:40:38 -06:00
Jeremy Soller
551705848c Add lemp13 5600 MT/s RAM SPD
Change-Id: I824cc149ec291c75b76fc8d32dff0e5f78329676
Signed-off-by: Jeremy Soller <jackpot51@gmail.com>
2024-06-28 13:40:38 -06:00
Sean Rhodes
019baecda0 soc/intel/alderlake: Set UsbTcPortEn based on tcss_port[x]
UsbTcPortEn is configured based on pointers to tcss_usb3_port1,
which is part of the ACPI driver.

This is illogical, as the port might need to be enabled, and
the ACPI not needed or included. Change this so it's configured
based on the tcss_port[x] in devicetree.

Tested by connecting a USB 3.0 hub, and checking that Linux
correctly identifies a new USB 3.0 device.

Change-Id: I07ef0759057f7f40210766a73643c9ccf1dc986d
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
2024-06-12 17:22:01 -06:00
Tim Crawford
792996fc8c mb/system76/tgl: Update VBT to version 250
Commit 4c7e97b26a ("Update fsp submodule to upstream master branch")
included an update to the VBT from 240 to 250, breaking parsing of
existing VBTs.

Generate blobs for the new version using Intel Display Configuration
Tool (DisCon) v3.3.

Change-Id: I918356d9f660b985ee4408ef77544fbd071ab35f
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-05-21 14:30:46 -06:00
Jeremy Soller
f65d2abb06 Add lemp13-b
Change-Id: Icc82c47f5e9e6885e9d31878c26d471d06e11c34
Signed-off-by: Jeremy Soller <jackpot51@gmail.com>
2024-05-17 08:35:04 -06:00
15 changed files with 97 additions and 15 deletions

View File

@@ -45,6 +45,13 @@ config BOARD_SYSTEM76_LEMP13
select SOC_INTEL_METEORLAKE_U_H
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
config BOARD_SYSTEM76_LEMP13_B
select BOARD_SYSTEM76_MTL_COMMON
select DRIVERS_I2C_TAS5825M
select HAVE_SPD_IN_CBFS
select SOC_INTEL_METEORLAKE_U_H
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
if BOARD_SYSTEM76_MTL_COMMON
config MAINBOARD_DIR
@@ -52,7 +59,7 @@ config MAINBOARD_DIR
config VARIANT_DIR
default "darp10" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B
default "lemp13" if BOARD_SYSTEM76_LEMP13
default "lemp13" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B
config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
@@ -61,15 +68,17 @@ config MAINBOARD_PART_NUMBER
default "darp10" if BOARD_SYSTEM76_DARP10
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
default "lemp13" if BOARD_SYSTEM76_LEMP13
default "lemp13-b" if BOARD_SYSTEM76_LEMP13_B
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "Darter Pro" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B
default "Lemur Pro" if BOARD_SYSTEM76_LEMP13
default "Lemur Pro" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B
config MAINBOARD_VERSION
default "darp10" if BOARD_SYSTEM76_DARP10
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
default "lemp13" if BOARD_SYSTEM76_LEMP13
default "lemp13-b" if BOARD_SYSTEM76_LEMP13_B
config CMOS_DEFAULT_FILE
default "src/mainboard/\$(MAINBOARDDIR)/cmos.default"

View File

@@ -8,3 +8,6 @@ config BOARD_SYSTEM76_DARP10_B
config BOARD_SYSTEM76_LEMP13
bool "lemp13"
config BOARD_SYSTEM76_LEMP13_B
bool "lemp13-b"

View File

@@ -17,4 +17,4 @@ ramstage-y += variants/$(VARIANT_DIR)/gpio.c
ramstage-y += variants/$(VARIANT_DIR)/ramstage.c
ramstage-$(CONFIG_DRIVERS_I2C_TAS5825M) += variants/$(VARIANT_DIR)/tas5825m.c
SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD
SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD samsung-M425R1GB4PB0-CWMOD

View File

@@ -62,4 +62,4 @@
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

View File

@@ -0,0 +1,65 @@
# Samsung M425R1GB4PB0-CWMOD
30 10 12 03 04 00 40 42 00 00 00 00 B0 02 09 00
00 00 00 00 65 01 F2 03 7A AD 00 00 00 00 80 3E
80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10
27 10 CD 37 28 10 27 10 C4 09 04 4C 1D 0C 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
10 00 80 B3 80 21 80 B3 82 20 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 0F 01 02 81 00 22 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 5E 9B
80 CE 00 00 00 00 00 00 00 4D 34 32 35 52 31 47
42 34 50 42 30 2D 43 57 4D 4F 44 20 20 20 20 20
20 20 20 20 20 20 20 00 80 CE 50 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

View File

@@ -109,7 +109,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_E08, 0, PLTRST),
PAD_CFG_GPI(GPP_E09, NONE, DEEP),
PAD_CFG_GPO(GPP_E10, 0, PLTRST),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
_PAD_CFG_STRUCT(GPP_E12, 0x84002200, 0x0000),
_PAD_CFG_STRUCT(GPP_E13, 0x44002100, 0x0000),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),

View File

@@ -6,6 +6,7 @@
static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK
PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), // UART0_RX
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), // UART0_TX
};

View File

@@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <soc/romstage.h>
static size_t get_spd_index(void)
{
// BOARD_ID1 is high if 5600 MT/s and low if 4800 MT/s
if (gpio_get(GPP_E11)) {
return 1;
} else {
return 0;
}
}
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
const struct mb_cfg board_cfg = {
@@ -12,7 +23,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const struct mem_spd spd_info = {
.topo = MEM_TOPO_MIXED,
.cbfs_index = 0,
.cbfs_index = get_spd_index(),
.smbus[1] = { .addr_dimm[0] = 0x52, },
};
const bool half_populated = false;

View File

@@ -652,13 +652,6 @@ WEAK_DEV_PTR(tcss_usb3_port4);
static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_alderlake_config *config)
{
const struct device *tcss_port_arr[] = {
DEV_PTR(tcss_usb3_port1),
DEV_PTR(tcss_usb3_port2),
DEV_PTR(tcss_usb3_port3),
DEV_PTR(tcss_usb3_port4),
};
s_cfg->TcssAuxOri = config->tcss_aux_ori;
/* Explicitly clear this field to avoid using defaults */
@@ -676,8 +669,8 @@ static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg,
s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT);
s_cfg->UsbTcPortEn = 0;
for (int i = 0; i < MAX_TYPE_C_PORTS; i++) {
if (is_dev_enabled(tcss_port_arr[i]))
for (int i = 0; i < ARRAY_SIZE(config->tcss_ports); i++) {
if (config->tcss_ports[i].enable)
s_cfg->UsbTcPortEn |= BIT(i);
}