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Author SHA1 Message Date
Jeremy Soller
d98ae8039d lemp13: make sure to configure GPP_E11 in romstage
Change-Id: Iea28473c3a1dcf05e7c6701d61109b413cd04501
Signed-off-by: Jeremy Soller <jackpot51@gmail.com>
2024-06-28 13:40:38 -06:00
Jeremy Soller
551705848c Add lemp13 5600 MT/s RAM SPD
Change-Id: I824cc149ec291c75b76fc8d32dff0e5f78329676
Signed-off-by: Jeremy Soller <jackpot51@gmail.com>
2024-06-28 13:40:38 -06:00
11 changed files with 81 additions and 144 deletions

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@@ -5,7 +5,6 @@ all-y += system76_ec.c
ramstage-y += smbios.c
ramstage-$(CONFIG_EC_SYSTEM76_EC_LOCKDOWN) += lockdown.c
ramstage-y += usbc_mux.c
smm-$(CONFIG_DEBUG_SMI) += system76_ec.c

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@@ -1,132 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "system76_ec.h"
#include <console/console.h>
#include <delay.h>
#include <device/usbc_mux.h>
#include <timer.h>
#include <types.h>
#define CMD_USBC_MUX_INFO 23
enum usbc_mux_flags {
USBC_MUX_DP = BIT(0),
USBC_MUX_USB = BIT(1),
USBC_MUX_CABLE = BIT(2),
USBC_MUX_POLARITY = BIT(3),
USBC_MUX_HPD_LVL = BIT(4),
USBC_MUX_HPD_IRQ = BIT(5),
USBC_MUX_UFP = BIT(6),
USBC_MUX_DBG_ACC = BIT(7),
};
static int system76_ec_get_mux_info(int port, struct usbc_mux_info *info)
{
uint8_t request[1] = { port };
uint8_t reply[3] = { 0 };
uint8_t flags;
uint8_t pin_mode;
bool res;
if (!info)
return -1;
res = system76_ec_cmd(CMD_USBC_MUX_INFO, request, ARRAY_SIZE(request),
reply, ARRAY_SIZE(reply));
if (!res)
return -1;
flags = reply[1];
pin_mode = reply[2];
info->dp = !!(flags & USBC_MUX_DP);
info->usb = !!(flags & USBC_MUX_USB);
info->cable = !!(flags & USBC_MUX_CABLE);
info->polarity = !!(flags & USBC_MUX_POLARITY);
info->hpd_lvl = !!(flags & USBC_MUX_HPD_LVL);
info->hpd_irq = !!(flags & USBC_MUX_HPD_IRQ);
info->ufp = !!(flags & USBC_MUX_UFP);
info->dbg_acc = !!(flags & USBC_MUX_DBG_ACC);
info->dp_pin_mode = pin_mode;
printk(BIOS_SPEW, "%s: dp=%u, usb=%u\n", __func__, info->dp, info->usb);
printk(BIOS_SPEW, "%s: cable=%u, polarity=%u\n", __func__, info->cable, info->polarity);
printk(BIOS_SPEW, "%s: hpd_lvl=%u, hpd_irq=%u\n", __func__, info->hpd_lvl, info->hpd_irq);
printk(BIOS_SPEW, "%s: ufp=%u, dbg_acc=%u\n", __func__, info->ufp, info->dbg_acc);
printk(BIOS_SPEW, "%s: pin_mode=0x%x\n", __func__, info->dp_pin_mode);
return 0;
}
static int system76_ec_wait_for_connection(long timeout_ms)
{
// TODO
return 1;
}
static int system76_ec_enter_dp_mode(int port)
{
// TODO
return 0;
}
static int system76_ec_wait_for_dp_mode_entry(int port, long timeout_ms)
{
struct usbc_mux_info info;
if (system76_ec_get_mux_info(port, &info) < 0) {
printk(BIOS_WARNING, "%s: could not get usbc mux info\n", __func__);
return -1;
}
if (!info.dp) {
printk(BIOS_WARNING, "DP mode not ready\n");
return -1;
}
return 0;
}
static int system76_ec_wait_for_hpd(int port, long timeout_ms)
{
struct usbc_mux_info info;
struct stopwatch sw;
stopwatch_init_msecs_expire(&sw, timeout_ms);
while (1) {
if (system76_ec_get_mux_info(port, &info) < 0) {
printk(BIOS_WARNING, "%s: could not get usbc mux info\n", __func__);
return -1;
}
if (info.hpd_lvl)
break;
if (stopwatch_expired(&sw)) {
printk(BIOS_WARNING, "HPD not ready after %ldms\n", timeout_ms);
return -1;
}
mdelay(100);
}
printk(BIOS_INFO, "HPD ready after %lldms\n", stopwatch_duration_msecs(&sw));
return 0;
}
static const struct usbc_ops system76_ec_usbc_ops = {
.mux_ops = {
.get_mux_info = system76_ec_get_mux_info,
},
.dp_ops = {
.wait_for_connection = system76_ec_wait_for_connection,
.enter_dp_mode = system76_ec_enter_dp_mode,
.wait_for_dp_mode_entry = system76_ec_wait_for_dp_mode_entry,
.wait_for_hpd = system76_ec_wait_for_hpd,
},
};
const struct usbc_ops *usbc_get_ops(void)
{
return &system76_ec_usbc_ops;
}

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@@ -3,9 +3,6 @@
#ifndef __USBC_MUX_H__
#define __USBC_MUX_H__
#include <stdbool.h>
#include <stdint.h>
/* struct to hold all USB-C mux related variables */
struct usbc_mux_info {
bool dp; /* DP connected */

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@@ -11,8 +11,6 @@ config BOARD_SYSTEM76_ADL_COMMON
select DRIVERS_INTEL_USB4_RETIMER
select EC_SYSTEM76_EC
select EC_SYSTEM76_EC_LOCKDOWN
select ENABLE_TCSS_DISPLAY_DETECTION
select ENABLE_TCSS_USB_DETECTION
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT

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@@ -17,4 +17,4 @@ ramstage-y += variants/$(VARIANT_DIR)/gpio.c
ramstage-y += variants/$(VARIANT_DIR)/ramstage.c
ramstage-$(CONFIG_DRIVERS_I2C_TAS5825M) += variants/$(VARIANT_DIR)/tas5825m.c
SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD
SPD_SOURCES = samsung-M425R1GB4BB0-CQKOD samsung-M425R1GB4PB0-CWMOD

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@@ -62,4 +62,4 @@
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@@ -0,0 +1,65 @@
# Samsung M425R1GB4PB0-CWMOD
30 10 12 03 04 00 40 42 00 00 00 00 B0 02 09 00
00 00 00 00 65 01 F2 03 7A AD 00 00 00 00 80 3E
80 3E 80 3E 00 7D 80 BB 30 75 27 01 A0 00 82 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 88 13 08 88 13 08 20 4E 20 10
27 10 CD 37 28 10 27 10 C4 09 04 4C 1D 0C 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
10 00 80 B3 80 21 80 B3 82 20 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 0F 01 02 81 00 22 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 5E 9B
80 CE 00 00 00 00 00 00 00 4D 34 32 35 52 31 47
42 34 50 42 30 2D 43 57 4D 4F 44 20 20 20 20 20
20 20 20 20 20 20 20 00 80 CE 50 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@@ -109,7 +109,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_E08, 0, PLTRST),
PAD_CFG_GPI(GPP_E09, NONE, DEEP),
PAD_CFG_GPO(GPP_E10, 0, PLTRST),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
_PAD_CFG_STRUCT(GPP_E12, 0x84002200, 0x0000),
_PAD_CFG_STRUCT(GPP_E13, 0x44002100, 0x0000),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),

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@@ -6,6 +6,7 @@
static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK
PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), // UART0_RX
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), // UART0_TX
};

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@@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <soc/romstage.h>
static size_t get_spd_index(void)
{
// BOARD_ID1 is high if 5600 MT/s and low if 4800 MT/s
if (gpio_get(GPP_E11)) {
return 1;
} else {
return 0;
}
}
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
const struct mb_cfg board_cfg = {
@@ -12,7 +23,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
};
const struct mem_spd spd_info = {
.topo = MEM_TOPO_MIXED,
.cbfs_index = 0,
.cbfs_index = get_spd_index(),
.smbus[1] = { .addr_dimm[0] = 0x52, },
};
const bool half_populated = false;

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@@ -9,8 +9,6 @@ config BOARD_SYSTEM76_RPL_COMMON
select DRIVERS_I2C_HID
select EC_SYSTEM76_EC
select EC_SYSTEM76_EC_LOCKDOWN
select ENABLE_TCSS_DISPLAY_DETECTION
select ENABLE_TCSS_USB_DETECTION
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT