soc/intel/mtl: Set HDA subsystem ID during FSP-M

Intel introduced a new UPD specifically for setting the HDA subsystem ID
in FSP-M. Using SiSsidTablePtr in FSP-S no longer works as it will be
locked with a default value of 0 by that point.

Tested on Clevo V560TU with MTL FSP 4122.12 (0D.00.A8.20).

TEST=PCI config space for HDA device has subsystem ID set.

Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3
Signed-off-by: Tim Crawford <tcrawford@system76.com>

src/soc/intel/meteorlake/Kconfig

@@ -402,18 +402,6 @@ config BUILDING_WITH_DEBUG_FSP
 	help
 	  Set this option if debug build of FSP is used.
 
-config INTEL_GMA_BCLV_OFFSET
-	default 0xc8258
-
-config INTEL_GMA_BCLV_WIDTH
-	default 32
-
-config INTEL_GMA_BCLM_OFFSET
-	default 0xc8254
-
-config INTEL_GMA_BCLM_WIDTH
-	default 32
-
 config DROP_CPU_FEATURE_PROGRAM_IN_FSP
 	bool
 	default y if MP_SERVICES_PPI_V2_NOOP || CHROMEOS

src/soc/intel/meteorlake/Makefile.mk

@@ -37,7 +37,6 @@ ramstage-y += elog.c
 ramstage-y += espi.c
 ramstage-y += finalize.c
 ramstage-y += fsp_params.c
-ramstage-y += graphics.c
 ramstage-y += lockdown.c
 ramstage-y += p2sb.c
 ramstage-y += pcie_rp.c

src/soc/intel/meteorlake/chip.h

@@ -4,7 +4,6 @@
 #define _SOC_CHIP_H_
 
 #include <drivers/i2c/designware/dw_i2c.h>
-#include <drivers/intel/gma/gma.h>
 #include <device/pci_ids.h>
 #include <gpio.h>
 #include <intelblocks/cfg.h>
@@ -528,9 +527,6 @@ struct soc_intel_meteorlake_config {
 	 * as per `enum slew_rate` data type.
 	 */
 	uint8_t slow_slew_rate_config[NUM_VR_DOMAINS];
-
-	/* i915 struct for GMA backlight control */
-	struct i915_gpu_controller_info gfx;
 };
 
 typedef struct soc_intel_meteorlake_config config_t;

src/soc/intel/meteorlake/graphics.c

@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <intelblocks/graphics.h>
-#include <soc/ramstage.h>
-
-const struct i915_gpu_controller_info *
-intel_igd_get_controller_info(const struct device *const dev)
-{
-	const struct soc_intel_meteorlake_config *const chip = dev->chip_info;
-	return &chip->gfx;
-}

src/soc/intel/meteorlake/romstage/fsp_params.c

@@ -282,6 +282,8 @@ static void fill_fspm_misc_params(FSP_M_CONFIG *m_cfg,
 static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg,
 		const struct soc_intel_meteorlake_config *config)
 {
+	const struct device *dev;
+
 	/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */
 	m_cfg->PchHdaEnable = is_devfn_enabled(PCI_DEVFN_HDA);
 	m_cfg->PchHdaDspEnable = config->pch_hda_dsp_enable;
@@ -302,6 +304,13 @@ static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg,
 	memset(m_cfg->PchHdaAudioLinkDmicEnable, 0, sizeof(m_cfg->PchHdaAudioLinkDmicEnable));
 	memset(m_cfg->PchHdaAudioLinkSspEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSspEnable));
 	memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable));
+
+	dev = pcidev_path_on_root(PCI_DEVFN_HDA);
+	if (dev) {
+		uint16_t svid = CONFIG_SUBSYSTEM_VENDOR_ID ? : (dev->subsystem_vendor ? : 0x8086);
+		uint16_t ssid = CONFIG_SUBSYSTEM_DEVICE_ID ? : (dev->subsystem_device ? : 0x7e28);
+		m_cfg->PchHdaSubSystemIds = (ssid << 16) | svid;
+	}
 }
 
 static void fill_fspm_cnvi_params(FSP_M_CONFIG *m_cfg,