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Author SHA1 Message Date
Tim Crawford
af37b54564 mb/system76/bonw14: Enable TAS5825M smart amp
The Bonobo has 2 AMPs: one for the speakers and one for the subwoofer.

Smart AMP data was collected using a logic analyzer connected to the IC
during system start on proprietary firmware. This data is then used to
generate a C file [1].

[1]: https://github.com/system76/smart-amp

Change-Id: I5389a9890563ebd3adb20096b6225f474bc006f9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-05-22 13:30:20 -06:00
326 changed files with 2396 additions and 12116 deletions

34
AUTHORS
View File

@@ -39,9 +39,7 @@ Alexandru Gagniuc
Alexey Buyanov
Alexey Vazhnov
Alice Sell
Alicja Michalska
Allen-KH Cheng
Alper Nebi Yasak
Amanda Hwang
American Megatrends International, LLC
Amersel
@@ -64,7 +62,6 @@ Anna Karaś
Annie Chen
Anton Kochkov
Ao Zhong
Appukuttan V K
Arashk Mahshidfar
Arec Kao
Ariel Fang
@@ -96,7 +93,6 @@ Bora Guvendik
Boris Barbulovski
Boris Mittelberg
Brandon Breitenstein
Brandon Weeks
Brian Norris
Bryant Ou
Carl-Daniel Hailfinger
@@ -105,7 +101,6 @@ Caveh Jalali
Cavium Inc.
Chao Gui
Chen-Tsung Hsieh
Chen. Gang C
Chia-Ling Hou
Chien-Chih Tseng
Chris Wang
@@ -133,7 +128,6 @@ Da Lao
Daisuke Nojiri
Damien Zammit
Dan Callaghan
Dan Campbell
Daniel Campello
Daniel Gröber
Daniel Kang
@@ -187,7 +181,6 @@ Eltan B.V
Eltan B.V.
Elyes Haouas
Eran Mitrani
Eren Peng
Eric Biederman
Eric Lai
Eric Peers
@@ -201,16 +194,13 @@ Evan Green
Evgeny Zinoviev
Fabian Groffen
Fabian Kunkel
Fabian Meyer
Fabio Aiuto
Fabrice Bellard
Facebook, Inc.
Fei Yan
Felix Friedlander
Felix Held
Felix Singer
Fengquan Chen
Filip Lewiński
Flora Fu
Florian Laufenböck
Francois Toguo Fotso
@@ -224,7 +214,7 @@ Free Software Foundation, Inc.
Freescale Semiconductor, Inc.
Furquan Shaikh
Gaggery Tsai
Gang C Chen
Gang C Chen
Garmin Chang
Gary Jennejohn
George Trudeau
@@ -244,7 +234,6 @@ HardenedLinux
Harsha B R
Harshit Sharma
Henry C Chen
Herbert Wu
Hewlett Packard Enterprise Development LP
Hewlett-Packard Development Company, L.P.
Himanshu Sahdev
@@ -297,7 +286,6 @@ Jason Zhao
jason-ch chen
Jason-jh Lin
Jay Patel
Jean Lucas
Jeff Chase
Jeff Daly
Jeff Li
@@ -319,7 +307,6 @@ Jitao Shi
Joe Pillow
Joe Tessler
Joel Kitching
Joel Linn
Joey Peng
Johanna Schander
John Su
@@ -338,7 +325,6 @@ Jordan Crouse
Jörg Mische
Joseph Smith
Josie Nordrum
Juan José García-Castro Crespo
Julia Tsai
Julian Schroeder
Julian Stecklina
@@ -351,7 +337,6 @@ Kangheui Won
Kapil Porwal
Karol Zmyslowski
Karthik Ramasubramanian
Kei Hiroyoshi
Keith Hui
Keith Packard
Kenneth Chan
@@ -382,11 +367,9 @@ Lawrence Chang
Leah Rowe
Lean Sheng Tan
Lei Wen
Lennart Eichhorn
Lenovo Group Ltd
Leo Chou
Li-Ta Lo
Li1 Feng
Liam Flaherty
Libra Li
Libretrend LDA
@@ -414,7 +397,6 @@ Marc Bertens
Marc Jones
Marco Chen
Marek Kasiewicz
Marek Maślanka
Marek Vasut
Mario Scheithauer
Marius Gröger
@@ -483,12 +465,10 @@ Myles Watson
Nancy.Lin
Naresh Solanki
Nathan Lu
Naveen R. Iyer
Neill Corlett
Network Appliance Inc.
Nicholas Chin
Nicholas Sielicki
Nicholas Sudsgaard
Nick Barker
Nick Chen
Nick Vaccaro
@@ -522,7 +502,6 @@ Paul Fagerburg
Paul Menzel
Paul2 Huang
Paulo Alcantara
Pavan Holla
Pavel Sayekat
Paz Zcharya
PC Engines GmbH
@@ -541,7 +520,6 @@ Philipp Deppenwiese
Philipp Hug
Piotr Kleinschmidt
Po Xu
Poornima Tom
Prasad Malisetty
Prashant Malani
Pratik Vishwakarma
@@ -551,7 +529,6 @@ Protectli
Purism SPC
Purism, SPC
Qii Wang
Qinghong Zeng
Qualcomm Technologies, Inc.
Quanta Computer INC
Raihow Shi
@@ -595,7 +572,6 @@ Robinson P. Tryon
Rockchip, Inc.
Rocky Phagura
Roger Lu
Roger Wang
Roja Rani Yarubandi
Romain Lievin
Roman Zippel
@@ -769,14 +745,12 @@ Wojciech Macek
Wolfgang Denk
Won Chung
Wonkyu Kim
Wuxy
Xiang W
Wuxy
Xin Ji
Xixi Chen
Xuxin Xiong
YADRO
Yan Liu
Yang Wu
Yann Collet
Yaroslav Kurlaev
YH Lin
@@ -793,7 +767,6 @@ Yuanliding
Yuchen He
Yuchen Huang
Yunlong Jia
Yuval Peress
Zachary Yedidia
Zanxi Chen
Zhanyong Wang
@@ -803,11 +776,10 @@ Zhi7 Li
Zhiqiang Ma
Zhixing Ma
Zhiyong Tao
Zhongtian Wu
zhongtian wu
Zhuohao Lee
Ziang Wang
Zoey Wu
Zoltan Baldaszti
小田喜陽彦
忧郁沙茶
陳建宏

View File

@@ -149,7 +149,6 @@ Platform Updates
### Updated SoCs
* Added src/soc/ibm/power9
* Added src/soc/intel/xeon_sp/gnr
* Added src/soc/sifive/fu740
@@ -157,15 +156,15 @@ Platform Updates
Statistics from the 24.02 to the 24.05 release
--------------------------------------------
* Total Commits: 739
* Average Commits per day: 8.64
* Total lines added: 304721
* Average lines added per commit: 412.34
* Number of patches adding more than 100 lines: 60
* Average lines added per small commit: 37.74
* Total lines removed: 16195
* Average lines removed per commit: 21.91
* Total difference between added and removed: 288526
* Total Commits: 722
* Average Commits per day: 8.55
* Total lines added: 302523
* Average lines added per commit: 419.01
* Number of patches adding more than 100 lines: 57
* Average lines added per small commit: 37.80
* Total lines removed: 16089
* Average lines removed per commit: 22.28
* Total difference between added and removed: 286434
* Total authors: 131
* New authors: 23

View File

@@ -501,8 +501,7 @@ CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer
CFLAGS_common += -fstrict-aliasing -ffunction-sections -fdata-sections -fno-pie
CFLAGS_common += -Wstring-compare
ifeq ($(CONFIG_COMPILER_GCC),y)
CFLAGS_common += -Wold-style-declaration -Wflex-array-member-not-at-end
CFLAGS_common += -Wcalloc-transposed-args
CFLAGS_common += -Wold-style-declaration
# Don't add these GCC specific flags when running scan-build
ifeq ($(CCC_ANALYZER_OUTPUT_FORMAT),)
CFLAGS_common += -Wno-packed-not-aligned

View File

@@ -381,7 +381,6 @@ payloads/external/iPXE/ipxe/ipxe.rom ipxe: $(DOTCONFIG) $(IPXE_CONFIG_SCRIPT)
CONFIG_HAS_SCRIPT=$(CONFIG_IPXE_ADD_SCRIPT) \
CONFIG_IPXE_NO_PROMPT=$(CONFIG_IPXE_NO_PROMPT) \
CONFIG_IPXE_HAS_HTTPS=$(CONFIG_IPXE_HAS_HTTPS) \
CONFIG_PXE_TRUST_CMD=$(CONFIG_PXE_TRUST_CMD) \
MFLAGS= MAKEFLAGS=
# LinuxBoot

View File

@@ -108,16 +108,7 @@ config IPXE_HAS_HTTPS
Enable HTTPS protocol, which allows you to encrypt all communication
with a web server and to verify the server's identity
config PXE_TRUST_CMD
bool "Enable TRUST commands"
default y
help
Enable imgverify and imgtrust commands, which allow you to verify
digital signature of file prior loading it, and restrict to loading
trusted files only.
endif # BUILD_IPXE
endmenu
endif # PXE

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@@ -52,9 +52,6 @@ endif
ifeq ($(CONFIG_IPXE_HAS_HTTPS),y)
sed -i'' 's|.*DOWNLOAD_PROTO_HTTPS|#define DOWNLOAD_PROTO_HTTPS|g' "$(project_dir)/src/config/general.h"
endif
ifeq ($(CONFIG_PXE_TRUST_CMD),y)
sed -i'' 's|.*IMAGE_TRUST_CMD|#define IMAGE_TRUST_CMD|g' "$(project_dir)/src/config/general.h"
endif
build: config $(CONFIG_SCRIPT)
ifeq ($(CONFIG_HAS_SCRIPT),y)

View File

@@ -106,22 +106,17 @@ menu "Architecture Options"
choice
prompt "Target Architecture"
default ARCH_X86_32
default ARCH_X86
config ARCH_ARM
bool "ARM"
help
Support the ARM architecture
config ARCH_X86_32
bool "x86_32"
config ARCH_X86
bool "x86"
help
Support the x86_32 architecture
config ARCH_X86_64
bool "x86_64"
help
Support the x86_64 architecture
Support the x86 architecture
config ARCH_ARM64
bool "ARM64"
@@ -138,12 +133,6 @@ config ARCH_MOCK
endchoice
config ARCH_X86
bool
default y if ARCH_X86_32 || ARCH_X86_64
help
Support the x86 architecture
config MULTIBOOT
bool "Multiboot header support"
depends on ARCH_X86

View File

@@ -118,8 +118,7 @@ ARCH-y := $(ARCHDIR-y)
# override here.
ARCH-$(CONFIG_LP_ARCH_ARM) := arm
ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
ARCH-$(CONFIG_LP_ARCH_X86_32) := x86_32
ARCH-$(CONFIG_LP_ARCH_X86_64) := x86_64
ARCH-$(CONFIG_LP_ARCH_X86) := x86_32
ARCH-$(CONFIG_LP_ARCH_MOCK) := mock
# Five cases where we don't need fully populated $(obj) lists:

View File

@@ -56,6 +56,7 @@ classes-$(CONFIG_LP_REMOTEGDB) += libgdb
classes-$(CONFIG_LP_VBOOT_LIB) += vboot_fw
classes-$(CONFIG_LP_VBOOT_LIB) += tlcl
libraries := $(classes-y)
classes-y += head.o
subdirs-y := arch/$(ARCHDIR-y)
subdirs-y += crypto libc drivers libpci gdb
@@ -96,7 +97,7 @@ $(obj)/libpayload-config.h: $(KCONFIG_AUTOHEADER) $(obj)/libpayload.config
cmp $@ $< 2>/dev/null || cp $< $@
library-targets = $(addsuffix .a,$(addprefix $(obj)/,$(libraries))) $(obj)/libpayload.a
lib: $$(library-targets) $(obj)/libpayload.ldscript
lib: $$(library-targets) $(obj)/head.o
extract_nth=$(word $(1), $(subst |, ,$(2)))
@@ -115,16 +116,17 @@ $(obj)/%.a: $$(%-objs)
printf " AR $(subst $(CURDIR)/,,$(@))\n"
printf "create $@\n$(foreach objc,$(filter-out %.a,$^),addmod $(objc)\n)$(foreach lib,$(filter %.a,$^),addlib $(lib)\n)save\nend\n" | $(AR) -M
$(obj)/libpayload.ldscript: arch/$(ARCHDIR-y)/libpayload.ldscript $(obj)/libpayload-config.h
@printf " LDSCRIPT $@\n"
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -E -P -x assembler-with-cpp -undef -o $@ $<
$(obj)/head.o: $(obj)/arch/$(ARCHDIR-y)/head.head.o.o
printf " CP $(subst $(CURDIR)/,,$(@))\n"
cp $^ $@
install: real-target
printf " INSTALL $(DESTDIR)/libpayload/lib\n"
install -m 755 -d $(DESTDIR)/libpayload/lib
install -m 644 $(library-targets) $(DESTDIR)/libpayload/lib/
install -m 644 $(obj)/libpayload.ldscript $(DESTDIR)/libpayload/lib/
install -m 644 arch/$(ARCHDIR-y)/libpayload.ldscript $(DESTDIR)/libpayload/lib/
install -m 755 -d $(DESTDIR)/libpayload/lib/$(ARCHDIR-y)
install -m 644 $(obj)/head.o $(DESTDIR)/libpayload/lib/$(ARCHDIR-y)
printf " INSTALL $(DESTDIR)/libpayload/include\n"
install -m 755 -d $(DESTDIR)/libpayload/include
find include -type d -exec install -m755 -d $(DESTDIR)/libpayload/{} \;

View File

@@ -29,7 +29,7 @@
CFLAGS += -mthumb -march=armv7-a
arm_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always -Wa,-mno-warn-deprecated
libc-y += head.S
head.o-y += head.S
libc-y += eabi_compat.c
libc-y += main.c sysinfo.c
libc-y += timer.c coreboot.c util.S
@@ -44,4 +44,5 @@ libc-$(CONFIG_LP_GPL) += memcpy.S memset.S memmove.S
libgdb-y += gdb.c
# Add other classes here when you put assembly files into them!
head.o-S-ccopts += $(arm_asm_flags)
libc-S-ccopts += $(arm_asm_flags)

View File

@@ -29,7 +29,7 @@
CFLAGS += -march=armv8-a
arm64_asm_flags =
libc-y += head.S
head.o-y += head.S
libc-y += main.c sysinfo.c
libc-y += timer.c coreboot.c util.S
libc-y += virtual.c
@@ -42,4 +42,5 @@ libc-y += mmu.c
libgdb-y += gdb.c
# Add other classes here when you put assembly files into them!
libc-S-ccopts += $(arm64_asm_flags)
head.o-S-ccopts += $(arm64_asm_flags)
libc-S-ccopts += $(arm64_asm_flags)

View File

@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
head.o-y += head.c
libc-y += virtual.c
CFLAGS += -Wno-address-of-packed-member

View File

@@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is empty on purpose. It should not be used. */

View File

@@ -27,26 +27,16 @@
##
ifneq ($(CONFIG_LP_COMPILER_LLVM_CLANG),y)
ifeq ($(CONFIG_LP_ARCH_X86_64),y)
CFLAGS += -mpreferred-stack-boundary=4
else
CFLAGS += -mpreferred-stack-boundary=2
endif
endif
libc-$(CONFIG_LP_ARCH_X86_32) += head.S
libc-$(CONFIG_LP_ARCH_X86_64) += head_64.S
libc-$(CONFIG_LP_ARCH_X86_64) += pt.S
head.o-y += head.S
libc-y += main.c sysinfo.c
libc-y += timer.c coreboot.c util.S
libc-y += virtual.c
libc-y += exec.S virtual.c
libc-y += selfboot.c cache.c
libc-y += exception.c
libc-y += exception_asm.S exception.c
libc-y += delay.c
libc-$(CONFIG_LP_ARCH_X86_32) += exec.c
libc-$(CONFIG_LP_ARCH_X86_32) += exec.S
libc-$(CONFIG_LP_ARCH_X86_32) += exception_asm.S
libc-$(CONFIG_LP_ARCH_X86_64) += exception_asm_64.S
# Will fall back to default_memXXX() in libc/memory.c if GPL not allowed.
libc-$(CONFIG_LP_GPL) += string.c

View File

@@ -34,13 +34,7 @@
#define IF_FLAG (1 << 9)
#if CONFIG(LP_ARCH_X86_64)
#define REGISTER_FMT "0x%016zx"
#else
#define REGISTER_FMT "0x%08zx"
#endif
u8 exception_stack[0x400] __aligned(16);
u32 exception_stack[0x400] __attribute__((aligned(8)));
static interrupt_handler handlers[256];
@@ -149,27 +143,17 @@ static void dump_exception_state(void)
break;
}
printf("\n");
printf("REG_IP: " REGISTER_FMT "\n", exception_state->regs.reg_ip);
printf("REG_FLAGS: " REGISTER_FMT "\n", exception_state->regs.reg_flags);
printf("REG_AX: " REGISTER_FMT "\n", exception_state->regs.reg_ax);
printf("REG_BX: " REGISTER_FMT "\n", exception_state->regs.reg_bx);
printf("REG_CX: " REGISTER_FMT "\n", exception_state->regs.reg_cx);
printf("REG_DX: " REGISTER_FMT "\n", exception_state->regs.reg_dx);
printf("REG_SP: " REGISTER_FMT "\n", exception_state->regs.reg_sp);
printf("REG_BP: " REGISTER_FMT "\n", exception_state->regs.reg_bp);
printf("REG_SI: " REGISTER_FMT "\n", exception_state->regs.reg_si);
printf("REG_DI: " REGISTER_FMT "\n", exception_state->regs.reg_di);
#if CONFIG(LP_ARCH_X86_64)
printf("REG_R8: 0x%016zx\n", exception_state->regs.reg_r8);
printf("REG_R9: 0x%016zx\n", exception_state->regs.reg_r9);
printf("REG_R10: 0x%016zx\n", exception_state->regs.reg_r10);
printf("REG_R11: 0x%016zx\n", exception_state->regs.reg_r11);
printf("REG_R12: 0x%016zx\n", exception_state->regs.reg_r12);
printf("REG_R13: 0x%016zx\n", exception_state->regs.reg_r13);
printf("REG_R14: 0x%016zx\n", exception_state->regs.reg_r14);
printf("REG_R15: 0x%016zx\n", exception_state->regs.reg_r15);
#endif
printf("EIP: 0x%08x\n", exception_state->regs.eip);
printf("CS: 0x%04x\n", exception_state->regs.cs);
printf("EFLAGS: 0x%08x\n", exception_state->regs.eflags);
printf("EAX: 0x%08x\n", exception_state->regs.eax);
printf("ECX: 0x%08x\n", exception_state->regs.ecx);
printf("EDX: 0x%08x\n", exception_state->regs.edx);
printf("EBX: 0x%08x\n", exception_state->regs.ebx);
printf("ESP: 0x%08x\n", exception_state->regs.esp);
printf("EBP: 0x%08x\n", exception_state->regs.ebp);
printf("ESI: 0x%08x\n", exception_state->regs.esi);
printf("EDI: 0x%08x\n", exception_state->regs.edi);
printf("DS: 0x%04x\n", exception_state->regs.ds);
printf("ES: 0x%04x\n", exception_state->regs.es);
printf("SS: 0x%04x\n", exception_state->regs.ss);
@@ -180,7 +164,7 @@ static void dump_exception_state(void)
void exception_dispatch(void)
{
die_if(exception_state->vector >= ARRAY_SIZE(handlers),
"Invalid vector %zu\n", exception_state->vector);
"Invalid vector %u\n", exception_state->vector);
u8 vec = exception_state->vector;
@@ -200,7 +184,7 @@ void exception_dispatch(void)
vec);
dump_exception_state();
dump_stack(exception_state->regs.reg_sp, 512);
dump_stack(exception_state->regs.esp, 512);
/* We don't call apic_eoi because we don't want to ack the interrupt and
allow another interrupt to wake the processor. */
halt();
@@ -213,10 +197,6 @@ success:
void exception_init(void)
{
/* TODO: Add exception init code for x64, currently only supporting 32-bit code */
if (CONFIG(LP_ARCH_X86_64))
return;
exception_stack_end = exception_stack + ARRAY_SIZE(exception_stack);
exception_init_asm();
}
@@ -226,17 +206,6 @@ void set_interrupt_handler(u8 vector, interrupt_handler handler)
handlers[vector] = handler;
}
#if CONFIG(LP_ARCH_X86_64)
static uint64_t eflags(void)
{
uint64_t eflags;
asm volatile(
"pushfq\n\t"
"popq %0\n\t"
: "=rm" (eflags));
return eflags;
}
#else
static uint32_t eflags(void)
{
uint32_t eflags;
@@ -246,7 +215,6 @@ static uint32_t eflags(void)
: "=rm" (eflags));
return eflags;
}
#endif
void enable_interrupts(void)
{

View File

@@ -1,221 +0,0 @@
/*
*
* Copyright 2024 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
.align 16
.global exception_stack_end
exception_stack_end:
.quad 0
.global exception_state
exception_state:
.quad 0
/* Some temporary variables which are used while saving exception state. */
vector:
.quad 0
error_code:
.quad 0
old_rsp:
.quad 0
old_rax:
.quad 0
.align 16
/*
* Each exception vector has a small stub associated with it which sets aside
* the error code, if any, records which vector we entered from, and calls
* the common exception entry point. Some exceptions have error codes and some
* don't, so we have a macro for each type.
*/
.macro stub num
exception_stub_\num:
movq $0, error_code
movq $\num, vector
jmp exception_common
.endm
.macro stub_err num
exception_stub_\num:
pop error_code
movq $\num, vector
jmp exception_common
.endm
.altmacro
.macro user_defined_stubs from, to
stub \from
.if \to-\from
user_defined_stubs %(from+1),\to
.endif
.endm
stub 0
stub 1
stub 2
stub 3
stub 4
stub 5
stub 6
stub 7
stub_err 8
stub 9
stub_err 10
stub_err 11
stub_err 12
stub_err 13
stub_err 14
stub 15
stub 16
stub_err 17
stub 18
stub 19
stub 20
stub 21
stub 22
stub 23
stub 24
stub 25
stub 26
stub 27
stub 28
stub 29
stub_err 30
stub 31
/* Split the macro so we avoid a stack overflow. */
user_defined_stubs 32, 63
user_defined_stubs 64, 127
user_defined_stubs 128, 191
user_defined_stubs 192, 255
exception_common:
/* Return from the exception. */
iretl
/*
* We need segment selectors for the IDT, so we need to know where things are
* in the GDT. We set one up here which is pretty standard and largely copied
* from coreboot.
*/
.align 16
gdt:
/* selgdt 0, unused */
.word 0x0000, 0x0000
.byte 0x00, 0x00, 0x00, 0x00
/* selgdt 8, unused */
.word 0x0000, 0x0000
.byte 0x00, 0x00, 0x00, 0x00
/* selgdt 0x10, flat 4GB code segment */
.word 0xffff, 0x0000
.byte 0x00, 0x9b, 0xcf, 0x00
/* selgdt 0x18, flat 4GB data segment */
.word 0xffff, 0x0000
.byte 0x00, 0x92, 0xcf, 0x00
/* selgdt 0x20, flat x64 code segment */
.word 0xffff, 0x0000
.byte 0x00, 0x9b, 0xaf, 0x00
gdt_end:
/* GDT pointer for use with lgdt */
.global gdt_ptr
gdt_ptr:
.word gdt_end - gdt - 1
.quad gdt
/*
* Record the target and construct the actual entry at init time. This
* is necessary because the linker doesn't want to construct the entry
* for us.
*/
.macro interrupt_gate target
.quad \target
.quad \target
.endm
.altmacro
.macro user_defined_gates from, to
interrupt_gate exception_stub_\from
.if \to-\from
user_defined_gates %(from+1),\to
.endif
.endm
.align 16
.global idt
idt:
interrupt_gate exception_stub_0
interrupt_gate exception_stub_1
interrupt_gate exception_stub_2
interrupt_gate exception_stub_3
interrupt_gate exception_stub_4
interrupt_gate exception_stub_5
interrupt_gate exception_stub_6
interrupt_gate exception_stub_7
interrupt_gate exception_stub_8
interrupt_gate exception_stub_9
interrupt_gate exception_stub_10
interrupt_gate exception_stub_11
interrupt_gate exception_stub_12
interrupt_gate exception_stub_13
interrupt_gate exception_stub_14
interrupt_gate exception_stub_15
interrupt_gate exception_stub_16
interrupt_gate exception_stub_17
interrupt_gate exception_stub_18
interrupt_gate exception_stub_19
interrupt_gate exception_stub_20
interrupt_gate exception_stub_21
interrupt_gate exception_stub_22
interrupt_gate exception_stub_23
interrupt_gate exception_stub_24
interrupt_gate exception_stub_25
interrupt_gate exception_stub_26
interrupt_gate exception_stub_27
interrupt_gate exception_stub_28
interrupt_gate exception_stub_29
interrupt_gate exception_stub_30
interrupt_gate exception_stub_31
user_defined_gates 32, 63
user_defined_gates 64, 127
user_defined_gates 128, 191
user_defined_gates 192, 255
idt_end:
/* IDT pointer for use with lidt */
idt_ptr:
.word idt_end - idt - 1
.quad idt
.global exception_init_asm
exception_init_asm:
ret

View File

@@ -15,7 +15,6 @@
#include <exception.h>
#include <gdb.h>
#include <libpayload.h>
#include <stddef.h>
static const u8 type_to_signal[] = {
[EXC_DE] = GDB_SIGFPE,
@@ -54,15 +53,12 @@ void gdb_arch_init(void)
void gdb_arch_enter(void)
{
u8 *stack_pointer;
#if CONFIG(LP_ARCH_X86_64)
asm volatile ("movq %%rsp, %0" : "=r"(stack_pointer));
#else
asm volatile ("mov %%esp, %0" : "=r"(stack_pointer));
#endif
u32 *esp;
asm volatile ("mov %%esp, %0" : "=r"(esp) );
/* Avoid reentrant exceptions, just call the hook if in one already. */
if (stack_pointer >= exception_stack && stack_pointer <= exception_stack_end)
if (esp >= exception_stack && esp <= exception_stack_end)
gdb_exception_hook(EXC_BP);
else
asm volatile ("int3");
@@ -70,12 +66,12 @@ void gdb_arch_enter(void)
int gdb_arch_set_single_step(int on)
{
const size_t tf_bit = 1 << 8;
const u32 tf_bit = 1 << 8;
if (on)
exception_state->regs.reg_flags |= tf_bit;
exception_state->regs.eflags |= tf_bit;
else
exception_state->regs.reg_flags &= ~tf_bit;
exception_state->regs.eflags &= ~tf_bit;
return 0;
}

View File

@@ -29,7 +29,7 @@
.code32
.global _entry
.section .text._entry
.text
.align 4
/*
@@ -38,14 +38,37 @@
* change anything.
*/
_entry:
jmp _init
/* Add multiboot header and jump around it when building with multiboot support. */
#if CONFIG(LP_MULTIBOOT)
#include "multiboot_header.inc"
#endif
.align 4
#define MB_MAGIC 0x1BADB002
#define MB_FLAGS 0x00010003
mb_header:
.long MB_MAGIC
.long MB_FLAGS
.long -(MB_MAGIC + MB_FLAGS)
.long mb_header
.long _start
.long _edata
.long _end
.long _init
/*
* This function saves off the previous stack and switches us to our
* own execution environment.
*/
_init:
/* No interrupts, please. */
cli
#if CONFIG(LP_MULTIBOOT)
/* Store EAX and EBX */
movl %eax, loader_eax
movl %ebx, loader_ebx
#endif
/* save pointer to coreboot tables */
movl 4(%esp), %eax
movl %eax, cb_header_ptr

View File

@@ -1,141 +0,0 @@
/*
*
* Copyright (C) 2024 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define IA32_EFER 0xC0000080
#define EFER_LME (1 << 8)
.code32
.global _entry
.section .text._entry
.align 4
/*
* WARNING: Critical Code Section - 32/64-bit Compatibility
* This code between `_entry` and `jnz _init64` is executed during system initialization.
* It MUST function correctly regardless of whether the system is booting in:
* - 32-bit protected mode
* - 64-bit long mode
* To achieve this, ONLY use instructions that produce identical binary output in both modes.
* Thoroughly test ALL modifications to this section in BOTH 32-bit and 64-bit boot
* environments.
*/
_entry:
/* Add multiboot header and jump around it when building with multiboot support. */
#if CONFIG(LP_MULTIBOOT)
#include "multiboot_header.inc"
#endif
/* No interrupts, please. */
cli
movl $IA32_EFER, %ecx
rdmsr
testl $EFER_LME, %eax
jnz _init64
lgdt %cs:gdt_ptr
/* save pointer to coreboot tables */
movl 4(%esp), %eax
/*
* NOTE: coreboot tables has passed over the top of the stack
* while calling in protected mode.
*/
movl %eax, cb_header_ptr
call init_page_table
movl $pm4le, %eax
/* load identity mapped page tables */
movl %eax, %cr3
/* enable PAE */
movl %cr4, %eax
btsl $5, %eax
movl %eax, %cr4
/* enable long mode */
movl $(IA32_EFER), %ecx
rdmsr
btsl $8, %eax
wrmsr
/* enable paging */
movl %cr0, %eax
btsl $31, %eax
movl %eax, %cr0
/* Jump to selgdt 0x20, flat x64 code segment */
ljmp $0x20, $_entry64
.code64
.align 16
_init64:
movabs $gdt_ptr, %rax
lgdt (%rax)
/*
* Note: The `cb_header_ptr` has passed as the first argument
* to the x86-64 calling convention.
*/
movq %rdi, cb_header_ptr
call init_page_table
movq $pm4le, %rax
/* load identity mapped page tables */
movq %rax, %cr3
_entry64:
/* Store current stack pointer and set up new stack. */
movq %rsp, %rax
movabs $_estack, %rsp
push %rax
fninit
movq %cr0, %rax
andq $0xFFFFFFFFFFFFFFFB, %rax /* clear EM */
orq $0x00000022, %rax /* set MP, NE */
movq %rax, %cr0
movq %cr4, %rax
orq $0x00000600, %rax /* set OSFXSR, OSXMMEXCPT */
movq %rax, %cr4
/* Let's rock. */
call start_main
/* %rax has the return value - pass it on unmolested */
_leave:
/* Restore old stack. */
pop %rsp
/* Return to the original context. */
ret

View File

@@ -26,13 +26,8 @@
* SUCH DAMAGE.
*/
#if CONFIG(LP_ARCH_X86_64)
OUTPUT_FORMAT(elf64-x86-64)
OUTPUT_ARCH(x86_64)
#else
OUTPUT_FORMAT(elf32-i386)
OUTPUT_ARCH(i386)
#endif
ENTRY(_entry)

View File

@@ -1,54 +0,0 @@
/*
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
* Copyright (C) 2024 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MB_MAGIC 0x1BADB002
#define MB_FLAGS 0x00010003
jmp _init
/*
* Note: The Multiboot standard requires Multiboot header to be placed
* below 0x2000 in the resulting image. See:
* http://www.gnu.org/software/grub/manual/multiboot/html_node/OS-image-format.html
*/
mb_header:
.long MB_MAGIC
.long MB_FLAGS
.long -(MB_MAGIC + MB_FLAGS)
.long mb_header
.long _start
.long _edata
.long _end
.long _init
_init:
/* Store EAX and EBX */
movl %eax, loader_eax
movl %ebx, loader_ebx

View File

@@ -1,149 +0,0 @@
/*
*
* Copyright 2024 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* For reference see "AMD64 Architecture Programmer's Manual Volume 2",
* Document 24593-Rev. 3.31-July 2019 Chapter 5.3.4
*
* Page table attributes: WB, User+Supervisor, Present, Writeable, Accessed, Dirty
*/
.section .bss
#define _PRES (1ULL << 0)
#define _RW (1ULL << 1)
#define _US (1ULL << 2)
#define _A (1ULL << 5)
#define _D (1ULL << 6)
#define _PS (1ULL << 7)
.section .bss.pm4le
.global pm4le
.align 4096
pm4le:
.skip 8
.section .bss.main_page_table
.global main_page_table
.align 4096
main_page_table:
.skip 8192
.section .bss.extra_page_table
.global extra_page_table
.align 4096
extra_page_table:
.skip 32
/*
* WARNING: 32-bit/64-bit Mode Compatibility for Page Table Initialization
* This `init_page_table` function is designed to work in both 32-bit protected
* mode AND 64-bit long mode.
*
* Key Considerations:
* - Assembly Instructions: Use ONLY instructions that have the SAME binary representation
* in both 32-bit and 64-bit modes.
* - `.code64` Directive: We're compiling with `.code64` to ensure the assembler uses
* the correct 64-bit version of instructions (e.g., `inc`).
* - Register Notation:
* - Use 64-bit register names (like `%rsi`) for register-indirect addressing to avoid
* incorrect address size prefixes.
* - It's safe to use `%esi` with `mov` instructions, as the high 32 bits are zeroed
* in 64-bit mode.
*
* IMPORTANT:
* Thoroughly test ANY changes to this function in BOTH 32-bit and 64-bit boot environments.
*/
.code64
.section .text.init_page_table
.globl init_page_table
.type init_page_table, @function
init_page_table:
mov $0x80000001, %eax
cpuid
test $(1 << 26), %edx
jnz setup_1gb
setup_2mb:
mov $2048, %edi
mov $(_PRES + _RW + _US + _PS + _A + _D), %eax
mov $0, %ecx
mov $main_page_table, %esi
loop_2mb:
mov %eax, (%rsi, %rcx, 8)
mov $0, 4(%rsi, %rcx, 8)
add $0x200000, %eax
inc %ecx
cmp %edi, %ecx
jb loop_2mb
mov $4, %edi
mov $main_page_table, %eax
add $(_PRES + _RW + _US + _A), %eax
mov $0, %ecx
mov $extra_page_table, %esi
fill_extra_page_table:
mov %eax, (%rsi, %rcx, 8)
mov $0, 4(%rsi, %rcx, 8)
add $4096, %eax
inc %ecx
cmp %edi, %ecx
jb fill_extra_page_table
mov $extra_page_table, %eax
jmp leave
setup_1gb:
mov $512, %edi
mov $(_PRES + _RW + _US + _PS + _A + _D), %eax
mov $0, %ebx
mov $0, %ecx
mov $main_page_table, %esi
loop_1gb:
mov %eax, (%rsi, %rcx, 8)
mov %ebx, 4(%rsi, %rcx, 8)
add $0x40000000, %eax
cmp $0x40000000, %eax
ja no_overflow_1gb
inc %ebx
no_overflow_1gb:
inc %ecx
cmp %edi, %ecx
jb loop_1gb
mov $main_page_table, %eax
leave:
or $(_PRES + _RW + _US + _A), %eax
mov %eax, pm4le
ret

View File

@@ -81,16 +81,6 @@ void *memcpy(void *dest, const void *src, size_t n)
{
unsigned long d0, d1, d2;
#if CONFIG(LP_ARCH_X86_64)
asm volatile(
"rep ; movsq\n\t"
"mov %4,%%rcx\n\t"
"rep ; movsb\n\t"
: "=&c" (d0), "=&D" (d1), "=&S" (d2)
: "0" (n >> 3), "g" (n & 7), "1" (dest), "2" (src)
: "memory"
);
#else
asm volatile(
"rep ; movsl\n\t"
"movl %4,%%ecx\n\t"
@@ -99,7 +89,6 @@ void *memcpy(void *dest, const void *src, size_t n)
: "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src)
: "memory"
);
#endif
return dest;
}

View File

@@ -84,11 +84,7 @@ if [ "$CONFIG_LP_ARCH_ARM64" = "y" ]; then
fi
if [ "$CONFIG_LP_ARCH_X86" = "y" ]; then
_ARCHDIR=x86
if [ "$CONFIG_LP_ARCH_X86_32" = "y" ]; then
_ARCHEXTRA="-m32 "
else
_ARCHEXTRA="-m64 "
fi
_ARCHEXTRA="-m32 "
fi
if [ "$CONFIG_LP_ARCH_MOCK" = "y" ]; then
_ARCHDIR=mock
@@ -126,10 +122,13 @@ CMDLINE=
while [ $# -gt 0 ]; do
case $1 in
-m32|-fno-stack-protector|-m64)
-m32|-fno-stack-protector)
shift
continue
;;
-m64)
error "Invalid option --64 - only 32 bit architectures are supported"
;;
-c)
DOLINK=0
;;
@@ -202,6 +201,14 @@ if [ $DOLINK -eq 0 ]; then
$DEFAULT_CC $CMDLINE $_CFLAGS
else
_LIBGCC=`$DEFAULT_CC $_ARCHEXTRA -print-libgcc-file-name`
if [ -f $_ARCHLIBDIR/head.o ]; then
HEAD_O=$_ARCHLIBDIR/head.o
elif [ -f $_OBJ/head.o ]; then
HEAD_O=$_OBJ/head.o
else
echo "Could not find head.o"
exit 1
fi
if [ "$CONFIG_LP_ARM64_A53_ERRATUM_843419" = y ] &&
grep -q fix-cortex-a53-843419 $_XCOMPILE; then
@@ -213,8 +220,13 @@ else
_LDFLAGS="$_LDFLAGS -Wl,--defsym=CONFIG_LP_STACK_SIZE=$CONFIG_LP_STACK_SIZE"
if [ $DEBUGME -eq 1 ]; then
echo "$DEFAULT_CC $_LDFLAGS $CMDLINE $_CFLAGS -lpayload $_LIBGCC"
echo "$DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC"
fi
$DEFAULT_CC $_LDFLAGS $CMDLINE $_CFLAGS -lpayload -xnone $_LIBGCC
# Note: $_ARCHLIBDIR/head.o must be the first object being linked, because it
# contains a Multiboot header. The Multiboot standard requires this
# header to be placed below 0x2000 in the resulting image. See:
# http://www.gnu.org/software/grub/manual/multiboot/html_node/OS-image-format.html
$DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload -xnone $_LIBGCC
fi

View File

@@ -66,7 +66,7 @@ static u8 *ahci_prdbuf_init(ahci_dev_t *const dev,
u8 *const user_buf, const size_t len,
const int out)
{
if ((uintptr_t)user_buf & 1) {
if ((u32)user_buf & 1) {
printf("ahci: Odd buffer pointer (%p).\n", user_buf);
if (dev->buf) /* orphaned buffer */
free(dev->buf - *(dev->buf - 1));
@@ -76,7 +76,7 @@ static u8 *ahci_prdbuf_init(ahci_dev_t *const dev,
dev->user_buf = user_buf;
dev->write_back = !out;
dev->buflen = len;
if ((uintptr_t)dev->buf & 1) {
if ((u32)dev->buf & 1) {
dev->buf[0] = 1;
dev->buf += 1;
} else {

View File

@@ -274,7 +274,7 @@ uhci_stop(hci_t *controller)
#define UHCI_SLEEP_TIME_US 30
#define UHCI_TIMEOUT (USB_MAX_PROCESSING_TIME_US / UHCI_SLEEP_TIME_US)
#define GET_TD(x) ((void *)(((unsigned long)(x))&~0xf))
#define GET_TD(x) ((void*)(((unsigned int)(x))&~0xf))
static td_t *
wait_for_completed_qh(hci_t *controller, qh_t *qh)

View File

@@ -29,7 +29,6 @@
#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
#include <stddef.h>
#include <stdint.h>
void exception_init_asm(void);
@@ -39,28 +38,20 @@ void disable_interrupts(void);
/** Returns 1 if interrupts are enabled. */
int interrupts_enabled(void);
#if CONFIG(LP_ARCH_X86_64)
struct exception_state {
struct exception_state
{
/* Careful: x86/gdb.c currently relies on the size and order of regs. */
struct {
size_t reg_ax;
size_t reg_bx;
size_t reg_cx;
size_t reg_dx;
size_t reg_si;
size_t reg_di;
size_t reg_bp;
size_t reg_sp;
size_t reg_r8;
size_t reg_r9;
size_t reg_r10;
size_t reg_r11;
size_t reg_r12;
size_t reg_r13;
size_t reg_r14;
size_t reg_r15;
size_t reg_ip;
size_t reg_flags;
u32 eax;
u32 ecx;
u32 edx;
u32 ebx;
u32 esp;
u32 ebp;
u32 esi;
u32 edi;
u32 eip;
u32 eflags;
u32 cs;
u32 ss;
u32 ds;
@@ -68,39 +59,13 @@ struct exception_state {
u32 fs;
u32 gs;
} regs;
size_t error_code;
size_t vector;
u32 error_code;
u32 vector;
} __packed;
#else
struct exception_state {
/* Careful: x86/gdb.c currently relies on the size and order of regs. */
struct {
size_t reg_ax;
size_t reg_cx;
size_t reg_dx;
size_t reg_bx;
size_t reg_sp;
size_t reg_bp;
size_t reg_si;
size_t reg_di;
size_t reg_ip;
size_t reg_flags;
u32 cs;
u32 ss;
u32 ds;
u32 es;
u32 fs;
u32 gs;
} regs;
size_t error_code;
size_t vector;
} __packed;
#endif
extern struct exception_state *exception_state;
extern u8 exception_stack[];
extern u8 *exception_stack_end;
extern u32 exception_stack[];
extern u32 *exception_stack_end;
enum {
EXC_DE = 0, /* Divide by zero */

View File

@@ -29,7 +29,7 @@
libc-$(CONFIG_LP_LIBC) += malloc.c printf.c console.c string.c
libc-$(CONFIG_LP_LIBC) += memory.c ctype.c lib.c libgcc.c
libc-$(CONFIG_LP_LIBC) += rand.c time.c
libc-$(CONFIG_LP_LIBC) += rand.c time.c exec.c
libc-$(CONFIG_LP_LIBC) += readline.c getopt_long.c sysinfo.c
libc-$(CONFIG_LP_LIBC) += args.c
libc-$(CONFIG_LP_LIBC) += strlcpy.c

View File

@@ -29,10 +29,8 @@
#include <libpayload-config.h>
#include <libpayload.h>
#if CONFIG(LP_ARCH_X86_32)
#if CONFIG(LP_ARCH_X86)
extern void i386_do_exec(long addr, int argc, char **argv, int *ret);
#else
#error "exec does not currently support x86_64."
#endif
/**
@@ -47,7 +45,7 @@ int exec(long addr, int argc, char **argv)
{
int val = -1;
#if CONFIG(LP_ARCH_X86_32)
#if CONFIG(LP_ARCH_X86)
i386_do_exec(addr, argc, argv, &val);
#endif
return val;

View File

@@ -15,8 +15,7 @@ vboot-fixup-includes = $(filter -I$(coreboottop)/%, $(1)) \
$(filter-out -I$(coreboottop)/%,$(1)))))
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_ARM) := arm
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86_32) := x86
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86_64) := x86_64
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_X86) := x86
VBOOT_FIRMWARE_ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
ifneq ($(CONFIG_LP_ARCH_MOCK),)

View File

@@ -918,9 +918,8 @@ config GENERATE_PIRQ_TABLE
If unsure, say Y.
config GENERATE_SMBIOS_TABLES
depends on ARCH_X86 || ARCH_ARM64
depends on ARCH_X86
bool "Generate SMBIOS tables"
default n if ARCH_ARM64
default y
help
Generate SMBIOS tables for this board.

View File

@@ -11,7 +11,7 @@ static int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
{
lapic->type = LOCAL_APIC; /* Local APIC structure */
lapic->length = sizeof(acpi_madt_lapic_t);
lapic->flags = ACPI_MADT_LAPIC_ENABLED;
lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
lapic->processor_id = cpu;
lapic->apic_id = apic;
@@ -23,7 +23,7 @@ static int acpi_create_madt_lx2apic(acpi_madt_lx2apic_t *lapic, u32 cpu, u32 api
lapic->type = LOCAL_X2APIC; /* Local APIC structure */
lapic->reserved = 0;
lapic->length = sizeof(acpi_madt_lx2apic_t);
lapic->flags = ACPI_MADT_LAPIC_ENABLED;
lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
lapic->processor_id = cpu;
lapic->x2apic_id = apic;
@@ -127,12 +127,17 @@ static int acpi_create_madt_sci_override(acpi_madt_irqoverride_t *irqoverride)
ioapic_get_sci_pin(&gsi, &irq, &flags);
/* In systems without 8259, the SCI_INT field in the FADT contains the SCI GSI number
instead of the 8259 IRQ number */
if (!CONFIG(ACPI_HAVE_PCAT_8259))
irq = gsi;
return acpi_create_madt_irqoverride(irqoverride, MP_BUS_ISA, irq, gsi, flags);
irqoverride->type = IRQ_SOURCE_OVERRIDE; /* Interrupt source override */
irqoverride->length = sizeof(acpi_madt_irqoverride_t);
irqoverride->bus = MP_BUS_ISA;
irqoverride->source = irq;
irqoverride->gsirq = gsi;
irqoverride->flags = flags;
return irqoverride->length;
}
static unsigned long acpi_create_madt_ioapic_gsi0_default(unsigned long current)
@@ -229,7 +234,7 @@ unsigned long acpi_arch_fill_madt(acpi_madt_t *madt, unsigned long current)
madt->lapic_addr = cpu_get_lapic_addr();
if (CONFIG(ACPI_HAVE_PCAT_8259))
madt->flags |= ACPI_MADT_PCAT_COMPAT;
madt->flags |= 1;
if (CONFIG(ACPI_COMMON_MADT_LAPIC))
current = acpi_create_madt_lapics_with_nmis(current);

View File

@@ -14,7 +14,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/soundwire.h>
#include <stdio.h>
#include <types.h>
static char *gencurrent;

View File

@@ -4,7 +4,6 @@
#include <acpi/acpigen_dptf.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
/* Defaults */
#define DEFAULT_RAW_UNIT "ma"

View File

@@ -5,7 +5,6 @@
#include <acpi/acpigen.h>
#include <acpi/acpigen_usb.h>
#include <device/device.h>
#include <stdio.h>
static const char *power_role_to_str(enum usb_typec_power_role power_role)
{

View File

@@ -8,7 +8,6 @@
#include <acpi/acpigen_pci.h>
#include <device/device.h>
#include <stdlib.h>
#include <stdio.h>
#include <types.h>
#include <crc_byte.h>

View File

@@ -30,9 +30,6 @@ bootblock-y += eabi_compat.c
decompressor-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
bootblock-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
bootblock-y += transition.c transition_asm.S
ifneq ($(CONFIG_ARM64_CURRENT_EL),3)
bootblock-y += smc.c smc_asm.S
endif
decompressor-y += memset.S
bootblock-y += memset.S
@@ -72,9 +69,6 @@ verstage-y += memcpy.S
verstage-y += memmove.S
verstage-y += transition.c transition_asm.S
ifneq ($(CONFIG_ARM64_CURRENT_EL),3)
verstage-y += smc.c smc_asm.S
endif
endif # CONFIG_ARCH_VERSTAGE_ARM64
@@ -94,9 +88,6 @@ romstage-y += memmove.S
romstage-y += ramdetect.c
romstage-y += romstage.c
romstage-y += transition.c transition_asm.S
ifneq ($(CONFIG_ARM64_CURRENT_EL),3)
romstage-y += smc.c smc_asm.S
endif
rmodules_arm64-y += memset.S
rmodules_arm64-y += memcpy.S
@@ -118,7 +109,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y)
ramstage-y += div0.c
ramstage-y += eabi_compat.c
ramstage-y += boot.c
ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
ramstage-y += tables.c
ramstage-y += ramdetect.c
ramstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
@@ -127,9 +117,6 @@ ramstage-y += memcpy.S
ramstage-y += memmove.S
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31.c
ramstage-y += transition.c transition_asm.S
ifneq ($(CONFIG_ARM64_CURRENT_EL),3)
ramstage-y += smc.c smc_asm.S
endif
ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit_payload.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += dma.c

View File

@@ -1,52 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef ARM_ARM64_SMC_H
#define ARM_ARM64_SMC_H
#include <types.h>
uint64_t smc(uint32_t function_id, uint64_t arg1, uint64_t arg2, uint64_t arg3,
uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7);
#define smc_call0(function_id) smc(function_id, 0, 0, 0, 0, 0, 0, 0)
#define smc_call1(function_id, a1) smc(function_id, a1, 0, 0, 0, 0, 0, 0)
#define smc_call2(function_id, a1, a2) smc(function_id, a1, a2, 0, 0, 0, 0, 0)
#define smc_call3(function_id, a1, a2, a3) smc(function_id, a1, a2, a3, 0, 0, 0, 0)
/* Documented in https://developer.arm.com/documentation/den0022/ */
enum psci_return_values {
PSCI_SUCCESS = 0,
PSCI_NOT_SUPPORTED = -1,
PSCI_INVALID_PARAMETERS = -2,
PSCI_DENIED = -3,
PSCI_ALREADY_ON = -4,
PSCI_ON_PENDING = -5,
PSCI_INTERNAL_FAILURE = -6,
PSCI_NOT_PRESENT = -7,
PSCI_DISABLED = -8,
PSCI_INVALID_ADDRESS = -9,
};
/* PSCI functions */
#define PSCI_VERSION 0x84000000
#define PSCI_FEATURES 0x8400000a
/* Documented in https://developer.arm.com/documentation/den0028/ */
enum smccc_return_values {
SMC_SUCCESS = 0,
SMC_NOT_SUPPORTED = -1,
SMC_NOT_REQUIRED = -2,
SMC_INVALID_PARAMETER = -3,
};
/* SMCCC functions */
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_SOC_ID 0x80000002
#define SMCCC_GET_SOC_VERSION 0
#define SMCCC_GET_SOC_REVISION 1
uint8_t smccc_supports_arch_soc_id(void);
enum cb_err smccc_arch_soc_id(uint32_t *jep106code, uint32_t *soc_revision);
#endif /* ARM_ARM64_SMC_H */

View File

@@ -1,190 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cache.h>
#include <arch/lib_helpers.h>
#include <arch/smc.h>
#include <console/console.h>
#include <smbios.h>
#include <stdio.h>
static void smbios_processor_id(u32 *processor_id)
{
uint32_t jep106code, soc_revision;
uint64_t midr_el1;
if (smccc_supports_arch_soc_id()) {
smccc_arch_soc_id(&jep106code, &soc_revision);
processor_id[0] = jep106code;
processor_id[1] = soc_revision;
} else {
midr_el1 = raw_read_midr_el1();
processor_id[0] = midr_el1;
processor_id[1] = 0;
}
}
static int smbios_processor_manufacturer(u8 *start)
{
char midr_el1_implementer;
char buf[32];
// [31:24] - Implementer code
midr_el1_implementer = (raw_read_midr_el1() & 0xff000000) >> 24;
snprintf(buf, sizeof(buf), "CPU implementer %x", midr_el1_implementer);
return smbios_add_string(start, buf);
}
static int smbios_processor_name(u8 *start)
{
uint16_t midr_el1_partnumber;
char buf[32];
// [15:4] - PartNum
midr_el1_partnumber = (raw_read_midr_el1() & 0xfff0) >> 4;
snprintf(buf, sizeof(buf), "ARMv8 Processor rev %d", midr_el1_partnumber);
return smbios_add_string(start, buf);
}
#define MAX_CPUS_ENABLED(cpus) (cpus > 0xff ? 0xff : cpus)
/* NOTE: Not handling big.LITTLE clusters. Consider using MP services (not yet) or the DSU. */
int smbios_write_type4(unsigned long *current, int handle)
{
static unsigned int cnt = 0;
char buf[8];
uint16_t characteristics = 0;
unsigned int cpu_voltage;
struct smbios_type4 *t = smbios_carve_table(*current, SMBIOS_PROCESSOR_INFORMATION,
sizeof(*t), handle);
snprintf(buf, sizeof(buf), "CPU%d", cnt++);
t->socket_designation = smbios_add_string(t->eos, buf);
smbios_processor_id(t->processor_id);
t->processor_manufacturer = smbios_processor_manufacturer(t->eos);
t->processor_version = smbios_processor_name(t->eos);
t->processor_family = 0xfe; /* Use processor_family2 field */
t->processor_family2 = 0x101; /* ARMv8 */
t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL;
smbios_cpu_get_core_counts(&t->core_count2, &t->thread_count2);
t->core_count = MAX_CPUS_ENABLED(t->core_count2);
t->thread_count = MAX_CPUS_ENABLED(t->thread_count2);
/* Assume we always enable all cores */
t->core_enabled = t->core_count;
t->core_enabled2 = t->core_count2;
t->l1_cache_handle = 0xffff;
t->l2_cache_handle = 0xffff;
t->l3_cache_handle = 0xffff;
t->serial_number = smbios_add_string(t->eos, smbios_processor_serial_number());
t->status = SMBIOS_PROCESSOR_STATUS_CPU_ENABLED | SMBIOS_PROCESSOR_STATUS_POPULATED;
t->processor_upgrade = PROCESSOR_UPGRADE_UNKNOWN;
t->external_clock = smbios_processor_external_clock();
if (t->external_clock == 0)
t->external_clock = (raw_read_cntfrq_el0() / 1000 / 1000);
t->current_speed = smbios_cpu_get_current_speed_mhz();
/* This field identifies a capability for the system, not the processor itself. */
t->max_speed = smbios_cpu_get_max_speed_mhz();
/* TODO: Are "Enhanced Virtualization" (by EL2) and "Power/Performance Control" supported? */
characteristics |= PROCESSOR_64BIT_CAPABLE;
characteristics |= BIT(5); /* Execute Protection */
if (t->core_count > 1)
characteristics |= PROCESSOR_MULTI_CORE;
if (t->thread_count > 1)
characteristics |= BIT(4); /* BIT4: Hardware Thread */
if (smccc_supports_arch_soc_id())
characteristics |= BIT(9); /* Arm64 SoC ID */
t->processor_characteristics = characteristics | smbios_processor_characteristics();
cpu_voltage = smbios_cpu_get_voltage();
if (cpu_voltage > 0)
t->voltage = 0x80 | cpu_voltage;
const int len = smbios_full_table_len(&t->header, t->eos);
*current += len;
return len;
}
int smbios_write_type7_cache_parameters(unsigned long *current,
int *handle,
int *max_struct_size,
struct smbios_type4 *type4)
{
enum cache_level level = CACHE_L1;
int h;
int len = 0;
while (1) {
enum smbios_cache_type type;
struct cache_info info;
const u8 cache_type = cpu_get_cache_type(level);
/* No more caches in the system */
if (!cache_type)
break;
switch (cache_type) {
case CACHE_INSTRUCTION:
type = SMBIOS_CACHE_TYPE_INSTRUCTION;
cpu_get_cache_info(level, cache_type, &info);
break;
case CACHE_DATA:
type = SMBIOS_CACHE_TYPE_DATA;
cpu_get_cache_info(level, cache_type, &info);
break;
case CACHE_SEPARATE:
type = SMBIOS_CACHE_TYPE_DATA;
cpu_get_cache_info(level, CACHE_DATA, &info);
h = (*handle)++;
update_max(len, *max_struct_size, smbios_write_type7(current, h,
level, smbios_cache_sram_type(), smbios_cache_associativity(info.associativity),
type, info.size, info.size));
type = SMBIOS_CACHE_TYPE_INSTRUCTION;
cpu_get_cache_info(level, CACHE_INSTRUCTION, &info);
break;
case CACHE_UNIFIED:
type = SMBIOS_CACHE_TYPE_UNIFIED;
cpu_get_cache_info(level, cache_type, &info);
break;
default:
type = SMBIOS_CACHE_TYPE_UNKNOWN;
info.size = info.associativity = 0;
break;
}
h = (*handle)++;
update_max(len, *max_struct_size, smbios_write_type7(current, h,
level, smbios_cache_sram_type(), smbios_cache_associativity(info.associativity),
type, info.size, info.size));
if (type4) {
switch (level) {
case 1:
type4->l1_cache_handle = h;
break;
case 2:
type4->l2_cache_handle = h;
break;
case 3:
type4->l3_cache_handle = h;
break;
default:
break;
}
}
level++;
}
return len;
}

View File

@@ -1,66 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/smc.h>
#include <console/console.h>
#include <types.h>
/* Assumes at least a PSCI implementation is present */
uint8_t smccc_supports_arch_soc_id(void)
{
static uint8_t supported = 0xff;
uint64_t smc_ret;
if (supported != 0xff)
return supported;
// PSCI_FEATURES mandatory from PSCI 1.0
smc_ret = smc_call0(PSCI_VERSION);
if (smc_ret < 0x10000)
goto fail;
smc_ret = smc_call1(PSCI_FEATURES, SMCCC_VERSION);
if (smc_ret == PSCI_NOT_SUPPORTED)
goto fail;
// SMCCC_ARCH_FEATURES supported from SMCCC 1.1
smc_ret = smc_call0(SMCCC_VERSION);
if (smc_ret < 0x10001)
goto fail;
smc_ret = smc_call1(SMCCC_ARCH_FEATURES, SMCCC_ARCH_SOC_ID);
if (smc_ret != SMC_SUCCESS)
goto fail;
supported = 1;
return supported;
fail:
supported = 0;
return supported;
}
enum cb_err smccc_arch_soc_id(uint32_t *jep106code, uint32_t *soc_revision)
{
uint64_t smc_ret;
if (jep106code == NULL || soc_revision == NULL)
return CB_ERR_ARG;
smc_ret = smc_call1(SMCCC_ARCH_SOC_ID, SMCCC_GET_SOC_VERSION);
if (smc_ret != SMC_INVALID_PARAMETER)
*jep106code = smc_ret;
else
*jep106code = -1;
smc_ret = smc_call1(SMCCC_ARCH_SOC_ID, SMCCC_GET_SOC_REVISION);
if (smc_ret != SMC_INVALID_PARAMETER)
*soc_revision = smc_ret;
else
*soc_revision = -1;
if (*jep106code == -1 || *soc_revision == -1) {
printk(BIOS_ERR, "SMCCC_ARCH_SOC_ID failed!\n");
return CB_ERR;
} else
return CB_SUCCESS;
}

View File

@@ -1,9 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/asm.h>
ENTRY(smc)
/* W0, X1-X7 passed as arguments. Function ID is always W0. */
smc #0
ret /* X0 passed back as return value */
ENDPROC(smc)

View File

@@ -6,9 +6,6 @@
#include <boot/tables.h>
#include <bootmem.h>
#include <cbmem.h>
#include <console/console.h>
#include <smbios.h>
#include <string.h>
#include <symbols.h>
static void write_acpi_table(void)
@@ -21,40 +18,10 @@ static void write_acpi_table(void)
printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", acpi_end - acpi_start);
}
static void write_smbios_table(void)
{
unsigned long smbios_begin, smbios_end;
#define MAX_SMBIOS_SIZE (32 * KiB)
smbios_begin = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE);
if (!smbios_begin) {
printk(BIOS_ERR, "Out of memory for SMBIOS tables\n");
return;
}
/*
* Clear the entire region to ensure the unused space doesn't
* contain garbage from a previous boot, like stale table
* signatures that could be found by the OS.
*/
memset((void *)smbios_begin, 0, MAX_SMBIOS_SIZE);
smbios_end = smbios_write_tables(smbios_begin);
if (smbios_end > (smbios_begin + MAX_SMBIOS_SIZE))
printk(BIOS_ERR, "Increase SMBIOS size\n");
printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", smbios_end - smbios_begin);
}
void arch_write_tables(uintptr_t coreboot_table)
{
if (CONFIG(HAVE_ACPI_TABLES))
write_acpi_table();
if (CONFIG(GENERATE_SMBIOS_TABLES))
write_smbios_table();
}
void bootmem_arch_add_ranges(void)

View File

@@ -3,6 +3,7 @@
#ifndef _VM_H
#define _VM_H
#include <string.h>
#include <stdint.h>
#include <arch/encoding.h>

View File

@@ -12,8 +12,7 @@ static u16 acpi_sci_int(void)
ioapic_get_sci_pin(&gsi, &irq, &flags);
/* In systems without 8259, the SCI_INT field in the FADT contains the SCI GSI number
instead of the 8259 IRQ number */
/* ACPI Release 6.5, 5.2.9 and 5.2.15.5. */
if (!CONFIG(ACPI_HAVE_PCAT_8259))
return gsi;

View File

@@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <string.h>
#include <smbios.h>
#include <console/console.h>
#include <arch/cpu.h>
#include <cpu/x86/name.h>
#include <stdio.h>
static int smbios_cpu_vendor(u8 *start)
{
@@ -126,7 +126,7 @@ int smbios_write_type4(unsigned long *current, int handle)
t->processor_manufacturer = smbios_cpu_vendor(t->eos);
t->processor_version = smbios_processor_name(t->eos);
t->processor_family = smbios_processor_family(res);
t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL;
t->processor_type = 3; /* System Processor */
/*
* If CPUID leaf 11 is available, calculate "core count" by dividing
* SMT_ID (logical processors in a core) by Core_ID (number of cores).

View File

@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/vtxprintf.h>
#include <stdio.h>
#include <string.h>
struct vsnprintf_context {
char *str_buf;

View File

@@ -190,26 +190,17 @@ static void configure_c_states(struct device *dev)
/* C3 Interrupt Response Time Limit */
msr.hi = 0;
if (IS_IVY_CPU(cpu_get_cpuid()))
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x3b;
else
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x50;
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x50;
wrmsr(MSR_PKGC3_IRTL, msr);
/* C6 Interrupt Response Time Limit */
msr.hi = 0;
if (IS_IVY_CPU(cpu_get_cpuid()))
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x50;
else
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x68;
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x68;
wrmsr(MSR_PKGC6_IRTL, msr);
/* C7 Interrupt Response Time Limit */
msr.hi = 0;
if (IS_IVY_CPU(cpu_get_cpuid()))
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x57;
else
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x6D;
msr.lo = IRTL_VALID | IRTL_1024_NS | 0x6D;
wrmsr(MSR_PKGC7_IRTL, msr);
/* Primary Plane Current Limit (Icc) */

View File

@@ -100,97 +100,6 @@ void paging_disable_pae(void)
write_cr4(cr4);
}
/*
* Prepare PAE pagetables that identity map the whole 32-bit address space using
* 2 MiB pages. The PAT are set to all cacheable, but MTRRs still apply. CR3 is
* loaded and PAE is enabled by this function.
*
* Requires a scratch memory for pagetables.
*
* @param pgtbl Where pagetables reside, must be 4 KiB aligned and 20 KiB in
* size.
* Content at physical address isn't preserved.
* @return 0 on success, 1 on error
*/
int init_pae_pagetables(void *pgtbl)
{
struct pg_table *pgtbl_buf = (struct pg_table *)pgtbl;
struct pde *pd = pgtbl_buf->pd, *pdp = pgtbl_buf->pdp;
printk(BIOS_DEBUG, "%s: Using address %p for page tables\n",
__func__, pgtbl_buf);
/* Cover some basic error conditions */
if (!IS_ALIGNED((uintptr_t)pgtbl_buf, s4KiB)) {
printk(BIOS_ERR, "%s: Invalid alignment\n", __func__);
return 1;
}
paging_disable_pae();
/* Point the page directory pointers at the page directories. */
memset(pgtbl_buf->pdp, 0, sizeof(pgtbl_buf->pdp));
pdp[0].addr_lo = ((uintptr_t)&pd[512*0]) | PDPTE_PRES;
pdp[1].addr_lo = ((uintptr_t)&pd[512*1]) | PDPTE_PRES;
pdp[2].addr_lo = ((uintptr_t)&pd[512*2]) | PDPTE_PRES;
pdp[3].addr_lo = ((uintptr_t)&pd[512*3]) | PDPTE_PRES;
/* Identity map the whole 32-bit address space */
for (size_t i = 0; i < 2048; i++) {
pd[i].addr_lo = (i << PDE_IDX_SHIFT) | PDE_PS | PDE_PRES | PDE_RW;
pd[i].addr_hi = 0;
}
paging_enable_pae_cr3((uintptr_t)pdp);
return 0;
}
/*
* Map single 2 MiB page in pagetables created by init_pae_pagetables().
*
* The function does not check if the page was already non identity mapped,
* this allows callers to reuse one page without having to explicitly unmap it
* between calls.
*
* @param pgtbl Where pagetables created by init_pae_pagetables() reside.
* Content at physical address is preserved except for single
* entry corresponding to vmem_addr.
* @param paddr Physical memory address to map. Function prints a warning if
* it isn't aligned to 2 MiB.
* @param vmem_addr Where the virtual non identity mapped page resides, must
* be at least 2 MiB in size. Function prints a warning if it
* isn't aligned to 2 MiB.
* Content at physical address is preserved.
* @return 0 on success, 1 on error
*/
void pae_map_2M_page(void *pgtbl, uint64_t paddr, void *vmem_addr)
{
struct pg_table *pgtbl_buf = (struct pg_table *)pgtbl;
struct pde *pd;
if (!IS_ALIGNED(paddr, s2MiB)) {
printk(BIOS_WARNING, "%s: Aligning physical address to 2MiB\n",
__func__);
paddr = ALIGN_DOWN(paddr, s2MiB);
}
if (!IS_ALIGNED((uintptr_t)vmem_addr, s2MiB)) {
printk(BIOS_WARNING, "%s: Aligning virtual address to 2MiB\n",
__func__);
vmem_addr = (void *)ALIGN_DOWN((uintptr_t)vmem_addr, s2MiB);
}
/* Map a page using PAE at virtual address vmem_addr. */
pd = &pgtbl_buf->pd[((uintptr_t)vmem_addr) >> PDE_IDX_SHIFT];
pd->addr_lo = paddr | PDE_PS | PDE_PRES | PDE_RW;
pd->addr_hi = paddr >> 32;
/* Update page tables */
asm volatile ("invlpg (%0)" :: "b"(vmem_addr) : "memory");
}
/*
* Use PAE to map a page and then memset it with the pattern specified.
* In order to use PAE pagetables for virtual addressing are set up and reloaded
@@ -221,18 +130,22 @@ void pae_map_2M_page(void *pgtbl, uint64_t paddr, void *vmem_addr)
int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
void *vmem_addr)
{
struct pg_table *pgtbl_buf = (struct pg_table *)pgtbl;
ssize_t offset;
const uintptr_t pgtbl_s = (uintptr_t)pgtbl;
const uintptr_t pgtbl_e = pgtbl_s + sizeof(struct pg_table);
printk(BIOS_DEBUG, "%s: Using virtual address %p as scratchpad\n",
__func__, vmem_addr);
printk(BIOS_DEBUG, "%s: Using address %p for page tables\n",
__func__, pgtbl_buf);
/* Cover some basic error conditions */
if (!IS_ALIGNED((uintptr_t)vmem_addr, s2MiB)) {
if (!IS_ALIGNED((uintptr_t)pgtbl_buf, s4KiB) ||
!IS_ALIGNED((uintptr_t)vmem_addr, s2MiB)) {
printk(BIOS_ERR, "%s: Invalid alignment\n", __func__);
return 1;
}
const uintptr_t pgtbl_s = (uintptr_t)pgtbl_buf;
const uintptr_t pgtbl_e = pgtbl_s + sizeof(struct pg_table);
if (OVERLAP(dest, dest + length, pgtbl_s, pgtbl_e)) {
printk(BIOS_ERR, "%s: destination overlaps page tables\n",
@@ -247,12 +160,31 @@ int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
return 1;
}
if (init_pae_pagetables(pgtbl))
return 1;
paging_disable_pae();
struct pde *pd = pgtbl_buf->pd, *pdp = pgtbl_buf->pdp;
/* Point the page directory pointers at the page directories. */
memset(pgtbl_buf->pdp, 0, sizeof(pgtbl_buf->pdp));
pdp[0].addr_lo = ((uintptr_t)&pd[512*0]) | PDPTE_PRES;
pdp[1].addr_lo = ((uintptr_t)&pd[512*1]) | PDPTE_PRES;
pdp[2].addr_lo = ((uintptr_t)&pd[512*2]) | PDPTE_PRES;
pdp[3].addr_lo = ((uintptr_t)&pd[512*3]) | PDPTE_PRES;
offset = dest - ALIGN_DOWN(dest, s2MiB);
dest = ALIGN_DOWN(dest, s2MiB);
/* Identity map the whole 32-bit address space */
for (size_t i = 0; i < 2048; i++) {
pd[i].addr_lo = (i << PDE_IDX_SHIFT) | PDE_PS | PDE_PRES | PDE_RW;
pd[i].addr_hi = 0;
}
/* Get pointer to PD that's not identity mapped */
pd = &pgtbl_buf->pd[((uintptr_t)vmem_addr) >> PDE_IDX_SHIFT];
paging_enable_pae_cr3((uintptr_t)pdp);
do {
const size_t len = MIN(length, s2MiB - offset);
@@ -260,7 +192,11 @@ int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
* Map a page using PAE at virtual address vmem_addr.
* dest is already 2 MiB aligned.
*/
pae_map_2M_page(pgtbl, dest, vmem_addr);
pd->addr_lo = dest | PDE_PS | PDE_PRES | PDE_RW;
pd->addr_hi = dest >> 32;
/* Update page tables */
asm volatile ("invlpg (%0)" :: "b"(vmem_addr) : "memory");
printk(BIOS_SPEW, "%s: Clearing %llx[%lx] - %zx\n", __func__,
dest + offset, (uintptr_t)vmem_addr + offset, len);

View File

@@ -11,7 +11,6 @@
#include <device/mmio.h>
#include <rmodule.h>
#include <smmstore.h>
#include <stdio.h>
#include <string.h>
#include <types.h>

View File

@@ -846,18 +846,18 @@ config VGA_BIOS_ID
depends on VGA_BIOS
default "1106,3230"
help
The comma-separated PCI vendor and device ID that would associate
your vBIOS to your video card.
The comma-separated PCI vendor and device ID with optional revision if that
feature is enabled that would associate your vBIOS to your video card.
Example: 1106,3230
Example: 1106,3230 or 1106,3230,a3
In the above example 1106 is the PCI vendor ID (in hex, but without
the "0x" prefix) and 3230 specifies the PCI device ID of the
video card (also in hex, without "0x" prefix).
video card (also in hex, without "0x" prefix). a3 specifies the revision.
This ID needs to match the PCI VID and DID in the VGA BIOS file's
header and also needs to match the value returned by map_oprom_vendev
if the remapping feature is used.
or map_oprom_vendev_rev if the remapping feature is used.
Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices.
@@ -879,17 +879,23 @@ config VGA_BIOS_SECOND_ID
string "Graphics device PCI IDs"
depends on VGA_BIOS_SECOND
help
The comma-separated PCI vendor and device ID that would associate
your vBIOS to your video card.
The comma-separated PCI vendor and device ID with optional revision if that
feature is enabled that would associate your vBIOS to your video card.
Example: 1106,3230
Example: 1106,3230 or 1106,3230,a3
In the above example 1106 is the PCI vendor ID (in hex, but without
the "0x" prefix) and 3230 specifies the PCI device ID of the
video card (also in hex, without "0x" prefix).
video card (also in hex, without "0x" prefix). a3 specifies the revision.
Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices.
config CHECK_REV_IN_OPROM_NAME
def_bool n
help
Select this in the platform BIOS or chipset if the option rom has a revision
that needs to be checked when searching CBFS.
config VGA_BIOS_DGPU
bool "Add a discrete VGA BIOS image"
depends on VGA_BIOS

View File

@@ -4,7 +4,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <types.h>
@@ -777,7 +776,7 @@ void show_all_devs_resources(int debug_level, const char *msg)
}
}
const struct resource *resource_range_idx(struct device *dev, unsigned long index,
const struct resource *fixed_resource_range_idx(struct device *dev, unsigned long index,
uint64_t base, uint64_t size, unsigned long flags)
{
struct resource *resource;
@@ -786,13 +785,8 @@ const struct resource *resource_range_idx(struct device *dev, unsigned long inde
resource = new_resource(dev, index);
resource->base = base;
if (flags & IORESOURCE_FIXED)
resource->size = size;
if (flags & IORESOURCE_BRIDGE)
resource->limit = base + size - 1;
resource->flags = IORESOURCE_ASSIGNED;
resource->size = size;
resource->flags = IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
resource->flags |= flags;
printk(BIOS_SPEW, "dev: %s, index: 0x%lx, base: 0x%llx, size: 0x%llx\n",

View File

@@ -6,13 +6,13 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <stdio.h>
#include <string.h>
#include <cbfs.h>
#include <cbmem.h>
#include <acpi/acpigen.h>
/* Rmodules don't like weak symbols. */
void __weak map_oprom_vendev_rev(u32 *vendev, u8 *rev) { return; }
u32 __weak map_oprom_vendev(u32 vendev) { return vendev; }
void vga_oprom_preload(void)
@@ -39,26 +39,34 @@ static void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device)
return cbfs_map(name, NULL);
}
static void *cbfs_boot_map_optionrom_revision(uint16_t vendor, uint16_t device, uint8_t rev)
{
char name[20] = "pciXXXX,XXXX,XX.rom";
snprintf(name, sizeof(name), "pci%04hx,%04hx,%02hhx.rom", vendor, device, rev);
return cbfs_map(name, NULL);
}
struct rom_header *pci_rom_probe(const struct device *dev)
{
struct rom_header *rom_header = NULL;
struct pci_data *rom_data;
u8 rev = pci_read_config8(dev, PCI_REVISION_ID);
u8 mapped_rev = rev;
u32 vendev = (dev->vendor << 16) | dev->device;
u32 mapped_vendev = vendev;
/* If the ROM is in flash, then don't check the PCI device for it. */
mapped_vendev = map_oprom_vendev(vendev);
rom_header = cbfs_boot_map_optionrom(mapped_vendev >> 16, mapped_vendev & 0xffff);
/* Handle the case of VGA_BIOS_ID not being set to the remapped PCI ID. This is a
workaround that should be removed once the underlying issue is fixed. */
if (!rom_header && vendev != mapped_vendev) {
rom_header = cbfs_boot_map_optionrom(vendev >> 16, vendev & 0xffff);
if (rom_header) {
printk(BIOS_NOTICE, "VGA_BIOS_ID should be the remapped PCI ID "
"%04hx,%04hx in the VBIOS file\n",
mapped_vendev >> 16, mapped_vendev & 0xffff);
}
if (CONFIG(CHECK_REV_IN_OPROM_NAME)) {
map_oprom_vendev_rev(&mapped_vendev, &mapped_rev);
rom_header = cbfs_boot_map_optionrom_revision(mapped_vendev >> 16,
mapped_vendev & 0xffff,
mapped_rev);
} else {
mapped_vendev = map_oprom_vendev(vendev);
rom_header = cbfs_boot_map_optionrom(mapped_vendev >> 16,
mapped_vendev & 0xffff);
}
if (rom_header) {

View File

@@ -5,8 +5,8 @@
#include <commonlib/bsd/helpers.h>
#include <console/console.h>
#include <device/device.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "chip.h"

View File

@@ -3,8 +3,7 @@
#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#include <console/console.h>

View File

@@ -3,7 +3,7 @@
#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"

View File

@@ -6,7 +6,6 @@
#include <console/console.h>
#include <device/i2c_simple.h>
#include <device/device.h>
#include <stdio.h>
#include "chip.h"

View File

@@ -7,8 +7,7 @@
#include <device/i2c_simple.h>
#include <device/device.h>
#include <gpio.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#if CONFIG(HAVE_ACPI_TABLES)

View File

@@ -4,7 +4,7 @@
#include <acpi/acpigen.h>
#include <console/console.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"

View File

@@ -4,7 +4,7 @@
#include <acpi/acpigen.h>
#include <console/console.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"

View File

@@ -4,8 +4,7 @@
#include <acpi/acpi_device.h>
#include <assert.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#include <gpio.h>
#include <console/console.h>

View File

@@ -7,7 +7,6 @@
#include <device/device.h>
#include <identity.h>
#include <stdint.h>
#include <stdio.h>
#include <vendorcode/google/dsm_calib.h>
#include "chip.h"

View File

@@ -5,7 +5,6 @@
#include <console/console.h>
#include <device/i2c_simple.h>
#include <device/device.h>
#include <stdio.h>
#include "chip.h"

View File

@@ -6,7 +6,6 @@
#include <device/i2c.h>
#include <device/device.h>
#include <stdint.h>
#include <stdio.h>
#include <vendorcode/google/dsm_calib.h>
#include "chip.h"

View File

@@ -4,8 +4,6 @@
#include <acpi/acpigen.h>
#include <console/console.h>
#include <device/device.h>
#include <stdio.h>
#include "chip.h"
#define RT5645_ACPI_NAME "RT58"

View File

@@ -5,8 +5,7 @@
#include <console/console.h>
#include <device/i2c_simple.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#define I2C_SX9310_ACPI_ID "STH9310"

View File

@@ -5,8 +5,7 @@
#include <console/console.h>
#include <device/i2c_simple.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#define I2C_SX9324_ACPI_ID "STH9324"

View File

@@ -5,8 +5,7 @@
#include <console/console.h>
#include <device/i2c_simple.h>
#include <device/device.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#define I2C_SX9360_ACPI_ID "STH9360"

View File

@@ -5,7 +5,6 @@
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmc_ipc.h>
#include <stdio.h>
#include <soc/dptf.h>
#include <soc/pci_devs.h>
#include "chip.h"

View File

@@ -77,7 +77,7 @@ bool fsp_is_multi_phase_init_enabled(void)
static void fsp_fill_common_arch_params(FSPS_UPD *supd)
{
#if (CONFIG(FSPS_HAS_ARCH_UPD) && !CONFIG(PLATFORM_USES_FSP2_4))
#if CONFIG(FSPS_HAS_ARCH_UPD)
FSPS_ARCHx_UPD *s_arch_cfg = &supd->FspsArchUpd;
s_arch_cfg->EnableMultiPhaseSiliconInit = fsp_is_multi_phase_init_enabled();
#endif

View File

@@ -8,7 +8,6 @@
#include <commonlib/fsp.h>
#include <console/console.h>
#include <fsp/util.h>
#include <stdio.h>
#include <string.h>
#include <types.h>
#include <assert.h>

View File

@@ -1,8 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpigen.h>
#include <stdio.h>
#include <string.h>
#include "i915.h"
void

View File

@@ -9,8 +9,6 @@
#include <device/i2c_simple.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <stdio.h>
#include "chip.h"
#define CSI2_DATA_STREAM_INTERFACE_GUID \

View File

@@ -7,7 +7,6 @@
#include <console/console.h>
#include <drivers/usb/acpi/chip.h>
#include <intelblocks/acpi.h>
#include <stdio.h>
#include "chip.h"

View File

@@ -7,8 +7,7 @@
#include <device/device.h>
#include <drivers/usb/acpi/chip.h>
#include <gpio.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#include "retimer.h"

View File

@@ -6,8 +6,7 @@
#include <device/device.h>
#include <device/spi.h>
#include <spi-generic.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
static int spi_acpi_get_bus(const struct device *dev)

View File

@@ -6,7 +6,6 @@
#include <delay.h>
#include <cpu/x86/mp.h>
#include <timer.h>
#include <stdio.h>
#include <string.h>
#include <soc/soc_util.h>
#include <soc/util.h>

View File

@@ -6,8 +6,7 @@
#include <device/device.h>
#include <device/spi.h>
#include <spi-generic.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
static int spi_acpi_get_bus(const struct device *dev)

View File

@@ -3,8 +3,7 @@
#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <console/console.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
static bool uart_acpi_add_gpios_to_crs(struct drivers_uart_acpi_config *config)

View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <stdint.h>
#include <stddef.h>
#include <device/pci_ops.h>
#include <console/uart.h>
#include <device/pci.h>

View File

@@ -2,7 +2,6 @@
#include <acpi/acpigen.h>
#include <acpi/acpi_device.h>
#include <stdio.h>
#include "chip.h"

View File

@@ -7,7 +7,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/xhci.h>
#include <stdio.h>
#include <stdlib.h>
#define PCI_XHCI_CLASSCODE 0x0c0330 /* USB3.0 xHCI controller */

View File

@@ -7,7 +7,6 @@
#include <device/pci_ids.h>
#include <mtcl.h>
#include <sar.h>
#include <stdio.h>
#include <stdlib.h>
#include <wrdd.h>

View File

@@ -4,7 +4,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
#include <stdio.h>
#include "chip.h"
#include "ec.h"

View File

@@ -5,8 +5,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/path.h>
#include <stdio.h>
#include "chip.h"
#define CROS_EC_AUDIO_CODEC_HID "GOOG0013"

View File

@@ -4,7 +4,6 @@
#include <acpi/acpigen_dptf.h>
#include <ec/google/common/dptf.h>
#include <drivers/intel/dptf/chip.h>
#include <stdio.h>
#include "chip.h"
/*

View File

@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <stddef.h>
#include <ec/google/chromeec/ec.h>
uint32_t google_chromeec_get_board_sku(void)

View File

@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <stddef.h>
#include <ec/google/chromeec/ec.h>
#include <console/console.h>
#include <stdio.h>
#include <string.h>
#include <smbios.h>

View File

@@ -5,8 +5,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/path.h>
#include <stdio.h>
#include <string.h>
#include "chip.h"
#define CROS_EC_I2C_TUNNEL_HID "GOOG0012"

View File

@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpigen.h>
#include <stdio.h>
#include "chip.h"

View File

@@ -5,7 +5,6 @@
#include <device/device.h>
#include <device/pnp.h>
#include <ec/acpi/ec.h>
#include <stdio.h>
#include <string.h>
#include <smbios.h>
#include <option.h>

View File

@@ -2,7 +2,6 @@
#include <console/console.h>
#include <acpi/acpigen.h>
#include <stdio.h>
#include <string.h>
#include "h8.h"

View File

@@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <commonlib/bsd/helpers.h>
#include "librem_ec.h"
#include "../../system76/ec/system76_ec.h"
#include <stddef.h>
#define CMD_PROBE 1

View File

@@ -458,9 +458,6 @@ typedef struct acpi_madt {
u32 flags; /* Multiple APIC flags */
} __packed acpi_madt_t;
/* MADT Feature Flags */
#define ACPI_MADT_PCAT_COMPAT (1 << 0)
/*
* LPIT (Low Power Idle Table)
* Conforms to "Intel Low Power S0 Idle" specification, rev 002 from July 2017.
@@ -726,10 +723,6 @@ typedef struct acpi_madt_lapic {
#define ACPI_MADT_MAX_LAPIC_ID 0xfe
/* MADT Local APIC Feature Flags */
#define ACPI_MADT_LAPIC_ENABLED (1 << 0)
#define ACPI_MADT_LAPIC_ONLINE_CAPABLE (1 << 1)
/* MADT: Local APIC NMI Structure */
typedef struct acpi_madt_lapic_nmi {
u8 type; /* Type (4) */

View File

@@ -3,6 +3,7 @@
#define BOOTSTATE_H
#include <assert.h>
#include <string.h>
#include <stddef.h>
/* Only declare main() when in ramstage. */
#if ENV_RAMSTAGE

View File

@@ -35,15 +35,11 @@ void paging_set_default_pat(void);
* failure. */
int paging_enable_for_car(const char *pdpt_name, const char *pt_name);
/* To be used with memset_pae and pae_map_2M_page */
#define PAE_VMEM_ALIGN (2 * MiB)
#define PAE_VMEM_SIZE (2 * MiB)
#define PAE_PGTL_ALIGN (4 * KiB)
#define PAE_PGTL_SIZE (20 * KiB)
int init_pae_pagetables(void *pgtbl);
void pae_map_2M_page(void *pgtbl, uint64_t paddr, void *vmem_addr);
/* To be used with memset_pae */
#define MEMSET_PAE_VMEM_ALIGN (2 * MiB)
#define MEMSET_PAE_VMEM_SIZE (2 * MiB)
#define MEMSET_PAE_PGTL_ALIGN (4 * KiB)
#define MEMSET_PAE_PGTL_SIZE (20 * KiB)
int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl,
void *vmem_addr);

View File

@@ -263,7 +263,7 @@ void mmconf_resource(struct device *dev, unsigned long index);
/* These are temporary resource constructors to get us through the
migration away from open-coding all the IORESOURCE_FLAGS. */
const struct resource *resource_range_idx(struct device *dev, unsigned long index,
const struct resource *fixed_resource_range_idx(struct device *dev, unsigned long index,
uint64_t base, uint64_t size,
unsigned long flags);
@@ -272,8 +272,7 @@ const struct resource *fixed_mem_range_flags(struct device *dev, unsigned long i
uint64_t base, uint64_t size,
unsigned long flags)
{
return resource_range_idx(dev, index, base, size,
IORESOURCE_FIXED | IORESOURCE_MEM | flags);
return fixed_resource_range_idx(dev, index, base, size, IORESOURCE_MEM | flags);
}
static inline
@@ -285,24 +284,6 @@ const struct resource *fixed_mem_from_to_flags(struct device *dev, unsigned long
return fixed_mem_range_flags(dev, index, base, end - base, flags);
}
static inline
const struct resource *domain_mem_window_range(struct device *dev, unsigned long index,
uint64_t base, uint64_t size)
{
return resource_range_idx(dev, index, base, size,
IORESOURCE_MEM | IORESOURCE_BRIDGE);
}
static inline
const struct resource *domain_mem_window_from_to(struct device *dev, unsigned long index,
uint64_t base, uint64_t end)
{
if (end <= base)
return NULL;
return domain_mem_window_range(dev, index, base, end - base);
}
static inline
const struct resource *ram_range(struct device *dev, unsigned long index, uint64_t base,
uint64_t size)
@@ -363,18 +344,15 @@ static inline
const struct resource *fixed_io_range_flags(struct device *dev, unsigned long index,
uint16_t base, uint16_t size, unsigned long flags)
{
return resource_range_idx(dev, index, base, size,
IORESOURCE_FIXED | IORESOURCE_IO | flags);
return fixed_resource_range_idx(dev, index, base, size, IORESOURCE_IO | flags);
}
static inline
const struct resource *fixed_io_from_to_flags(struct device *dev, unsigned long index,
uint16_t base, uint32_t end, unsigned long flags)
uint16_t base, uint16_t end, unsigned long flags)
{
if (end <= base)
return NULL;
if (end > UINT16_MAX + 1)
return NULL;
return fixed_io_range_flags(dev, index, base, end - base, flags);
}
@@ -385,25 +363,6 @@ const struct resource *fixed_io_range_reserved(struct device *dev, unsigned long
return fixed_io_range_flags(dev, index, base, size, IORESOURCE_RESERVE);
}
static inline
const struct resource *domain_io_window_range(struct device *dev, unsigned long index,
uint16_t base, uint16_t size)
{
return resource_range_idx(dev, index, base, size,
IORESOURCE_IO | IORESOURCE_BRIDGE);
}
static inline
const struct resource *domain_io_window_from_to(struct device *dev, unsigned long index,
uint16_t base, uint32_t end)
{
if (end <= base)
return NULL;
if (end > UINT16_MAX + 1)
return NULL;
return domain_io_window_range(dev, index, base, end - base);
}
/* Compatibility code */
static inline void fixed_mem_resource_kb(struct device *dev, unsigned long index,

View File

@@ -55,6 +55,7 @@ pci_rom_write_acpi_tables(const struct device *device,
void pci_rom_ssdt(const struct device *device);
void map_oprom_vendev_rev(u32 *vendev, u8 *rev);
u32 map_oprom_vendev(u32 vendev);
int verified_boot_should_run_oprom(struct rom_header *rom_header);

View File

@@ -4,6 +4,7 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
#include <commonlib/rmodule-defs.h>
enum {

View File

@@ -70,7 +70,6 @@ const char *smbios_system_version(void);
void smbios_system_set_uuid(u8 *uuid);
const char *smbios_system_sku(void);
void smbios_cpu_get_core_counts(u16 *core_count, u16 *thread_count);
unsigned int smbios_cpu_get_max_speed_mhz(void);
unsigned int smbios_cpu_get_current_speed_mhz(void);
unsigned int smbios_cpu_get_voltage(void);
@@ -496,15 +495,6 @@ struct smbios_type4 {
#define SMBIOS_PROCESSOR_STATUS_POPULATED (1 << 6)
#define SMBIOS_PROCESSOR_STATUS_CPU_ENABLED (1 << 0)
enum smbios_processor_type {
SMBIOS_PROCESSOR_TYPE_OTHER = 0x01,
SMBIOS_PROCESSOR_TYPE_UNKNOWN = 0x02,
SMBIOS_PROCESSOR_TYPE_CENTRAL = 0x03,
SMBIOS_PROCESSOR_TYPE_MATH = 0x04,
SMBIOS_PROCESSOR_TYPE_DSP = 0x05,
SMBIOS_PROCESSOR_TYPE_VIDEO = 0x06,
};
/* enum for socket type */
enum smbios_processor_upgrade_field {
PROCESSOR_UPGRADE_OTHER = 0x01,

View File

@@ -3,7 +3,6 @@
#ifndef SPD_BIN_H
#define SPD_BIN_H
#include <device/dram/ddr3.h>
#include <stdint.h>
#include <commonlib/region.h>
@@ -28,11 +27,11 @@
#define DDR3_BUS_DEV_WIDTH 8
#define DDR4_ORGANIZATION 12
#define DDR4_BUS_DEV_WIDTH 13
#define DDR3_SPD_PART_OFF SPD_DDR3_PART_NUM
#define DDR3_SPD_PART_LEN SPD_DDR3_PART_LEN
#define DDR3_SPD_PART_OFF 128
#define DDR3_SPD_PART_LEN 18
#define DDR3_SPD_SN_OFF 122
#define LPDDR3_SPD_PART_OFF SPD_DDR3_PART_NUM
#define LPDDR3_SPD_PART_LEN SPD_DDR3_PART_LEN
#define LPDDR3_SPD_PART_OFF 128
#define LPDDR3_SPD_PART_LEN 18
#define DDR4_SPD_PART_OFF 329
#define DDR4_SPD_PART_LEN 20
#define DDR4_SPD_SN_OFF 325

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