06639f2abf
Adjust ssusb register layout and offset accroding mt8192 Soc then refactor USB code which will be reused among similar SoCs Signed-off-by: Tianping Fang <tianping.fang@mediatek.com> Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com> Change-Id: Icb4cc304654b5fb7cf20b96ab83a22663bfeab63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45396 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
16 lines
420 B
C
16 lines
420 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/addressmap.h>
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#include <device/mmio.h>
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#include <soc/usb.h>
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#define REG_SPM_POWERON_CONFIG_EN (void *)(SPM_BASE + 0x000)
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#define REG_SPM_SSPM_PWR_CON (void *)(SPM_BASE + 0x390)
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void mtk_usb_prepare(void)
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{
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/* power on SSUSB SRAM FIFO */
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setbits32(REG_SPM_POWERON_CONFIG_EN, 0xB160001);
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clrbits32(REG_SPM_SSPM_PWR_CON, 0x000001FF);
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}
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