1d14b3e926
Add the files to support the Skylake SOC. Matches chromium tree at 927026db BRANCH=none BUG=None TEST=Build and run on a Skylake platform Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10341 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/msr.h>
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#include <soc/cpu.h>
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#include <soc/msr.h>
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#include <soc/ramstage.h>
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#include <soc/systemagent.h>
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u32 cpu_family_model(void)
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{
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return cpuid_eax(1) & 0x0fff0ff0;
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}
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u32 cpu_stepping(void)
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{
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return cpuid_eax(1) & 0xf;
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}
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/* Dynamically determine if the part is ULT. */
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int cpu_is_ult(void)
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{
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static int ult = -1;
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if (ult < 0) {
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u32 fm = cpu_family_model();
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if (fm == SKYLAKE_FAMILY_ULT)
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ult = 1;
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else
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ult = 0;
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}
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return ult;
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}
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