0685322f4a
Given a specification of bitfields defined e.g. as follows:
specfile:
{
"field1" : 8,
"field2" : 4,
"field3" : 4
}
and a set of values for setting defaults:
setterfile:
{
"field1" = 0xff,
"field2" = 0xf,
"field3" = 0xf
}
You can generate a binary packed blob as follows:
./blobtool specfile setterfile binaryoutput
binaryoutput: ff ff
The reverse is also possible, i.e. you can regenerate the setter:
./blobtool -d specfile binaryoutput setterorig
setterorig:
# AUTOGENERATED SETTER BY BLOBTOOL
{
"field1" = 0xff,
"field2" = 0xf,
"field3" = 0xf
}
This tool comes with spec/set files for X200 flash descriptor
and ICH9M GbE region, and can be extended or used to decompile
other data blobs with known specs.
Change-Id: I744d6b421003feb4fc460133603af7e6bd80b1d6
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/17445
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
369 lines
8.5 KiB
Python
369 lines
8.5 KiB
Python
# ITE IT8718F SuperIO EC registers
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{
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# 00 Configuration register
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"conf00_start" : 1,
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"conf00_smien" : 1,
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"conf00_irqen" : 1,
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"conf00_irqclr" : 1,
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"conf00_ro_one" : 1,
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"conf00_copen" : 1,
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"conf00_vbat" : 1,
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"conf00_initreset" : 1,
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# 01 Interrupt Status register 1
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"irq1_maxfantac1" : 1,
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"irq1_maxfantac2" : 1,
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"irq1_maxfantac3" : 1,
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"irq1_maxfantac4" : 1,
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"irq1_copen" : 1,
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"irq1_reserved0" : 1,
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"irq1_maxfantac5" : 1,
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"irq1_reserved1" : 1,
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# 02 Interrupt Status register 2
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"irq2_limit_vin"[8] : 1,
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# 03 Interrupt Status register 3
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"irq3_limit_temp1" : 1,
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"irq3_limit_temp2" : 1,
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"irq3_limit_temp3" : 1,
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"irq3_reserved" : 5,
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# 04 SMI Mask register 1
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"smi1_dis_fantac1" : 1,
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"smi1_dis_fantac2" : 1,
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"smi1_dis_fantac3" : 1,
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"smi1_dis_fantac4" : 1,
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"smi1_dis_copen" : 1,
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"smi1_reserved0" : 1,
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"smi1_dis_fantac5" : 1,
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"smi1_reserved1" : 1,
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# 05 SMI Mask register 2
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"smi2_dis_vin"[8] : 1,
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# 06 SMI Mask register 3
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"smi3_dis_temp1" : 1,
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"smi3_dis_temp2" : 1,
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"smi3_dis_temp3" : 1,
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"smi3_reserved" : 5,
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# 07 Interrupt Mask register 1
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"irqmask1_fantac1" : 1,
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"irqmask1_fantac2" : 1,
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"irqmask1_fantac3" : 1,
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"irqmask1_fantac4" : 1,
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"irqmask1_copen" : 1,
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"irqmask1_reserved0" : 1,
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"irqmask1_fantac5" : 1,
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"irqmask1_reserved1" : 1,
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# 08 Interrupt Mask register 2
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"irqmask2_vin"[8] : 1,
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# 09 Interrupt Mask register 3
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"irqmask3_temp1" : 1,
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"irqmask3_temp2" : 1,
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"irqmask3_temp3" : 1,
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"irqmask3_reserved" : 4,
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"irqmask3_extsensor" : 1,
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# 0a Interface Selection register
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"iface_reserved" : 4,
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"iface_extsensor_select": 3,
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"iface_pseudo_eoc" : 1,
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# 0b Fan PWM smoothing step selection reg
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"fanpwm_reserved" : 6,
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"fanpwm_smoothing_step" : 2,
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# 0c Fan Tachometer 16 bit enable register
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"fantach16_en_tac1" : 1,
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"fantach16_en_tac2" : 1,
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"fantach16_en_tac3" : 1,
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"fantach16_tmpin1_enh" : 1,
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"fantach16_en_tac4" : 1,
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"fantach16_en_tac5" : 1,
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"fantach16_tmpin2_enh" : 1,
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"fantach16_tmpin3_enh" : 1,
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# 0d-0f Fan Tachmometer read registers
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"fantach_lo_counts1" : 8,
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"fantach_lo_counts2" : 8,
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"fantach_lo_counts3" : 8,
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# 10-12 Fan Tachometer limit registers
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"fantach_lo_limit1" : 8,
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"fantach_lo_limit2" : 8,
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"fantach_lo_limit3" : 8,
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# 13 Fan controller main control register
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"fanctlmain_mode1" : 1,
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"fanctlmain_mode2" : 1,
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"fanctlmain_mode3" : 1,
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"fanctlmain_reserved0" : 1,
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"fanctlmain_en_tac1" : 1,
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"fanctlmain_en_tac2" : 1,
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"fanctlmain_en_tac3" : 1,
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"fanctlmain_reserved1" : 1,
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# 14 FAN_CTL control register
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"fanctl_enable1" : 1,
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"fanctl_enable2" : 1,
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"fanctl_enable3" : 1,
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"fanctl_minduty_sel" : 1,
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# 000: 48Mhz (PWM Frequency 375Khz)
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# 001: 24Mhz (PWM Frequency 187.5Khz)
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# 010: 12Mhz (PWM Frequency 93.75Khz)
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# 011: 8Mhz (PWM Frequency 62.5Khz)
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# 100: 6Mhz (PWM Frequency 46.875Khz)
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# 101: 3Mhz (PWM Frequency 23.43Khz)
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# 110: 1.5Mhz (PWM Frequency 11.7Khz)
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# 111: 0.75Mhz (PWM Frequency 5.86Khz)
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"fanctl_pwm_base_clock" : 3,
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"fanctl_allpolarity" : 1,
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# 15 FAN_CTL1 PWM control register
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"fanctl1_tmpin_sel" : 2,
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"fanctl1_steps" : 5,
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"fanctl1_pwm_mode" : 1,
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# 16 FAN_CTL2 PWM control register
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"fanctl2_tmpin_sel" : 2,
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"fanctl2_steps" : 5,
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"fanctl2_pwm_mode" : 1,
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# 17 FAN_CTL3 PWM control register
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"fanctl3_tmpin_sel" : 2,
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"fanctl3_steps" : 5,
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"fanctl3_pwm_mode" : 1,
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# 18-1a Fan Tachometer extended read registers
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"fantach_hi_counts1" : 8,
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"fantach_hi_counts2" : 8,
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"fantach_hi_counts3" : 8,
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# 1b-1d Fan Tachometer extended limit registers
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"fantach_hi_limit1" : 8,
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"fantach_hi_limit2" : 8,
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"fantach_hi_limit3" : 8,
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"reserved1e" : 8,
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"reserved1f" : 8,
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# 20-27 Reading registers
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"vin"[8] : 8,
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"vbat" : 8,
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"tmpin1" : 8,
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"tmpin2" : 8,
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"tmpin3" : 8,
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"reserved2c" : 8,
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"reserved2d" : 8,
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"reserved2e" : 8,
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"reserved2f" : 8,
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"limit_hi_vin0" : 8,
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"limit_lo_vin0" : 8,
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"limit_hi_vin1" : 8,
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"limit_lo_vin1" : 8,
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"limit_hi_vin2" : 8,
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"limit_lo_vin2" : 8,
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"limit_hi_vin3" : 8,
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"limit_lo_vin3" : 8,
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"limit_hi_vin4" : 8,
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"limit_lo_vin4" : 8,
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"limit_hi_vin5" : 8,
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"limit_lo_vin5" : 8,
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"limit_hi_vin6" : 8,
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"limit_lo_vin6" : 8,
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"limit_hi_vin7" : 8,
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"limit_lo_vin7" : 8,
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"limit_hi_tmpin1" : 8,
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"limit_lo_tmpin1" : 8,
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"limit_hi_tmpin2" : 8,
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"limit_lo_tmpin2" : 8,
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"limit_hi_tmpin3" : 8,
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"limit_lo_tmpin3" : 8,
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"reserved46" : 8,
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"reserved47" : 8,
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"reserved48" : 8,
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"reserved49" : 8,
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"reserved4a" : 8,
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"reserved4b" : 8,
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"reserved4c" : 8,
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"reserved4d" : 8,
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"reserved4e" : 8,
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"reserved4f" : 8,
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# 50 ADC Voltage channel enable register
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"adc_scan_enable_vin"[8]: 1,
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# 51 ADC Temperature channel enable register
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"therm_diode_tmpin1" : 1,
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"therm_diode_tmpin2" : 1,
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"therm_diode_tmpin3" : 1,
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# Mututally exclusive settings
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"therm_resistor_tmpin1" : 1,
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"therm_resistor_tmpin2" : 1,
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"therm_resistor_tmpin3" : 1,
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"therm_reserved" : 2,
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"therm_limit_tmpin1" : 8,
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"therm_limit_tmpin2" : 8,
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"therm_limit_tmpin3" : 8,
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# 55 Temperature extra channel enable reg
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"therm_resistor_vin4" : 1,
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"therm_resistor_vin5" : 1,
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"therm_resistor_vin6" : 1,
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"adc_fanctl2_pwm_duty" : 1,
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# 000: 48Mhz (PWM Frequency 375Khz)
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# 001: 24Mhz (PWM Frequency 187.5Khz)
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# 010: 12Mhz (PWM Frequency 93.75Khz)
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# 011: 8Mhz (PWM Frequency 62.5Khz)
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# 100: 6Mhz (PWM Frequency 46.875Khz)
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# 101: 3Mhz (PWM Frequency 23.43Khz)
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# 110: 1.5Mhz (PWM Frequency 11.7Khz)
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# 111: 0.75Mhz (PWM Frequency 5.86Khz)
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"adc_fanctl2_pwm_bclk" : 3,
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"adc_tmpin3_ext_select" : 1,
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"thermal_zero_diode1" : 8,
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"thermal_zero_diode2" : 8,
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"ite_vendor_id" : 8,
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"thermal_zero_diode3" : 8,
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"reserved5a" : 8,
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"ite_code_id" : 8,
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"beep_fantac" : 1,
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"beep_vin" : 1,
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"beep_tmpin" : 1,
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"beep_reserved" : 1,
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# ADC clock select
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# 000: 500Khz (Default)
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# 001: 250Khz
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# 010: 125K
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# 011: 62.5Khz
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# 100: 31.25Khz
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# 101: 24Mhz
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# 110: 1Mhz
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# 111: 2Mhz
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"adc_clock_select" : 3,
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"thermal_zero_adj_en" : 1,
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"beep_fan_freq_div" : 4,
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"beep_fan_tone_div" : 4,
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"beep_volt_freq_div" : 4,
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"beep_volt_tone_div" : 4,
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"beep_temp_freq_div" : 4,
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"beep_temp_tone_div" : 4,
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# 60 SmartGuardian registers
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"sguard1_temp_lim_off" : 8,
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"sguard1_temp_lim_fan" : 8,
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"reserved62" : 8,
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"sguard1_pwm_start" : 7,
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"sguard1_pwm_slope6" : 1,
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"sguard1_pwm_slope05" : 6,
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"sguard1_pwm_reserved" : 1,
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"sguard1_fan_smooth_en" : 1,
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"sguard1_temp_interval" : 5,
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"sguard1_temp_reserved" : 2,
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"sguard1_temp_pwm_lin" : 1,
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"reserved66" : 8,
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"reserved67" : 8,
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"sguard2_temp_lim_off" : 8,
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"sguard2_temp_lim_fan" : 8,
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"reserved6a" : 8,
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"sguard2_pwm_start" : 7,
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"sguard2_pwm_slope6" : 1,
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"sguard2_pwm_slope05" : 6,
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"sguard2_pwm_reserved" : 1,
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"sguard2_fan_smooth_en" : 1,
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"sguard2_temp_interval" : 5,
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"sguard2_temp_reserved" : 2,
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"sguard2_temp_pwm_lin" : 1,
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"reserved6e" : 8,
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"reserved6f" : 8,
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"sguard3_temp_lim_off" : 8,
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"sguard3_temp_lim_fan" : 8,
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"reserved72" : 8,
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"sguard3_pwm_start" : 7,
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"sguard3_pwm_slope6" : 1,
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"sguard3_pwm_slope05" : 6,
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"sguard3_pwm_reserved" : 1,
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"sguard3_fan_smooth_en" : 1,
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"sguard3_temp_interval" : 5,
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"sguard3_temp_reserved" : 2,
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"sguard3_temp_pwm_lin" : 1,
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"reserved76" : 8,
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"reserved77" : 8,
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"reserved78" : 8,
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"reserved79" : 8,
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"reserved7a" : 8,
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"reserved7b" : 8,
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"reserved7c" : 8,
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"reserved7d" : 8,
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"reserved7e" : 8,
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"reserved7f" : 8,
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# 80 Fan Tachometer 4-5 read registers
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"fantach_lo_counts4" : 8,
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"fantach_hi_counts4" : 8,
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"fantach_lo_counts5" : 8,
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"fantach_hi_counts5" : 8,
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"fantach_lo_limit4" : 8,
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"fantach_hi_limit4" : 8,
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"fantach_lo_limit5" : 8,
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"fantach_hi_limit5" : 8,
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# 88 External temperature sensor host status
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"ext_host_busy" : 1,
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"ext_host_fnsh" : 1,
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"ext_host_r_fcs_error" : 1,
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"ext_host_w_fcs_error" : 1,
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"ext_host_peci_highz" : 1,
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"ext_host_sst_slave" : 1,
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"ext_host_sst_bus" : 1,
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"ext_host_data_fifo_clr": 1,
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"ext_host_target_addr" : 8,
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"ext_host_write_length" : 8,
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"ext_host_read_length" : 8,
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"ext_host_cmd" : 8,
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"ext_host_writedata" : 8,
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"ext_hostctl_start" : 1,
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"ext_hostctl_sst_amdsi" : 1,
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"ext_hostctl_sst_ctl" : 1,
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"ext_hostctl_resetfifo" : 1,
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"ext_hostctl_fcs_abort" : 1,
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"ext_hostctl_start_en" : 1,
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# Auto-Start Control
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# The host will start the transaction
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# at a regular rate automatically.
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# 00: 32 Hz
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# 01: 16 Hz
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# 10: 8 Hz
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# 11: 4 Hz
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"ext_hostctl_start_ctl" : 2,
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"ext_host_readdata" : 8,
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"fan1_temp_limit_start" : 8,
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"fan1_slope_pwm" : 7,
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"fan1_temp_input_sel0" : 1,
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"fan1_ctlmode_temp_ivl" : 5,
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"fan1_ctlmode_target" : 2,
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"fan1_temp_input_sel1" : 1,
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"reserved93" : 8,
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"fan2_temp_limit_start" : 8,
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"fan2_slope_pwm" : 7,
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"fan2_temp_input_sel0" : 1,
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"fan2_ctlmode_temp_ivl" : 5,
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"fan2_ctlmode_target" : 2,
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"fan2_temp_input_sel1" : 1
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}
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