Kevin Chiu 2c7e498876 mb/google/kukui: Add dedicated memory map for kappa
Add a dedicated memory mapping table starting at index 0x40:
0x40 SAMSUNG 4GB LP4X	K4UBE3D4AA-MGCR
0x41 HYNIX 4GB QDP LP4X	H9HCNNNCPMALHR-NEE
0x42 MICRON 4GB LP4X	MT53E1G32D4NQ-046 WT:E
0x43 MICRON 4GB LP4X	MT53E1G32D2NP-046 WT:A
0x44 MICRON 4GB LP4X	MT53E1G32D2NP-046 WT:B
0x45 HYNIX 4GB LP4X	H54G56CYRBX247
0x46 SAMSUNG 4GB LP4X	K4UBE3D4AB-MGCL
0x48 SAMSUNG 4GB LP4X	K4UBE3D4AA-MGCL
0x49 MICRON 8GB LP4X	MT53E2G32D4NQ-046 WT:A
0x4A HYNIX 4GB QDP LP4X	H9HCNNNCPMMLXR-NEE
0x4B Micron		MT29VZZZAD9GQFSM

BUG=b:162379736
BRANCH=kukui
TEST=emerge-jacuzzi coreboot

Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: I97f296cb8c35fd2f979a05d0b97a0562c1b472f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-01-27 14:47:02 +00:00
2019-09-10 12:52:18 +00:00
2012-11-01 23:13:39 +01:00
2006-08-12 22:03:36 +00:00

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.

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