2f9a579048
MAINBOARD_USES_FSP2_0 selects PLATFORM_USES_FSP2_0 and POSTCAR_STAGE which are used by all Xeon-SP platforms. After the removal of MAINBOARD_USES_FSP2_0, PLATFORM_USES_FSP2_0 is implicitly selected by SoC Kconfigs in PLATFORM_USES_FSP2_X, POSTCAR_STAGE is selected by XEON_SP_COMMON_BASE. TEST=Build and boot on intel/archercity CRB Change-Id: I45332d49dd21f9749fce458877777a4b783a1b11 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81783 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
40 lines
788 B
Plaintext
40 lines
788 B
Plaintext
## SPDX-License-Identifier: GPL-2.0-only
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if BOARD_INVENTEC_TRANSFORMERS
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_65536
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select CONSOLE_OVERRIDE_LOGLEVEL
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select IPMI_OCP
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select IPMI_KCS
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select IPMI_KCS_ROMSTAGE
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select MEMORY_MAPPED_TPM
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_SAPPHIRERAPIDS_SP
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select SUPERIO_ASPEED_AST2400
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select HAVE_ACPI_TABLES
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select MAINBOARD_USES_IFD_GBE_REGION
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select VPD
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select OCP_VPD
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select OCP_EWL
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select SOC_INTEL_XEON_RAS
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select RUNTIME_CONFIGURABLE_SMM_LOGLEVEL
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config MAINBOARD_DIR
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default "inventec/transformers"
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config MAINBOARD_PART_NUMBER
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default "Transformers"
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config FMDFILE
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/board.fmd"
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config MAX_SOCKET
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default 2
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config DEBUG_SMI
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default y
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endif
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