soc/intel/xeon_sp: Remove MAINBOARD_USES_FSP2_0

MAINBOARD_USES_FSP2_0 selects PLATFORM_USES_FSP2_0 and
POSTCAR_STAGE which are used by all Xeon-SP platforms.

After the removal of MAINBOARD_USES_FSP2_0, PLATFORM_USES_FSP2_0
is implicitly selected by SoC Kconfigs in PLATFORM_USES_FSP2_X,
POSTCAR_STAGE is selected by XEON_SP_COMMON_BASE.

TEST=Build and boot on intel/archercity CRB

Change-Id: I45332d49dd21f9749fce458877777a4b783a1b11
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81783
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/bytedance/bd_egs/Kconfig

@@ -5,7 +5,6 @@ if BOARD_BYTEDANCE_BD_EGS
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ROMSIZE_KB_65536
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_SAPPHIRERAPIDS_SP
 	select SUPERIO_ASPEED_AST2400
 	select HAVE_ACPI_TABLES

src/mainboard/ibm/sbp1/Kconfig

@@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select IPMI_KCS
 	select MAINBOARD_HAS_TPM2
 	select MEMORY_MAPPED_TPM
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_SAPPHIRERAPIDS_SP
 	select HAVE_ACPI_TABLES
 	select MAINBOARD_USES_IFD_GBE_REGION

src/mainboard/intel/archercity_crb/Kconfig

@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select IPMI_OCP
 	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_SAPPHIRERAPIDS_SP
 	select SUPERIO_ASPEED_AST2400
 	select HAVE_ACPI_TABLES

src/mainboard/intel/cedarisland_crb/Kconfig

@@ -5,7 +5,6 @@ if BOARD_INTEL_CEDARISLAND_CRB
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ROMSIZE_KB_65536
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_COOPERLAKE_SP
 	select SUPERIO_ASPEED_AST2400
 	select HAVE_ACPI_TABLES

src/mainboard/inventec/transformers/Kconfig

@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select IPMI_KCS_ROMSTAGE
 	select MEMORY_MAPPED_TPM
 	select MAINBOARD_HAS_TPM2
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_SAPPHIRERAPIDS_SP
 	select SUPERIO_ASPEED_AST2400
 	select HAVE_ACPI_TABLES

src/mainboard/ocp/deltalake/Kconfig

@@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select BOARD_ROMSIZE_KB_65536
 	select CONSOLE_OVERRIDE_LOGLEVEL
 	select HAVE_ACPI_TABLES
-	select MAINBOARD_USES_FSP2_0
 	select SOC_INTEL_COOPERLAKE_SP
 	select SUPERIO_ASPEED_AST2400
 	select IPMI_KCS

src/mainboard/ocp/tiogapass/Kconfig

@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select IPMI_KCS
 	select IPMI_KCS_ROMSTAGE
 	select IPMI_OCP
-	select MAINBOARD_USES_FSP2_0
 	select OCP_DMI
 	select SOC_INTEL_SKYLAKE_SP
 	select SUPERIO_ASPEED_AST2400

src/soc/intel/xeon_sp/Kconfig

@@ -45,15 +45,10 @@ config XEON_SP_COMMON_BASE
 	select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
 	select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
 	select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
+	select POSTCAR_STAGE
 
 if XEON_SP_COMMON_BASE
 
-config MAINBOARD_USES_FSP2_0
-	  bool
-	  default y
-	  select PLATFORM_USES_FSP2_0
-	  select POSTCAR_STAGE
-
 config MAX_SOCKET
 	int
 	default 2

src/soc/intel/xeon_sp/skx/Kconfig

@@ -11,13 +11,8 @@ config SOC_INTEL_SKYLAKE_SP
 
 if SOC_INTEL_SKYLAKE_SP
 
-config MAINBOARD_USES_FSP2_0
-	  bool
-	  default y
-
 config FSP_HEADER_PATH
 	  string "Location of FSP headers"
-	  depends on MAINBOARD_USES_FSP2_0
 	  default "src/vendorcode/intel/fsp/fsp2_0/skylake_sp"
 
 config MAX_SOCKET

src/soc/intel/xeon_sp/spr/Kconfig

@@ -28,7 +28,6 @@ config CHIPSET_DEVICETREE
 
 config FSP_HEADER_PATH
 	string "Location of FSP headers"
-	depends on MAINBOARD_USES_FSP2_0
 	default "src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp"
 
 config MAX_CPUS