Nicholas Chin 35599f9a66 Docs: Replace Recommonmark with MyST Parser

Recommonmark has been deprecated since 2021 [1] and the last release was
over 3 years ago [2]. As per their announcement, Markedly Structured
Text (MyST) Parser [3] is the recommended replacement.

For the most part, the existing documentation is compatible with MyST,
as both parsers are built around the CommonMark flavor of Markdown. The
main difference that affects coreboot is how the Sphinx toctree is
generated. Recommonmark has a feature called auto_toc_tree, which
converts single level lists of references into a toctree:

* [Part 1: Starting from scratch](part1.md)
* [Part 2: Submitting a patch to coreboot.org](part2.md)
* [Part 3: Writing unit tests](part3.md)
* [Managing local additions](managing_local_additions.md)
* [Flashing firmware](flashing_firmware/index.md)

MyST Parser does not provide a replacement for this feature, meaning the
toctree must be defined manually. This is done using MyST's syntax for
Sphinx directives:

```{toctree}
:maxdepth: 1

Part 1: Starting from scratch <part1.md>
Part 2: Submitting a patch to coreboot.org <part2.md>
Part 3: Writing unit tests <part3.md>
Managing local additions <managing_local_additions.md>
Flashing firmware <flashing_firmware/index.md>
```

Internally, auto_toc_tree essentially converts lists of references into
the Sphinx toctree structure that the MyST syntax above more directly
represents.

The toctrees were converted to the MyST syntax using the following
command and Python script:

`find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py`

```
import re
import sys

in_list = False
f = open(sys.argv[1])
lines = f.readlines()
f.close()

with open(sys.argv[1], "w") as f:
    for line in lines:
        match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line)
        if match is not None:
            if not in_list:
                in_list = True
                f.write("```{toctree}\n")
                f.write(":maxdepth: 1\n\n")
            f.write(match.group(1) + " <" + match.group(2) + ">\n")
        else:
            if in_list:
                f.write("```\n")
            f.write(line)
            in_list = False

    if in_list:
        f.write("```\n")
```

While this does add a little more work for creating the toctree, this
does give more control over exactly what goes into the toctree. For
instance, lists of links to external resources currently end up in the
toctree, but we may want to limit it to pages within coreboot.

This change does break rendering and navigation of the documentation in
applications that can render Markdown, such as Okular, Gitiles, or the
GitHub mirror. Assuming the docs are mainly intended to be viewed after
being rendered to doc.coreboot.org, this is probably not an issue in
practice.

Another difference is that MyST natively supports Markdown tables,
whereas with Recommonmark, tables had to be written in embedded rST [4].
However, MyST also supports embedded rST, so the existing tables can be
easily converted as the syntax is nearly identical.

These were converted using
`find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"`

Makefile.sphinx and conf.py were regenerated from scratch by running
`sphinx-quickstart` using the updated version of Sphinx, which removes a
lot of old commented out boilerplate. Any relevant changes coreboot had
made on top of the previous autogenerated versions of these files were
ported over to the newly generated file.

From some initial testing the generated webpages appear and function
identically to the existing documentation built with Recommonmark.

TEST: `make -C util/docker docker-build-docs` builds the documentation
successfully and the generated output renders properly when viewed in
a web browser.

[1] https://github.com/readthedocs/recommonmark/issues/221
[2] https://pypi.org/project/recommonmark/
[3] https://myst-parser.readthedocs.io/en/latest/
[4] https://doc.coreboot.org/getting_started/writing_documentation.html

Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2024-03-21 16:11:56 +00:00

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Lenovo Ivy Bridge series

This information is valid for all supported models, except T430s, T431s and X230s.

Flashing coreboot

+---------------------+--------------------------------+
| Type                | Value                          |
+=====================+================================+
| Socketed flash      | no                             |
+---------------------+--------------------------------+
| Size                | 8 MiB + 4MiB                   |
+---------------------+--------------------------------+
| In circuit flashing | Yes                            |
+---------------------+--------------------------------+
| Package             | SOIC-8                         |
+---------------------+--------------------------------+
| Write protection    | No                             |
+---------------------+--------------------------------+
| Dual BIOS feature   | No                             |
+---------------------+--------------------------------+
| Internal flashing   | Yes                            |
+---------------------+--------------------------------+

Installation instructions

Update the EC firmware, as there's no support for EC updates in coreboot.
Do NOT accidentally swap pins or power on the board while a SPI flasher is connected. It will permanently brick your device.
It's recommended to only flash the BIOS region. In that case you don't need to extract blobs from vendor firmware. If you want to flash the whole chip, you need blobs when building coreboot.
The Flash layout shows that by default 7MiB of space are available for the use with coreboot.
In that case you only want to use a part of the BIOS region that must not exceed 4MiB in size, which means CONFIG_CBFS_SIZE must be smaller than 4MiB.
ROM chip size should be set to 12MiB.

Please also have a look at :doc:`../../tutorial/flashing_firmware/index`.

Splitting the coreboot.rom

To split the coreboot.rom into two images (one for the 8MiB and one for the 4 MiB flash IC), run the following commands:

dd of=top.rom bs=1M if=build/coreboot.rom skip=8
dd of=bottom.rom bs=1M if=build/coreboot.rom count=8

That gives one ROM for each flash IC, where top.rom is the upper part of the flash image, that resides on the 4 MiB flash and bottom.rom is the lower part of the flash image, that resides on the 8 MiB flash.

Dumping a full ROM

If you flash externally you need to read both flash chips to get two images (one for the 8MiB and one for the 4 MiB flash IC), and then run the following command to concatenate the files:

cat bottom.rom top.rom > firmware.rom

Flash layout

There's one 8MiB and one 4 MiB flash which contains IFD, GBE, ME and BIOS region. These two flash ICs appear as a single 12MiB when flashing internally. On Lenovo's UEFI the EC firmware update is placed at the start of the BIOS region. The update is then written into the EC once.

Reducing Intel Management Engine firmware size

It is possible to reduce the Intel ME firmware size to free additional space for the bios region. This is usually referred to as cleaning the ME or stripping the ME. After reducing the Intel ME firmware size you must modify the original IFD, split the resulting coreboot ROM and then write each ROM using an external programmer. Have a look at me_cleaner for more information.

Tests on Lenovo W530 showed no issues with a stripped and shrunken ME firmware.

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