35599f9a66
Recommonmark has been deprecated since 2021 [1] and the last release was
over 3 years ago [2]. As per their announcement, Markedly Structured
Text (MyST) Parser [3] is the recommended replacement.
For the most part, the existing documentation is compatible with MyST,
as both parsers are built around the CommonMark flavor of Markdown. The
main difference that affects coreboot is how the Sphinx toctree is
generated. Recommonmark has a feature called auto_toc_tree, which
converts single level lists of references into a toctree:
* [Part 1: Starting from scratch](part1.md)
* [Part 2: Submitting a patch to coreboot.org](part2.md)
* [Part 3: Writing unit tests](part3.md)
* [Managing local additions](managing_local_additions.md)
* [Flashing firmware](flashing_firmware/index.md)
MyST Parser does not provide a replacement for this feature, meaning the
toctree must be defined manually. This is done using MyST's syntax for
Sphinx directives:
```{toctree}
:maxdepth: 1
Part 1: Starting from scratch <part1.md>
Part 2: Submitting a patch to coreboot.org <part2.md>
Part 3: Writing unit tests <part3.md>
Managing local additions <managing_local_additions.md>
Flashing firmware <flashing_firmware/index.md>
```
Internally, auto_toc_tree essentially converts lists of references into
the Sphinx toctree structure that the MyST syntax above more directly
represents.
The toctrees were converted to the MyST syntax using the following
command and Python script:
`find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py`
```
import re
import sys
in_list = False
f = open(sys.argv[1])
lines = f.readlines()
f.close()
with open(sys.argv[1], "w") as f:
for line in lines:
match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line)
if match is not None:
if not in_list:
in_list = True
f.write("```{toctree}\n")
f.write(":maxdepth: 1\n\n")
f.write(match.group(1) + " <" + match.group(2) + ">\n")
else:
if in_list:
f.write("```\n")
f.write(line)
in_list = False
if in_list:
f.write("```\n")
```
While this does add a little more work for creating the toctree, this
does give more control over exactly what goes into the toctree. For
instance, lists of links to external resources currently end up in the
toctree, but we may want to limit it to pages within coreboot.
This change does break rendering and navigation of the documentation in
applications that can render Markdown, such as Okular, Gitiles, or the
GitHub mirror. Assuming the docs are mainly intended to be viewed after
being rendered to doc.coreboot.org, this is probably not an issue in
practice.
Another difference is that MyST natively supports Markdown tables,
whereas with Recommonmark, tables had to be written in embedded rST [4].
However, MyST also supports embedded rST, so the existing tables can be
easily converted as the syntax is nearly identical.
These were converted using
`find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"`
Makefile.sphinx and conf.py were regenerated from scratch by running
`sphinx-quickstart` using the updated version of Sphinx, which removes a
lot of old commented out boilerplate. Any relevant changes coreboot had
made on top of the previous autogenerated versions of these files were
ported over to the newly generated file.
From some initial testing the generated webpages appear and function
identically to the existing documentation built with Recommonmark.
TEST: `make -C util/docker docker-build-docs` builds the documentation
successfully and the generated output renders properly when viewed in
a web browser.
[1] https://github.com/readthedocs/recommonmark/issues/221
[2] https://pypi.org/project/recommonmark/
[3] https://myst-parser.readthedocs.io/en/latest/
[4] https://doc.coreboot.org/getting_started/writing_documentation.html
Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
4.3 KiB
4.3 KiB
MSI MS-7707 V1.1
- MSI MS-7707 V1.1 (Medion OEM Akoya P4385D MSN10014555)
- SandyBridge Intel P67 (BD82x6x)
- Winbond 25Q32BV (4 MiB)
- Fintek F71808A SuperIO
- Intel 82579V Gigabit
- NEC uPD720200 USB 3.0 Host Controller
- IME 7.0.4.1197
Flash chip (Winbond 25Q32BV)
+---------------------+--------------------+
| Type | Value |
+=====================+====================+
| Size | 4 MiB |
+---------------------+--------------------+
| BIOS range | 2 MiB |
+---------------------+--------------------+
| Write protection | Yes (via jumper) |
+---------------------+--------------------+
| Header | Yes (JSPI1) |
+---------------------+--------------------+
| Package | SOIC-8 |
+---------------------+--------------------+
| In circuit flashing | Yes |
+---------------------+--------------------+
| Internal flashing | Yes |
+---------------------+--------------------+
| Socketed flash | No |
+---------------------+--------------------+
| Dual BIOS feature | No |
+---------------------+--------------------+
| ME removable | Yes |
+---------------------+--------------------+
Installation instructions
- The standard method is to only flash the 2MiB BIOS region. In that case it's not needed to extract blobs from vendor firmware and internal flashing is sufficient.
- To flash the whole chip (e.g. to disable ME) blobs are needed to build coreboot. Blobs can be extracted with util/ifdtool from 4MiB full dump image (see below). Its recommended to include the VGA BIOS as well (4MiB write only). Kconfig is prepared already if it gets enabled (path and 8086,0102).
coreboot/3rdparty/blobs/mainboard/msi/ms7707
├── descriptor.bin
├── gbe.bin
├── me.bin
└── vgabios.bin
- Never write a full 4MiB image if blobs are not included. The generated coreboot.rom file is always 4MiB but the 2MiB flash command below will only flash the last 2MiB (BIOS) block.
- The J1-Jumper sets the 'Flash Descriptor Override Strap-Pin' and enables full 4MiB access for internal flasher (read and write).
- Write BIOS-range (2MiB) with J1-Jumper=off (as on picture/default position):
flashrom -p internal:ich_spi_force=yes --noverify-all --ifd -i bios -w coreboot.rom
- Read full dump (4MiB) with J1-jumper=on:
flashrom -p internal -r original.rom
- Write full dump (4MiB) with J1-Jumper=on:
flashrom -p internal -w coreboot.rom
- After successful flashing turn main power off, wait some seconds to drain the capacitors, pull the battery and set the JBAT (clrcmos) jumper for some seconds. Setting the jumper alone is not enough (the Fintek is VBAT backed). Put all back in place and restart the board. It might need 1-2 AC power cycles to reinitialize (running at full fan speed - don't panic).
- External flashing has been tested with RPi2 without main power connected. 3.3V provided by RPi2. Read more about flashing methods.
- In case of going back to proprietary BIOS create/save CMOS settings as early as possible (do not leave BIOS on first start without saving settings). The BIOS might corrupt nvram (not cmos!) and leave the system in a dead state that needs an external flasher to revive. If stuck, reset the Fintek (see above) and restart the system several times and/or try setting J1 to temporarily disable ME.
- The JSPI1 header (5×2 2.0mm pitch pin header) for external flashing is directly connected to the flash chip. Additional 3.3V to /HOLD and /WP is not needed (internally re-routed already).
Flash layout
- The 4MiB flashrom is divided into 4 sections:
