35599f9a66
Recommonmark has been deprecated since 2021 [1] and the last release was
over 3 years ago [2]. As per their announcement, Markedly Structured
Text (MyST) Parser [3] is the recommended replacement.
For the most part, the existing documentation is compatible with MyST,
as both parsers are built around the CommonMark flavor of Markdown. The
main difference that affects coreboot is how the Sphinx toctree is
generated. Recommonmark has a feature called auto_toc_tree, which
converts single level lists of references into a toctree:
* [Part 1: Starting from scratch](part1.md)
* [Part 2: Submitting a patch to coreboot.org](part2.md)
* [Part 3: Writing unit tests](part3.md)
* [Managing local additions](managing_local_additions.md)
* [Flashing firmware](flashing_firmware/index.md)
MyST Parser does not provide a replacement for this feature, meaning the
toctree must be defined manually. This is done using MyST's syntax for
Sphinx directives:
```{toctree}
:maxdepth: 1
Part 1: Starting from scratch <part1.md>
Part 2: Submitting a patch to coreboot.org <part2.md>
Part 3: Writing unit tests <part3.md>
Managing local additions <managing_local_additions.md>
Flashing firmware <flashing_firmware/index.md>
```
Internally, auto_toc_tree essentially converts lists of references into
the Sphinx toctree structure that the MyST syntax above more directly
represents.
The toctrees were converted to the MyST syntax using the following
command and Python script:
`find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py`
```
import re
import sys
in_list = False
f = open(sys.argv[1])
lines = f.readlines()
f.close()
with open(sys.argv[1], "w") as f:
for line in lines:
match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line)
if match is not None:
if not in_list:
in_list = True
f.write("```{toctree}\n")
f.write(":maxdepth: 1\n\n")
f.write(match.group(1) + " <" + match.group(2) + ">\n")
else:
if in_list:
f.write("```\n")
f.write(line)
in_list = False
if in_list:
f.write("```\n")
```
While this does add a little more work for creating the toctree, this
does give more control over exactly what goes into the toctree. For
instance, lists of links to external resources currently end up in the
toctree, but we may want to limit it to pages within coreboot.
This change does break rendering and navigation of the documentation in
applications that can render Markdown, such as Okular, Gitiles, or the
GitHub mirror. Assuming the docs are mainly intended to be viewed after
being rendered to doc.coreboot.org, this is probably not an issue in
practice.
Another difference is that MyST natively supports Markdown tables,
whereas with Recommonmark, tables had to be written in embedded rST [4].
However, MyST also supports embedded rST, so the existing tables can be
easily converted as the syntax is nearly identical.
These were converted using
`find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"`
Makefile.sphinx and conf.py were regenerated from scratch by running
`sphinx-quickstart` using the updated version of Sphinx, which removes a
lot of old commented out boilerplate. Any relevant changes coreboot had
made on top of the previous autogenerated versions of these files were
ported over to the newly generated file.
From some initial testing the generated webpages appear and function
identically to the existing documentation built with Recommonmark.
TEST: `make -C util/docker docker-build-docs` builds the documentation
successfully and the generated output renders properly when viewed in
a web browser.
[1] https://github.com/readthedocs/recommonmark/issues/221
[2] https://pypi.org/project/recommonmark/
[3] https://myst-parser.readthedocs.io/en/latest/
[4] https://doc.coreboot.org/getting_started/writing_documentation.html
Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
3.3 KiB
3.3 KiB
Protectli Vault VP2420
This page describes how to run coreboot on the [Protectli VP2420].
Required proprietary blobs
To build a minimal working coreboot image some blobs are required (assuming only the BIOS region is being modified).
+-----------------+---------------------------------+---------------------+
| Binary file | Apply | Required / Optional |
+=================+=================================+=====================+
| FSP-M, FSP-S | Intel Firmware Support Package | Required |
+-----------------+---------------------------------+---------------------+
| microcode | CPU microcode | Required |
+-----------------+---------------------------------+---------------------+
FSP-M and FSP-S are obtained after splitting the Elkhart Lake FSP binary (done
automatically by the coreboot build system and included into the image) from
the 3rdparty/fsp submodule.
Microcode updates are automatically included into the coreboot image by build
system from the 3rdparty/intel-microcode submodule.
Flashing coreboot
Internal programming
The main SPI flash can be accessed using [flashrom]. Firmware can be easily flashed with internal programmer (either BIOS region or full image).
External programming
The system has an internal flash chip which is a 16 MiB soldered SOIC-8 chip. This chip is located on the top side of the case (the lid side). One has to remove 4 top cover screws and lift up the lid. The flash chip is soldered in under RAM, easily accessed after taking out the memory. Specifically, it's a KH25L12835F (3.3V) which is a clone of Macronix MX25L12835F - [datasheet][MX25L12835F].
Working
- USB 3.0 front ports (SeaBIOS, Tianocore UEFIPayload and Linux)
- 4 Ethernet ports
- HDMI, DisplayPort
- flashrom
- M.2 WiFi
- M.2 4G LTE
- M.2 SATA and NVMe
- 2.5'' SATA SSD
- eMMC
- Super I/O serial port 0 via front microUSB connector
- SMBus (reading SPD from DIMMs)
- Initialization with Elkhart Lake FSP 2.0
- SeaBIOS payload (version rel-1.16.0)
- TianoCore UEFIPayload
- Reset switch
- Booting Debian, Ubuntu, FreeBSD
Technology
+------------------+--------------------------------------------------+
| CPU | Intel Celeron J6412 |
+------------------+--------------------------------------------------+
| PCH | Intel Elkhart Lake |
+------------------+--------------------------------------------------+
| Super I/O, EC | ITE IT8613E |
+------------------+--------------------------------------------------+
| Coprocessor | Intel Management Engine |
+------------------+--------------------------------------------------+
Useful links
:maxdepth: 1
VP2420 Hardware Overview <https://protectli.com/kb/vp2400-series-hardware-overview/>
VP2420 Product Page <https://protectli.com/product/vp2420/>
Protectli TPM module <https://protectli.com/product/tpm-module/>
MX25L12835F <https://www.mxic.com.tw/Lists/Datasheet/Attachments/8653/MX25L12835F,%203V,%20128Mb,%20v1.6.pdf>
flashrom <https://flashrom.org/Flashrom>