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This code brings a rather complete set of VGA IO routines for whoever wants it. These consist of the by now familiar read/write/mask sets. Due to the crazy nature of VGA, an ancient standard with bits all over the place, it makes no sense to define individual registers. You need a vga register spec at hand if you want to do anything anyway. These IO routines are always exposed. It also provides code to natively set up a 640x400 VGA textmode with an 8x16 font. The native VGA mode code is behind the OPTION_VGA option, as the font really adds to the size of the compiled/compressed rom. The font is the one also present in the linux kernel, but this file is unlicensed. Another copy of this is also present in coreboot in the deprecated console/btext code. The vga console code has been cleaned up, but it still has some TODO's left open, but that's for when i finally have found the remaining issue with the epia-m. Right now, it is important to get parts of my work out already and to make the remainder managable again. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4321 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes one of many possible payloads, e.g. a Linux kernel or a bootloader. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make * python * perl Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) Building coreboot ----------------- Please consult http://www.coreboot.org/Documentation for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------- If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files (mostly those derived from the Linux kernel) are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.