Eric Biederman 60216355d2 - With Xeon cpus it seems best to use the tsc calibrated with timer2 as
the time source.  The apic timer also has a variable time base.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 02:47:13 +00:00
2004-10-22 18:45:36 +00:00
2004-10-21 21:41:57 +00:00
2004-10-21 10:44:08 +00:00
Description
261 MiB
Languages
C 93.5%
ASL 2.5%
Makefile 1.1%
Pawn 0.6%
Perl 0.4%
Other 1.8%