Files
system76-coreboot/src/mainboard/protectli/vault_ehl/vboot-rwa.fmd
Kacper Stojek 70089e9814 mainboard/protectli/vault_ehl: Add initial structure
This patch adds base code for the Protectli VP2420. The GPIO
config has been extracted with inteltool from the stock
firmware and then parsed with intelp2m. As of now, the platform
runs with edk2 with no apparent issues.

Signed-off-by: Kacper Stojek <kacper.stojek@3mdeb.com>
Signed-off-by: Artur Kowalski <artur.kowalski@3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Change-Id: Ia00c27117d48b76db306d3f988f159fc5d50e4a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72407
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
2023-03-03 13:34:32 +00:00

39 lines
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Plaintext

FLASH 16M {
SI_ALL 7M {
SI_DESC 4K
SI_ME
}
RW_MISC 424K {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
RECOVERY_MRC_CACHE 64K
RW_MRC_CACHE 64K
}
SMMSTORE(PRESERVE) 256K
RW_SHARED 0x4000 {
SHARED_DATA@0x0 0x2000
VBLOCK_DEV@0x2000 0x2000
}
RW_NVRAM(PRESERVE) 24K
}
CONSOLE 0x20000
RW_SECTION_A {
VBLOCK_A 0x2000
FW_MAIN_A(CBFS)
RW_FWID_A 0x40
}
WP_RO@0xC00000 0x400000 {
RO_VPD(PRESERVE)@0x0 0x4000
RO_SECTION@0x4000 0x3fc000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x3f8000
}
}
}