system76-coreboot

Files

ZhengShunQian 82a7bc45f7 veyron: add new SDRAM configuration with ram-code 1101b

This add hynix-2GB SDRAM(H5TC4G63AFR-PBA), whose timing is the same as
H5TC4G63CFR-PBA, to veyron boards.

BUG=None
BRANCH=veyron
TEST=build on mighty and boot on mighty board with ram-id reworked

Change-Id: I3ae5e65e60e18414cf4de6fbcc5bed736b1492de
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b22029f9b05ebb9a775266a7e3aae38b50c1883a
Original-Change-Id: If17fb002f2816990e1706833b37ac6be345e540b
Original-Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/256307
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: http://review.coreboot.org/9848
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2015-04-21 08:28:22 +02:00

arch

armv7: preserve bootblock invocation parameter

2015-04-21 08:24:39 +02:00

console

Add console wrapper for UART driver

2015-04-14 21:25:34 +02:00

cpu

arm(64): Globally replace writel(v, a) with write32(a, v)

2015-04-21 08:22:28 +02:00

device

Unify byte order macros and clrsetbits