Files
system76-coreboot/src
Barnali Sarkar 89331cd4c8 soc/intel/common/block: Add Intel common FAST_SPI code
Create Intel Common FAST_SPI Controller code.

This code contains the code for SPI initialization which has
the following programming -

* Get BIOS Rom Region Size
* Enable SPIBAR
* Disable the BIOS write protect so write commands are allowed
* Enable SPI Prefetching and Caching.
* SPI Controller register offsets in the common header fast_spi.h
* Implement FAST_SPI read, write, erase APIs.

Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/18557
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-05-01 16:26:26 +02:00
..
2016-07-31 19:25:40 +02:00
2017-04-28 17:17:40 +02:00
2017-04-28 17:20:51 +02:00