The current implementation from Vladimir simply dumps 1 MB of memory contents starting at the base address of the second PCI device (which most likely is the VGA controller on Intel systems). This locks up a number of different systems, e.g. my Ibex Peak-based T410s. This patch documents the issue and stops dumping the graphics registers for the -a/--all parameter. Change-Id: I581bdc63db60afaf4792bc11fbeed73aab57f63a Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/14627 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
		
			
				
	
	
		
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			82 lines
		
	
	
		
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			Groff
		
	
	
	
	
	
| .TH INTELTOOL 8
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| .SH NAME
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| inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters
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| .SH SYNOPSIS
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| .B inteltool \fR[\fB\-vh?gGrpmedPMaAsfS\fR]
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| .SH DESCRIPTION
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| .B inteltool
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| is a handy little tool for dumping the configuration space of Intel(R)
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| CPUs, northbridges and southbridges.
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| .sp
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| This tool has been developed for the coreboot project (see
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| .B http://coreboot.org
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| for details on coreboot).
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| .SH OPTIONS
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| .TP
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| .B "\-h, \-\-help"
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| Show a help text and exit.
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| .TP
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| .B "\-v, \-\-version"
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| Show version information and exit.
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| .TP
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| .B "\-a, \-\-all"
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| Dump all known information listed below.
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| .TP
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| .B "\-g, \-\-gpio"
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| Dump I/O Controller Hub (ICH) southbridge GPIO registers.
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| .TP
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| .B "\-G, \-\-gpio-diffs"
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| Show only GPIO register differences from hardware defaults.
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| .TP
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| .B "\-r, \-\-rcba"
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| Dump I/O Controller Hub (ICH) southbridge RCBA registers.
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| .TP
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| .B "\-s, \-\-spi"
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| Dump I/O Controller Hub (ICH) southbridge SPI registers and bios control.
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| .TP
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| .B "\-f, \-\-gfx"
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| .RB "Dump graphics registers. " \
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| "Due to unknown reasons this might lock up some systems after a few seconds."
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| .TP
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| .B "\-p, \-\-pmbase"
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| Dump I/O Controller Hub (ICH) southbridge PMBASE registers.
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| .TP
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| .B "\-m, \-\-mchbar"
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| Dump Intel(R) northbridge MCHBAR registers.
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| .TP
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| .BR "\-S" " \fIfile\fR, " "\-\-spd=" "\fIfile\fR"
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| Dump the memory registers as above and store the current timing settings
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| into \fIfile\fR.
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| .TP
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| .B "\-e, \-\-epbar"
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| Dump Intel(R) northbridge EPBAR registers.
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| .TP
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| .B "\-d, \-\-dmibar"
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| Dump Intel(R) northbridge DMIBAR registers.
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| .TP
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| .B "\-P, \-\-pciexbar"
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| Dump Intel(R) northbridge PCIEXBAR registers.
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| .TP
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| .B "\-M, \-\-msrs"
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| Dump Intel(R) CPU MSRs.
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| .TP
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| .B "\-A, \-\-ambs"
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| Dump Advanced Memory Buffer (AMB) registers.
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| .SH BUGS
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| Please report any bugs on the coreboot mailing list
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| .RB "(" http://coreboot.org/Mailinglist ")."
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| .SH LICENCE
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| .B inteltool
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| is covered by the GNU General Public License (GPL), version 2.
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| .SH COPYRIGHT
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| Copyright (C) 2008 coresystems GmbH
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| .SH AUTHORS
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| Stefan Reinauer <stepan@coresystems.de>
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| .PP
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| This manual page was written by Stefan Reinauer <stepan@coresystems.de>.
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| It is licensed under the terms of the GNU GPL (version 2).
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| .sp
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| Intel(R) is a registered trademark of Intel Corporation. Other product
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| and/or company names mentioned herein may be trademarks or registered
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| trademarks of their respective owners.
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