Angel Pons a2bb4553a5 mb/lippert: Put files under variants/ ...

This isn't reproducible for some reason, but it is relatively simple.

Change-Id: I507229be71ac2c589c7ecd81495d38ce363d26a7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43275
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2020-08-10 10:53:33 +00:00

..

acpi

src/acpi: Add missing <{stdbool,stdint}.h>

2020-07-29 09:37:10 +00:00

arch

arch/x86/pirq_routing.c: Drop unneeded continue

2020-08-06 11:22:11 +00:00

commonlib

src: Remove unused 'include <stdint.h>

2020-07-14 16:11:10 +00:00

console

console: Update for vboot before bootblock

2020-06-15 22:07:12 +00:00

cpu

cpu/intel/common: Add intel_ht_supported function

2020-08-06 22:33:02 +00:00

device

src: Use space after 'if', 'for'

2020-08-05 11:37:00 +00:00

drivers

drivers/intel/fsp2_0: Do AP re-init after FSP-S if USE_INTEL_FSP_MP_INIT enable

2020-08-06 04:24:24 +00:00

ec

ec/lenovo/h8: Align macro values in one column

2020-07-26 21:40:00 +00:00

include

soc/intel/common: Include Alder Lake SATA controller device IDs

2020-08-10 06:30:39 +00:00

lib

gpio: Pull down HiZ pins after reading tristate GPIO strapping

2020-08-06 23:54:41 +00:00

mainboard

mb/lippert: Put files under variants/

2020-08-10 10:53:33 +00:00

northbridge

nb/intel/sandybridge: Drop inexistent device from DMAR

2020-08-06 11:16:46 +00:00

security

security/intel/txt: Fix variable MTRR handling

2020-08-07 11:56:29 +00:00

soc

soc/intel/apollolake: Rename UART irqs

2020-08-10 10:45:46 +00:00

southbridge

sb/intel/lynxpoint: Use PCI bitwise ops

2020-08-07 11:02:43 +00:00

superio

superio/common: Avoid NULL pointer dereference

2020-07-24 21:21:09 +00:00

vendorcode

vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc

2020-08-08 20:13:37 +00:00

Kconfig

arch/x86: Remove RELOCATABLE_RAMSTAGE

2020-07-06 06:17:47 +00:00