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While writing a new SPI driver I fixed some things in the SPI code: All calls to spi_command() had unneccessary #define duplications, and in some cases the read count define could theoretically become harmful because NULL was passed for the read buffer. Avoid a crash, should someone change the #defines. I also noticed that the only caller of spi_page_program() was the it87 driver, and spi_page_program() could only call back into the it87 driver. Removed the function for easier-to-follow code and made it8716f_spi_page_program() static. The ichspi driver's static page functions are already static. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
------------------------------------------------------------------------------- Coreboot README ------------------------------------------------------------------------------- Coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes one of many possible payloads, e.g. a Linux kernel. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. Examples include: * A Linux kernel * FILO (a simple bootloader with filesystem support) * GRUB2 (a free bootloader; support is in development) * OpenBIOS (a free IEEE1275-1994 Open Firmware implementation) * Open Firmware (a free IEEE1275-1994 Open Firmware implementation) * SmartFirmware (a free IEEE1275-1994 Open Firmware implementation) * GNUFI (a free, UEFI-compatible firmware) * Etherboot (for network booting and booting from raw IDE or FILO) * ADLO (for booting Windows 2000 or OpenBSD) * Plan 9 (a distributed operating system) * memtest86 (for testing your RAM) Supported Hardware ------------------ Coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. Coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files (mostly those derived from the Linux kernel) are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.