2aa1436777
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
/*
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* dump gpio on intel ICH series southbridges
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*
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* Copyright (C) 2008 by coresystems GmbH
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* written by Stefan Reinauer <stepan@coresystems.de>
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* Copyright (C) 2008 Joseph Smith <joe@smittys.pointclark.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <getopt.h>
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#include <sys/io.h>
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#include <pci/pci.h>
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int map_gpio(uint16_t gpio)
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{
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int i;
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unsigned long size=0x40;
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for (i=0; i<size; i+=4) {
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printf("gpiobase+0x%04x: 0x%08x\n", i, inl(gpio+i));
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}
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return 0;
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}
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int main(int argc, char *argv[])
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{
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struct pci_access *pacc;
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struct pci_dev *sb;
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uint16_t gpiobadd;
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uint16_t device;
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if (iopl(3)) {
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perror("You need to be root.\n");
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exit(1);
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}
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pacc = pci_alloc();
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pci_init(pacc);
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pci_scan_bus(pacc);
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sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
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if (!sb) {
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printf("No southbridge found.\n");
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exit(1);
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}
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if (pci_read_word(sb, 0) != 0x8086) {
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printf("Not an Intel southbridge.\n");
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exit(1);
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}
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printf("Intel Southbridge: %04x:%04x\n",
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pci_read_word(sb, 0), pci_read_word(sb, 2));
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device = pci_read_word(sb, 2);
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if (device < 0x2640) {
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gpiobadd = pci_read_word(sb, 0x58) & 0xfffc;
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} else if (device >= 0x2640) {
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gpiobadd = pci_read_word(sb, 0x48) & 0xfffc;
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}
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printf("GPIOBASE = 0x%04x\n\n", gpiobadd);
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map_gpio(gpiobadd);
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return 0;
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}
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