Elyes Haouas 08375b5082 tree: Remove unused <string.h> ...

Change-Id: I9ed1a82fcd3fc29124ddc406592bd45dc84d4628
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>

2024-05-29 10:34:08 +00:00

..

include

tree: Remove unused <string.h>

2024-05-29 10:34:08 +00:00

arch_timer.c

src: Remove unused 'include <stddef.h>

2020-08-18 12:15:44 +00:00

boot.c

arch/riscv/boot.c: Comment OpenSBI Supervisor mode switch

2024-02-10 17:28:47 +00:00

bootblock.S

treewide: Remove "this file is part of" lines

2020-05-11 17:11:40 +00:00

fit_payload.c

arch/{arm64,riscv}: Remove "CRIT: " from log messages

2022-11-17 13:28:48 +00:00

fp_asm.S

treewide: Remove "this file is part of" lines

2020-05-11 17:11:40 +00:00

Kconfig

arch/riscv: add Kconfig variable RISCV_SOC_HAS_MENVCFG

2024-03-22 23:01:48 +00:00

Makefile.mk

arch/riscv: remove misaligned load/store/fetch handling

2024-03-27 14:45:06 +00:00

mcall.c

treewide: Remove "this file is part of" lines

2020-05-11 17:11:40 +00:00

misc.c

treewide: Remove "this file is part of" lines

2020-05-11 17:11:40 +00:00

opensbi.c

arch/riscv: Add OPENSBI_FW_DYNAMIC_BOOT_HART option

2024-02-07 12:17:47 +00:00

payload.c

tree: Drop unused <cbmem.h>

2024-04-12 04:24:03 +00:00

pmp.c

arch/riscv: support physical memory protection (PMP) registers

2024-03-14 19:33:01 +00:00

ramdetect.c

arch/riscv: Remove typedefs

2024-03-09 23:47:19 +00:00

ramstage.S

arch/riscv/ramstage.S: Add comments for passed arguments

2023-11-13 11:09:39 +00:00

romstage.S

arch/riscv/romstage: Start from assembly

2023-11-23 17:50:55 +00:00

sbi.c

arch/riscv: add new SBI calls

2024-03-25 02:47:56 +00:00

smp.c

arch/riscv: Fix some SMP related headers

2022-01-19 19:29:42 +00:00

tables.c

symbols: Change implementation details of DECLARE_OPTIONAL_REGION()

2020-08-27 22:11:17 +00:00

trap_handler.c

arch/riscv: remove misaligned load/store/fetch handling

2024-03-27 14:45:06 +00:00

trap_util.S

arch/riscv: Add SMP support for exception handler

2024-03-09 23:34:25 +00:00

virtual_memory.c

arch/riscv: remove misaligned load/store/fetch handling

2024-03-27 14:45:06 +00:00