4278e99383
apply C.-D. Hailfinger's patch for Winbond part (untested) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2354 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
517 lines
12 KiB
C
517 lines
12 KiB
C
/*
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* flash rom utility: enable flash writes
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*
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* Copyright (C) 2000-2004 ???
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* Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2
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*
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*/
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#include <sys/io.h>
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#include <stdio.h>
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#include <pci/pci.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "lbtable.h"
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#include "debug.h"
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// We keep this for the others.
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static struct pci_access *pacc;
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static int enable_flash_sis630(struct pci_dev *dev, char *name)
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{
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char b;
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/* get io privilege access PCI configuration space */
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if (iopl(3) != 0) {
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perror("Can not set io priviliage");
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exit(1);
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}
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/* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630 */
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outl(0x80000840, 0x0cf8);
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b = inb(0x0cfc) | 0x0b;
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outb(b, 0xcfc);
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/* Flash write enable on SiS 540/630 */
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outl(0x80000845, 0x0cf8);
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b = inb(0x0cfd) | 0x40;
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outb(b, 0xcfd);
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/* The same thing on SiS 950 SuperIO side */
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outb(0x87, 0x2e);
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outb(0x01, 0x2e);
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outb(0x55, 0x2e);
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outb(0x55, 0x2e);
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if (inb(0x2f) != 0x87) {
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outb(0x87, 0x4e);
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outb(0x01, 0x4e);
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outb(0x55, 0x4e);
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outb(0xaa, 0x4e);
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if (inb(0x4f) != 0x87) {
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printf("Can not access SiS 950\n");
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return -1;
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}
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outb(0x24, 0x4e);
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b = inb(0x4f) | 0xfc;
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outb(0x24, 0x4e);
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outb(b, 0x4f);
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outb(0x02, 0x4e);
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outb(0x02, 0x4f);
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}
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outb(0x24, 0x2e);
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printf("2f is %#x\n", inb(0x2f));
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b = inb(0x2f) | 0xfc;
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outb(0x24, 0x2e);
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outb(b, 0x2f);
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outb(0x02, 0x2e);
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outb(0x02, 0x2f);
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return 0;
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}
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static int enable_flash_e7500(struct pci_dev *dev, char *name)
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{
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/* register 4e.b gets or'ed with one */
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uint8_t old, new;
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/* if it fails, it fails. There are so many variations of broken mobos
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* that it is hard to argue that we should quit at this point.
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*/
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old = pci_read_byte(dev, 0x4e);
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new = old | 1;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x4e, new);
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if (pci_read_byte(dev, 0x4e) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x4e, new, name);
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return -1;
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}
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return 0;
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}
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enum {
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ICH4_BIOS_CNTL = 0x4e,
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/* see page 375 of "Intel ICH7 External Design Specification"
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* http://download.intel.com/design/chipsets/datashts/30701302.pdf */
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ICH7_BIOS_CNTL = 0xdc,
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};
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static int enable_flash_ich(struct pci_dev *dev, char *name, int bios_cntl)
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{
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/* register 4e.b gets or'ed with one */
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uint8_t old, new;
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/* if it fails, it fails. There are so many variations of broken mobos
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* that it is hard to argue that we should quit at this point.
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*/
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old = pci_read_byte(dev, bios_cntl);
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new = old | 1;
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if (new == old)
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return 0;
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pci_write_byte(dev, bios_cntl, new);
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if (pci_read_byte(dev, bios_cntl) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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bios_cntl, new, name);
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return -1;
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}
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return 0;
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}
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static int enable_flash_ich4(struct pci_dev *dev, char *name)
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{
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return enable_flash_ich(dev, name, ICH4_BIOS_CNTL);
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}
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static int enable_flash_ich7(struct pci_dev *dev, char *name)
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{
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return enable_flash_ich(dev, name, ICH7_BIOS_CNTL);
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}
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static int enable_flash_vt8235(struct pci_dev *dev, char *name)
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{
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uint8_t old, new, val;
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unsigned int base;
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int ok;
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/* get io privilege access PCI configuration space */
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if (iopl(3) != 0) {
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perror("Can not set io priviliage");
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exit(1);
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}
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old = pci_read_byte(dev, 0x40);
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new = old | 0x10;
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if (new == old)
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return 0;
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ok = pci_write_byte(dev, 0x40, new);
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if (ok != 0) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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old, new, name);
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}
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/* enable GPIO15 which is connected to write protect. */
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base = ((pci_read_byte(dev, 0x88) & 0x80) | pci_read_byte(dev, 0x89) << 8);
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val = inb(base + 0x4d);
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val |= 0x80;
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outb(val, base + 0x4d);
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if (ok != 0) {
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return -1;
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} else {
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return 0;
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}
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}
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static int enable_flash_vt8231(struct pci_dev *dev, char *name)
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{
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uint8_t val;
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val = pci_read_byte(dev, 0x40);
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val |= 0x10;
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pci_write_byte(dev, 0x40, val);
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if (pci_read_byte(dev, 0x40) != val) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x40, val, name);
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return -1;
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}
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return 0;
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}
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static int enable_flash_cs5530(struct pci_dev *dev, char *name)
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{
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uint8_t new;
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pci_write_byte(dev, 0x52, 0xee);
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new = pci_read_byte(dev, 0x52);
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if (new != 0xee) {
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printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x52, new, name);
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return -1;
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}
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new = pci_read_byte(dev, 0x5b) | 0x20;
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pci_write_byte(dev, 0x5b, new);
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return 0;
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}
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static int enable_flash_sc1100(struct pci_dev *dev, char *name)
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{
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uint8_t new;
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pci_write_byte(dev, 0x52, 0xee);
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new = pci_read_byte(dev, 0x52);
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if (new != 0xee) {
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printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x52, new, name);
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return -1;
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}
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return 0;
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}
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static int enable_flash_sis5595(struct pci_dev *dev, char *name)
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{
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uint8_t new, newer;
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new = pci_read_byte(dev, 0x45);
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/* clear bit 5 */
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new &= (~0x20);
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/* set bit 2 */
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new |= 0x4;
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pci_write_byte(dev, 0x45, new);
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newer = pci_read_byte(dev, 0x45);
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if (newer != new) {
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printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x45, new, name);
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printf("Stuck at 0x%x\n", newer);
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return -1;
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}
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return 0;
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}
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static int enable_flash_amd8111(struct pci_dev *dev, char *name)
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{
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/* register 4e.b gets or'ed with one */
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uint8_t old, new;
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/* if it fails, it fails. There are so many variations of broken mobos
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* that it is hard to argue that we should quit at this point.
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*/
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/* enable decoding at 0xffb00000 to 0xffffffff */
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old = pci_read_byte(dev, 0x43);
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new = old | 0xC0;
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if (new != old) {
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pci_write_byte(dev, 0x43, new);
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if (pci_read_byte(dev, 0x43) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x43, new, name);
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}
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}
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old = pci_read_byte(dev, 0x40);
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x40, new);
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if (pci_read_byte(dev, 0x40) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x40, new, name);
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return -1;
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}
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return 0;
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}
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//By yhlu
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static int enable_flash_ck804(struct pci_dev *dev, char *name)
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{
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/* register 4e.b gets or'ed with one */
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uint8_t old, new;
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/* if it fails, it fails. There are so many variations of broken mobos
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* that it is hard to argue that we should quit at this point.
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*/
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//dump_pci_device(dev);
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old = pci_read_byte(dev, 0x88);
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new = old | 0xc0;
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if (new != old) {
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pci_write_byte(dev, 0x88, new);
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if (pci_read_byte(dev, 0x88) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x88, new, name);
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}
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}
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old = pci_read_byte(dev, 0x6d);
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new = old | 0x01;
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if (new == old)
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return 0;
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pci_write_byte(dev, 0x6d, new);
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if (pci_read_byte(dev, 0x6d) != new) {
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printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n",
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0x6d, new, name);
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return -1;
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}
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return 0;
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}
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static int enable_flash_sb400(struct pci_dev *dev, char *name)
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{
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uint8_t tmp;
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struct pci_filter f;
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struct pci_dev *smbusdev;
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/* get io privilege access */
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if (iopl(3) != 0) {
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perror("Can not set io priviliage");
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exit(1);
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}
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/* then look for the smbus device */
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pci_filter_init((struct pci_access *) 0, &f);
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f.vendor = 0x1002;
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f.device = 0x4372;
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for (smbusdev = pacc->devices; smbusdev; smbusdev = smbusdev->next) {
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if (pci_filter_match(&f, smbusdev)) {
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break;
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}
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}
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if(!smbusdev) {
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perror("smbus device not found. aborting\n");
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exit(1);
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}
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// enable some smbus stuff
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tmp=pci_read_byte(smbusdev, 0x79);
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tmp|=0x01;
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pci_write_byte(smbusdev, 0x79, tmp);
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// change southbridge
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tmp=pci_read_byte(dev, 0x48);
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tmp|=0x21;
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pci_write_byte(dev, 0x48, tmp);
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// now become a bit silly.
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tmp=inb(0xc6f);
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outb(tmp,0xeb);
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outb(tmp, 0xeb);
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tmp|=0x40;
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outb(tmp, 0xc6f);
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outb(tmp, 0xeb);
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outb(tmp, 0xeb);
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return 0;
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}
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typedef struct penable {
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unsigned short vendor, device;
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char *name;
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int (*doit) (struct pci_dev * dev, char *name);
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} FLASH_ENABLE;
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static FLASH_ENABLE enables[] = {
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{0x1039, 0x0630, "sis630", enable_flash_sis630},
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{0x8086, 0x2480, "E7500", enable_flash_e7500},
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{0x8086, 0x24c0, "ICH4", enable_flash_ich4},
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{0x8086, 0x24cc, "ICH4-M", enable_flash_ich4},
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{0x8086, 0x24d0, "ICH5", enable_flash_ich4},
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{0x8086, 0x27b8, "ICH7", enable_flash_ich7},
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{0x1106, 0x8231, "VT8231", enable_flash_vt8231},
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{0x1106, 0x3177, "VT8235", enable_flash_vt8235},
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{0x1078, 0x0100, "CS5530", enable_flash_cs5530},
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{0x100b, 0x0510, "SC1100", enable_flash_sc1100},
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{0x1039, 0x0008, "SIS5595", enable_flash_sis5595},
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{0x1022, 0x7468, "AMD8111", enable_flash_amd8111},
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// this fallthrough looks broken.
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{0x10de, 0x0050, "NVIDIA CK804", enable_flash_ck804}, // LPC
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{0x10de, 0x0051, "NVIDIA CK804", enable_flash_ck804}, // Pro
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{0x10de, 0x00d3, "NVIDIA CK804", enable_flash_ck804}, // Slave, should not be here, to fix known bug for A01.
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{0x10de, 0x0261, "NVIDIA C51", enable_flash_ck804},
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{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, // ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80)
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};
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static int mbenable_island_aruma(void)
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{
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#define EFIR 0x2e /* Extended function index register, either 0x2e or 0x4e */
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#define EFDR EFIR + 1 /* Extended function data register, one plus the index reg. */
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char b;
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/* Disable the flash write protect. The flash write protect is
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* connected to the WinBond w83627hf GPIO 24.
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*/
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/* get io privilege access winbond config space */
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if (iopl(3) != 0) {
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perror("Can not set io priviliage");
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exit(1);
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}
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printf("Disabling mainboard flash write protection.\n");
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outb(0x87, EFIR); // sequence to unlock extended functions
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outb(0x87, EFIR);
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outb(0x20, EFIR); // SIO device ID register
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b = inb(EFDR);
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printf_debug("W83627HF device ID = 0x%x\n",b);
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if (b != 0x52) {
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perror("Incorrect device ID, aborting write protect disable\n");
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exit(1);
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}
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outb(0x2b, EFIR); // GPIO multiplexed pin reg.
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b = inb(EFDR) | 0x10;
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outb(0x2b, EFIR);
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outb(b, EFDR); // select GPIO 24 instead of WDTO
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outb(0x7, EFIR); // logical device select
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outb(0x8, EFDR); // point to device 8, GPIO port 2
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outb(0x30, EFIR); // logic device activation control
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outb(0x1, EFDR); // activate
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outb(0xf0, EFIR); // GPIO 20-27 I/O selection register
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b = inb(EFDR) & ~0x10;
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outb(0xf0, EFIR);
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outb(b, EFDR); // set GPIO 24 as an output
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outb(0xf1, EFIR); // GPIO 20-27 data register
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b = inb(EFDR) | 0x10;
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outb(0xf1, EFIR);
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outb(b, EFDR); // set GPIO 24
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outb(0xaa, EFIR); // command to exit extended functions
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return 0;
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}
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typedef struct mbenable {
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char *vendor, *part;
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int (*doit)(void);
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} MAINBOARD_ENABLE;
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static MAINBOARD_ENABLE mbenables[] = {
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{ "ISLAND", "ARUMA", mbenable_island_aruma },
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};
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int enable_flash_write()
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{
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int i;
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struct pci_dev *dev = 0;
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FLASH_ENABLE *enable = 0;
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pacc = pci_alloc(); /* Get the pci_access structure */
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/* Set all options you want -- here we stick with the defaults */
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pci_init(pacc); /* Initialize the PCI library */
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pci_scan_bus(pacc); /* We want to get the list of devices */
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/* First look whether we have to do something for this
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* motherboard.
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*/
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for (i = 0; i < sizeof(mbenables) / sizeof(mbenables[0]); i++) {
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if(lb_vendor && !strcmp(mbenables[i].vendor, lb_vendor) &&
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lb_part && !strcmp(mbenables[i].part, lb_part)) {
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mbenables[i].doit();
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break;
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}
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}
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/* now let's try to find the chipset we have ... */
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for (i = 0; i < sizeof(enables) / sizeof(enables[0]) && (!dev);
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i++) {
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struct pci_filter f;
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struct pci_dev *z;
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/* the first param is unused. */
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pci_filter_init((struct pci_access *) 0, &f);
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f.vendor = enables[i].vendor;
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|
f.device = enables[i].device;
|
|
for (z = pacc->devices; z; z = z->next)
|
|
if (pci_filter_match(&f, z)) {
|
|
enable = &enables[i];
|
|
dev = z;
|
|
}
|
|
}
|
|
|
|
/* now do the deed. */
|
|
if (enable) {
|
|
printf("Enabling flash write on %s...", enable->name);
|
|
if (enable->doit(dev, enable->name) == 0)
|
|
printf("OK\n");
|
|
}
|
|
return 0;
|
|
}
|