Recommonmark has been deprecated since 2021 [1] and the last release was over 3 years ago [2]. As per their announcement, Markedly Structured Text (MyST) Parser [3] is the recommended replacement. For the most part, the existing documentation is compatible with MyST, as both parsers are built around the CommonMark flavor of Markdown. The main difference that affects coreboot is how the Sphinx toctree is generated. Recommonmark has a feature called auto_toc_tree, which converts single level lists of references into a toctree: * [Part 1: Starting from scratch](part1.md) * [Part 2: Submitting a patch to coreboot.org](part2.md) * [Part 3: Writing unit tests](part3.md) * [Managing local additions](managing_local_additions.md) * [Flashing firmware](flashing_firmware/index.md) MyST Parser does not provide a replacement for this feature, meaning the toctree must be defined manually. This is done using MyST's syntax for Sphinx directives: ```{toctree} :maxdepth: 1 Part 1: Starting from scratch <part1.md> Part 2: Submitting a patch to coreboot.org <part2.md> Part 3: Writing unit tests <part3.md> Managing local additions <managing_local_additions.md> Flashing firmware <flashing_firmware/index.md> ``` Internally, auto_toc_tree essentially converts lists of references into the Sphinx toctree structure that the MyST syntax above more directly represents. The toctrees were converted to the MyST syntax using the following command and Python script: `find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py` ``` import re import sys in_list = False f = open(sys.argv[1]) lines = f.readlines() f.close() with open(sys.argv[1], "w") as f: for line in lines: match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line) if match is not None: if not in_list: in_list = True f.write("```{toctree}\n") f.write(":maxdepth: 1\n\n") f.write(match.group(1) + " <" + match.group(2) + ">\n") else: if in_list: f.write("```\n") f.write(line) in_list = False if in_list: f.write("```\n") ``` While this does add a little more work for creating the toctree, this does give more control over exactly what goes into the toctree. For instance, lists of links to external resources currently end up in the toctree, but we may want to limit it to pages within coreboot. This change does break rendering and navigation of the documentation in applications that can render Markdown, such as Okular, Gitiles, or the GitHub mirror. Assuming the docs are mainly intended to be viewed after being rendered to doc.coreboot.org, this is probably not an issue in practice. Another difference is that MyST natively supports Markdown tables, whereas with Recommonmark, tables had to be written in embedded rST [4]. However, MyST also supports embedded rST, so the existing tables can be easily converted as the syntax is nearly identical. These were converted using `find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"` Makefile.sphinx and conf.py were regenerated from scratch by running `sphinx-quickstart` using the updated version of Sphinx, which removes a lot of old commented out boilerplate. Any relevant changes coreboot had made on top of the previous autogenerated versions of these files were ported over to the newly generated file. From some initial testing the generated webpages appear and function identically to the existing documentation built with Recommonmark. TEST: `make -C util/docker docker-build-docs` builds the documentation successfully and the generated output renders properly when viewed in a web browser. [1] https://github.com/readthedocs/recommonmark/issues/221 [2] https://pypi.org/project/recommonmark/ [3] https://myst-parser.readthedocs.io/en/latest/ [4] https://doc.coreboot.org/getting_started/writing_documentation.html Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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ASUS P5Q
This page describes how to run coreboot on the ASUS P5Q desktop board.
Working
- PCI slots
- PCI-e slots
- Onboard Ethernet
- USB
- Onboard sound card
- PS/2 keyboard
- All 4 DIMM slots
- S3 suspend and resume
- Red SATA ports
- Fan control through the W83667HG chip
- FireWire
Not working
- PS/2 mouse support
- PATA aka IDE (because of buggy IDE controller)
- Fan profiles with Q-Fan
- TPM module (support not implemented)
Untested
- S/PDIF
- CD Audio In
- Floppy disk drive
Flashing coreboot
+-------------------+----------------+
| Type | Value |
+===================+================+
| Socketed flash | Yes |
+-------------------+----------------+
| Model | MX25L8005 |
+-------------------+----------------+
| Size | 1 MiB |
+-------------------+----------------+
| Package | Socketed DIP-8 |
+-------------------+----------------+
| Write protection | No |
+-------------------+----------------+
| Dual BIOS feature | No |
+-------------------+----------------+
| Internal flashing | Yes |
+-------------------+----------------+
You can flash coreboot into your motherboard using this guide.
Technology
+------------------+---------------------------------------------------+
| Northbridge | Intel P45 (called x4x in coreboot code) |
+------------------+---------------------------------------------------+
| Southbridge | Intel ICH10R (called i82801jx in coreboot code) |
+------------------+---------------------------------------------------+
| CPU (LGA775) | Model f4x, f6x, 6fx, 1067x (Pentium 4, d, Core 2) |
+------------------+---------------------------------------------------+
| SuperIO | Winbond W83667HG |
+------------------+---------------------------------------------------+
| Coprocessor | No |
+------------------+---------------------------------------------------+
| Clockgen (CK505) | ICS 9LPRS918JKLF |
+------------------+---------------------------------------------------+
Controlling fans
With vendor firmware, the P5Q uses the ATK0110 ACPI device to control its fans according to the parameters configured in the BIOS setup menu. With coreboot, one can instead control the Super I/O directly as described in the kernel docs:
- pwm1 controls fan1 (CHA_FAN1) and fan4 (CHA_FAN2)
- pwm2 controls fan2 (CPU_FAN)
- fan3 (PWR_FAN) cannot be controlled
- temp1 (board) can be used to control fan1 and fan4
- temp2 (CPU) can be used to control fan2
Manual fan speed
These commands set the chassis fans to a constant speed:
# Use PWM output
echo 1 >/sys/class/hwmon/hwmon2/pwm1_mode
# Set to manual mode
echo 1 >/sys/class/hwmon/hwmon2/pwm1_enable
# Set relative speed: 0 (stop) to 255 (full)
echo 150 >/sys/class/hwmon/hwmon2/pwm1
Automatic fan speed
The W83667HG can adjust fan speeds when things get too warm. These settings will control the chassis fans:
# Set to "Thermal Cruise" mode
echo 2 >/sys/class/hwmon/hwmon2/pwm1_enable
# Target temperature: 60°C
echo 60000 >/sys/class/hwmon/hwmon2/pwm1_target
# Minimum fan speed when spinning up
echo 135 >/sys/class/hwmon/hwmon2/pwm1_start_output
# Minimum fan speed when spinning down
echo 135 >/sys/class/hwmon/hwmon2/pwm1_stop_output
# Tolerance: 2°C
echo 2000 >/sys/class/hwmon/hwmon2/pwm1_tolerance
# Turn fans off after 600 seconds when below defined range
echo 600000 >/sys/class/hwmon/hwmon2/pwm1_stop_time
You can also control the CPU fan with similar rules:
# Switch to "Thermal Cruise" mode
echo 2 >/sys/class/hwmon/hwmon2/pwm2_enable
# Target temperature: 55°C
echo 55000 >/sys/class/hwmon/hwmon2/pwm2_target
# Minimum fan speed when spinning down
echo 50 >/sys/class/hwmon/hwmon2/pwm2_stop_output
# Rate of fan speed change
echo 50 >/sys/class/hwmon/hwmon2/pwm2_step_output
# Maximum fan speed
echo 200 >/sys/class/hwmon/hwmon2/pwm2_max_output
# Tolerance: 2°C
echo 2000 >/sys/class/hwmon/hwmon2/pwm1_tolerance