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system76-coreboot/Documentation/soc/intel/fsp/index.md
Nicholas Chin 35599f9a66 Docs: Replace Recommonmark with MyST Parser 
Recommonmark has been deprecated since 2021 [1] and the last release was
over 3 years ago [2]. As per their announcement, Markedly Structured
Text (MyST) Parser [3] is the recommended replacement.

For the most part, the existing documentation is compatible with MyST,
as both parsers are built around the CommonMark flavor of Markdown. The
main difference that affects coreboot is how the Sphinx toctree is
generated. Recommonmark has a feature called auto_toc_tree, which
converts single level lists of references into a toctree:

* [Part 1: Starting from scratch](part1.md)
* [Part 2: Submitting a patch to coreboot.org](part2.md)
* [Part 3: Writing unit tests](part3.md)
* [Managing local additions](managing_local_additions.md)
* [Flashing firmware](flashing_firmware/index.md)

MyST Parser does not provide a replacement for this feature, meaning the
toctree must be defined manually. This is done using MyST's syntax for
Sphinx directives:

```{toctree}
:maxdepth: 1

Part 1: Starting from scratch <part1.md>
Part 2: Submitting a patch to coreboot.org <part2.md>
Part 3: Writing unit tests <part3.md>
Managing local additions <managing_local_additions.md>
Flashing firmware <flashing_firmware/index.md>
```

Internally, auto_toc_tree essentially converts lists of references into
the Sphinx toctree structure that the MyST syntax above more directly
represents.

The toctrees were converted to the MyST syntax using the following
command and Python script:

`find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py`

```
import re
import sys

in_list = False
f = open(sys.argv[1])
lines = f.readlines()
f.close()

with open(sys.argv[1], "w") as f:
    for line in lines:
        match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line)
        if match is not None:
            if not in_list:
                in_list = True
                f.write("```{toctree}\n")
                f.write(":maxdepth: 1\n\n")
            f.write(match.group(1) + " <" + match.group(2) + ">\n")
        else:
            if in_list:
                f.write("```\n")
            f.write(line)
            in_list = False

    if in_list:
        f.write("```\n")
```

While this does add a little more work for creating the toctree, this
does give more control over exactly what goes into the toctree. For
instance, lists of links to external resources currently end up in the
toctree, but we may want to limit it to pages within coreboot.

This change does break rendering and navigation of the documentation in
applications that can render Markdown, such as Okular, Gitiles, or the
GitHub mirror. Assuming the docs are mainly intended to be viewed after
being rendered to doc.coreboot.org, this is probably not an issue in
practice.

Another difference is that MyST natively supports Markdown tables,
whereas with Recommonmark, tables had to be written in embedded rST [4].
However, MyST also supports embedded rST, so the existing tables can be
easily converted as the syntax is nearly identical.

These were converted using
`find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"`

Makefile.sphinx and conf.py were regenerated from scratch by running
`sphinx-quickstart` using the updated version of Sphinx, which removes a
lot of old commented out boilerplate. Any relevant changes coreboot had
made on top of the previous autogenerated versions of these files were
ported over to the newly generated file.

From some initial testing the generated webpages appear and function
identically to the existing documentation built with Recommonmark.

TEST: `make -C util/docker docker-build-docs` builds the documentation
successfully and the generated output renders properly when viewed in
a web browser.

[1] https://github.com/readthedocs/recommonmark/issues/221
[2] https://pypi.org/project/recommonmark/
[3] https://myst-parser.readthedocs.io/en/latest/
[4] https://doc.coreboot.org/getting_started/writing_documentation.html

Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-03-21 16:11:56 +00:00

3.6 KiB
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Intel Firmware Support Package (FSP)-specific documentation

This section contains documentation about Intel-FSP in public domain.

Integration Guidelines

Some guiding principles when working on the glue to integrate FSP into coreboot, e.g. on how to configure a board in devicetree when that affects the way FSP works:

  • It should be possible to replace FSP based boot with a native coreboot implementation for a given chipset without touching the mainboard code.
  • The devicetree configures coreboot and part of what coreboot does with the information is setting some FSP UPDs. The devicetree isn't supposed to directly configure FSP.

Bugs

As Intel doesn't even list known bugs, they are collected here until those are fixed. If possible a workaround is described here as well.

BroadwellDEFsp

  • IA32_FEATURE_CONTROL MSR is locked in FSP-M

    • Release MR2
    • Writing the MSR is required in ramstage for Intel TXT
    • Workaround: none
    • Issue on public tracker: Issue 10

  • FSP-S asserts if the thermal PCI device 00:1f.6 is disabled

    • Release MR2
    • FSP expects the PCI device to be enabled
    • FSP expects BARs to be properly assigned
    • Workaround: Don't disable this PCI device
    • Issue on public tracker: Issue 13

  • FSP Notify(EnumInitPhaseAfterPciEnumeration) hangs if 00:02.03/00:02.03 are hidden

    • Release MR2
    • Seems to get stuck on some SKUs only if hidden after MemoryInit
    • Workaround: Hide before MemoryInit
    • Issue on public tracker: Issue 35

KabylakeFsp

  • MfgId and ModulePartNum in the DIMM_INFO struct are empty

    • Release 3.7.1
    • Those values are typically consumed by SMBIOS type 17
    • Workaround: none
    • Issue on public tracker: Issue 22

  • MRC forces memory re-training on cold boot on boards with Intel SPS

    • Releases 3.7.1, 3.7.6
    • Workaround: Flash Intel ME instead of SPS
    • Issue on public tracker: Issue 41

BraswellFsp

  • Internal UART can't be disabled using PcdEnableHsuart*
    • Release MR2
    • Workaround: Disable internal UART manually after calling FSP
    • Issue on public tracker: Issue 10

CoffeeLakeFsp

  • Disabling the internal graphics causes a crash in FSP-M
    • 7.0.68.40 and older version
    • Workaround: Set "tconfig->PanelPowerEnable = 0"
    • Issue on public tracker: Issue 49

Open Source Intel FSP specification

:maxdepth: 1

About Intel FSP <https://firmware.intel.com/learn/fsp/about-intel-fsp>

:maxdepth: 1

FSP Specification 1.0 <https://www.intel.in/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec.pdf>

:maxdepth: 1

FSP Specification 1.1 <https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf>

:maxdepth: 1

FSP Specification 2.0 <https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf>

:maxdepth: 1

FSP Specification 2.1 <https://cdrdv2.intel.com/v1/dl/getContent/611786>

Additional Features in FSP 2.1 specification

:maxdepth: 1

PPI <ppi/ppi.md>

Official bugtracker

:maxdepth: 1

IntelFSP/FSP <https://github.com/IntelFsp/FSP/issues>