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x86 systems run their romstage as execute-in-place from flash, which prevents them from having writable data segments. In several code pieces that get linked into both romstage and ramstage, this has been worked around by using a local variable and having the 'static' storage class guarded by #ifndef __PRE_RAM__. However, x86 is the only architecture using execute-in-place (for now), so it does not make sense to impose the restriction globally. Rather than fixing the #ifdef at every occurrence, this should really be wrapped in a way that makes it easier to modify in a single place. The chromeos/cros_vpd.c file already had a nice approach for a wrapper macro, but unfortunately restricted it to one file... this patch moves it to stddef.h and employs it consistently throughout coreboot. BRANCH=nyan BUG=None TEST=Measured boot time on Nyan_Big before and after, confirmed that it gained 6ms from caching the FMAP in vboot_loader.c. Original-Change-Id: Ia53b94ab9c6a303b979db7ff20b79e14bc51f9f8 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/203033 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit c8127e4ac9811517f6147cf019ba6a948cdaa4a5) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I44dacc10214351992b775aca52d6b776a74ee922 Reviewed-on: http://review.coreboot.org/8055 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.