980a69b8c2
according to libc/posix traditions, to simplify porting applications to payloads. It also adds a couple of functions: strcasecmp, strncasecmp, strcat, strtol, strspn, strcspn, strtok_r, strtok, perror, exit, getpagesize Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
75 lines
2.7 KiB
C
75 lines
2.7 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008 coresystems GmbH
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _PCI_H
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#define _PCI_H
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#include <arch/types.h>
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typedef u32 pcidev_t;
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#define REG_VENDOR_ID 0x00
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#define REG_COMMAND 0x04
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#define REG_CLASS_DEV 0x0A
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#define REG_HEADER_TYPE 0x0E
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#define REG_PRIMARY_BUS 0x18
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#define REG_SUBSYS_VENDOR_ID 0x2C
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#define REG_SUBSYS_ID 0x2E
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#define REG_COMMAND_BM (1 << 2)
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#define HEADER_TYPE_NORMAL 0
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#define HEADER_TYPE_BRIDGE 1
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#define HEADER_TYPE_CARDBUS 2
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#define PCI_ADDR(_bus, _dev, _fn, _reg) \
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(0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8) | (_reg & ~3))
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#define PCI_DEV(_bus, _dev, _fn) \
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(0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8))
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#define PCI_BUS(_d) ((_d >> 16) & 0xff)
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#define PCI_SLOT(_d) ((_d >> 11) & 0x1f)
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#define PCI_FUNC(_d) ((_d >> 8) & 0x7)
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u8 pci_read_config8(u32 device, u16 reg);
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u16 pci_read_config16(u32 device, u16 reg);
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u32 pci_read_config32(u32 device, u16 reg);
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void pci_write_config8(u32 device, u16 reg, u8 val);
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void pci_write_config16(u32 device, u16 reg, u16 val);
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void pci_write_config32(u32 device, u16 reg, u32 val);
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int pci_find_device(u16 vid, u16 did, pcidev_t *dev);
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u32 pci_read_resource(pcidev_t dev, int bar);
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void pci_set_bus_master(pcidev_t dev);
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#endif
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