Angel Pons eecd6843a2 nb/intel/haswell/hostbridge_regs.h: Clean up registers ...

Add missing registers and sort them by ascending offsets.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 does not change.

Change-Id: I98f836668144032d920b56afff878acc0a58ed82
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43691
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

2020-07-25 01:22:28 +00:00

..

acpi

src: Use ACPI macros

2020-07-21 18:26:47 +00:00

arch

src: Make HAVE_CF9_RESET set the FADT reset register

2020-07-20 13:23:13 +00:00

commonlib

src: Remove unused 'include <stdint.h>

2020-07-14 16:11:10 +00:00

console

console: Update for vboot before bootblock

2020-06-15 22:07:12 +00:00

cpu

cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include

2020-07-14 16:15:09 +00:00

device

device/pci_device.c: Do not complain about disabled devices

2020-07-24 23:12:07 +00:00

drivers

drivers/intel/gma/Kconfig: Avoid dependency hell when ignoring straps

2020-07-20 17:13:22 +00:00

ec

ec/system76_ec: add support for System76 EC

2020-07-23 09:30:22 +00:00

include

soc/intel/tigerlake: Update Tiger Lake SA IDs

2020-07-25 00:07:20 +00:00

lib

src: Remove unused 'include <types.h>'

2020-07-14 16:10:17 +00:00

mainboard

mb/getac/p470/acpi_tables.c: Remove wrong comment

2020-07-25 01:21:39 +00:00

northbridge

nb/intel/haswell/hostbridge_regs.h: Clean up registers

2020-07-25 01:22:28 +00:00

security

security/intel/stm: Add missing <stdbool.h>

2020-07-21 20:04:12 +00:00

soc

soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU

2020-07-25 00:07:36 +00:00

southbridge

sb/intel/bd82x6x: Use common irqlinks.asl

2020-07-25 00:12:06 +00:00

superio

superio/common: Avoid NULL pointer dereference

2020-07-24 21:21:09 +00:00

vendorcode

vc/amd/fsp/picasso: update UPD header

2020-07-24 20:29:11 +00:00

Kconfig

arch/x86: Remove RELOCATABLE_RAMSTAGE

2020-07-06 06:17:47 +00:00