Change-Id: I7210fb44ed54d365181ca23c6b92d2269dc8a697 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45007 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
		
			
				
	
	
		
			177 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
			
		
		
	
	
			177 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
| Intel Pad to Macro (intelp2m) converter
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| =======================================
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| 
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| This utility allows to convert the configuration DW0/1 registers value
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| from [inteltool](../inteltool/description.md) dump to coreboot macros.
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| 
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| ```bash
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| (shell)$ make
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| (shell)$ ./intelp2m -h
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| (shell)$ ./intelp2m -file /path/to/inteltool.log
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| ```
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| 
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| ### Platforms
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| 
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| It is possible to use templates for parsing files of excellent inteltool.log.
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| To specify such a pattern, use the option -t <template number>. For example,
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| using template type # 1, you can parse gpio.h from an already added board in
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| the coreboot project.
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| ```bash
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| (shell)$ ./intelp2m -h
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| 	-t
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| 	template type number
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| 		0 - inteltool.log (default)
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| 		1 - gpio.h
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| 		2 - your template
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| (shell)$ ./intelp2m -t 1 -file coreboot/src/mainboard/yourboard/gpio.h
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| ```
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| You can also add a template to 'parser/template.go' for your file type with
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| the configuration of the pads.
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| 
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| platform type is set using the -p option (Sunrise by default):
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| ```bash
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| 	-p string
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| 	set up a platform
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| 		snr - Sunrise PCH with Skylake/Kaby Lake CPU
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| 		lbg - Lewisburg PCH with Xeon SP CPU
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| 		apl - Apollo Lake SoC
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| 		cnl - CannonLake-LP or Whiskeylake/Coffeelake/Cometlake-U SoC
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| 	(default "snr")
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| 
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| (shell)$ ./intelp2m -p <platform> -file path/to/inteltool.log
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| ```
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| 
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| ### Packages
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| 
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| ![][pckgs]
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| 
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| [pckgs]: config/gopackages.png
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| 
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| ### Bit fields in macros
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| 
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| Use the -fld=cb option to only generate a sequence of bit fields in a new macro:
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| 
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| ```bash
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| (shell)$ ./intelp2m -fld cb -p apl -file ../apollo-inteltool.log
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| ```
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| ```c
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| _PAD_CFG_STRUCT(GPIO_37, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_TRIG(OFF), PAD_PULL(DN_20K)), /* LPSS_UART0_TXD */
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| ```
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| 
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| ### Raw DW0, DW1 register value
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| 
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| To generate the gpio.c with raw PAD_CFG_DW0 and PAD_CFG_DW1 register values you need
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| to use the -fld=raw option:
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| 
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| ```bash
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|   (shell)$ ./intelp2m -fld raw -file /path/to/inteltool.log
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| ```
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| ```c
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| _PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000),
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| ```
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| 
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| ```bash
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|   (shell)$ ./intelp2m -iiii -fld raw -file /path/to/inteltool.log
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| ```
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| ```c
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| /* GPP_A10 - CLKOUT_LPC1 */
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| /* DW0: 0x44000500, DW1: 0x00000000 */
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| /* DW0: 0x04000100 - IGNORED */
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| /* PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), */
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| _PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000),
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| ```
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| 
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| ### Macro Check
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| 
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| After generating the macro, the utility checks all used
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| fields of the configuration registers. If some field has been
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| ignored, the utility generates field macros. To not check
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| macros, use the -n option:
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| ```bash
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| (shell)$ ./intelp2m -n -file /path/to/inteltool.log
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| ```
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| 
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| In this case, some fields of the configuration registers
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| DW0 will be ignored.
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| ```c
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| PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),
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| PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
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| ```
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| 
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| ### Information level
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| 
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| The utility can generate additional information about the bit
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| fields of the DW0 and DW1 configuration registers. Using the
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| options -i, -ii, -iii, -iiii you can set the info level from
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| 1 to 4:
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| 
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| ```bash
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| (shell)$./intelp2m -i -file /path/to/inteltool.log
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| ```
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| ```c
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| _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),	/* LPSS_UART0_TXD */
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| ```
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| 
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| ```bash
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| (shell)$./intelp2m -ii -file /path/to/inteltool.log
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| (shell)$./intelp2m -iii -file /path/to/inteltool.log
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| (shell)$./intelp2m -iiii -file /path/to/inteltool.log
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| ```
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| ```c
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| /* GPIO_39 - LPSS_UART0_TXD */
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| /* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
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| /* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii)
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| /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ --> (iiii)
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| _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),
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| ```
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| 
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| If the -n switch was used and macros was generated without checking:
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| ```c
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| /* GPIO_39 - LPSS_UART0_TXD */ --> (i)
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| /* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
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| /* DW0: PAD_TRIG(OFF) - IGNORED */ --> (iii)
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| /* _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), */ --> (iiii)
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| PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),
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| ```
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| 
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| ### Ignoring Fields
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| 
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| Utilities can generate the _PAD_CFG_STRUCT macro and exclude fields
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| from it that are not in the corresponding PAD_CFG_*() macro:
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| 
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| ```bash
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| (shell)$ ./intelp2m -iiii -fld cb -ign -file /path/to/inteltool.log
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| ```
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| ```c
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| /* GPIO_39 - LPSS_UART0_TXD */
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| /* DW0: 0x44000400, DW1: 0x00003100 */
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| /* DW0: PAD_TRIG(OFF) - IGNORED */
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| /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */
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| _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),
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| ```
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| 
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| ### FSP-style macro
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| 
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| The utility allows to generate macros that include fsp/edk2-palforms style bitfields:
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| 
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| ```bash
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| (shell)$ ./intelp2m -i -fld fsp -p lbg -file ../crb-inteltool.log
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| ```
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| ```c
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| { GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone,  GpioPadConfigLock },	/* GPIO */
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| ```
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| 
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| ```bash
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| (shell)$ ./intelp2m -iiii -fld fsp -p lbg -file ../crb-inteltool.log
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| ```
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| ```c
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| /* GPP_A12 - GPIO */
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| /* DW0: 0x80880102, DW1: 0x00000000 */
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| /* PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT), */
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| { GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone,  GpioPadConfigLock },
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| ```
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| 
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| ### Supports Chipsets
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| 
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|   Sunrise PCH, Lewisburg PCH, Apollo Lake SoC, CannonLake-LP SoCs
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