aae7552b24
Change-Id: I20c4436d414bc6b9a3ff5138d6fd59ead8fd4a47 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
129 lines
3.3 KiB
C
129 lines
3.3 KiB
C
/*
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* This file is part of the superiotool project.
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*
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* Copyright (C) 9elements Agency GmbH <patrick.rudolph@9elements.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "superiotool.h"
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#define DEVICE_SCRATCH_REG 0x21
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static const struct superio_registers reg_table[] = {
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{0x00, "AST2400", {
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{NOLDN, NULL,
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{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
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0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
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{0x02, "SUART1",
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{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x02,RSVD,EOT}},
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{0x03, "SUART2",
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{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
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{0x00,0x02,0xf8,0x03,0x02,0x00,EOT}},
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{0x04, "SWC",
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{0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,
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0x70,0x71,EOT},
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{0x00,0x08,0xe6,0x08,0xe0,0x08,0xe4,0x08,0xe8,
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0x09,0x01,EOT}},
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{0x05, "Keyboard config (KBC)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x72,0x73,
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0xf0,EOT},
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{0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x0c,0x02,
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0x83,EOT}},
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{0x07, "GPIO",
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{0x30,0x38,0x70,0x71,EOT},
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{0x00,0x00,0x0b,0x01,EOT}},
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{0x0b, "SUART3",
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{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
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{0x00,0x03,0xe8,0x06,0x02,0x00,EOT}},
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{0x0c, "SUART4",
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{0x30,0x60,0x61,0x70,0x71,0xf0,EOT},
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{0x00,0x02,0xe8,0x05,0x02,0x00,EOT}},
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{0x0d, "iLPC2AHB",
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{0x30,0x70,0x71,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
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0xf6,0xf7,0xf8,0xfe,EOT},
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{0x00,0x09,0x01,NANA,NANA,NANA,NANA,NANA,NANA,
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NANA,NANA,0x00,0x00,EOT}},
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{0x0e, "Mailbox",
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{0x30,0x60,0x61,0x70,0x71,EOT},
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{0x00,0x08,0xc0,0x09,0x01,EOT}},
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{EOT}}},
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{EOT}
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};
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static void enter_conf_mode_ast(uint16_t port)
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{
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OUTB(0xa5, port);
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OUTB(0xa5, port);
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}
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static void exit_conf_mode_ast(uint16_t port)
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{
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OUTB(0xaa, port);
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}
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static int detect_ast_superio(uint16_t port)
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{
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int i;
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enter_conf_mode_ast(port);
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/* Aspeed devices doesn't have a DEVICE_ID_REG.
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* Host cycles that aren't decoded read as 0xff.
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* Probe for the scratch register that are initialized to zero.
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* The firmware might overwrite that, but it's the best we have.
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*/
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for (i = DEVICE_SCRATCH_REG; i < 0x30; i++) {
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if (regval(port, i) != 0xff)
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break;
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}
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if (i == 0x30) {
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if (verbose)
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printf(NOTFOUND
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"scratch registers all read as 0xff\n");
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}
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exit_conf_mode_ast(port);
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return i < 0x30;
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}
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void probe_idregs_aspeed(uint16_t port)
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{
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uint16_t chip_id = 0;
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probing_for("Aspeed", "", port);
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if (!detect_ast_superio(port))
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return;
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if (superio_unknown(reg_table, chip_id)) {
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if (verbose)
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printf(NOTFOUND "id=0x%02x\n", chip_id);
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return;
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}
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printf("Found Aspeed %s (id=0x%02x) at 0x%x\n",
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get_superio_name(reg_table, chip_id), chip_id, port);
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chip_found = 1;
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enter_conf_mode_ast(port);
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dump_superio("Aspeed", reg_table, port, chip_id, LDN_SEL);
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exit_conf_mode_ast(port);
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}
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void print_aspeed_chips(void)
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{
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print_vendor_chips("Aspeed", reg_table);
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}
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