ArmPlatformPkg: Changed memory model for the stacks
In the previous version, every cores had the same stack size. To avoid to waste memory with secondary core stacks, the primary core stack size is now different from the secondary cores stack size. These are the Stack PCDs and their default values: gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
@@ -82,8 +82,8 @@ PrimaryMain (
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
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SecCoreData.StackBase = SecCoreData.TemporaryRamBase;
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@@ -44,8 +44,8 @@ PrimaryMain (
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
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SecCoreData.StackBase = SecCoreData.TemporaryRamBase;
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@@ -26,43 +26,68 @@ GCC_ASM_EXPORT(_ModuleEntryPoint)
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StartupAddr: .word CEntryPoint
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ASM_PFX(_ModuleEntryPoint):
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# Identify CPU ID
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// Identify CPU ID
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bl ASM_PFX(ArmReadMpidr)
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// Get ID of this CPU in Multicore system
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r0, r0, r1
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_SetupStack:
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# Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
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mov r3,r0 @ r3 = core_id
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mul r3,r3,r2 @ r3 = core_id * stack_size = offset from the stack base
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add r3,r3,r1 @ r3 = stack_base + offset
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add r3,r3,r2,LSR #1 @ r3 = stack_offset + (stack_size/2) <-- the top half is for the heap
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mov sp, r3
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// Calculate the top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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add r2, r2, r1
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# Only allocate memory in top of the primary core stack
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cmp r0, #0
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bne _PrepareArguments
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)
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cmp r0, r1
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beq _SetupPrimaryCoreStack
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_AllocateGlobalPeiVariables:
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# Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
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sub sp, sp, r1
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_SetupSecondaryCoreStack:
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// r2 = Top of the primary stack = Base of the Secondary Stacks
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// Get the position of the cores (ClusterId * 4) + CoreId
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GetCorePositionInStack(r3, r0, r1)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r3, r3, #1
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
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// StackOffset = CorePos * StackSize
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mul r3, r3, r1
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// SP = StackBase + StackOffset
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add sp, r2, r3
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b _PrepareArguments
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_SetupPrimaryCoreStack:
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// r2 = Top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (r2, r3, r1)
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// Set all the PEI global variables to 0
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mov r3, sp
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mov r1, #0x0
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_InitGlobals:
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str r1, [r3], #4
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cmp r3, r2
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blt _InitGlobals
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_PrepareArguments:
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# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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# move sec startup address into a data register
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# ensure we're jumping to FV version of the code (not boot remapped alias)
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// move sec startup address into a data register
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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# jump to PrePeiCore C code
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# r0 = core_id
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# r1 = pei_core_address
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// jump to PrePeiCore C code
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// r0 = mp_id
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// r1 = pei_core_address
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blx r2
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_NeverReturn:
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b _NeverReturn
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@@ -34,25 +34,47 @@ _ModuleEntryPoint
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r0, r0, r1
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_SetupStack
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// Setup Stack for the 4 CPU cores
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
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mov r3, r0 // r3 = core_id
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mul r3, r3, r2 // r3 = core_id * stack_size = offset from the stack base
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add r3, r3, r1 // r3 = stack_base + offset
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add r3, r3, r2, LSR #1 // r3 = stack_offset + (stack_size/2) <-- the top half is for the heap
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mov sp, r3
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// Calculate the top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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add r2, r2, r1
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// Only allocate memory in top of the primary core stack
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cmp r0, #0
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bne _PrepareArguments
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)
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cmp r0, r1
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beq _SetupPrimaryCoreStack
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_AllocateGlobalPeiVariables
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// Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
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sub sp, sp, r1
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_SetupSecondaryCoreStack
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// r2 = Top of the primary stack = Base of the Secondary Stacks
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// Get the position of the cores (ClusterId * 4) + CoreId
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GetCorePositionInStack(r3, r0, r1)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r3, r3, #1
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
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// StackOffset = CorePos * StackSize
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mul r3, r3, r1
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// SP = StackBase + StackOffset
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add sp, r2, r3
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b _PrepareArguments
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_SetupPrimaryCoreStack
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// r2 = Top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (r2, r3, r1)
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// Set all the PEI global variables to 0
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mov r3, sp
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mov r1, #0x0
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_InitGlobals
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str r1, [r3], #4
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cmp r3, r2
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blt _InitGlobals
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_PrepareArguments
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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@@ -69,4 +91,7 @@ _PrepareArguments
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// r1 = pei_core_address
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blx r2
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_NeverReturn
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b _NeverReturn
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END
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@@ -61,8 +61,9 @@
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
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gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
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@@ -56,8 +56,12 @@
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress
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gArmTokenSpaceGuid.PcdNormalFvSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
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gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
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