OvmfPkg/PlatformPei: detect SMRAM at default SMBASE (skeleton)

Introduce the Q35SmramAtDefaultSmbaseInitialization() function for
detecting the "SMRAM at default SMBASE" feature.

For now, the function is only a skeleton, so that we can gradually build
upon the result while the result is hard-coded as FALSE. The actual
detection will occur in a later patch.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200129214412.2361-6-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Laszlo Ersek
2019-09-20 14:02:14 +02:00
committed by mergify[bot]
parent e0ed7a9b15
commit 73974f809c
4 changed files with 27 additions and 0 deletions

View File

@@ -43,6 +43,8 @@ STATIC UINT32 mS3AcpiReservedMemorySize;
STATIC UINT16 mQ35TsegMbytes; STATIC UINT16 mQ35TsegMbytes;
BOOLEAN mQ35SmramAtDefaultSmbase;
UINT32 mQemuUc32Base; UINT32 mQemuUc32Base;
VOID VOID
@@ -90,6 +92,22 @@ Q35TsegMbytesInitialization (
} }
VOID
Q35SmramAtDefaultSmbaseInitialization (
VOID
)
{
RETURN_STATUS PcdStatus;
ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
mQ35SmramAtDefaultSmbase = FALSE;
PcdStatus = PcdSetBoolS (PcdQ35SmramAtDefaultSmbase,
mQ35SmramAtDefaultSmbase);
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID VOID
QemuUc32BaseInitialization ( QemuUc32BaseInitialization (
VOID VOID

View File

@@ -792,6 +792,7 @@ InitializePlatform (
if (FeaturePcdGet (PcdSmmSmramRequire)) { if (FeaturePcdGet (PcdSmmSmramRequire)) {
Q35BoardVerification (); Q35BoardVerification ();
Q35TsegMbytesInitialization (); Q35TsegMbytesInitialization ();
Q35SmramAtDefaultSmbaseInitialization ();
} }
PublishPeiMemory (); PublishPeiMemory ();

View File

@@ -52,6 +52,11 @@ Q35TsegMbytesInitialization (
VOID VOID
); );
VOID
Q35SmramAtDefaultSmbaseInitialization (
VOID
);
EFI_STATUS EFI_STATUS
PublishPeiMemory ( PublishPeiMemory (
VOID VOID
@@ -119,6 +124,8 @@ extern UINT32 mMaxCpuCount;
extern UINT16 mHostBridgeDevId; extern UINT16 mHostBridgeDevId;
extern BOOLEAN mQ35SmramAtDefaultSmbase;
extern UINT32 mQemuUc32Base; extern UINT32 mQemuUc32Base;
#endif // _PLATFORM_PEI_H_INCLUDED_ #endif // _PLATFORM_PEI_H_INCLUDED_

View File

@@ -84,6 +84,7 @@
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd
gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize