CpuPageTableLib: Fix parent attributes are not inherited properly
With the following paging structure that maps [0, 2G] with ReadWrite bit set. PML4[0] --> PDPTE[0] --> PDE[0-255] \-> PDPTE[1] --> PDE[0-255] If ReadWrite bit is cleared in PML4[0] and PageTableMap() is called to change [0, 2M] as writable, today's logic doesn't inherit the parent entry's attributes when determining the child entry's attributes. It just sets the PDPTE[0].PDE[0].ReadWrite bit. But since the PML4[0].ReadWrite is 0, [0, 2M] is still read-only. The change fixes the bug. If the inheritable attributes in ParentPagingEntry conflicts with the requested attributes, let the child entries take the parent attributes and loosen the attribute in the parent entry. E.g.: when PDPTE[0].ReadWrite = 0 but caller wants to map [0-2MB as ReadWrite = 1 (PDE[0].ReadWrite = 1), we need to change PDPTE[0].ReadWrite = 1 and let all PDE[0-255].ReadWrite = 0 first. Then change PDE[0].ReadWrite = 1. Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
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@@ -21,7 +21,11 @@
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#define REGION_LENGTH(l) LShiftU64 (1, (l) * 9 + 3)
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typedef struct {
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UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
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UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
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UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
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UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
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UINT64 Reserved : 58;
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UINT64 Nx : 1; // No Execute bit
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} IA32_PAGE_COMMON_ENTRY;
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///
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@@ -201,4 +205,18 @@ PageTableLibGetPleBMapAttribute (
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IN IA32_MAP_ATTRIBUTE *ParentMapAttribute
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);
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/**
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Return the attribute of a non-leaf page table entry.
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@param[in] Pnle Pointer to a non-leaf page table entry.
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@param[in] ParentMapAttribute Pointer to the parent attribute.
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@return Attribute of the non-leaf page table entry.
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**/
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UINT64
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PageTableLibGetPnleMapAttribute (
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IN IA32_PAGE_NON_LEAF_ENTRY *Pnle,
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IN IA32_MAP_ATTRIBUTE *ParentMapAttribute
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);
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#endif
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