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ArmPkg: Configure TTBCR register

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Architecturally, the TTBCR register value is undefined at reset for
Non-Secure.
On some platforms the reset value for TTBCR is not zero and
this causes a data abort exception once the MMU is enabled.

This patch configures the TTBCR register to enable translation table
walk using TTBR0.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
This commit is contained in:
Evan Lloyd
2016-03-02 21:08:46 +00:00
committed by Leif Lindholm
parent eea222ced0
commit ff1f27c055
4 changed files with 32 additions and 4 deletions
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13
ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
View File

@@ -1,7 +1,7 @@
/** @file
* File managing the MMU for ARMv7 architecture
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -347,6 +347,17 @@ ArmConfigureMmu (
ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));
//
// The TTBCR register value is undefined at reset in the Non-Secure world.
// Writing 0 has the effect of:
// Clearing EAE: Use short descriptors, as mandated by specification.
// Clearing PD0 and PD1: Translation Table Walk Disable is off.
// Clearing N: Perform all translation table walks through TTBR0.
// (0 is the default reset value in systems not implementing
// the Security Extensions.)
//
ArmSetTTBCR (0);
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
DOMAIN_ACCESS_CONTROL_NONE(14) |
DOMAIN_ACCESS_CONTROL_NONE(13) |