ArmPkg: Configure TTBCR register
Architecturally, the TTBCR register value is undefined at reset for Non-Secure. On some platforms the reset value for TTBCR is not zero and this causes a data abort exception once the MMU is enabled. This patch configures the TTBCR register to enable translation table walk using TTBR0. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
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committed by
Leif Lindholm
parent
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ff1f27c055
@@ -1,7 +1,7 @@
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//------------------------------------------------------------------------------
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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// Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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@@ -85,6 +85,11 @@
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isb
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bx lr
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RVCT_ASM_EXPORT ArmSetTTBCR
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mcr p15, 0, r0, c2, c0, 2
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isb
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bx lr
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RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress
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mrc p15,0,r0,c2,c0,0
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LoadConstantToReg(0xFFFFC000, r1)
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