Commit Graph

20 Commits

Author SHA1 Message Date
c924df7ccf IntelSiliconPkg IntelVTdDxe: Check HeaderType if func 0 is implemented
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1169

Current code checks HeaderType of Function 0 even Function 0 is not
implemented. HeaderType value will be 0xFF if Function 0 is not
implemented, then MaxFunction will be set to PCI_MAX_FUNC + 1.

The code can be optimized to only check HeaderType if Function 0 is
implemented.

Test done:
With this patch, the result is same with the result after the patch at
https://lists.01.org/pipermail/edk2-devel/2018-September/029623.html.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Tomson Chang <tomson.chang@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit b06dfd40bb)
2018-11-07 22:07:01 +08:00
935c402311 IntelSiliconPkg IntelVTdDxe: Optimize when func 0 is not implemented
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1169

PCI spec:
They are also required to always implement function 0 in the device.
Implementing other functions is optional and may be assigned in any
order (i.e., a two-function device must respond to function 0 but
can choose any of the other possible function numbers (1-7) for the
second function).

This patch updates ScanPciBus() to not scan other functions if
function 0 is not implemented.

Test done:
Added debug code below in the second loop of ScanPciBus(),
compared the debug logs with and without this patch, many
non-0 unimplemented functions are skipped correctly.

  DEBUG ((
    DEBUG_INFO,
    "%a() B%02xD%02xF%02x VendorId: %04x DeviceId: %04x\n",
    __FUNCTION__,
    Bus,
    Device,
    Function,
    VendorID,
    DeviceID
    ));

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Tomson Chang <tomson.chang@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit e69d7e99e7)
2018-11-07 22:06:59 +08:00
332b4e030e IntelSiliconPkg/Vtd: Add more debug info.
Add more debug info for reason code.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 8d8c487fb9)
2018-05-10 14:23:54 +08:00
bb45812e3b IntelSiliconPkg/Vtd: Add missing dump in ExtContext.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 224f87932d)
2018-05-10 14:23:53 +08:00
d006fad08b IntelSiliconPkg/Vtd: Add DMA_CTRL_PLATFORM_OPT_IN_FLAG dump
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 6cea3c1b51)
2018-05-10 14:23:53 +08:00
8d8b9af9d8 IntelSiliconPkg/Vtd: Add MapHandleInfo in VtdDxe.
This information is to record which device requested which DMA buffer.
It can be used for DMA buffer analysis.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 6d2d2e6e5b)
2018-05-10 14:23:52 +08:00
8927f4683b IntelSiliconPkg IntelVTdDxe: Fix flush cache issue
The patch fixes flush cache issue in
CreateSecondLevelPagingEntryTable().

We found some video cards still not work even they have
been added to the exception list.

In CreateSecondLevelPagingEntryTable(), the check
"(BaseAddress >= MemoryLimit)" may be TRUE and "goto Done"
will be executed, then the FlushPageTableMemory operations
at the end of the function will be skipped.

Instead of "goto Done", this patch uses "break" to break
the for loops, then the FlushPageTableMemory operations
at the end of the function could have opportunity to be
executed.

The patch also fixes a miscalculation for Lvl3End.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit bac7f02365)
2018-05-10 14:23:48 +08:00
0f6641efed IntelSiliconPkg IntelVTdDxe: Fix DMA does not work issue
Fix DMA does not work issue when system memory is not
greater than 4G.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 1d4c17a6ef)
2018-05-10 14:23:47 +08:00
1cc04b839b IntelSiliconPkg IntelVTdDxe: Remove mVtdHostAddressWidthMask
mVtdHostAddressWidthMask is not been used at all,
its definition and related code could be removed.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 9eaa902a52)
2018-05-10 14:23:46 +08:00
b6da5e3823 IntelSiliconPkg IntelVTdDxe: Fix potential NULL pointer dereference
The implementation of MdeModulePkg\Universal\Acpi\AcpiTableDxe reserves
first entry of RSDT/XSDT to FADT, the first entry value is 0 when FADT
is not installed. So the RSDT/XSDT parsing code should check the entry
value first before checking the table signature.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 01bd1c98fa)
2018-05-10 14:23:44 +08:00
af1b85332b IntelSiliconPkg IntelVTdDxe: Support early SetAttributes()
Support early SetAttributes() before DMAR table is installed.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 0bc94c748b)
2018-05-10 14:23:43 +08:00
48008d5f59 IntelSiliconPkg IntelVTdDxe: Use TPL to protect list/engine operation
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 3a71670618)
2018-05-10 14:23:42 +08:00
12afa343ef IntelSiliconPkg IntelVTdDxe: Signal AcpiNotificationFunc() initially
Signal AcpiNotificationFunc() initially for the case that
DMAR table has been installed when creating event.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit dcd39e09ff)
2018-05-10 14:23:41 +08:00
6b4b6a36ab IntelSilicon: Correct function description for AllocateBuffer
DUAL_ADDRESS_CYCLE is missing in the EFI_UNSUPPORTED
return status description.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 34e18d1758)
2018-05-10 14:23:41 +08:00
058a50daf5 IntelSiliconPkg IntelVTdDxe: Do not SetupVtd again
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Tested-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 7729e3c448)
2018-05-10 14:23:40 +08:00
d7989c70aa IntelSiliconPkg IntelVTdDxe: Use ACPI table event to get DMAR table
Use ACPI table event to get DMAR table instead of using ACPI SDT
notification as ACPI SDT is optional and the default value of
PcdInstallAcpiSdtProtocol is FALSE in MdeModulePkg.dec.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit f6f486e7bf)
2018-05-10 14:23:39 +08:00
22d1ad2be9 IntelSiliconPkg/VTdDxe: Change EBS Event TPL to CALLBACK.
Change ExitBootServices TPL to CALLBACK, so that a device
can disable BME before IOMMU grants access right.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 01df510319)
2018-05-10 14:23:36 +08:00
985e2707a0 IntelSiliconPkg IntelVTdDxe: use gEfiAcpi10TableGuid for ACPI 1.0
According to definition (Acpi.h and MdePkg.dec),
gEfiAcpiTableGuid = gEfiAcpi20TableGuid, and the code is trying
to parse ACPI 2.0 first and then ACPI 1.0, but it uses
gEfiAcpiTableGuid wrongly for ACPI 1.0, this patch is to fix it.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 118f1657b9)
2018-05-10 14:23:35 +08:00
9f293688f8 IntelSiliconPkg/VTdDxe: Clean up DXE flush memory.
Make sure the context table are flush to memory.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 73a2fe8b87)
2018-05-10 14:23:33 +08:00
f899049159 IntelSiliconPkg/IntelVTdDxe: Move to feature dir.
Move IntelVTdDxe to Feature/VTd/IntelVTdDxe.

Suggested-by: Star Zeng <star.zeng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 9010459c9a)
2018-05-10 14:23:27 +08:00