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621 Commits

Author SHA1 Message Date
Sheng Wei
ef91b07388 UefiCpuPkg/PiSmmCpuDxeSmm: Fix SMM stack offset is not correct
In function InitGdt(), SmiPFHandler() and Gen4GPageTable(), it uses
 CpuIndex * mSmmStackSize to get the SMM stack address offset for
 multi processor. It misses the SMM Shadow Stack Size. Each processor
 will use mSmmStackSize + mSmmShadowStackSize in the memory.
It should use CpuIndex * (mSmmStackSize + mSmmShadowStackSize) to get
 this SMM stack address offset. If mSmmShadowStackSize > 0 and multi
 processor enabled, it will get the wrong offset value.
CET shadow stack feature will set the value of mSmmShadowStackSize.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3237

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Roger Feng <roger.feng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-03-02 05:11:55 +00:00
Sheng Wei
0930e7ff64 UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit
If CET shadows stack feature enabled in SMM and stack switch is enabled.
When code execute from SMM handler to SMM exception, CPU will check SMM
exception shadow stack token busy bit if it is cleared or not.
If it is set, it will trigger #DF exception.
If it is not set, CPU will set the busy bit when enter SMM exception.
So, the busy bit should be cleared when return back form SMM exception to
SMM handler. Otherwise, keeping busy bit 1 will cause to trigger #DF
exception when enter SMM exception next time.
So, we use instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP to clear the
shadow stack token busy bit before RETF instruction in SMM exception.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Roger Feng <roger.feng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-03-02 05:11:55 +00:00
Sheng Wei
bdf1df8a5f MdePkg/Include: Add CET instructions to Nasm.inc
This is to add instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP_RAX in Nasm.
The open CI is using NASM 2.14.02.
CET instructions are supported since NASM 2.15.01.

DB-encoded CET instructions need to be removed after open CI update to
 NASM 2.15.01.
The BZ ticket is https://bugzilla.tianocore.org/show_bug.cgi?id=3227 .

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-03-02 05:11:55 +00:00
Ming Huang
0996a7883c ArmPkg/ArmGicLib: Fix GICR_IPRIORITYR address wrong issue
The register address of GICR_IPRIORITYR is in SGI_base frame. Add
IPRIORITY_ADDRESS macro for getting GICR_IPRIORITYR address. Otherwise
GIC RAS error(Uncorrected software error) may report in ArmGicDxe.

This resolves BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3236

Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/kvm guest on ThunderX2
Tested-by: Quan Nguyen <quan@os.amperecomputing.com>
2021-03-01 13:09:24 +00:00
Ming Huang
f7ee9e9253 ArmPkg/ArmGicLib: Fix two macros issue for offset parameter
Modify two macros to put "offset" in parentheses and remove
parentheses from "4 * offset".

Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-03-01 13:09:24 +00:00
Sami Mujawar
31eaefd4df ArmPkg: Fix uninitialised variable in ArmMmuStandaloneMmLib
The following patches added support for StandaloneMM using FF-A:
9da5ee116a ArmPkg: Allow FF-A calls to set memory region's attributes
0e43e02b9b ArmPkg: Allow FF-A calls to get memory region's attributes

However, in the error handling logic for the Get/Set Memory attributes,
the CLANG compiler reports that a status variable could be used without
initialisation. This issue is a false positive and is not seen with GCC.

The Get/Set Memory attributes operation is atomic and therefore an
FFA_INTERRUPT or FFA_SUCCESS response is not expected in response
to FFA_MSG_SEND_DIRECT_REQ. So the remaining cases that could occur
are:
 - the target sends FFA_MSG_SEND_DIRECT_RESP with a success or
   failure code.
 or
 - FFA_MSG_SEND_DIRECT_REQ transmission failure.

Therefore,
 - reorder the error handling conditions such that it prevents the
   uninitialised variable issue being flagged by CLANG.
 - move the repetitive code to a static helper function and add
   documentation at the appropriate places.
 - fix error handling in functions that invoke GetMemoryPermissions().

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2021-02-27 10:59:13 +00:00
Michael Kubacki
cd14150c15 StandaloneMmPkg: Remove StandaloneMmDriverEntryPoint.h
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3235

The library for this header initially resided in StandaloneMmPkg
but moved to MdePkg and now this file is a duplicate of the header
file in MdePkg.

This change removes the header file from StandaloneMmPkg. More
details regarding the history of the library transitioning from
StandaloneMmPkg to MdePkg are below.

The following commit removed the library from StandaloneMmPkg:
  d6253d2f9a ("StandaloneMmPkg: remove redundant
  StandaloneMmDriverEntryPoint driver", 2019-03-11)

The following commits added the library class & instance to MdePkg:
  7df4764e6a ("MdePkg: introduce standalone MM entry point
  library class", 2019-01-14)

  5866d49923 ("MdePkg: introduce standalone MM entry point
  library implementation", 2019-01-14)

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2021-02-26 18:56:48 +00:00
Ray Ni
62f2cf5784 UefiCpuPkg/MpInitLib: Use XADD to avoid lock acquire/release
When AP firstly wakes up, MpFuncs.nasm contains below logic to assign
an unique ApIndex to each AP according to who comes first:
---ASM---
TestLock:
    xchg       [edi], eax
    cmp        eax, NotVacantFlag
    jz         TestLock

    mov        ecx, esi
    add        ecx, ApIndexLocation
    inc        dword [ecx]
    mov        ebx, [ecx]

Releaselock:
    mov        eax, VacantFlag
    xchg       [edi], eax
---ASM END---

"lock inc" cannot be used to increase ApIndex because not only the
global ApIndex should be increased, but also the result should be
stored to a local general purpose register EBX.

This patch learns from the NASM implementation of
InternalSyncIncrement() to use "XADD" instruction which can increase
the global ApIndex and store the original ApIndex to EBX in one
instruction.

With this patch, OVMF when running in a 255 threads QEMU spends about
one second to wakeup all APs. Original implementation needs more than
10 seconds.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2021-02-26 11:51:37 +00:00
Pierre Gondois
6ffbb3581a BaseTools: Align include guards policy
The EDK II C Coding Standards Specification states that:
"Names starting with one or two underscores, such as
_MACRO_GUARD_FILE_NAME_H_, must not be used. They are
reserved for compiler implementation." [1]

The Ecc tool currently checks that the include guard end with
a trailing underscore. Thus, the check and the error message
should both be modified.

The new check forces having one sole trailing underscore
character, as the example in the specification shows:
"FILE_NAME_H_" [1]
This would allow to have more consistency.

[1] Section 5.3.5 "All include file contents must be protected
by a #include guard":
https://edk2-docs.gitbook.io/
edk-ii-c-coding-standards-specification/5_source_files/53_include_files

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <Sami.Mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-26 05:40:32 +00:00
Li, Walon
7f34681c48 MdeModulePkg/UefiBootManagerLib: Put BootMenu at the end of BootOrder
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3135

When Boot Menu does not exist in the BootOrder, BmRegisterBootManagerMenu
will create one into list. However, it should be put at the "end" of
BootOrder instead of "start" of BootOrder. Replace 0 by -1 to adjust
order of load options.

Signed-off-by: Walon Li <walon.li@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-25 15:57:50 +00:00
Abner Chang
35f87da8a2 RedfishPkg/RedfishContentCodingLib: EDKII Redfish En/Decode library
BZ#:3174
Platform library to provide the encoding/decoding algorithms for
the Redfish packets.
The supported value could be one of below or any which is
platform-specific.
  - HTTP_CONTENT_ENCODING_IDENTITY "identity"
  - HTTP_CONTENT_ENCODING_GZIP     "gzip"
  - HTTP_CONTENT_ENCODING_COMPRESS "compress"
  - HTTP_CONTENT_ENCODING_DEFLATE  "deflate"
  - HTTP_CONTENT_ENCODING_BROTLI   "br"

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2021-02-24 10:53:08 +00:00
Abner Chang
69637f91c7 RedfishPkg/Include: EDKII Redfish Config Handler Protocol header file
BZ:2911

This is the header file of EDKII Redfish config handler protocol,
which is used by EDKII Redfish feature driver in order to
manipulate Redfish properties based on the Redfish schema.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2021-02-24 10:23:42 +00:00
Abner Chang
0cf260fabc RedfishPkg/JsonLib: Ignore the build error of conditional expression.
Ignore the build error of assignment within conditional expression.
Add build option to ignore the build error of "assignment within
conditional expression".
This build error is caused by the macros defined in open source
project jansson header file jansson.h.

- json_object_foreach
- json_object_foreach_safe
- json_array_foreach

We use build option to avoid the build errors on Visual Studio
(GCC doesn't havvve this problem) for now. Already sent an email
to jansson open source community to revise these macro as Leif's
suggestion as below,

for (key = json_object_iter_key(json_object_iter(object));    \
       key;                                                   \
       key = json_object_iter_key(                            \
            json_object_iter_next(object,
json_object_key_to_iter(key)))) { \
       value =
json_object_iter_value(json_object_key_to_iter(key));         \
      if (!value) \
        break; \
  } \

We will remove this build option once the patch is accepted and
upstreamed.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2021-02-24 09:54:14 +00:00
Abner Chang
bd158441d6 RedfishPkg/JsonLib: Fix the mistake of removing code by a accident
json_string_value() in JsonValueGetAsciiString () is removed by a accident
when clean up the code.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2021-02-24 08:57:32 +00:00
Abner Chang
5d7b5cd105 RedfishPkg/JsonLib: Add JsonLoadString function
Add JsonLoadString function to load a NULL terminated-string JSON

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2021-02-24 08:27:09 +00:00
Abner Chang
739a506b18 RedfishPkg/RedfishCrtLib: Add more CRT functions
Add more functions which were missed in the first time commit,
that causes the build error with EDK2 Redfish feature driver.

strerror - We don't support this on edk2 environment.
strpbrk  - Cloned this function from edk2-LibC
File operation functions - Not supported on edk2 environment.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
2021-02-24 07:58:50 +00:00
Ilias Apalodimas
68e5ecc4d2 StandaloneMmPkg: Allow sending FFA Direct Request message to StandaloneMm
Allow passing of a request to StandaloneMm Core through the Firmware
Framework(FF-A) using FFA_MSG_SEND_DIRECT_REQ method. This method is
used as a mechanism for requesting some service from StandaloneMm.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Ilias Apalodimas
1262c02677 MdeModulePkg/VariableStandaloneMm: Set PcdFlashNvStorageVariableBase to Pcd
Instead of running StMM in SPM, OP-TEE creates a new secure partition,
which emulates SPM and isolates StMM from the rest of the Trusted
Applications (TAs). We can then compile StMM as an FD image and run it
in OP-TEE. With the addition of a new RPMB driver, we can leverage OP-TEE
and store variables to an RPMB device.

Since EDK2 upper layers expect byte addressable code, for the RPMB to
work, we need to allocate memory and sync it with the hardware on
read/writes. Since DynamicPCDs are not supported in that context we
can only use PatchablePCDs. So let's switch them to Pcd instead of
FixedPcd and accomodate the new driver. While at it, move the rest
of the variables under Pcd section, instead of FixedPcd -- this is in
line with how the variables are defined in the other Variable
modules.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
9da5ee116a ArmPkg: Allow FF-A calls to set memory region's attributes
Allow setting memory region's permissions using either of the Firmware
Framework(FF-A) ABI transport or through the earlier used SVC calls.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Co-developed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
0e43e02b9b ArmPkg: Allow FF-A calls to get memory region's attributes
Allow getting memory region's permissions using either of the Firmware
Framework(FF-A) ABI transport or through the earlier used SVC calls.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Co-developed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
67f3f8b661 ArmPkg: Use FF-A header file in Standalone MM Arm MMU library
Add the FF-A header for invoking the mmu functions using FF-A calls as
the transport mechanism. Support for invoking the functions through
FF-A will be added in a subsequent patch.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
388dfe02fb StandaloneMmPkg: Add option to use FF-A calls for communication with SPM
Add support for reporting completion of a MM request using either the
Firmware Framework(FF-A) ABI transport or through the earlier used SVC
calls.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Co-developed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Sughosh Ganu
cb4267d4c2 StandaloneMmPkg: Add option to use FF-A calls for getting SPM version
With the introduction of Firmware Framework(FF-A), a Secure Partition
can get the SPM version either using FF-A calls or through the
existing svc calls. Use a runtime check to use either of the two
methods based on the Pcd feature flag value.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Co-developed-by: Achin Gupta <achin.gupta@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Sughosh Ganu
799c07ca28 ArmPkg: Add macros for SPM version with FF-A support enabled
Declare the values of SPM major and minor versions as macros with FF-A
enabled, which can be used in the module for checking the SPM version
compatibility. These SPM major and minor version numbers are mandated
for having support for the Firmware Framework(FF-A) feature enabled.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Sughosh Ganu
053cd5980c StandaloneMmPkg: Use macros for SPM version check
Declare module wide variables for SPM major and minor versions to be
used in checking the SPM version compatibility. Use the SPM major and
minor version macros declared in the previous patch for the version
check.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Sughosh Ganu
2385e1deca ArmPkg: Add macros for SPM version
Declare the values of SPM major and minor versions as macros which can
be used in the module for checking the SPM version compatibility.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Sughosh Ganu
ee283e3395 ArmPkg: Introduce support for PcdFfaEnable
The Secure Partition(SP) can request services from the Secure
Partition Manager Core(SPMC) either through FF-A calls or through the
existing SVC calls. Add a feature flag Pcd for enabling the FF-A
method -- when this is set to FALSE, the SP uses the existing SVC
calls for making the requests.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
82abb8f981 StandaloneMmPkg: Use FF-A header file in Standalone MM Core entry point
Add the Firmware Framework(FF-A) header in the StandaloneMm entry
point driver. Support for invoking the functions through FF-A will be
added in a subsequent patch.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
af0c597e98 ArmPkg/ArmSvcLib: Return x4-x7 in output parameters
The Arm SMC calling convention standard v1.2 allows 8 input and output
parameter registers. The FF-A specification relies on this
communication. This patch extends the number of output registers
returned by ArmCallSvc() to match this convention.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Achin Gupta
37ef4bb1a7 ArmPkg/IndustryStandard: Add barebones FF-A header
This patch adds a rudimentary header file with defines for FF-A ABIs
that will be used as the transport between S-EL0 and the SPM

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-23 15:40:37 +00:00
Rebecca Cran
a2b5ea38a6 ArmPkg: Update OemGetChassisType function to return MISC_CHASSIS_TYPE
Update OemGetChassisType in OemMiscLib to return MISC_CHASSIS_TYPE
instead of EFI_STATUS, which matches other OemMiscLib functions.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-23 12:37:51 +00:00
Rebecca Cran
869ccd4a3e ArmPkg: Rename some functions and parameters in OemMiscLib
o Rename 'mHiiHandle' parameter in OemUpdateSmbiosInfo to 'HiiHandle'.
o Rename 'Offset' parameter in OemUpdateSmbiosInfo to 'Field'.
o Rename OemGetProcessorMaxSockets to OemGetMaxProcessors.
o Rename OemIsSocketPresent to OemIsProcessorPresent.
o Update Universal/Smbios to follow the changes to OemMiscLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-23 12:37:51 +00:00
Rebecca Cran
533fff506e ArmPkg: Fix ordering of return type and EFIAPI specifier in OemMiscLib
The return type should be on the line before any EFIAPI specifier.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-23 12:37:51 +00:00
Yunhua Feng
078400ee15 BaseTools: Fix BrotliCompress run issue on Linux
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3210
BrotliCompress changed, but not completely on Linux

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-22 09:51:17 +00:00
Samer El-Haj-Mahmoud
44ae214591 EmbeddedPkg/VirtualRealTimeClockLib: Reduce DEBUG message verbosity
The DEBUG message for using compilation time epoch is appearing very
frequently on DEBUG firmware builds, for example during UEFI SCT runs.
Reduce verbosity to avoid the annoying repetitive message.

Signed-off-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-20 16:49:30 +00:00
Pierre Gondois
4f4d862c1c DynamicTablesPkg/AmlLib: Remove unused variables
Building the DynamicTablesPkg for a NOOPT target
fails because unused variables are set.
Remove these variables.

Fixes: d9800046ea
Reported-by: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-15 23:31:03 +00:00
Guo Dong
2e1e8c35f3 UefiPayloadPkg/PlatformBootManager: Connect console after EndOfDxe
Currently the console is connected before EndOfDxe causing OptionsROMs
to be loaded, but their drivers aren't used and thus no GOP is installed.
To make use of 3rdparty OptionROMs connect the console after EndOfDxe.
Tested on Intel CFL board using Nvidia Quadro GPU.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Sunny Wang <sunnywang@hpe.com>
2021-02-12 04:44:12 +00:00
Guo Dong
649a59bf83 UefiPayloadPkg: Fix PciLib dependency on BlSupportDxe
The PciLib depends on PCDs
- PcdPciExpressBaseAddress
- PcdPciExpressBaseSize
being updated by BlSupportDxe before MMCONF accesses are working.

Add BlSupportDxe to APRIORI to start it first and get the system into
an usable state where at least PCI accesses work reliable.

Fixes a bug where BlSupportDxe is scheduled too late and other DXEs fail
to load due to broken PCI access.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2021-02-12 04:44:12 +00:00
Guo Dong
cf4cbe194f UefiPayloadPkg: Enable NVMe support
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2021-02-12 04:44:12 +00:00
Joey Gouly
42c0019f27 DynamicTablesPkg: Add an override for 16550 HID in SSDT
Some platforms advertise support for a 16550 UART, but are not
compatible with the PNP0500 HID. Allow them to override the HID by
setting PcdNonBsaCompliant16550SerialHid.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-11 10:35:35 +00:00
Joey Gouly
7766ebd5ad DynamicTablesPkg: Don't use gEfiMdeModulePkgTokenSpaceGuid
Introduce gEdkiiDynamicTablesPkgTokenSpaceGuid and use that instead.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-11 10:35:35 +00:00
Michael Kubacki
1d27e58e40 StandaloneMmPkg/StandaloneMmCore: Fix compiler warning
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3204

Fixes the following compiler warning in VS2019 by changing defining
the MmramRangeCount variable to be UINTN and type casting prior
to value assignment.

\edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): error C2220:
  the following warning is treated as an error
\edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): warning C4244:
  '=': conversion from 'UINT64' to 'UINT32', possible loss of data

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-11 08:52:04 +00:00
Michael Kubacki
641866ac42 StandaloneMmPkg: Add X64 build support
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3202

Several libraries have been added to the package to support X64 but
the package itself does not support X64. This modifies the DSC to
enable X64 build.

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-11 08:52:04 +00:00
Michael Kubacki
71cd84ac09 StandaloneMmPkg/FvLib.h: Add EFIAPI to FfsFindSection()
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3203

The EFIAPI modifier is present in the function definition in
FvLib.c but missing in FvLib.h. Causes a GCC build error.

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-10 22:45:58 +00:00
Rebecca Cran
c615265b36 ArmPkg: Fix ARM ProcessorSubClassDxe build
The ARM ProcessorSubClassDxe build was broken due to changes in the
SmbiosProcessor API and an unused variable.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-10 20:10:38 +00:00
Bob Feng
124f1dd1ee BaseTools: Fix the ending character for Linux script BuildEnv
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Matthew Carlson <matthewfcarlson@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-02-10 01:48:50 +00:00
Leif Lindholm
8cb9b29684 ArmPkg: add DebugLib to OemMiscLibNull
The just added OemMiscLibNull fails to build due to DebugLib.h not
being included, missing the ASSERT definition. Add the include and the
library dependency.

Cc: Rebecca Cran <rebecca@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Rebecca Cran <rebecca@nuviainc.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-09 13:09:12 +00:00
Loo Tung Lun
273261126e IntelFsp2Pkg: Add YAML file generation support
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3091

Add support for YAML format file generation in addition
to current BSF structure. Configuration of YAML format
output will be supported by an open source ConfigEditor.

Reference to YAML code, test and ConfigEditor is at
https://github.com/joshloo/fsp_yaml_cfg/tree/master/Tools

A unit test is also added in Tests folder. This test compares
the generated yaml file against the expected output to know
if it is constructing the yaml data structure as expected.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Loo Tung Lun <tung.lun.loo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2021-02-09 08:23:03 +00:00
Matthew Carlson
1534b6228b BaseTools: Use pip module if available, CI uses it by default
Use the new edk2-basetools pip module.
Includes a helpful message in setup to let users know which has been
selected.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Yuwei <Chen<yuwei.chen@intel.com>

Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2021-02-09 03:56:37 +00:00
Rebecca Cran
ecc267fec5 ArmPkg: Add Universal/Smbios/SmbiosMiscDxe
SmbiosMiscDxe provides SMBIOS tables 0, 1, 2, 3, 13, and 32.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
660d4faa29 ArmPkg: Add SMBIOS PCDs to ArmPkg.dec
Platforms are expected to override these PCDs to provide relevant
information to SMBIOS.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
5905e09c30 ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type32
This code provides information for the SMBIOS Type 32 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
e64bd0704f ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type13
This code provides information for the SMBIOS Type 13 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
bfc0fae459 ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type03
This code provides information for the SMBIOS Type 3 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
bb41dc678c ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type02
This code provides information for the SMBIOS Type 2 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
eec78fc14d ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type01
This code provides information for the SMBIOS Type 1 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
6273e59a2e ArmPkg: Add Universal/Smbios/SmbiosMiscDxe/Type00
This code provides information for the SMBIOS Type 0 table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
2ba6ecef39 ArmPkg: Add Universal/Smbios/ProcessorSubClassDxe
ProcessorSubClassDxe provides SMBIOS CPU information using generic
methods combined with calls into OemMiscLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
0e51d7e445 ArmPkg: Add Universal/Smbios/OemMiscLibNull
Add a Null implementation of OemMiscLib.

OemMiscLib provides functions that platforms implement to fill in
SMBIOS information for the SmbiosMiscDxe and ProcessSubClassDxe drivers.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
2c7c64fc04 ArmPkg: Add Library/OemMiscLib.h
OemMiscLib.h provides the interface which platforms should implement to
interact with the SmbiosMiscDxe and ProcessorSubClassDxe drivers to
update SMBIOS tables.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
84a6db75b5 ArmPkg: Add helper to read the CCSIDR2 register
Add helper function to read the CCSIDR2 register.
This is used when CCIDX is supported in AARCH32 mode.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
6e131aff00 ArmPkg: Add helper to read CCIDX status
Add a helper function to determine CCIDX support.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
4f92cfa44d ArmPkg: Add definition of the maximum cache level in ARMv8-A
The ARM Architecture Reference Manual for ARMv8-A defines up to
seven levels of cache, L1 through L7.
Define MAX_ARM_CACHE_LEVEL to be 7.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
cd9fb745d7 ArmPkg: Update ArmLibPrivate.h with cache register definitions
Update the cache definitions in ArmLibPrivate.h based on current
ARMv8 documentation.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
93ff7a4e8e ArmPkg: Fix the return type of the ReadCCSIDR function
When CCIDX is supported, the Current Cache Size ID Register contains
data above 32 bits: namely the number of sets. Avoid truncating this
by returning a UINTN instead of UINT32. On AARCH32, the expanded
number of sets data can be read via the CCSIDR2 register.

Also, add Doxygen comments for the function.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
827a71cc9e ArmPkg: Add helper function to read the Memory Model Feature Register 4
In AARCH32, CCIDX support is indicated in the MMFR4 register - unlike
under AARCH64 where it's in MMFR2. Add a helper function to read it.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
b69566afae ArmPkg: Add helper to read the Memory Model Features Register 2
Add helper function to read the MMFR2 register. We will need this to
determine CCIDX support.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
92bdb2a9c6 ArmPkg: Add register encoding definition for MMFR2
Add register encoding definition for Memory Model Feature Register 2.
We need to define it here because we build for ARMv8.0, which doesn't
have it.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
4e1f316cec MdePkg: Update IndustryStandard/SmBios.h with processor status data
Add a bitfield that describes the structure of the byte in the Status
field of the SMBIOS Type 4 Processor Information table.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Acked-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Rebecca Cran
9e7621c05e ArmPkg: Add ARM SMC Architecture functions to ArmStdSmc.h
The ARM SMC Architecture functions were missing from ArmStdSmc.h.
Add them, based on the SMC Calling Convention version 1.2 specification.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-02-08 19:35:23 +00:00
Jordan Justen
472276f59b Maintainers.txt: Change Jordan Justen to a reviewer for OvmfPkg
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Message-Id: <20210204194902.101548-2-jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-08 15:57:20 +00:00
Jordan Justen
5c5354e8b9 Maintainers.txt: Remove Jordan Justen from EmulatorPkg
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Message-Id: <20210204194902.101548-1-jordan.l.justen@intel.com>
2021-02-08 15:57:20 +00:00
Bob Feng
43a113385e BaseTools: fix the split output files root dir
If the output file path is a relative path, the split
tool will create the output file under the input file path.
But the expected behavior for this case is the output file
should be relative to the current directory. This patch will
fix this bug.

If the output file path is not specified and output prefix is not
specified, the output file should be under the input file path

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2021-02-07 01:46:18 +00:00
Abner Chang
0d96664df3 MdeModulePkg/Library: Add HiiGetStringEx to UefiHiiLib for EDK2 Redfish
Add HiiGetStringEx and leveraged by HiiGetString function to support
getting string with the best language in optionally. This avoids the
string in x-uefi language is misled to the language defined by
"PlatformLang" or the "Supported Languages". This change is introduced
to support x-uefi keyword language for configuring BIOS setting.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-05 05:10:44 +00:00
Leif Lindholm
1b6c3a94ec ArmPkg/Library: prevent endless reboot loop with emulated NV varstore
If no valid boot options were found, PlatformBootManagerLib refreshes a
set of sane default options and then reboots. However, if there is in
fact no persistent varstore, the same thing happens again on next boot,
and we end up in an endlessly rebooting loop.

So when PcdEmuVariableNvModeEnable is TRUE, skip the reboot step and
enter the setup menu instead.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-02-04 16:11:23 +00:00
Guomin Jiang
f6ec1dd34f UefiCpuPkg: Move MigrateGdt from DiscoverMemory to TempRamDone. (CVE-2019-11098)
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1614
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3160

The GDT still in flash with commit 60b12e69fb
after TempRamDone

So move the action to TempRamDone event to avoid reading GDT from flash.

Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-04 01:30:05 +00:00
Lou, Yun
e806bb29cf UefiCpuPkg/CpuCacheInfoLib: Support no enabled AP case in DxeLib
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3195

Support system has no enabled AP case in DxeCpuCacheInfoLib.
Otherwise, if the system only has 1 BSP without any enabled AP,
UEFI POST hangs when invoking StartupAllAPs protocol because
EFI_NOT_STARTED is returned.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2021-02-03 07:41:46 +00:00
Lou, Yun
51b96e4b4c UefiCpuPkg/CpuCacheInfoLib: Add MpService dependency
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3190

Add MpService dependency to enforce the executability of CpuCacheInfoLib.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2021-02-03 07:41:46 +00:00
Marc Moisson-Franckhauser
618e6a1f21 ShellPkg/AcpiView: HMAT Parser
Bugzilla: 3045 (https://bugzilla.tianocore.org/show_bug.cgi?id=3045)

Add a new parser for the Heterogeneous Memory Attribute Table. The
parser also validates some fields for this table.

The HMAT table is used to describe the memory attributes such as memory
side cache attributes and bandwidth and latency details related to
memory proximity domains. The info in the HMAT table can be used by an
operating system for optimisation.

Signed-off-by: Marc Moisson-Franckhauser <marc.moisson-franckhauser@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2021-02-03 02:22:53 +00:00
gechao
839f649abb MdeModulePkg/TerminalDxe: Terminal fifo buffer overflow.
Fix the bug of terminal fifo buffer overflow with UINT8 type.

typedef struct {
  UINT8 Head;
  UINT8 Tail;
  UINT8 Data[RAW_FIFO_MAX_NUMBER + 1];
} RAW_DATA_FIFO;
RAW_FIFO_MAX_NUMBER is 256.
the data buffer size is 257 (Index from 0 to 256), but the max value of
the index, Head or Tail (UINT8), is 255. That means the last data of the
data buffer would be always empty if we use Head/Tail to output/input the
data correctly.  And because of the incorrect buffer size the FIFO full
check "((Tail + 1) % (RAW_FIFO_MAX_NUMBER + 1)) == Head" would never meet.

Signed-off-by: gechao <gechao@greatwall.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2021-02-03 01:56:42 +00:00
Aiden Park
3f90ac3ec0 MdeModulePkg/PciBusDxe: Fix a bug in ProcessOptionRomLight
The ProcessOptionRomLight() assumes that OpRom has already been
processed in the previous full enumeration and updates
AllOpRomProcessed flag to TRUE by default. However, this may not
be applicable with other pre-stage boot firmwares.

This will update AllOpRomProcessed flag properly by checking
PciRomGetImageMapping().

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-02 06:15:05 +00:00
Kun Qin
3b468095cd UefiCpuPkg: SmmCpuExceptionHandlerLib: Added StandaloneMm module support
This change of SmmCpuExceptionHandlerLib adds support for StandaloneMm
components to allow x64 StandaloneMm environment setting up exception
handlers.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-01 10:07:13 -08:00
Kun Qin
c2432b31ed UefiCpuPkg: CpuIo2Smm: Support of CpuIo driver under StandaloneMm
This change adds a new CpuIo driver instance for MM_STANDALONE type. The
new driver entrypoint is implemented in a separate file to match the
interface definition of MM_STANDALONE modules.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-01 10:04:42 -08:00
Kun Qin
1ea21af13d UefiCpuPkg: CpuIo2Smm: Abstract SMM specific functions into separate file
This change abstracts CpuIo2Smm driver entrypoint into separate file and
moves functions/definitions that are not substantially specific to
Traditional MM (SMM) into CpuIo2Mm.* in order to set ways for Standalone
MM support in the future.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-01 10:03:58 -08:00
Kun Qin
e414a3e936 UefiCpuPkg: CpuIo2Smm: Move CpuIo2Smm driver to consume gMmst
This change replaced gSmst with gMmst to support broader compatibility
under MM environment for CpuIo2Smm driver.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-01 10:03:36 -08:00
Kun Qin
7a56650e2e SecurityPkg: Tpm2DeviceLibDTpm: Introduce StandaloneMm instance
This change added a new instance of Tpm2DeviceLibDTpm to support drivers
of type MM_STANDALONE. It abstracts dynamic Pcd access into separate file
for different instances to avoid dynamic usage for StandaloneMm modules.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:03:35 -08:00
Kun Qin
44ac44a269 SecurityPkg: Tcg2PpVendorLibNull: Added support for MM_STANDALONE type
This change extends this null instance of Tcg2PpVendorLib to support
MM_STANDALONE drivers.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:03:35 -08:00
Kun Qin
4593925505 SecurityPkg: Tcg2PhysicalPresenceLib: Introduce StandaloneMm instance
This change added a new instance of Tcg2PhysicalPresenceLib to support
MM_STANDALONE type drivers. It centralizes the common routines into
shared files and abstract the library constructor into corresponding
files to implement each constructor function prototypes.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:03:35 -08:00
Kun Qin
79a951d199 PcAtChipsetPkg: AcpiTimerLib: Added StandaloneMm instance of AcpiTimerLib
This change added a new instance of AcpiTimerLib for StandaloneMm core
and drivers. It centralizes the common routines into shared files and
abstract the library constructor into corresponding files to accommodate
each constructor function prototypes.

Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-02-01 10:03:35 -08:00
Kun Qin
14a746bb6a MdePkg: UefiDevicePathLib: Support UefiDevicePathLib under StandaloneMm
This change added an instance of UefiDevicePathLib for StandaloneMm. It
abstracts DevicePathFromHandle function into different files for
Standalone MM and other instances to avoid linking gBS into MM_STANDALONE
drivers.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-01 10:03:35 -08:00
Kun Qin
1f0fa9187b MdeModulePkg: SmmSmiHandlerProfileLib: Support StandaloneMm Instance
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3185

This change added support of SMI handler profile library router under
StandaloneMm. This change replaces gSmst with gMmst. It also abstracts
standalone and traditional MM driver entrypoints into separate files to
allow maximal common implementations.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:03:14 -08:00
Kun Qin
b1e97194a0 MdeModulePkg: ReportStatusCodeRouter: Support StandaloneMm RSC Router
This change added support of RSC router under StandaloneMm. It replaces
SMM version ReportStatusCode protocol definitions with MM version. This
patch also switched to use gMmst instead of gSmst. Lastly, it abstracts
standalone and traditional MM driver entrypoints into separate files to
allow maximal common implementations.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:01:04 -08:00
Kun Qin
06201d580b MdeModulePkg: FirmwarePerformanceDataTable: Added StandaloneMm support
This change added support of FPDT driver under StandaloneMm. It replaces
SMM version ReportStatusCode protocol with MM version. This patch also
abstracts standalone and traditional MM interfaces into separate files to
support each corresponding function prototypes and implementations.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:01:04 -08:00
Kun Qin
8a09cdd7be MdeModulePkg: StatusCodeHandler: StatusCodeHandler driver in StandaloneMm
This change added support of StandaloneMm for StatusCodeHandler. It
adds a new instance of StatusCodeHandler of MM_STANDALONE type, and
abstracts the driver entrypoint into separate files, replaced gSmst with
gMmst, and switched to MM version of RscHandlerProtocol.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiewen Yao <jiewen.yao@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:01:03 -08:00
Kun Qin
5625c1fdf7 MdeModulePkg: SmmReportStatusCodeLib: ReportStatusCodeLib in StandaloneMm
This change added support of StandaloneMm for ReportStatusCodeLib. It
adds a new instance of ReportStatusCodeLib for MM_STANDALONE type, and
abstracts the references of gMmst and gSmst functionalities into separate
files in order to link in proper Service Table for SMM core/drivers.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiewen Yao <jiewen.yao@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:01:03 -08:00
Kun Qin
e35fce8ada MdeModulePkg: SmmLockBoxSmmLib: Support StandaloneMm for SmmLockBoxLib
This change added support of StandaloneMm for SmmLockBoxLib. It replaces
gSmst with gMmst to support both traditional MM and standalone MM. The
contructor and desctructor functions are abstracted to support different
function prototype definitions.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-02-01 10:01:03 -08:00
Kun Qin
037ccb09a2 StandaloneMmPkg: StandaloneMmMemLib: Extends support for X64 architecture
This change extends StandaloneMmMemLib library to support X64
architecture. The implementation is ported from MdePkg/Library/SmmMemLib.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:01:02 -08:00
Kun Qin
2b9006762d StandaloneMmPkg: StandaloneMmCoreMemoryAllocationLib: Fix compiler warning
Assigning MmramRangeCount from MmCorePrivate (UINT64) to local variable
MmramRangeCount (UINT32) will cause compilation failure due to "warning
C4244: '=': conversion from 'UINT64' to 'UINT32', possible loss of data".
This changes defines local MmramRangeCount as UINTN type and adds type
cast before value assignment.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:01:02 -08:00
Kun Qin
f6c488b704 StandaloneMmPkg: StandaloneMmCoreHobLib: Extend support for x64 Mm Core
This change adds support of x64 version of StandaloneMmCoreHobLib. It
brings in global variable "gHobList" through StandaloneMmCoreEntryPoint,
imports implementation from DxeCoreHobLib.inf to support x64 Mm Core and
moved shared functional plementations into a common file.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:01:02 -08:00
Kun Qin
76ae542313 StandaloneMmPkg: StandaloneMmCoreEntryPoint: Extends support for X64
This change extends StandaloneMmCoreEntryPoint library to support X64
architecture.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-02-01 10:01:02 -08:00
Kun Qin
4bae4f02f3 BaseTools: Ecc/exception: Added _ModuleEntryPoint into exception list
Function '_ModuleEntryPoint' is a pre-defined interface for various EFI
module types and should not be caught violating EFI coding style. This
change added '_ModuleEntryPoint' into exception list to fix EFI coding
style error 8006 during CI build.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2021-02-01 10:01:02 -08:00
Michael Kubacki
ea56ebf67d MdePkg/SmiHandlerProfileLibNull: Add MM_STANDALONE support
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3184

Allows the library instance to be linked with MM_STANDALONE modules.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-02-01 01:40:38 +00:00
Ray Ni
c6be6dab9c UefiCpuPkg/MpInitLib: Don't increase CpuCount in ApWakeupFunction
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3179

When BSP first time wakes all APs, each AP atomically increases
CpuMpData->CpuCount and CpuMpData->FinishedCount.

Each AP atomically increases CpuMpData->NumApsExecuting
in early assembly code and decreases it before it enters to HLT or
MWAIT state.

Putting them together, the 3 variables are changed in the following order:
1. NumApsExecuting++ // in assembly
2. CpuCpunt++
4. FinishedCount++
3. NumApsExecuting-- // in C

BSP waits for a certain timeout and then polls NumApsExecuting
until it drops to zero. It assumes all APs are waken up concurrently
and NumApsExecuting only drops to zero when all APs have checked in.

Then it additionally waits for FinishedCount == CpuCount - 1. (FinishedCount doesn't include BSP while CpuCount includes BSP.)

There is no need to additionally wait for
FinishedCount == CpuCount - 1 because when NumApsExecuting == 0,
the number of increament of FinishedCount and CpuCount should equal.

This patch simplifies the code to remove "CpuCount++" in
ApWakeupFunction() and
assigns FinishedCount + 1 to CpuCount after WakeUpAP().

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2021-01-29 03:09:35 +00:00
Lou, Yun
2d6fc9d36f MdePkg/Cpuid.h: Change and add some macro definitions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3105

Change and add some macro definitions about
CPUID_HYBRID_INFORMATION Leaf(1Ah).

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2021-01-26 04:14:10 +00:00
Michael D Kinney
1c5c7bcd1d UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3182

Fix the order of operations in ApWakeupFunction() when PcdCpuApLoopMode
is set to HLT mode that uses INIT-SIPI-SIPI to wake APs.  In this mode,
volatile state is restored and saved each time a INIT-SIPI-SIPI is sent
to an AP to request a function to be executed on the AP.  When the
function is completed the volatile state of the AP is saved.  However,
the counters NumApsExecuting and FinishedCount are updated before
the volatile state is saved.  This allows for a race condition window
for the BSP that is waiting on these counters to request a new
INIT-SIPI-SIPI before all the APs have completely saved their volatile
state.  The fix is to save the AP volatile state before updating the
NumApsExecuting and FinishedCount counters.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-26 03:18:40 +00:00
Tom Lendacky
3a3501862f OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Use physical address with SEV-ES
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3183

Under SEV-ES, a write to the flash device is done using a direct VMGEXIT
to perform an MMIO write. The address provided to the MMIO write must be
the physical address of the MMIO write destitnation. During boot, OVMF
runs with an identity mapped pagetable structure so that VA == PA and the
VMGEXIT MMIO write destination is just the virtual address of the flash
area address being written.

However, when the UEFI SetVirtualAddressMap() API is invoked, an identity
mapped pagetable structure may not be in place and using the virtual
address for the flash area address is no longer valid. This results in
writes to the flash not being performed successfully. This can be seen
by attempting to change the boot order under Linux. The update will
appear to be performed, based on the output of the command. But rebooting
the guest will show that the new boot order has not been set.

To remedy this, save the value of the flash base physical address before
converting the address as part of SetVirtualAddressMap(). The physical
address can then be calculated by obtaining the offset of the MMIO target
virtual address relative to the flash base virtual address and adding that
to the original flash base physical address. The resulting value produces
a successful MMIO write during runtime services.

Fixes: 437eb3f7a8
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <84a5f9161541db5aa3b57c96b737afbcb4b6189d.1611410263.git.thomas.lendacky@amd.com>
[lersek@redhat.com: SetVitualAddressMap() -> SetVirtualAddressMap() typo
 fix, in both the commit message and the code comment]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-26 00:25:16 +00:00
Nhi Pham
96a9acfc52 MdePkg/Tpm2Acpi.h: Add Start Method Specific Parameters for ARM SMC
Add Start Method Specific Parameters for ARM SMC Start Method described
in the TCG ACPI Specification version 1.2, revision 8.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-25 02:21:32 +00:00
Ray Ni
3b769c5110 UefiCpuPkg/CpuMp: Fix hang when StackGuard is enabled in 16-core cpu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3167

When StackGuard is enabled, the CpuMp driver allocates
known good stacks for all CPUs for DF# and PF# exceptions.
It uses AllocatePool to do so.

The size needed equals to 64KB
= StackSize (2K) * ExceptionNumber (2) * NumberOfProcessors (16)

However, AllocatePool max allocation size is less than 64K.
To fix the issue, AllocatePages() is used.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2021-01-22 03:23:53 +00:00
Zeng, Star
6c5801be6e UefiCpuPkg RegisterCpuFeaturesLib: NumberOfCpus may be uninitialized
NumberOfCpus local variable in GetAcpiCpuData will be uninitialized
when CpuS3DataDxe runs before DxeRegisterCpuFeaturesLib (linked by
CpuFeaturesDxe) because there is no code to initialize it at
(AcpiCpuData != NULL) execution path.

The issue is exposed after cefad282fb
and 38ee7bafa7.
There was negligence in that code review.
One further topic may be "Could EDK2 CI be enhanced to catch this kind
of uninitialized local variable case?". :)

This patch fixes this regression issue.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Star Zeng <star.zeng@intel.com>
Message-Id: <20210121093944.1621-1-star.zeng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-21 14:30:06 +00:00
Bob Feng
45962a05da BaseTools: Add unittest for Split tool
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3165

This patch is to add the unit test for Split python tool

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2021-01-21 11:05:43 +00:00
Bob Feng
5b4a97bbc3 BaseTools: Convert Split tool to python
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3165

There are 2 reasons to convert Split tool from C to Python.
1. We are in the process of moving the Basetools Python code
to a separate repository. But there still are many C tools under
edk2/BaseTools. To make all Basetools be in the separate repo,
we can convert the C tools to Python tools.
2. The original Split tool is very slow. This python tool can reduce
90% time.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2021-01-21 10:19:09 +00:00
Laszlo Ersek
339371ef78 OvmfPkg/CpuS3DataDxe: do not allocate useless register tables
CpuS3DataDxe allocates the "RegisterTable" and "PreSmmInitRegisterTable"
arrays in ACPI_CPU_DATA just so every processor in the system can have its
own empty register table, matched by APIC ID. This has never been useful
in practice.

Given commit e992cc3f48 ("UefiCpuPkg PiSmmCpuDxeSmm: Reduce SMRAM
consumption in CpuS3.c", 2021-01-11), simply leave both
"AcpiCpuData->RegisterTable" and "AcpiCpuData->PreSmmInitRegisterTable"
initialized to the zero address. This simplifies the driver, and saves
both normal RAM (boot services data type memory) and -- in PiSmmCpuDxeSmm
-- SMRAM.

(This simplification backs out a good chunk of commit 1158fc8e2c
("OvmfPkg/CpuS3DataDxe: enable S3 resume after CPU hotplug", 2020-03-04).
But CpuS3DataDxe still differs between UefiCpuPkg and OvmfPkg, due to the
latter supporting CPU hotplug; thus, we can't remove OvmfPkg/CpuS3DataDxe
altogether.)

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3159
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Message-Id: <20210119155440.2262-5-lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-01-20 18:20:14 +00:00
Laszlo Ersek
38ee7bafa7 UefiCpuPkg/CpuS3DataDxe: do not allocate useless register tables
CpuS3DataDxe allocates the "RegisterTable" and "PreSmmInitRegisterTable"
arrays in ACPI_CPU_DATA just so every processor in the system can have its
own empty register table, matched by APIC ID. This has never been useful
in practice.

Given commit e992cc3f48 ("UefiCpuPkg PiSmmCpuDxeSmm: Reduce SMRAM
consumption in CpuS3.c", 2021-01-11), simply leave both
"AcpiCpuData->RegisterTable" and "AcpiCpuData->PreSmmInitRegisterTable"
initialized to the zero address. This simplifies the driver, and saves
both normal RAM (boot services data type memory) and -- in PiSmmCpuDxeSmm
-- SMRAM.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3159
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Message-Id: <20210119155440.2262-4-lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-01-20 18:20:14 +00:00
Laszlo Ersek
1487c13ce0 UefiCpuPkg/AcpiCpuData: update comments on register table fields
After commit e992cc3f48 ("UefiCpuPkg PiSmmCpuDxeSmm: Reduce SMRAM
consumption in CpuS3.c", 2021-01-11), it is valid for a CPU S3 Data DXE
Driver to set "ACPI_CPU_DATA.PreSmmInitRegisterTable" and/or
"ACPI_CPU_DATA.RegisterTable" to 0, in case none of the CPUs needs a
register table of the corresponding kind, during S3 resume.

Document this fact in the "UefiCpuPkg/Include/AcpiCpuData.h" header file.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3159
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210119155440.2262-3-lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-01-20 18:20:14 +00:00
Ray Ni
cefad282fb UefiCpuPkg/CpuFeature: Don't assume CpuS3DataDxe alloc RegisterTable
There are lots of fields in ACPI_CPU_DATA structure while only
followings are accessed by CpuFeature infra:
* NumberOfCpus
* PreSmmInitRegisterTable // pointer
* RegisterTable  // pointer
* CpuStatus
* ApLocation  // pointer

So it's possible that an implementation of CpuS3DataDxe doesn't
allocate memory for PreSmmInitRegisterTable/RegisterTable/ApLocation.

This patch handles the case when CpuS3DataDxe doesn't allocate
memory for PreSmmInitRegisterTable/RegisterTable.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3159
Signed-off-by: Ray Ni <ray.ni@intel.com>
[lersek@redhat.com: update CC list, add BZ reference, add my S-o-b]
[lersek@redhat.com: deal with RegisterTable and PreSmmInitRegisterTable
 being zero independently of each other; replacing the ASSERT()]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210119155440.2262-2-lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-01-20 18:20:14 +00:00
Jiahui Cen via groups.io
e843a21e23 ArmVirtPkg/ArmVirtQemu: Add support for HotPlug
It is necessary to add padding for hotplugable PCI Devices like
pcie-root-port.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-12-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
c4cbd86493 ArmVirtPkg/FdtPciHostBridgeLib: Add extra pci root buses support
In order to take advantages of extra pci root buses in ArmVirtPkg, it is
necessary to scan extra root buses when getting root briges. And now
PciHostBridgeUtilityLib already provides a set of utility functions that
support for extra pci root buses, like PciHostBridgeUtilityGetRootBridges()
/ PciHostBridgeUtilityFreeRootBridges(). So let's rebase
ArmVirtPkg/FdtPciHostBridgeLib to PciHostBridgeUtilityGetRootBridges() /
PciHostBridgeUtilityFreeRootBridges() to extend ArmVirtPkg with extra
pci root buses support.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-11-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
f4a257a355 OvmfPkg/PciHostBridgeUtilityLib: Extend GetRootBridges() with BusMin/BusMax
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with BusMin/
BusMax, so that the utility function could be compatible with ArmVirtPkg
who uses mutable bus range [BusMin, BusMax] insteand of [0, PCI_MAX_BUS].

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210119011302.10908-10-cenjiahui@huawei.com>
[lersek@redhat.com: fix logging of UINTN values BusMin, BusMax]
[lersek@redhat.com: keep zeroing of (*Count) centralized]
[lersek@redhat.com: fix typos in ExtraRootBridges comment]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
14d4b6be56 OvmfPkg/PciHostBridgeUtilityLib: Extend parameter list of GetRootBridges
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with
DmaAbove4G, NoExtendedConfigSpace to support for ArmVirtPkg.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-9-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
4edba29651 OvmfPkg/PciHostBridgeLib: Extract GetRootBridges() / FreeRootBridges()
Extract PciHostBridgeGetRootBridges() / PciHostBridgeFreeRootBridges() to
PciHostBridgeUtilityLib as common utility functions to share support for
scanning extra root bridges.

No change of functionality.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-8-cenjiahui@huawei.com>
[lersek@redhat.com: keep zeroing of (*Count) centralized]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
aa445ce02b ArmVirtPkg/FdtPciHostBridgeLib: Refactor init/uninit of root bridge
Rebase ArmVirtPkg/FdtPciHostBridgeLib to the new
PciHostBridgeUtilityInitRootBridge()/PciHostBridgeUtilityUninitRootBridge()
utility functions.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-7-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
e1b259da42 OvmfPkg/PciHostBridgeUtilityLib: Extend parameters of InitRootBridge()
Extend parameter list of PciHostBridgeUtilityInitRootBridge() with
DmaAbove4G and NoExtendedConfigSpace to prepare for sharing with
ArmVirtPkg.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-6-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
7ac1f28d4d OvmfPkg/PciHostBridgeLib: Extract InitRootBridge() / UninitRootBridge()
Extract InitRootBridge() / UninitRootBridge() to PciHostBridgeUtilityLib
as common utility functions. No change of functionality.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Message-Id: <20210119011302.10908-5-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
517055d298 OvmfPkg/PciHostBridgeLib: List missing PcdLib dependency
OvmfPkg/PciHostBridgeLib instance fails to list its PcdLib dependency,
both between the #include directives, and in the INF file. So let's list
the dependency.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210119011302.10908-4-cenjiahui@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
166a32d09a ArmVirtPkg: Refactor with PciHostBridgeUtilityLib
Eliminate currently duplicated code in ArmVirtPkg with the common utility
class PciHostBridgeUtilityLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210119011302.10908-3-cenjiahui@huawei.com>
2021-01-20 16:14:20 +00:00
Jiahui Cen via groups.io
7a6172f88b OvmfPkg: Introduce PciHostBridgeUtilityLib class
Introduce a new PciHostBridgeUtilityLib class to share duplicate code
between OvmfPkg and ArmVirtPkg.

Extract function PciHostBridgeUtilityResourceConflict from
PciHostBridgeResourceConflict in OvmfPkg/PciHostBridgeLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Signed-off-by: Yubo Miao <miaoyubo@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210119011302.10908-2-cenjiahui@huawei.com>
2021-01-20 16:14:20 +00:00
GregX Yeh
ca272b9513 DxeHttpIoLib: Http boot failure with no initializes timeout value.
https://bugzilla.tianocore.org/show_bug.cgi?id=3170
Using PcdHttpIoTimeout to set default timeout value to HttpIoLib.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: GregX Yeh <gregx.yeh@intel.com>
Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-01-20 12:33:38 +00:00
Laszlo Ersek
6e55868631 ArmVirtPkg: disable list length checks in NOOPT and DEBUG builds
In NOOPT and DEBUG builds, if "PcdMaximumLinkedListLength" is nonzero,
then several LIST_ENTRY *node* APIs in BaseLib compare the *full* list
length against the PCD.

This turns the time complexity of node-level APIs from constant to linear,
and that of full-list manipulations from linear to quadratic.

(See some example OVMF numbers in the previous patch.)

Checking list lengths against an arbitrary maximum -- default value, and
current ArmVirtPkg setting: 1,000,000 -- seems useless even in NOOPT and
DEBUG builds, while the cost is significant; so set the PCD to 0.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3152
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Message-Id: <20210113085453.10168-11-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
d3f3c94201 OvmfPkg: disable list length checks in NOOPT and DEBUG builds
In NOOPT and DEBUG builds, if "PcdMaximumLinkedListLength" is nonzero,
then several LIST_ENTRY *node* APIs in BaseLib compare the *full* list
length against the PCD.

This turns the time complexity of node-level APIs from constant to linear,
and that of full-list manipulations from linear to quadratic.

As an example, consider the EFI_SHELL_FILE_INFO list, which is a data
structure that's widely used in the UEFI shell. I randomly extracted 5000
files from "/usr/include" on my laptop, spanning 1095 subdirectories out
of 1538, and then ran "DIR -R" in the UEFI shell on this tree. These are
the wall-clock times:

           PcdMaximumLinkedListLength  PcdMaximumLinkedListLength
           =1,000,000                  =0
           --------------------------  ---------------------------
FAT        4 min 31 s                        18 s
virtio-fs  5 min 13 s                  1 min 33 s

Checking list lengths against an arbitrary maximum (default: 1,000,000)
seems useless even in NOOPT and DEBUG builds, while the cost is
significant; so set the PCD to 0.

Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3152
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Message-Id: <20210113085453.10168-10-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
c8ce60eb29 ShellPkg/ShellProtocol: sort files by FullName in RemoveDupInFileList()
The current implementation of EfiShellRemoveDupInFileList():
- has quadratic time complexity, as a disadvantage, and
- needs no dynamic memory, as an advantage.

Because the UEFI Shell Spec requires
EFI_SHELL_PROTOCOL.RemoveDupInFileList() to succeed at all times, keep the
current method as a fallback (it cannot fail due to needing no dynamic
memory).

However, as a higher priority option, call the new ShellSortFileList()
function at first, separating out and releasing duplicates.
(ShellSortFileList() can fail due to EFI_OUT_OF_RESOURCES.)

Beyond improving the runtime of EfiShellRemoveDupInFileList(), this change
has the extremely desirable effect that the ShellOpenFileMetaArg()
function in the ShellPkg/Library/UefiShellLib instance will produce file
lists that are sorted by FullName.

Consequently, when used with wildcards, the ATTRIB, CP, FOR, LOAD,
LOADPCIROM, LS, MV, RM, TOUCH, TYPE commands will process files in
FullName order. (LS in recursive mode uses wildcards internally.)

Before:

> FS2:\> dir -r -sfo apps
> [...]
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\X64"
> FileInfo,"FS2:\apps\AARCH64"
> FileInfo,"FS2:\"
> FileInfo,"FS2:\apps\IA32"
> FileInfo,"FS2:\apps\X64\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\X64\SmiHandlerProfileInfo.efi"
> FileInfo,"FS2:\apps\X64\"
> FileInfo,"FS2:\apps\X64\VariableInfo.efi"
> FileInfo,"FS2:\apps\X64\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\X64\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\X64\Cpuid.efi"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\AARCH64\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\AARCH64\"
> FileInfo,"FS2:\apps\AARCH64\VariableInfo.efi"
> FileInfo,"FS2:\apps\AARCH64\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\AARCH64\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\IA32\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\IA32\SmiHandlerProfileInfo.efi"
> FileInfo,"FS2:\apps\IA32\"
> FileInfo,"FS2:\apps\IA32\VariableInfo.efi"
> FileInfo,"FS2:\apps\IA32\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\IA32\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\IA32\Cpuid.efi"
> FileInfo,"FS2:\apps\"

After:

> FS2:\> dir -r -sfo apps
> [...]
> FileInfo,"FS2:\"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\AARCH64"
> FileInfo,"FS2:\apps\IA32"
> FileInfo,"FS2:\apps\X64"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\AARCH64\"
> FileInfo,"FS2:\apps\AARCH64\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\AARCH64\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\AARCH64\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\AARCH64\VariableInfo.efi"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\IA32\"
> FileInfo,"FS2:\apps\IA32\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\IA32\Cpuid.efi"
> FileInfo,"FS2:\apps\IA32\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\IA32\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\IA32\SmiHandlerProfileInfo.efi"
> FileInfo,"FS2:\apps\IA32\VariableInfo.efi"
> FileInfo,"FS2:\apps\"
> FileInfo,"FS2:\apps\X64\"
> FileInfo,"FS2:\apps\X64\AcpiViewApp.efi"
> FileInfo,"FS2:\apps\X64\Cpuid.efi"
> FileInfo,"FS2:\apps\X64\DumpDynPcd.efi"
> FileInfo,"FS2:\apps\X64\MemoryProfileInfo.efi"
> FileInfo,"FS2:\apps\X64\SmiHandlerProfileInfo.efi"
> FileInfo,"FS2:\apps\X64\VariableInfo.efi"

Regarding LS in non-SFO mode, the stability of ShellSortFileList() shows.
The ShellSortFileList() call added to LS in the previous patch re-sorts
the output of ShellOpenFileMetaArg(); and so this patch improves the
ordering between identical FileNames:

Before:

> FS2:\> dir -r apps
> Directory of: FS2:\apps\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53 <DIR>         4,096  AARCH64
> 12/22/2020  17:53 <DIR>         4,096  IA32
> 12/22/2020  17:53 <DIR>         4,096  X64
>           0 File(s)           0 bytes
>           5 Dir(s)
> Directory of: FS2:\apps\X64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
>           6 File(s)     256,192 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\AARCH64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
>           4 File(s)     233,472 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\IA32\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
>           6 File(s)     224,768 bytes
>           2 Dir(s)
>
> FS2:\> dir apps\*\*.efi
> Directory of: FS2:\apps\*\
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
>          16 File(s)     714,432 bytes
>           0 Dir(s)

After:

> FS2:\> dir -r apps
> Directory of: FS2:\apps\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53 <DIR>         4,096  AARCH64
> 12/22/2020  17:53 <DIR>         4,096  IA32
> 12/22/2020  17:53 <DIR>         4,096  X64
>           0 File(s)           0 bytes
>           5 Dir(s)
> Directory of: FS2:\apps\AARCH64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
>           4 File(s)     233,472 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\IA32\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
>           6 File(s)     224,768 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\X64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
>           6 File(s)     256,192 bytes
>           2 Dir(s)
>
> FS2:\> dir apps\*\*.efi
> Directory of: FS2:\apps\*\
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
>          16 File(s)     714,432 bytes
>           0 Dir(s)

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20210113085453.10168-9-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
70254306a8 ShellPkg/Ls: sort output by FileName in non-SFO mode
Sorting the LS output in non-SFO mode by FileName is best demonstrated
with two examples.

(1a) Before:

> FS2:\> dir -r apps
> Directory of: FS2:\apps\
> 01/01/1970  01:00 <DIR> r           0  .
> 12/22/2020  17:53 <DIR>         4,096  X64
> 12/22/2020  17:53 <DIR>         4,096  AARCH64
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53 <DIR>         4,096  IA32
>           0 File(s)           0 bytes
>           5 Dir(s)
> Directory of: FS2:\apps\X64\
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 01/01/1970  01:00 <DIR> r           0  .
> 12/22/2020  17:52              11,456  VariableInfo.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 01/01/1970  01:00 <DIR> r           0  ..
>           6 File(s)     256,192 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\AARCH64\
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 01/01/1970  01:00 <DIR> r           0  .
> 12/22/2020  17:52              20,480  VariableInfo.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 01/01/1970  01:00 <DIR> r           0  ..
>           4 File(s)     233,472 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\IA32\
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 01/01/1970  01:00 <DIR> r           0  .
> 12/22/2020  17:52              10,880  VariableInfo.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 01/01/1970  01:00 <DIR> r           0  ..
>           6 File(s)     224,768 bytes
>           2 Dir(s)

(1b) After:

> FS2:\> dir -r apps
> Directory of: FS2:\apps\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53 <DIR>         4,096  AARCH64
> 12/22/2020  17:53 <DIR>         4,096  IA32
> 12/22/2020  17:53 <DIR>         4,096  X64
>           0 File(s)           0 bytes
>           5 Dir(s)
> Directory of: FS2:\apps\X64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
>           6 File(s)     256,192 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\AARCH64\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
>           4 File(s)     233,472 bytes
>           2 Dir(s)
> Directory of: FS2:\apps\IA32\
> 01/01/1970  01:00 <DIR> r           0  .
> 01/01/1970  01:00 <DIR> r           0  ..
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
>           6 File(s)     224,768 bytes
>           2 Dir(s)

(2a) Before:

> FS2:\> dir apps\*\*.efi
> Directory of: FS2:\apps\*\
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
>          16 File(s)     714,432 bytes
>           0 Dir(s)

(2b) After:

> FS2:\> dir apps\*\*.efi
> Directory of: FS2:\apps\*\
> 12/22/2020  17:53             126,656  AcpiViewApp.efi
> 12/22/2020  17:53             139,264  AcpiViewApp.efi
> 12/22/2020  17:53             105,536  AcpiViewApp.efi
> 12/22/2020  17:53              38,784  Cpuid.efi
> 12/22/2020  17:53              36,096  Cpuid.efi
> 12/22/2020  17:52              18,752  DumpDynPcd.efi
> 12/22/2020  17:52              32,768  DumpDynPcd.efi
> 12/22/2020  17:52              17,344  DumpDynPcd.efi
> 12/22/2020  17:52              26,304  MemoryProfileInfo.efi
> 12/22/2020  17:52              40,960  MemoryProfileInfo.efi
> 12/22/2020  17:52              24,192  MemoryProfileInfo.efi
> 12/22/2020  17:52              34,240  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              30,720  SmiHandlerProfileInfo.efi
> 12/22/2020  17:52              11,456  VariableInfo.efi
> 12/22/2020  17:52              20,480  VariableInfo.efi
> 12/22/2020  17:52              10,880  VariableInfo.efi
>          16 File(s)     714,432 bytes
>           0 Dir(s)

(In example (2), note that the sorting is stable; that is, whatever order
is established between identical FileNames by ShellOpenFileMetaArg(), it
is preserved by ShellSortFileList().)

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20210113085453.10168-8-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
101c55ac0d ShellPkg/ShellCommandLib: add ShellSortFileList()
Introduce the ShellSortFileList() function, for sorting an
EFI_SHELL_FILE_INFO list, by FileName or by FullName.

Duplicates can be kept in the same list, or separated out to a new list.
In either case, the relative order between duplicates does not change (the
sorting is stable).

For the sorting, use OrderedCollectionLib rather than SortLib:

- The PerformQuickSort() function from the latter has quadratic worst-case
  time complexity, plus it is implemented recursively (see
  "MdeModulePkg/Library/UefiSortLib/UefiSortLib.c"). It can also not
  return an error on memory allocation failure.

- In comparison, the Red-Black Tree instance of OrderedCollectionLib sorts
  in O(n*log(n)) worst-case time, contains no recursion with the default
  PcdValidateOrderedCollection=FALSE setting, and the OrderedCollectionLib
  class APIs return errors appropriately.

The OrderedCollectionLib APIs do not permit duplicates natively, but by
using lists as collection entries, stable sorting of duplicates can be
achieved.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20210113085453.10168-7-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
ef03e72651 UefiPayloadPkg: add OrderedCollectionLib class resolution
A subsequent patch in the series will make the

  ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf

instance dependent on the OrderedCollectionLib class. Because the shell
binary in this platform consumes the above UefiShellCommandLib instance,
resolve OrderedCollectionLib.

Cc: Benjamin You <benjamin.you@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210113085453.10168-6-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
130e929f98 EmulatorPkg: add OrderedCollectionLib class resolution
A subsequent patch in the series will make the

  ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf

instance dependent on the OrderedCollectionLib class. Because the shell
binary in this platform consumes the above UefiShellCommandLib instance,
resolve OrderedCollectionLib.

Cc: Andrew Fish <afish@apple.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210113085453.10168-5-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
a0b352e18b ArmVirtPkg: raise PcdShellFileOperationSize to 128KB
Some UEFI shell commands read and write files in chunks. The chunk size is
given by "PcdShellFileOperationSize", whose default in
"ShellPkg/ShellPkg.dec" is 4KB (0x1000).

The virtio-fs daemon of QEMU advertizes a 128KB maximum buffer size by
default, for the FUSE_WRITE operation.

By raising PcdShellFileOperationSize 32-fold, the number of FUSE write
requests shrinks proportionately, when writing large files. And when a
Virtio Filesystem is not used, a 128KB chunk size is still not
particularly wasteful.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3125
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Message-Id: <20210113085453.10168-4-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
2912341cd9 OvmfPkg: raise PcdShellFileOperationSize to 128KB
Some UEFI shell commands read and write files in chunks. The chunk size is
given by "PcdShellFileOperationSize", whose default in
"ShellPkg/ShellPkg.dec" is 4KB (0x1000).

The virtio-fs daemon of QEMU advertizes a 128KB maximum buffer size by
default, for the FUSE_WRITE operation.

By raising PcdShellFileOperationSize 32-fold, the number of FUSE write
requests shrinks proportionately, when writing large files. And when a
Virtio Filesystem is not used, a 128KB chunk size is still not
particularly wasteful.

Some ad-hoc measurements on my laptop, using OVMF:

- The time it takes to copy a ~270MB file from a Virtio Filesystem to the
  same Virtio Filesystem improves from ~9 seconds to ~1 second.

- The time it takes to compare two identical ~270MB files on the same
  Virtio Filesystem improves from ~11 seconds to ~3 seconds.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3125
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Message-Id: <20210113085453.10168-3-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Laszlo Ersek
f72fd9616e ShellPkg/Comp: add file buffering
The COMP shell command compares two files byte for byte. In order to
retrieve the bytes to compare, it currently invokes
gEfiShellProtocol->ReadFile() on both files, using a single-byte buffer
every time. This is very inefficient; the underlying
EFI_FILE_PROTOCOL.Read() function may be costly.

Read both file operands in chunks of "PcdShellFileOperationSize" bytes.
Draw bytes for comparison from the internal read-ahead buffers.

Some ad-hoc measurements on my laptop, using OVMF, and the 4KB default of
"PcdShellFileOperationSize":

- When comparing two identical 1MB files that are served by EnhancedFatDxe
  on top of VirtioScsiDxe, this patch brings no noticeable improvement;
  the comparison completes in <1s both before and after.

- When comparing two identical 1MB files served by VirtioFsDxe, the
  comparison time improves from 2 minutes 25 seconds to <1s.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3123
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20210113085453.10168-2-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2021-01-19 18:23:28 +00:00
Igor Druzhinin
e68c2a22ca OvmfPkg/XenPlatformPei: Use CPUID to get physical address width on Xen
We faced a problem with passing through a PCI device with 64GB BAR to UEFI
guest. The BAR is expectedly programmed into 64-bit PCI aperture at 64G
address which pushes physical address space to 37 bits. That is above
36-bit width that OVMF exposes currently to a guest without tweaking
PcdPciMmio64Size knob.

The reverse calculation using this knob was inhereted from QEMU-KVM
platform code where it serves the purpose of finding max accessible
physical address without necessary trusting emulated CPUID physbits value
(that could be different from host physbits). On Xen we expect to use
CPUID policy to level the data correctly to prevent situations with guest
physbits > host physbits e.g. across migrations.

The next aspect raising concern - resource consumption for DXE IPL page
tables and time required to map the whole address space in case of using
CPUID bits directly. That could be mitigated by enabling support for 1G
pages in DXE IPL configuration. 1G pages are available on most CPUs
produced in the last 10 years and those without don't have many phys bits.

Remove all the redundant code now (including PcdPciMmio64.. handling
that's not used on Xen anyway) and grab physbits directly from CPUID that
should be what baremetal UEFI systems do.

Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Message-Id: <1610509335-23314-1-git-send-email-igor.druzhinin@citrix.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
[lersek@redhat.com: fix up authorship from groups.io-mangled From line]
[lersek@redhat.com: wrap commit message at 74 characters]
2021-01-19 17:00:08 +00:00
Lou, Yun
83facfd184 UefiCpuPkg/CpuCacheInfoLib: Add new CpuCacheInfoLib.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3105

This new library uses a platform agnostic algorithm to get CPU
cache information. It provides user with an API(GetCpuCacheInfo)
to get detailed CPU cache information by each package, each core
type included in this package, and each cache level & type.
This library can be used by code that produces SMBIOS_TABLE_TYPE7
SMBIOS table.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2021-01-19 14:03:04 +00:00
Jason Lou
79f3404ad8 MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION Leaf(1Ah).
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3105

The UefiCpuPkg/CpuCacheInfoLib will reference new definition
about CPUID_HYBRID_INFORMATION Leaf(1Ah).

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-19 14:03:04 +00:00
Ard Biesheuvel
4f214830ce ArmPlatformPkg/NorFlashDxe: use correct PCD accessors
Commit 8015f3f6d4 ("ArmPlatformPkg: Enable support for flash in
64-bit address space") updated the NorFlash DXE and StMM drivers to
take alternate PCDs into account when discovering the base of the
NOR flash regions.

This introduced a disparity between the declarations of the PCD references
in the .INF files, which permits the use of dynamic PCDs, and the code
itself, which now uses FixedPcdGet() accessors. On platforms that actually
use dynamic PCDs, this results in a build error.

So let's clean this up:
- for the DXE version, use the generic PcdGet() accessors, so dynamic PCDs
  are permitted
- for the standalone MM version, redeclare the PCDs as [FixedPcd] in the
  .INF description, and switch to the FixedPcdGet() accessors.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2021-01-18 11:19:45 +00:00
Ard Biesheuvel
7dc277f9e4 Maintainers: update Ard's email address
I will no longer work for ARM as of next month, and will therefore
lose access to my @arm.com email account. I intend to remain active
in the Tianocore project nonetheless, so let's update my email accounts
to one that is not tied to my current or future employer.

Cc: <ardb+tianocore@kernel.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Acked-by: Sami Mujawar <sami.mujawar@arm.com>
2021-01-18 09:40:29 +00:00
Zarcd Zhong
a7ef2a03b9 MdeModulePkg/PciBusDxe: Handle BAR sizing fail in high 32bit of MEM64.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3149

Address MEM64 BAR in type unknown if sizing fail in high 32bit.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Zarcd Zhong <zarcd.zhong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-18 01:38:29 +00:00
Abner Chang
c88736f860 EmulatorPkg/library: RedfishPlatformCredentialLib
Platform specific implementation of acquiring credential
to access to Redfish service. This is the platform library
which incorporates with Redfish Credential DXE driver under
Redfish package.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2021-01-16 03:35:31 +00:00
wenyi,xie via groups.io
014b9850f2 MdeModulePkg/FileExplorerLib: Add return value check
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3113
According to FAT specification, the length of file path
should not larger than 260. When the length exceed 260,
function FatLocateOFile will return EFI_INVALID_PARAMETER
and the parameter FileHandle will be NULL. Then on the
top-level function?an exception happens when the NULL
pointer is passed and be used.
So adding return value check after calling
LibGetFileHandleFromMenu, if return value is not success,
stop calling LibFindFiles.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2021-01-15 01:08:45 +00:00
Abner Chang
40c4cd5421 NetworkPkg/DxeHttpLib: Migrate HTTP header manipulation APIs
Move HTTP header manipulation functions to DxeHttpLib from
HttpBootSupport.c. These general functions are used by both
Http BOOT and RedfishLib (patches will be sent later).

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-01-14 14:54:12 +00:00
Bob Feng
536a3e6726 BaseTools: Fix the build report crash issue
In the following corner case, the build report
will crash. This patch is to fix this problem.

Case:
Multiple SKU are used and 2 more DynamicHii structure Pcds
are set in dsc file under different SKU. And 1 more of those
Pcds are not used in any INF file.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
2021-01-14 04:12:09 +00:00
Luo, Heng
da45a36087 MdeModulePkg: Update UNI file for PCIe Resizable BAR Capability
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3138

PcdPcieResizableBarSupport was added in MdeModulePkg.dec, update
UNI file as the documentation of the PCD.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-14 01:34:16 +00:00
Luo, Heng
ef23012e54 MdeModulePkg: Change default value of PcdPcieResizableBarSupport to FALSE
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3138

Change default value of PcdPcieResizableBarSupport to FALSE, avoid it
impacts existing platforms.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-14 01:34:16 +00:00
Guo Dong
ebfe2d3eb5 UefiCpuPkg/CpuDxe: Fix boot error
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3084

When DXE drivers are dispatched above 4GB memory in 64bit
mode, the address setCodeSelectorLongJump in stack will
be override by parameter. Jump to Qword is not supported
by some processors. So use "o64 retf" instead.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Tested-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-12 06:35:30 +00:00
Guo Dong
edd74ad3ad UefiCpuPkg/MpInitLib: Fix a hang in above 4GB case
This patch fixed the hang in UEFICpuPkg when it is dispatched above 4GB.
In UEFI BIOS case CpuInfoInHob is provided to DXE under 4GB from PEI.
When using UEFI payload and bootloaders, CpuInfoInHob will be allocated
above 4GB since it is not provided from bootloader. so we need update
the code to make sure this hob could be accessed correctly in this case.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-12 06:35:30 +00:00
Zeng, Star
e992cc3f48 UefiCpuPkg PiSmmCpuDxeSmm: Reduce SMRAM consumption in CpuS3.c
This patch makes two refinements to reduce SMRAM consumption in CpuS3.c.
1. Only do CopyRegisterTable() when register table is not empty,
  IsRegisterTableEmpty() is created to check whether the register table
  is empty or not.

  Take empty PreSmmInitRegisterTable as example, about 24K SMRAM consumption
  could be reduced when mAcpiCpuData.NumberOfCpus=1024.
  sizeof (CPU_REGISTER_TABLE) = 24
  mAcpiCpuData.NumberOfCpus = 1024 = 1K
  mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE) = 24K

2. Only copy table entries buffer instead of whole buffer.
  AllocatedSize in SourceRegisterTableList is the whole buffer size.
  Actually, only the table entries buffer needs to be copied, and the size
  is TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY).

  Take AllocatedSize=0x1000=4096, TableLength=100 and NumberOfCpus=1024 as example,
  about 1696K SMRAM consumption could be reduced.
  sizeof (CPU_REGISTER_TABLE_ENTRY) = 24
  TableLength = 100
  TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY) = 2400
  AllocatedSize = 0x1000 = 4096
  AllocatedSize - TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY) = 4096 - 2400 = 1696
  NumberOfCpus = 1024 = 1K
  NumberOfCpus * (AllocatedSize - TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY)) = 1696K

This patch also corrects the CopyRegisterTable() function description.

Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210111015419.28368-1-star.zeng@intel.com>
2021-01-11 09:13:48 +00:00
Rebecca Cran
a8a0831589 ShellPkg: Remove bogus "Bits" text from some smbiosview strings.
Neither of the "CPU Socket Unpopulated" or "Do not reboot" messages
should contain the word "Bits".

Remove them and update the identifier for the "Do not reboot" message
to remove the word "BITS".

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-01-11 02:09:10 +00:00
Nhi Pham
4ea3a6ded8 EmbeddedPkg/RealTimeClockRuntimeDxe: depend on gEfiVariableArchProtocolGuid
The EfiGetVariable() is used in the entry of this module. So, the
variable services are required to be ready before they are used. This
patch adds the arch protocol gEfiVariableArchProtocolGuid to dependency
expression to guarantee that this module will be started once the
variable protocol is available.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-10 01:18:44 +00:00
Abner Chang
acabf1b033 .pytool: Add required submodule for JsonLib
Open source project jansson is leveraged by edk2 JsonLib.
Add jansson to the required submodule in CiSettings.py.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Abner Chang
fa4c4fb8cd RedfishPkg: Add EDK2 port of jansson library to build
Add EDK2 port jansson library (JsonLib) to RedfishPkg

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Abner Chang
ea830b96fd RedfishPkg/library: EDK2 port of jansson library
edk2 JsonLib which is the edk2 port of open source
jansson library.
(https://github.com/akheron/jansson)
jansson library is the open source project to manipulate
JSON data structure.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Abner Chang
6e9233f968 RedfishPkg/RedfishCrtLib: Redfish C runtime library
Redfish CRT library is currently used by edk2 JsonLib
(open source jansson project) and edk2 RedfishLib
(libredfish open source project). Redfish CrtLib library
provides the necessary C runtime equivalent edk2 functions
for open source projects.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Abner Chang
a88731d545 edk2: jansson submodule for edk2 JSON library
Add git submodule "jansson" library, which is the open
source project (https://github.com/akheron/jansson) used
to manipulate JSON data structure. jansson library is
wrapped as edk2 JsonLib and the use cases will be the
edk2 Redfish feature drivers and edk2 port of libredfish
(https://github.com/DMTF/libredfish).
jansson open source project is under MIT license.
(refer to ReadMe.rst under edk2).

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Abner Chang
805b8b8837 RedfishPkg/Ucs2Utf8lib: UCS2 to UFT8 manipulation library
This library provides UCS2 to UFT8 or vise versa functions to
manipulate UCS2/UTF8 strings. This library is currently used
by edk2 port of open source jansson library.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-01-09 03:08:51 +00:00
Leif Lindholm
9783767fcf OvmfPkg: add TimeBaseLib resolution for OvmfXen
Commit 55ee36b0c4
("EmbeddedPkg/RealTimeClockRuntimeDxe: Use helper functions from TimeBaseLib")
added a TimeBaseLib dependency to RealTimeClockRuntimeDxe, which now breaks
build of OvmfXen.dsc.

Add a resolution for EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-01-08 15:54:44 +00:00
Leif Lindholm
fabeffb09e EmbeddedPkg: add TimeBaseLib resolution to EmbeddedPkg.dsc
Commit 55ee36b0c4
("EmbeddedPkg/RealTimeClockRuntimeDxe: Use helper functions from TimeBaseLib")
added a TimeBaseLib dependency to RealTimeClockRuntimeDxe, which now breaks
build of EmbeddedPkg.dsc.

Add a resolution for EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Nhi Pham <nhi@os.amperecomputing.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-08 14:02:03 +00:00
Ard Biesheuvel
1819817155 EmbeddedPkg/PrePiMemoryAllocationLib: use correct size for pool hob
Use the correct type in the sizeof() expression to calculate the size
of the newly allocated EFI_HOB_MEMORY_POOL hob.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=3139
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-08 13:37:57 +00:00
Liu, WeiX C
7e6776deaf MdeModulePkg Lzma: Update LZMA SDK version to 19.00
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3101
New formal release in https://www.7-zip.org/sdk.html is 19.00.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Wei Liu <weix.c.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-08 10:03:53 +00:00
Liu, WeiX C
4e38bb607a BaseTools LzmaCompress: Update LZMA to new 19.00 version
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3101
New formal release in https://www.7-zip.org/sdk.html is 19.00.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Wei Liu <weix.c.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-08 10:03:53 +00:00
Marc Moisson-Franckhauser
1d3d5e3256 ShellPkg/Acpiview: AEST Parser
Bugzilla: 3048 (https://bugzilla.tianocore.org/show_bug.cgi?id=3048)

Add a new parser for the Arm Error Source Table (AEST) described in
the ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document,
dated 28 September 2020.
(https://developer.arm.com/documentation/den0085/0101/)

AEST enables kernel-first handling of errors in a system that supports
the Armv8 RAS extensions. It covers Armv8.2+ RAS extensions for PEs
and the RAS system architecture for non-PE system components.

Signed-off-by: Marc Moisson-Franckhauser <marc.moisson-franckhauser@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2021-01-08 03:50:34 +00:00
Marc Moisson-Franckhauser
a955c6f97f MdePkg/IndustryStandard: AEST Table definition
Bugzilla: 3049 (https://bugzilla.tianocore.org/show_bug.cgi?id=3049)

Add definition for the Arm Error Source Table (AEST) described in
the ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document,
dated 28 September 2020.
(https://developer.arm.com/documentation/den0085/0101/)

Signed-off-by: Marc Moisson-Franckhauser <marc.moisson-franckhauser@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2021-01-08 03:50:34 +00:00
Tom Lendacky
85b8eac59b OvfmPkg/VmgExitLib: Validate #VC MMIO is to un-encrypted memory
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

When SEV-ES is active, and MMIO operation will trigger a #VC and the
VmgExitLib exception handler will process this MMIO operation.

A malicious hypervisor could try to extract information from encrypted
memory by setting a reserved bit in the guests nested page tables for
a non-MMIO area. This can result in the encrypted data being copied into
the GHCB shared buffer area and accessed by the hypervisor.

Prevent this by ensuring that the MMIO source/destination is un-encrypted
memory. For the APIC register space, access is allowed in general.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <0cf28470ad5e694af45f7f0b35296628f819567d.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
362654246a OvmfPkg/PlatformPei: Reserve GHCB backup pages if S3 is supported
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

Protect the GHCB backup pages used by an SEV-ES guest when S3 is
supported.

Regarding the lifecycle of the GHCB backup pages:
  PcdOvmfSecGhcbBackupBase

(a) when and how it is initialized after first boot of the VM

  If SEV-ES is enabled, the GHCB backup pages are initialized when a
  nested #VC is received during the SEC phase
  [OvmfPkg/Library/VmgExitLib/SecVmgExitVcHandler.c].

(b) how it is protected from memory allocations during DXE

  If S3 and SEV-ES are enabled, then InitializeRamRegions()
  [OvmfPkg/PlatformPei/MemDetect.c] protects the ranges with an AcpiNVS
  memory allocation HOB, in PEI.

  If S3 is disabled, then these ranges are not protected. PEI switches to
  the GHCB backup pages in permanent PEI memory and DXE will use these
  PEI GHCB backup pages, so we don't have to preserve
  PcdOvmfSecGhcbBackupBase.

(c) how it is protected from the OS

  If S3 is enabled, then (b) reserves it from the OS too.

  If S3 is disabled, then the range needs no protection.

(d) how it is accessed on the S3 resume path

  It is rewritten same as in (a), which is fine because (b) reserved it.

(e) how it is accessed on the warm reset path

  It is rewritten same as in (a).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <119102a3d14caa70d81aee334a2e0f3f925e1a60.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
5667dc43d8 OvmfPkg/VmgExitLib: Support nested #VCs
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

In order to be able to issue messages or make interface calls that cause
another #VC (e.g. GetLocalApicBaseAddress () issues RDMSR), add support
for nested #VCs.

In order to support nested #VCs, GHCB backup pages are required. If a #VC
is received while currently processing a #VC, a backup of the current GHCB
content is made. This allows the #VC handler to continue processing the
new #VC. Upon completion of the new #VC, the GHCB is restored from the
backup page. The #VC recursion level is tracked in the per-vCPU variable
area.

Support is added to handle up to one nested #VC (or two #VCs total). If
a second nested #VC is encountered, an ASSERT will be issued and the vCPU
will enter CpuDeadLoop ().

For SEC, the GHCB backup pages are reserved in the OvmfPkgX64.fdf memory
layout, with two new fixed PCDs to provide the address and size of the
backup area.

For PEI/DXE, the GHCB backup pages are allocated as boot services pages
using the memory allocation library.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <ac2e8203fc41a351b43f60d68bdad6b57c4fb106.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
c330af0246 OvmfPkg/MemEncryptSevLib: Address range encryption state interface
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

Update the MemEncryptSevLib library to include an interface that can
report the encryption state on a range of memory. The values will
represent the range as being unencrypted, encrypted, a mix of unencrypted
and encrypted, and error (e.g. ranges that aren't mapped).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <0d98f4d42a2b67310c29bac7bcdcf1eda6835847.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
a746ca5b47 OvmfPkg/MemEncryptSevLib: Make the MemEncryptSevLib available for SEC
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

In preparation for a new interface to be added to the MemEncryptSevLib
library that will be used in SEC, create an SEC version of the library.

This requires the creation of SEC specific files.

Some of the current MemEncryptSevLib functions perform memory allocations
which cannot be performed in SEC, so these interfaces will return an error
during SEC. Also, the current MemEncryptSevLib library uses some static
variables to optimize access to variables, which cannot be used in SEC.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <bc7fa76cc23784ab3f37356b6c10dfec61942c38.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
60b195d257 OvmfPkg/MemEncryptSevLib: Coding style fixes in prep for SEC library
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

Creating an SEC version of the library requires renaming an existing file
which will result in the existing code failing ECC. Prior to renaming the
existing file, fix the coding style to avoid the ECC failure.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <f765d867da4a703e0a0db35e26515a911482fd40.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
31f5ebd6db OvmfPkg/VmgExitLib: Check for an explicit DR7 cached value
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

Check the DR7 cached indicator against a specific value. This makes it
harder for a hypervisor to just write random data into that field in an
attempt to use an invalid DR7 value.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <65157c1155a9c058c43678400dfc0b486e327a3e.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
84cddd7082 OvmfPkg/AmdSevDxe: Clear encryption bit on PCIe MMCONFIG range
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

The PCIe MMCONFIG range should be treated as an MMIO range. However,
there is a comment in the code explaining why AddIoMemoryBaseSizeHob()
is not called. The AmdSevDxe walks the GCD map looking for MemoryMappedIo
or NonExistent type memory and will clear the encryption bit for these
ranges.

Since the MMCONFIG range does not have one of these types, the encryption
bit is not cleared for this range. Add support to detect the presence of
the MMCONFIG range and clear the encryption bit. This will be needed for
follow-on support that will validate that MMIO is not being performed to
an encrypted address range under SEV-ES.

Even though the encryption bit was set for this range, this still worked
under both SEV and SEV-ES because the address range is marked by the
hypervisor as MMIO in the nested page tables:
- For SEV, access to this address range triggers a nested page fault (NPF)
  and the hardware supplies the guest physical address (GPA) in the VMCB's
  EXITINFO2 field as part of the exit information. However, the encryption
  bit is not set in the GPA, so the hypervisor can process the request
  without any issues.
- For SEV-ES, access to this address range triggers a #VC. Since OVMF runs
  identity mapped (VA == PA), the virtual address is used to avoid the
  lookup of the physical address. The virtual address does not have the
  encryption bit set, so the hypervisor can process the request without
  any issues.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <711ae2dcb6cb29e4c60862c18330cff627269b81.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
45388d046c OvmfPkg: Obtain SEV encryption mask with the new MemEncryptSevLib API
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

The early assembler code performs validation for some of the SEV-related
information, specifically the encryption bit position. The new
MemEncryptSevGetEncryptionMask() interface provides access to this
validated value.

To ensure that we always use a validated encryption mask for an SEV-ES
guest, update all locations that use CPUID to calculate the encryption
mask to use the new interface.

Also, clean up some call areas where extra masking was being performed
and where a function call was being used instead of the local variable
that was just set using the function.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <9de678c0d66443c6cc33e004a4cac0a0223c2ebc.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
b97dc4b92b OvmfPkg/MemEncryptSevLib: Add an interface to retrieve the encryption mask
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

To ensure that we always use a validated encryption mask for an SEV-ES
guest, create a new interface in the MemEncryptSevLib library to return
the encryption mask. This can be used in place of the multiple locations
where CPUID is used to retrieve the value (which would require validation
again) and allows the validated mask to be returned.

The PEI phase will use the value from the SEV-ES work area. Since the
SEV-ES work area isn't valid in the DXE phase, the DXE phase will use the
PcdPteMemoryEncryptionAddressOrMask PCD which is set during PEI.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <e12044dc01b21e6fc2e9535760ddf3a38a142a71.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
3b32be7e71 OvmfPkg/ResetVector: Save the encryption mask at boot time
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

The early assembler code performs validation for some of the SEV-related
information, specifically the encryption bit position. To avoid having to
re-validate the encryption bit position as the system proceeds through its
boot phases, save the validated encryption bit position in the SEV-ES work
area for use by later phases.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <2609724859cf21f0c6d45bc323e94465dca4e621.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
bd0c1c8e22 OvmfPkg/ResetVector: Perform a simple SEV-ES sanity check
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

If a hypervisor incorrectly reports through CPUID that SEV-ES is not
active, ensure that a #VC exception was not taken. If it is found that
a #VC was taken, then the code enters a HLT loop.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <afa2030b95b852313b13982df82d472187e59b92.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
7cb96c47a9 OvmfPkg/ResetVector: Validate the encryption bit position for SEV/SEV-ES
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

To help mitigate against ROP attacks, add some checks to validate the
encryption bit position that is reported by the hypervisor.

The first check is to ensure that the hypervisor reports a bit position
above bit 31. After extracting the encryption bit position from the CPUID
information, the code checks that the value is above 31. If the value is
not above 31, then the bit position is not valid, so the code enters a
HLT loop.

The second check is specific to SEV-ES guests and is a two step process.
The first step will obtain random data using RDRAND and store that data to
memory before paging is enabled. When paging is not enabled, all writes to
memory are encrypted. The random data is maintained in registers, which
are protected. The second step is that, after enabling paging, the random
data in memory is compared to the register contents. If they don't match,
then the reported bit position is not valid, so the code enters a HLT
loop.

The third check is after switching to 64-bit long mode. Use the fact that
instruction fetches are automatically decrypted, while a memory fetch is
decrypted only if the encryption bit is set in the page table. By
comparing the bytes of an instruction fetch against a memory read of that
same instruction, the encryption bit position can be validated. If the
compare is not equal, then SEV/SEV-ES is active but the reported bit
position is not valid, so the code enters a HLT loop.

To keep the changes local to the OvmfPkg, an OvmfPkg version of the
Flat32ToFlat64.asm file has been created based on the UefiCpuPkg file
UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <cb9c5ab23ab02096cd964ed64115046cc706ce67.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
b78de543d8 OvmfPkg/Sec: Move SEV-ES SEC workarea definition to common header file
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

In order to allow for the SEV-ES workarea to be used for other purposes
and by other files, move the definition into the BaseMemEncryptSevLib
header file, MemEncryptSevLib.h.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <07d66f3384bd54da97d540e89b9f3473a6d17231.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Tom Lendacky
a91b700e38 Ovmf/ResetVector: Simplify and consolidate the SEV features checks
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3108

Simplify and consolidate the SEV and SEV-ES checks into a single routine.
This new routine will use CPUID to check for the appropriate CPUID leaves
and the required values, as well as read the non-interceptable SEV status
MSR (0xc0010131) to check SEV and SEV-ES enablement.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <43a660624c32b5f6c2610bf42ee39101c21aff68.1610045305.git.thomas.lendacky@amd.com>
2021-01-07 19:34:39 +00:00
Nhi Pham
55ee36b0c4 EmbeddedPkg/RealTimeClockRuntimeDxe: Use helper functions from TimeBaseLib
This patch replaces all time checking functions and leverage the helper
functions in TimeBaseLib library.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-07 16:43:48 +00:00
Nhi Pham
e31dc4717c EmbeddedPkg/TimeBaseLib: Add function to check Timezone and Daylight
This adds two functions IsValidTimeZone() and IsValidDaylight() to check
the time zone and daylight value from EFI time. These functions are
retrieved from the RealTimeClockRuntimeDxe module as they reduce
duplicated code in RTC modules.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-07 16:43:48 +00:00
Nhi Pham
ad16388d69 EmbeddedPkg/TimeBaseLib: Fix for minor code formatting
There is no functional modification in this change.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-07 16:43:48 +00:00
Nhi Pham
48de23e548 EmbeddedPkg/TimeBaseLib: Update comment blocks for API functions
This updates Doxygen comment blocks for API library functions.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-01-07 16:43:48 +00:00
Vijayenthiran Subramaniam
8015f3f6d4 ArmPlatformPkg: Enable support for flash in 64-bit address space
The existing NOR Flash DXE and StandaloneMm driver supports NOR flash
devices connected in the 32-bit address space. Extend these drivers to
allow NOR flash devices connected to 64-bit address space to be usable
as well. Also, convert the base address and size sanity check from
ASSERT() to if condition so that even if the firmware is build in
release mode, it can return error if the parameter(s) is/are invalid.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-07 15:24:42 +00:00
Laszlo Ersek
e9c5ff3d27 OvmfPkg/VirtioFsDxe: call IsTimeValid() before EfiTimeToEpoch()
EmbeddedPkg/TimeBaseLib provides a verification function called
IsTimeValid(), for enforcing the UEFI spec requirements on an EFI_TIME
object.

When EFI_FILE_PROTOCOL.SetInfo() is called in order to update the
timestamps on the file, let's invoke IsTimeValid() first, before passing
the new EFI_FILE_INFO.{CreateTime,LastAccessTime,ModificationTime} values
to EfiTimeToEpoch().

This patch is not expected to make a practical difference, but it's better
to ascertain the preconditions of EfiTimeToEpoch() on the
EFI_FILE_PROTOCOL.SetInfo() caller. The FAT driver (EnhancedFatDxe) has a
similar check, namely in FatSetFileInfo() -> FatIsValidTime().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210107095051.22715-1-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-07 14:13:44 +00:00
Sami Mujawar
d8d1f6661d .pytool: CI Settings to support StandaloneMmPkg
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Update pytools configuration to enable StandaloneMmPkg
and update package status in documentation.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
d4a3490a00 .azurepipelines: Add StandaloneMmPkg to CI matrix
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Add StandaloneMmPkg to the Core CI matrix.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
6f68283991 StandaloneMmPkg: Add EDK2 Core CI support
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

The TianoCore EDKII project has introduced a Core CI infrastructure
using TianoCore EDKII Tools PIP modules:
  * https://pypi.org/project/edk2-pytool-library/
  * https://pypi.org/project/edk2-pytool-extensions/

The edk2\.pytool\Readme.md provides information to configure the
environment and to run local builds.

This patch defines the necessary settings for enabling the Core CI
builds for StandaloneMmPkg.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
75d928ef29 StandaloneMmPkg: Remove dependency on ArmPlatformPkg.dec
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Update StandaloneMmCoreEntryPoint to remove the unnecessary
dependency on ArmPlatformPkg.dec.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
0527053262 StandaloneMmPkg: Fix ECC error 8005 in StandaloneMmCoreEntryPoint
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

The ECC tool reports error [8005] Variable name does not follow the rules:
  1. First character should be upper case
  2. Must contain lower case characters
  3. No white space characters
  4. Global variable name must start with a 'g'
for the constants SPM_MAJOR_VER, SPM_MINOR_VER & BOOT_PAYLOAD_VERSION.

Fix this by changing converting these constant variables to #defined
values.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
9a0f88b5fd StandaloneMmPkg: Fix ECC error 4002 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[4002] Function header doesn't exist".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
0720bb7e4d StandaloneMmPkg: Fix ECC error 9002 in CoreMemoryAllocationLib
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9002] The function headers should follow
Doxygen special documentation blocks in section 2.3.5".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
b2b02a4843 StandaloneMmPkg: Fix ECC error 9001 in Standalone MM Core
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9001] The file headers should follow
Doxygen special documentation blocks in section 2.3.5"

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
6027747aae StandaloneMmPkg: Fix ECC error 9001 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9001] The file headers should follow
Doxygen special documentation blocks in section 2.3.5".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
2da602fa1f StandaloneMmPkg: Fix ECC error 4002 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[4002] Function header doesn't exist".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
561c363074 StandaloneMmPkg: Fix ECC error 9003 in StandaloneMmCoreEntryPoint
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9003] The first line of text in a comment
block should be a brief description of the element being documented and
the brief description must end with a period. Comment description should
end with period '.'".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
4779bc6c0b StandaloneMmPkg: Fix ECC error 9002 in StandaloneMmCoreEntryPoint
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9002] The function headers should follow
Doxygen special documentation blocks in section 2.3.5 in Comment".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
3ae63c2c55 StandaloneMmPkg: Fix ECC error 9002 in StandaloneMmMemLib
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error: "[9002] The function headers should
follow Doxygen special documentation blocks in section 2.3.5".

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
764942a2dd StandaloneMmPkg: Fix ECC error 4002 in StandaloneMmCoreEntryPoint
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Add doxygen style function headers to fix ECC reported errors
"[4002] Function header doesn't exist Function".

Also update the corresponding declaration to add IN/OUT doxygen
style reference tags.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
84096dccd6 StandaloneMmPkg: Fix ECC error 4002 and 9002 in StandaloneMmCore
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Add doxygen style function documentation headers to fix the ECC
reported errors:
 - [4002] Function header doesn't exist.
 - [9002] The function headers should follow Doxygen special
   documentation blocks in section 2.3.5.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
3efc2919d0 StandaloneMmPkg: Fix ECC error 10014 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix ECC error "[10014] No used module files found. The source file
[StandaloneMmCpu.h] is existing in module directory but it is not
described in INF file."

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
eff8f7a9b4 StandaloneMmPkg: Fix ECC error 5007 in StandaloneMmCore
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix ECC error "[5007] There should be no initialization of a variable
as part of its declaration Variable."

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
eda1ffacf1 StandaloneMmPkg: Fix ECC error 5007 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix ECC error "[5007] There should be no initialization of a variable
as part of its declaration Variable."

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
7aa9d75211 StandaloneMmPkg: Fix ECC error 5007 in StandaloneMmCoreEntryPoint
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix ECC error "[5007] There should be no initialization of a variable
as part of its declaration Variable."

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
92df3ca898 StandaloneMmPkg: Fix ECC error 4002 in FwVol helper
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix ECC Error "[4002] Function header doesn't exist
Function [MmCoreFfsFindMmDriver] has NO comment immediately
preceding it."

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
a9da96ac2a StandaloneMmPkg: Fix ECC error 3002 in StandaloneMmCpu
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC tool reported error "[3002] Non-Boolean comparisons
should use a compare operator".

Also fix the following:
 - add curly braces for 'if' condition statements to comply
   with the coding standard.
 - The value returned by GET_GUID_HOB_DATA() is stored in
   *HobData. Therefore, check *HobData against NULL. The
   original code was checking HobData which is incorrect.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
9ef62f5078 StandaloneMmPkg: Fix ECC error 1001 in SMM Memory pool management
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the following error reported by the Ecc tool:
[1001] 'TAB' character is not allowed in source code, please
replace each 'TAB' with two spaces.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
c6fa62aacc StandaloneMmPkg: Fix ECC error 9002 in Core dispatcher
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the ECC reported error "[9002] The function headers should follow
Doxygen special documentation blocks in section 2.3.5 in Comment"

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
da29388b53 StandaloneMmPkg: Fix spell check reported errors
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Fix the spelling mistakes reported by the spell check utility
that is run as part of the Core CI.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
55ec21db57 StandaloneMmPkg: Add library files to DSC
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

The Core CI reports a critical error if the library files are
not included in the DSC.

Therefore, add the missing library files to the package DSC.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Sami Mujawar
3325965cb3 StandaloneMmPkg: Add library header files to DEC
Bugzilla: 3150 (https://bugzilla.tianocore.org/show_bug.cgi?id=3150)

Declare the library header files in the package DEC file to
fix errors reported by Core CI.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-07 11:13:39 +00:00
Michael D Kinney
248d08c598 MdeModulePkg/Library/VarCheckLib: Allow SetVariable from SMM
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3154

Update VarCheckLibSetVariableCheck() to allow locked variables
to be updated if the RequestSource is VarCheckFromTrusted even
if one or more variable check handlers return EFI_WRITE_PROTECTED.
RequestSource is only set to VarCheckFromTrusted if the request
is through the EFI_SMM_VARAIBLE_PROTOCOL.

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-01-07 03:48:10 +00:00
Chasel Chiu
379e5098a4 IntelFsp2Pkg: Support FSP private temporary memory.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3153

In FSP the temporary memory provided by bootloader typically will be
totally given to PeiCore as Heap, but in some cases FSP may have to
reserve some more temporary memory for private usage.

This commit adds this flexibility for FSP to reserve some
temporary memory before giving them to PeiCore.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-01-07 02:35:50 +00:00
Pierre Gondois
7785b38ac9 ArmPkg: Fix Ecc error 5007 in DefaultExceptionHandlerLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Fixing this error implies extracting the CpsrChar
array from CpsrString and making it a static variable.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
0931171f54 ArmPkg: Fix Ecc error 5007 in StandaloneMmMmuLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
58bba221b7 ArmPkg: Fix Ecc error 5007 in SemihostLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
02c621f3f7 ArmPkg: Fix Ecc error 5007 in SemiHostingSerialPortLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
146af6a45b ArmPkg: Fix Ecc error 5007 in ArmMmuLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
178dbd4442 ArmPkg: Fix Ecc error 5007 in ArmLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
b9b86dc4f6 ArmPkg: Fix Ecc error 5007 in ArmDisassemblerLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
15f5b04e43 ArmPkg: Fix Ecc error 5007 in ArmCacheMaintenanceLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
88a7d4aa30 ArmPkg: Fix Ecc error 5007 in SemihostFs
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
fd5c9bedbc ArmPkg: Fix Ecc error 5007 in TimerDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
c5bbf36c13 ArmPkg: Fix Ecc error 5007 in CpuDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
3f0d3dfa0e ArmPkg: Fix Ecc error 5007 in ArmScmiDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
fb48f1e298 ArmPkg: Fix Ecc error 5007 in CompilerIntrinsicsLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
8b8b52ff0c ArmPkg: Fix Ecc error 5005 in ArmExceptionLib
This patch fixes the following Ecc reported error:
The body of a function should be contained by open
and close braces that must be in the first column

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
13dcf62877 ArmPkg: Fix Ecc error 5005 in CpuDxe
This patch fixes the following Ecc reported error:
The body of a function should be contained by open
and close braces that must be in the first column

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
17ad8ce7b3 ArmPkg: Fix Ecc error 3001 in SemihostFs
This patch fixes the following Ecc reported error:
Boolean values and variable type BOOLEAN should not use
explicit comparisons to TRUE or FALSE

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
31ea1d2e07 ArmPkg: Fix Ecc error 3002 in ArmDisassemblerLib
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
f66c2b32cc ArmPkg: Fix Ecc error 3002 in SemihostFs
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
a387f2ee2e ArmPkg: Fix Ecc error 3002 in CpuDxe
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
1560fd4225 ArmPkg: Fix Ecc error 3002 in MmCommunicationDxe
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
9a603fe191 ArmPkg: Fix Ecc error 3002 in TimerDxe
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
a9e5186075 ArmPkg: Fix Ecc error 3002 in ArmMmuLib
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
d61b2e28e6 ArmPkg: Fix Ecc error 3002 in OpteeLib
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
53aabb978e ArmPkg: Fix Ecc error 3002 in CompilerIntrinsicsLib
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Brackets are also added to comply to with the coding
standard.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
Pierre Gondois
e3fe63ddeb ArmPkg: Format header to fix Ecc crash in ArmMmuLib
The header of the file is not formatted properly, making
the Ecc tool crash when running on the ArmPkg.

The following command was run:
  ./BaseTools/BinWrappers/PosixLike/Ecc
    -c BaseTools/Source/Python/Ecc/config.ini
    -e BaseTools/Source/Python/Ecc/exception.xml
    -t ArmPkg -r ArmPkgEcc.xls

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-06 16:22:54 +00:00
gaoliming
67e0e4caa5 MdeModulePkg BrotliCustomDecompressLib: Remove the duplicated functions
The same functions have been defined in BrotliDecUefiSupport.c.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-01-06 07:15:09 +00:00
Samer El-Haj-Mahmoud
df77614e54 MdeModulePkg/ConSplitter: Change StdErr color to EFI_LIGHTGRAY
ConSplitter is using EFI_LIGHTGRAY foreground color for ConOut
and EFI_MAGENTA for StdErr consoles. This is impacting the DebugLib
output on that same serial console (e.g. DebugLibSerialPort) after
gEfiStandardErrorDeviceGuid is installed on that port. The impact
also extends to Linux serial console output in OVMF because it inherits
the color setting from the firmware.

This is inconsistent and annoying, with MAGENTA being barely legible on
a black background.

Let's change StdErr default color to LIGHTGRAY for consistency and
readability. This results in the same color being used for all consoles
sharing the same serial port (ConOut, StdErr, DebugLib, OS console).
Platforms wishing to distinguish the colors of consoles can do so in
their own Platform BDS initialization.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Signed-off-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Pete Batard <pete@akeo.ie>
Tested-by: Pete Batard <pete@akeo.ie>
(On an RPi 4 platform where this was another annoyance)
2021-01-06 05:27:29 +00:00
Samer El-Haj-Mahmoud
e61088c858 MdeModulePkg/Graphics: Fix spelling mistakes
Fix various spelling mistakes in GraphicsConsoleDxe, ConsPlitter,
and SimpleTextOut header

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Cc: Pete Batard <pete@akeo.ie>
Signed-off-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2021-01-06 05:27:29 +00:00
Samer El-Haj-Mahmoud
b585238d33 MdeModulePkg/GraphicsConsoleDxe: Change default CursorVisible to FALSE
REF: https://github.com/pftf/RPi4/issues/115

GraphicsConsoleDxe defaults the ConOut Mode.CursorVisible to TRUE.
However, the driver never draws the cursor during init. This results
in the first call to disable the cursor (using ConOut->EnableCursor(FALSE))
to actually draw the cursor on the screen, as the logic in FlushCursor
depends on the Mode.CursorVisible state to determine if it should draw or
erase the cursor.

Fix by changing the default CursorVisible in this driver to FALSE.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Cc: Pete Batard <pete@akeo.ie>
Signed-off-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Pete Batard <pete@akeo.ie>
Tested-by: Pete Batard <pete@akeo.ie>
(On an RPi4 platform where we had this annoyance of an unwanted cursor
displaying on top of the platform logo)
2021-01-06 05:27:29 +00:00
Enze Zhu
020ec96304 BaseTools/CommonLib.h: Build failed due to MAX_LONG_FILE_PATH
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3032

We had a build fail due to the hard coded MAX_LONG_FILE_PATH value.
We should use PATH_MAX if it is available.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Enze Zhu <zhuenze@byosoft.com.cn>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2021-01-06 04:01:12 +00:00
Irene Park
21e1dc286e BaseTools: Fix the improper error logging
EdkLogger.ERROR() was replaced with EdkLogger.error() to deliver the
expected error message when an error occurs.

Signed-off-by: Irene Park <ipark@nvidia.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-06 02:57:38 +00:00
Bob Feng
20b292d0cd BaseTools: Fix the issue caused by tostring() removal on Py39
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3136

Python 3.9 remove the array.array.tostring and
array.array.fromstring() function. This patch
is to use other method to replace tostring() and
fromstring()

Signed-off-by: Bob Feng <bob.c.feng@intel.com>

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Mingyue Liang <mingyuex.liang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-01-06 01:24:43 +00:00
wenyi,xie via groups.io
4ad1bd63b2 NetworkPkg/DnsDxe: cosmetic fixups
add whitespace according to coding style.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-01-05 14:37:21 +00:00
Masahisa Kojima
4e51155487 ArmPlatformPkg/NorFlashDxe: implement standalone MM version
Implement a version of the NOR Flash driver that can execute
in standalone MM context.
This is used to access the secure variable storage, it only
supports EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-04 18:34:16 +00:00
Masahisa Kojima
c2d1cf1bce ArmPlatformPkg/NorFlashDxe: factor out DXE specific pieces
In preparation of creating a standalone MM version of the
NOR Flash driver, refactor the existing pieces into a core
driver. NorFlashDxe.c has the DXE instantiation code,
FVB initialization code and some common functions.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-04 18:34:16 +00:00
Pierre Gondois
e590894536 ArmPlatformPkg: Fix Ecc error 8005
This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Indeed, according to the EDK II C Coding Standards
Specification, s5.6.2.2 "Enumerated Types" and
s4.3.4 Function and Data Names, elements of an
enumerated type shoud be a mixed upper- and
lower-case text.

A max element is also added, as advised by
s5.6.2.2.3 of the same document.

Reference:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2021-01-04 17:47:29 +00:00
Luo, Heng
0785c619a5 MdeModulePkg/Bus/Pci/PciBusDxe: Support PCIe Resizable BAR Capability
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=313

Add PcdPcieResizableBarSupport to enable/disable PCIe Resizable
BAR Capability fearture.
Program the Resizable BAR Register if the device suports PCIe Resizable
BAR Capability and PcdPcieResizableBarSupport is TRUE.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-01-04 08:25:28 +00:00
Luo, Heng
42fe8ca453 MdePkg: Define structures for Resizable BAR Capability
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3138

Define structures for Resizable BAR Capability in
MdePkg/Include/IndustryStandard/PciExpress21.h,
Change ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
to use new structures.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2021-01-04 08:25:28 +00:00
Abner Chang
140674a460 RedfishPkg/DxeRestExLib: DxeRestExLib
Add EFI REST EX helper library to create child instance of
REST EX service.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-12-24 14:30:43 +00:00
Masahisa Kojima
e2747dbb5a MdeModulePkg/VarCheckPolicyLib: implement standalone MM version
This commit adds the VarCheckPolicyLib that will be able to
execute in the context of standalone MM.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Co-authored-by: Kun Qin <kun.q@outlook.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-23 09:13:58 +00:00
Yunhua Feng
d15d0d3d8a BaseTools: Should always define PCD TOKEN value as Zero for static PCD
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3120
FixedAtBuild, PatchableInModule and FeatureFlag PCD don't use PCD TOKEN.
Their PCD TOKEN value can always be zero.
AutoGen.h will not be changed when static PCD is added or removed.
Dynamic PCD add or remove will still cause dynamic PCD token value be
changed.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-12-23 02:33:36 +00:00
Michael D Kinney
ab06012876 .mergify: Enable Mergify for stable/* branches
https://bugzilla.tianocore.org/show_bug.cgi?id=3130

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 14:51:09 -08:00
Michael D Kinney
d21d270676 OvmfPkg/.azurepipelines: Enable EDK II CI for stable/* branches
https://bugzilla.tianocore.org/show_bug.cgi?id=3130

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 22:11:48 +00:00
Michael D Kinney
e690b81038 EmulatorPkg/.azurepipelines: Enable EDK II CI for stable/* branches
https://bugzilla.tianocore.org/show_bug.cgi?id=3130

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 22:11:48 +00:00
Michael D Kinney
db83d69608 ArmVirtPkg/.azurepipelines: Enable EDK II CI for stable/* branches
https://bugzilla.tianocore.org/show_bug.cgi?id=3130

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 22:11:48 +00:00
Michael D Kinney
2bca741149 .azurepipelines: Enable EDK II CI for stable/* branches
https://bugzilla.tianocore.org/show_bug.cgi?id=3130

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 22:11:48 +00:00
wenyi,xie via groups.io
88e47d1959 BaseTools/EfiRom: remove redundant checking of argc
As the condition of while statement is argc > 0, so argc < 1 will always
be false, it's redundant.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-12-22 11:22:36 +00:00
Tan, Ming
d4945b1027 MdeModulePkg/Universal/StatusCodeHandler: Fix a bug about log lost
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3126

1. If use PeiDxeDebugLibReportStatusCode as DebugLib, then some logs
after ExitBootService() will be lost.
2. The root cause:
2.1 The original code will register an unregister function
of gEfiEventExitBootServicesGuid, this unregister function will call
EFI_RSC_HANDLER_PROTOCOL->Unregister and does not support log through
serial port.
2.2 And some other drivers also register call back funtions of
gEfiEventExitBootServicesGuid.
2.3 Then after the unregister function is called, other call back
functions can't out log if them use RSC as DebugLib.
3. The DxeMain will report status code EFI_SW_BS_PC_EXIT_BOOT_SERVICES
after notify all the call back functions of
gEfiEventExitBootServicesGuid.
4. Solution: the StatusCodeHandlerRuntimeDxe.c will not register an
unregister function of gEfiEventExitBootServicesGuid, but unregister it
after receive the status code of EFI_SW_BS_PC_EXIT_BOOT_SERVICES.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Ming Tan <ming.tan@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2020-12-22 08:23:51 +00:00
wenyi,xie via groups.io
d77f9b1eff BaseTools/GenFfs: Optimazing else if statement
When Alignment < 0x400 is false, the expression of Alignment >= 0x400 is
always true. So extract the expression from the else if statement.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-12-22 03:31:36 +00:00
Yunhua Feng
b6e360874f BaseTools: Correct report the line number in INF file issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3127

If one protocol is not found in package dec file, Build will report the
error message that module.inf(-1): error 4000: Value of Protocol
[gXxxProtocolGuid] is not found under [Protocols] section in MdePkg.dec.

Here, -1 should be the line number of this protocol in module INF file.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-12-22 02:21:26 +00:00
Pierre Gondois
6899e6789a BaseTools/Ecc: Allow init of function static variables
The Ecc tool currently reports the initialization of variables
at declaraton if the variable is non-constant and declared
in a function. Static variables locally defined in functions
should also be allowed to be initialized at declaration.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 01:26:10 +00:00
Sami Mujawar
b23c5b9722 BaseTools: Fix crash in ECC when parsing incorrect header
The ECC tool crashes if a C file has an incorrect file header
format.

The file ArmPkg\Library\ArmMmuLib\AArch64\ArmMmuPeiLibConstructor.c
has a file header in the incorrect format. It uses # to mark the
header comments instead of enclosing the file header in /* */. This
may have been a result of an INF file header being copied to a C
file.

A separate patch fixes the C file but ECC tool should
not crash if a file with an incorrect header is found.

Therefore, update the ECC tool to prevent it from crashing if an
incorrect file header is found. With this change the ECC tool will
report the incorrect header issue without crashing.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-22 01:26:10 +00:00
Laszlo Ersek
35ed29f207 OvmfPkg/VirtioFsDxe: handle attribute updates in EFI_FILE_PROTOCOL.SetInfo
Using the functions introduced previously, we can now update file
attributes in VirtioFsSimpleFileSetInfo().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-49-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
13a506d4f5 OvmfPkg/VirtioFsDxe: add helper for determining file mode bits update
Add the VirtioFsGetFuseModeUpdate() function, for determining whether an
EFI_FILE_PROTOCOL.SetInfo() invocation requests an update to the file mode
bits.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-48-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
3cbd54b92f OvmfPkg/VirtioFsDxe: add helper for determining access time updates
Add the VirtioFsGetFuseTimeUpdates() function, for determining whether an
EFI_FILE_PROTOCOL.SetInfo() invocation requests access time updates.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-47-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: suppress bogus VS2019 warning about lack of
 initialization for ZeroTime]
2020-12-21 17:16:23 +00:00
Laszlo Ersek
6c33d7b2b1 OvmfPkg/VirtioFsDxe: add helper for determining file size update
Add the VirtioFsGetFuseSizeUpdate() function, for determining whether an
EFI_FILE_PROTOCOL.SetInfo() invocation requests a file size update.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-46-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
647340b0ce OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_SETATTR
Add the VirtioFsFuseSetAttr() function, for sending the FUSE_SETATTR
command to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-45-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
dd0911859f OvmfPkg/VirtioFsDxe: handle file rename/move in EFI_FILE_PROTOCOL.SetInfo
Using the functions introduced previously, we can now implement the rename
operation in VirtioFsSimpleFileSetInfo().

Attribute updates come later.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-44-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
c3f76ef89d OvmfPkg/VirtioFsDxe: add helper for composing rename/move destination path
The EFI_FILE_PROTOCOL.SetInfo() member is somewhat under-specified; one of
its modes of operation is renaming/moving the file.

In order to create the destination pathname in canonical format, 2*2=4
cases have to be considered. For the sake of discussion, assume the
current canonical pathname of a VIRTIO_FS_FILE is "/home/user/f1.txt".
Then, consider the following rename/move requests from
EFI_FILE_PROTOCOL.SetInfo():

  Destination requested  Destination  Move into   Destination in
  by SetInfo()           relative?    directory?  canonical format
  ---------------------  -----------  ----------  -----------------------
  L"\\dir\\f2.txt"       no           no          "/dir/f2.txt"
  L"\\dir\\"             no           yes         "/dir/f1.txt"
  L"dir\\f2.txt"         yes          no          "/home/user/dir/f2.txt"
  L"dir\\"               yes          yes         "/home/user/dir/f1.txt"

Add the VirtioFsComposeRenameDestination() function, for composing the
last column from the current canonical pathname and the SetInfo() input.

The function works on the following principles:

- The prefix of the destination path is "/", if the SetInfo() rename
  request is absolute.

  Otherwise, the dest prefix is the "current directory" (the most specific
  parent directory) of the original pathname (in the above example,
  "/home/user").

- The suffix of the destination path is precisely the SetInfo() request
  string, if the "move into directory" convenience format -- the trailing
  backslash -- is not used. (In the above example, L"\\dir\\f2.txt" and
  L"dir\\f2.txt".)

  Otherwise, the suffix is the SetInfo() request, plus the original
  basename (in the above example, L"\\dir\\f1.txt" and L"dir\\f1.txt").

- The complete destination is created by fusing the dest prefix and the
  dest suffix, using the VirtioFsAppendPath() function.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-43-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
bea1f51d6e OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_RENAME2
Add the VirtioFsFuseRename() function, for sending the FUSE_RENAME2
command to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-42-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
c9f473df33 OvmfPkg/VirtioFsDxe: handle the volume label in EFI_FILE_PROTOCOL.SetInfo
The least complicated third of EFI_FILE_PROTOCOL.SetInfo() is to handle
the EFI_FILE_SYSTEM_INFO and EFI_FILE_SYSTEM_VOLUME_LABEL setting
requests. Both of those can only change the volume label -- which the
Virtio Filesystem device does not support.

Verify the input for well-formedness, and report success only if the
volume label is being set to its current value.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-41-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
44f43f94ce OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.Write()
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileWrite().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-40-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
6f7bc7196f OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_WRITE
Add the VirtioFsFuseWrite() function, for sending the FUSE_WRITE command
to the Virtio Filesystem device.

(For avoiding oversized FUSE_WRITE commands, save the maximum write buffer
size that is advertized by the FUSE server, in the session init code.)

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-39-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
867cb9f60c OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.Flush()
For directories, implement EFI_FILE_PROTOCOL.Flush() by sending the
FUSE_FSYNCDIR command to the Virtio Filesystem device.

For regular files, send FUSE_FLUSH, followed by FUSE_FSYNC.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-38-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
eb0b79586f OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.Read() for directories
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileRead() for directories as well.

This patch completes the read-only support for virtio-fs. Commands like
"TYPE" and "DIR" work in the UEFI shell.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-37-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
b845de89d0 OvmfPkg/VirtioFsDxe: add EFI_FILE_INFO cache fields to VIRTIO_FS_FILE
For reading through a directory stream with tolerable performance, we'll
have to call FUSE_READDIRPLUS each time with such a buffer that can
deliver a good number of variable size records
(VIRTIO_FS_FUSE_DIRENTPLUS_RESPONSE elements). Every time we'll do that,
we'll turn the whole bunch into an array of EFI_FILE_INFOs immediately.
EFI_FILE_PROTOCOL.Read() invocations (on directories) will be served from
this EFI_FILE_INFO cache.

Add the fields for the EFI_FILE_INFO cache to VIRTIO_FS_FILE:
- initialize them in Open() and OpenVolume(),
- release the cache in Close() and Delete(),
- also release the cache when the directory is rewound, in SetPosition().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-36-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
7a7752095c OvmfPkg/VirtioFsDxe: convert FUSE dirent filename to EFI_FILE_INFO
Introduce the VirtioFsFuseDirentPlusToEfiFileInfo() function, for
converting the VIRTIO_FS_FUSE_DIRENTPLUS_RESPONSE filename byte array to
EFI_FILE_INFO.

This new function updates those EFI_FILE_INFO fields (Size, FileName) that
the earlier helper function VirtioFsFuseAttrToEfiFileInfo() does not set.

Both functions together will be able to fill in EFI_FILE_INFO completely,
from FUSE_READDIRPLUS.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-35-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
1c05df6998 OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.Read() for regular files
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileRead(); for regular files at first.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-34-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
d98d7e3005 OvmfPkg/VirtioFsDxe: add a shared wrapper for FUSE_READ / FUSE_READDIRPLUS
Add the VirtioFsFuseReadFileOrDir() function, for sending the FUSE_READ or
FUSE_READDIRPLUS command to the Virtio Filesystem device.

Parsing the structured FUSE_READDIRPLUS output is complex, and cannot be
integrated into the wrapper function. Given that fact, FUSE_READ and
FUSE_READDIRPLUS turn out to need identical low-level handling, except for
the opcode. Hence the shared wrapper function.

(It's prudent to verify whether the FUSE server supports FUSE_READDIRPLUS,
so update the session init code accordingly.)

This is the first FUSE request wrapper function that deals with a variable
size tail buffer.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-33-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
c4edb49b4f OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.GetPosition, .SetPosition
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileGetPosition() and VirtioFsSimpleFileSetPosition().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-32-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
b6b240f94f OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.GetInfo()
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileGetInfo().

This allows the "VOL" command to work in the UEFI shell.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-31-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
44bc78790e OvmfPkg/VirtioFsDxe: add helper for formatting UEFI basenames
The EFI_FILE_INFO structure, which is output by
EFI_FILE_PROTOCOL.GetInfo(), ends with a flexible CHAR16 array called
"FileName". Add the VirtioFsGetBasename() function, for determining the
required array size, and for filling the array as well.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-30-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
ba1184630a OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_STATFS
Add the VirtioFsFuseStatFs() function, for sending the FUSE_STATFS command
to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-29-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
c09441c321 OvmfPkg/VirtioFsDxe: erase the dir. entry in EFI_FILE_PROTOCOL.Delete()
At this point, the infrastructure is available for looking up the directly
containing directory of the file in EFI_FILE_PROTOCOL.Delete(), and to
remove the file in that directory by last pathname component. Do so.

The "RM" UEFI shell command will start working only later in the series;
the shell needs more EFI_FILE_PROTOCOL members to function before it calls
Delete().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-28-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
de0e11902b OvmfPkg/VirtioFsDxe: implement EFI_FILE_PROTOCOL.Open()
Using the functions introduced previously, we can now implement
VirtioFsSimpleFileOpen().

This lets the "MKDIR" command to work in the UEFI shell, for example.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-27-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
e3bc957706 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_GETATTR
Add the VirtioFsFuseGetAttr() function, for sending the FUSE_GETATTR
command to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-26-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
0771671c4b OvmfPkg/VirtioFsDxe: add a shared wrapper for FUSE_UNLINK / FUSE_RMDIR
The FUSE_UNLINK and FUSE_RMDIR commands only differ in the opcode. Add a
common function for wrapping both.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-25-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
ca61b84586 OvmfPkg/VirtioFsDxe: split canon. path into last parent + last component
Given a canonical pathname (as defined by VirtioFsAppendPath()), different
from "/", introduce a helper function for:

- looking up the NodeId of the most specific parent directory, and

- exposing the last component stand-alone (which is therefore a direct
  child of said parent directory).

This splitting operation will be necessary in multiple subsequent patches.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-24-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
b6ce961a42 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_LOOKUP
Add the VirtioFsFuseLookup() function, for sending the FUSE_LOOKUP command
to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-23-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
cd473d41dd OvmfPkg/VirtioFsDxe: convert FUSE inode attributes to EFI_FILE_INFO
Introduce the VirtioFsFuseAttrToEfiFileInfo() function, for converting
FUSE inode attributes to EFI_FILE_INFO.

The EpochToEfiTime() function from EmbeddedPkg's TimeBaseLib proves
invaluable for converting the file access times.

This is the first time we consume TimeBaseLib in OvmfPkg, so add the
necessary lib class resolution. We need not modify any ArmVirtPkg DSC
files: see commit af5fed90bf ("ArmPlatformPkg,ArmVirtPkg: delete
redundant PL031 functions", 2017-05-10).

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-22-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
a70860f449 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_CREATE
Add the VirtioFsFuseOpenOrCreate() function, for sending the FUSE_CREATE
command to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-21-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
f058cb69d1 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_MKDIR
Add the VirtioFsFuseMkDir() function, for sending the FUSE_MKDIR command
to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-20-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
da82d2e3a0 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_OPEN
Add the VirtioFsFuseOpen() function, for sending the FUSE_OPEN command to
the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-19-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
7e8c83f7d4 OvmfPkg/VirtioFsDxe: manage path lifecycle in OpenVolume, Close, Delete
Add a canonical pathname field to VIRTIO_FS_FILE.

Initialize the new field in EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.OpenVolume().

Release the new field in EFI_FILE_PROTOCOL.Close() and
EFI_FILE_PROTOCOL.Delete().

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-18-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
9307d7c7a4 OvmfPkg/VirtioFsDxe: add helper for appending and sanitizing paths
EFI_FILE_PROTOCOL.Open() -- for opening files -- and
EFI_FILE_PROTOCOL.SetInfo() --  for renaming files -- will require us to
append a relative UEFI pathname to an absolute base pathname. In turn,
components of the resultant pathnames will have to be sent to virtiofsd,
which does not consume UEFI-style pathnames.

We're going to maintain the base pathnames in canonical POSIX format:
- absolute (starts with "/"),
- dot (.) and dot-dot (..) components resolved/removed,
- uses forward slashes,
- sequences of slashes collapsed,
- printable ASCII character set,
- CHAR8 encoding,
- no trailing slash except for the root directory itself,
- length at most VIRTIO_FS_MAX_PATHNAME_LENGTH.

Add a helper function that can append a UEFI pathname to such a base
pathname, and produce the result in conformance with the same invariants.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-17-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
28092a3938 OvmfPkg/VirtioFsDxe: flush, sync, release and forget in Close() / Delete()
The two member functions that free the EFI_FILE_PROTOCOL object are
Close() and Delete(). Before we create VIRTIO_FS_FILE objects with
EFI_FILE_PROTOCOL.Open() later in this patch series, extend each of these
"destructor" functions to get rid of the FuseHandle and NodeId resources
properly -- in a way that matches each function's own purpose.

For the time being, VirtioFsSimpleFileDelete() only gets a reminder about
its core task (namely, removing the file), as the needed machinery will
become only later. But we can already outline the "task list", and deal
with the FuseHandle and NodeId resources. The "task list" of
VirtioFsSimpleFileDelete() is different from that of
VirtioFsSimpleFileClose(), thus both destructors diverge at this point.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-16-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
d047439952 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_FLUSH
Add the VirtioFsFuseFlush() function, for sending the FUSE_FLUSH command
to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-15-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
2e151d26ca OvmfPkg/VirtioFsDxe: add a shared wrapper for FUSE_FSYNC / FUSE_FSYNCDIR
The FUSE_FSYNC and FUSE_FSYNCDIR commands only differ in the opcode. Add a
common function for wrapping both.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-14-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
92a4d30e04 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_FORGET
Add the VirtioFsFuseForget() function, for sending the FUSE_FORGET command
to the Virtio Filesystem device.

This is an unusual command in that it doesn't generate any response from
the FUSE server.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-13-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
334c13e106 OvmfPkg/VirtioFsDxe: implement EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.OpenVolume()
With the help of the VirtioFsFuseOpenDir() and
VirtioFsFuseReleaseFileOrDir() functions introduced previously, we can now
open and close the root directory. So let's implement
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.OpenVolume().

OpenVolume() creates a new EFI_FILE_PROTOCOL object -- a reference to the
root directory of the filesystem. Thus, we have to start tracking
references to EFI_SIMPLE_FILE_SYSTEM_PROTOCOL, lest we unbind the
virtio-fs device while files are open.

There are two methods that release an EFI_FILE_PROTOCOL object: the
Close() and the Delete() member functions. In particular, they are not
allowed to fail with regard to resource management -- they must release
resources unconditionally. Thus, for rolling back the resource accounting
that we do in EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.OpenVolume(), we have to
implement the first versions of EFI_FILE_PROTOCOL.Close() and
EFI_FILE_PROTOCOL.Delete() in this patch as well.

With this patch applied, the UEFI shell can enter the root directory of
the Virtio Filesystem (such as with the "FS3:" shell command), and the
"DIR" shell command exercises FUSE_OPENDIR and FUSE_RELEASEDIR, according
to the virtiofsd log. The "DIR" command reports the root directory as if
it were empty; probably because at this time, we only allow the shell to
open and to close the root directory, but not to read it.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-12-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
72d4f133e9 OvmfPkg/VirtioFsDxe: add shared wrapper for FUSE_RELEASE / FUSE_RELEASEDIR
The FUSE_RELEASE and FUSE_RELEASEDIR commands only differ in the opcode.
Add a common function called VirtioFsFuseReleaseFileOrDir() for sending
either command.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-11-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
b62a0c5603 OvmfPkg/VirtioFsDxe: implement the wrapper function for FUSE_OPENDIR
Add the VirtioFsFuseOpenDir() function, for sending the FUSE_OPENDIR
command to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-10-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
fa97e37282 OvmfPkg/VirtioFsDxe: submit the FUSE_INIT request to the device
Submit the FUSE_INIT request to the Virtio Filesystem device, for starting
the FUSE session.

The FUSE_INIT request is logged by the virtio-fs daemon, with this patch
applied, when (for example) using the "CONNECT" UEFI shell command.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-9-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
e8a74c9a07 OvmfPkg/VirtioFsDxe: map "errno" values to EFI_STATUS
The VirtioFsFuseCheckResponse() function dedicates the EFI_DEVICE_ERROR
status code to the case when the Virtio Filesystem device explicitly
returns an error via the "VIRTIO_FS_FUSE_RESPONSE.Error" field.

Said field effectively carries a Linux "errno" value. Introduce a helper
function for mapping "errno" values to (hopefully) reasonable EFI_STATUS
codes. This way we'll be able to propagate "errno" values as EFI_STATUS
return codes along the UEFI call stack -- in some detail anyway.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-8-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
6a2dc768f0 OvmfPkg/VirtioFsDxe: introduce the basic FUSE request/response headers
Introduce the VIRTIO_FS_FUSE_REQUEST and VIRTIO_FS_FUSE_RESPONSE
structures, which are the common headers for the various FUSE
request/response structures.

Introduce the VirtioFsFuseNewRequest() helper function for populating
VIRTIO_FS_FUSE_REQUEST, from parameters and from a VIRTIO_FS-level request
counter.

Introduce the VirtioFsFuseCheckResponse() helper function for verifying
most FUSE response types that begin with the VIRTIO_FS_FUSE_RESPONSE
header.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-7-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
6578cacb46 OvmfPkg/VirtioFsDxe: add a scatter-gather list data type
In preparation for the variously structured FUSE request/response
exchanges that virtio-fs uses, introduce a scatter-gather list data type.
This will let us express FUSE request-response pairs flexibly.

Add a function for validating whether a (request buffer list, response
buffer list) pair is well-formed, and supported by the Virtio Filesystem
device's queue depth.

Add another function for mapping and submitting a validated pair of
scatter-gather lists to the Virtio Filesystem device.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-6-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: suppress useless VS2019 warning about signed/unsigned
 comparison in VirtioFsSgListsValidate()]
2020-12-21 17:16:23 +00:00
Laszlo Ersek
eaa7115d60 OvmfPkg/VirtioFsDxe: implement virtio device (un)initialization
Add the VirtioFsInit(), VirtioFsUninit(), and VirtioFsExitBoot()
functions.

In VirtioFsInit():

- Verify the host-side config of the virtio-fs device.

- Save the filesystem label ("tag") for later, from the configuration area
  of the virtio-fs device.

- Save the virtio queue size for later as well.

- Set up the virtio ring for sending requests.

In VirtioFsUninit():

- Reset the device.

- Tear down the virtio ring.

In VirtioFsExitBoot():

- Reset the device.

With this patch, the UEFI connect / disconnect controller operations
involve virtio setup / teardown; they are visible in the virtio-fs
daemon's log file. The virtiofsd log also confirms the device reset in
VirtioFsExitBoot(), when an OS is booted while the virtio-fs device is
bound.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-5-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
b55d6622d4 OvmfPkg/VirtioFsDxe: DriverBinding: open VirtioDevice, install SimpleFs
Complete the Supported, Start, and Stop member functions of
EFI_DRIVER_BINDING_PROTOCOL sufficiently for exercising the UEFI driver
model:

- bind virtio-fs devices,

- produce placeholder EFI_SIMPLE_FILE_SYSTEM_PROTOCOL instances on them.

On the "TO_START" (= Virtio) side, the VirtioFsBindingSupported() function
verifies the Virtio subsystem ID for the virtio-fs device (decimal 26 --
see
<https://github.com/oasis-tcs/virtio-spec/blob/87fa6b5d8155/virtio-fs.tex>).
Beyond that, no actual Virtio setup is performed for now. Those bits are
going to be implemented later in this series.

On the "BY_START" (= UEFI filesystem) side, the VirtioFsOpenVolume()
function -- which is the sole EFI_SIMPLE_FILE_SYSTEM_PROTOCOL member
function -- is a stub; it always returns EFI_NO_MEDIA, for now.

The "CONNECT", "DISCONNECT", and "MAP -R" UEFI Shell commands can be used
to test this patch.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-4-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
fbc3e1267a ArmVirtPkg: include VirtioFsDxe in the ArmVirtQemu* platforms
Include the VirtioFsDxe driver in the ArmVirtPkg platforms that include
Virtio10Dxe. (The virtio-fs device is virtio-1.0-only.)

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-3-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
5ab6a0e1c8 OvmfPkg: introduce VirtioFsDxe
The purpose of the driver is to ease file exchange (file sharing) between
the guest firmware and the virtualization host. The driver is supposed to
interoperate with QEMU's "virtiofsd" (Virtio Filesystem Daemon).

References:
- https://virtio-fs.gitlab.io/
- https://libvirt.org/kbase/virtiofs.html

VirtioFsDxe will bind virtio-fs devices, and produce
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL instances on them.

In the longer term, assuming QEMU will create "bootorder" fw_cfg file
entries for virtio-fs devices, booting guest OSes from host-side
directories should become possible (dependent on the matching
QemuBootOrderLib enhancement).

Add the skeleton of the driver. Install EFI_DRIVER_BINDING_PROTOCOL with
stub member functions. Install EFI_COMPONENT_NAME2_PROTOCOL with final
member functions. This suffices for the DRIVERS command in the UEFI Shell
to list the driver with a human-readable name.

The file permission model is described immediately in the INF file as a
comment block, for future reference.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3097
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201216211125.19496-2-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 17:16:23 +00:00
Laszlo Ersek
c06635ea3f EmbeddedPkg/TimeBaseLib: remove useless truncation to 32-bit
EfiTimeToEpoch() calls EfiGetEpochDays() internally, which (reasonably)
returns a UINTN. But then EfiTimeToEpoch() truncates the EfiGetEpochDays()
retval to UINT32 for no good reason, effectively restricting Time->Year
under 2106.

This truncation was pointed out with a valid warning (= build error) by
VS2019.

Allow EfiTimeToEpoch() to return / propagate a UINTN value.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201221113657.6779-3-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 15:55:16 +00:00
Laszlo Ersek
3af6c521d9 ArmPlatformPkg/PL031RealTimeClockLib: cast EfiTimeToEpoch() val. to UINT32
In preparation for changing EfiTimeToEpoch()'s return type to UINTN, cast
EfiTimeToEpoch()'s retval to UINT32 explicitly, in LibSetTime().

Currently, this is a no-op, and even after widening the retval, it will
make no difference, as LibSetTime() explicitly restricts Time->Year under
2106, given that "the PL031 is a 32-bit counter counting seconds". The
patch is made for preventing compiler warnings.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201221113657.6779-2-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-21 15:55:16 +00:00
Bob Feng
3ce3274a5e EmulatorPkg/PlatformCI: stick with "ubuntu-18.04" for now
"vm_image: 'ubuntu-latest'" now refers to Ubuntu Focal (20.04LTS), not
Ubuntu Bionic (18.04LTS), according to
<https://github.com/actions/virtual-environments/issues/1816>.

In Focal, an EmulatorPkg linking step fails like this:

> INFO - "gcc" -o
> /home/vsts/work/1/s/Build/EmulatorIA32/DEBUG_GCC5/IA32/Host -m32
> -L/usr/X11R6/lib
> -Wl,--start-group,@/home/vsts/work/1/s/Build/EmulatorIA32/DEBUG_GCC5/IA32/EmulatorPkg/Unix/Host/Host/OUTPUT/static_library_files.lst,--end-group
> -lpthread -ldl -lXext -lX11
> INFO - /usr/bin/ld: skipping incompatible
> /usr/lib/gcc/x86_64-linux-gnu/9/libgcc.a when searching for -lgcc
> INFO - /usr/bin/ld: cannot find -lgcc
> INFO - /usr/bin/ld: skipping incompatible
> /usr/lib/gcc/x86_64-linux-gnu/9/libgcc.a when searching for -lgcc
> INFO - /usr/bin/ld: cannot find -lgcc
> INFO - collect2: error: ld returned 1 exit status
> INFO - make: *** [GNUmakefile:421:
> /home/vsts/work/1/s/Build/EmulatorIA32/DEBUG_GCC5/IA32/EmulatorPkg/Unix/Host/Host/DEBUG/Host]
> Error 1

So for now, stick with the previous Ubuntu environment, which continues to
be supported, per
<https://github.com/actions/virtual-environments/issues/1816>.

The following ticket has been opened about this particular issue:
<https://github.com/actions/virtual-environments/issues/2324>.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Message-Id: <20201221031930.1799-1-bob.c.feng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: update the commit message to refer to GCC rather than
 to QEMU]
2020-12-21 14:31:57 +00:00
Michael D Kinney
6932f4bfe5 MdeModulePkg/PciSioSerialDxe: Flush Tx before config change
https://bugzilla.tianocore.org/show_bug.cgi?id=3114

Add logic to flush all UART transmit buffers if there is a
config change from Reset(), SetAttributes() or SetControl().
Use a timeout in the flush operation, so the system can
continue to boot if the transmit buffers can not be
flushed for any reason.

This change prevents lost characters on serial debug logs
and serial consoles when a config change is made.  It also
prevents a UART from getting into a bad state or reporting
error status due to characters being transmitted at the same
time registers are updated with new communications settings.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-12-19 01:29:44 +00:00
Quan Nguyen
1159fc3230 ArmPkg/ArmGicV3Dxe: Use ArmGicSetInterruptPriority() to set priority
When Affinity Routing enabled, the GICR_IPRIORITYR<n> is used to set
priority for SGIs and PPIs instead of GICD_IPRIORITYR<n>.
This patch calls ArmGicSetInterruptPriority() helper function when
setting priority to handle the difference.

Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 18:09:18 +00:00
Quan Nguyen
0d49b82e4f ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper function
According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR<n>,
Interrupt Priority Registers, n = 0 - 254, when affinity routing is
enabled for the Security state of an interrupt, GICR_IPRIORITYR<n>
is used instead of GICD_IPRIORITYR<n> where n = 0 to 7 (that is, for
SGIs and PPIs).

As setting interrupt priority for SGIs and PPIs are handled using
difference registers depends on the mode, this patch instroduces
ArmGicSetInterruptPriority() helper function to handle the discrepancy.

Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 18:09:18 +00:00
Leif Lindholm
e2bfd172e4 ArmPkg/ArmLib: move ArmReadIdPfr0/1 into private header ArmV7Lib.h
ArmReadIdPfr0 () and ArmReadIdPfr1 () are now used only inside ArmLib.
Remove the prototypes from the public header to discourage new id
register accessor additions, and direct id register access in general.
Move them into local header Arm/ArmV7Lib.h.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
bb56ce816b ArmPkg/ArmLib: rename AArch64 variant of ArmReadIdPfr0
ArmReadIdPfr0 is now used only inside ArmLib. Rename the AArch64
variant ArmReadIdAA64Pfr0 and add a declaration of that only into
local header AArch64/AArch64Lib.h.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
982b0a5778 ArmPkg/ArmLib: delete AArch64 version of ArmReadIdPfr1
The AArch64 version of ArmReadIdPfr1 is not used by any code in tree,
or in edk2-platforms. Delete it.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
0dd0d42ab5 ArmPkg: use helper to check for Security extensions in ArmArchTimerLib
Use the helper ArmHasSecurityExtensions () instead of accessing
ID_PFR1 directly. Only affects ARM build.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
740b870dc8 ArmPkg: add ArmHasSecurityExtensions () helper function
Create a helper function to eliminate direct feature register reading.

Returns BOOLEAN True if the CPU implements the Security extensions,
otherwise returns BOOL False.

This function is only implemented for ARM, not AArch64.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
7bb8dd9f98 ArmPkg: remove duplicated ARM/AArch64 ArmGicArchSecLib sources
The ID register access was the only difference between them, so
after switching to the ArmHasGicSystemRegisters () helper, there
is no longer any need to have separate ARM/AArch64 source files
for ArmGicArchSecLib, so unify them and drop the subdirectories.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
319138d3f6 ArmPkg: remove duplicated ARM/AArch64 ArmGicArchLib sources
The ID register access was the only difference between them, so
after switching to the ArmHasGicSystemRegisters () helper, there
is no longer any need to have separate ARM/AArch64 source files
for ArmGicArchLib, so unify them and drop the subdirectories.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
b7ae5efb79 ArmPkg: use ID register helper for ArmGicArch(Sec)Lib
Use ArmHasGicSystemRegisters () instead of direct ID register tests.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Leif Lindholm
5cc25cff5d ArmPkg/ArmLib: add ArmHasGicSystemRegisters () helper function
Create a helper function to eliminate direct feature register reading,
which gets messy in code shared between ARM/AArch64.

Returns BOOLEAN True if the CPU implements the GIC System Register
Interface (any version), otherwise returns BOOL False.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 15:27:26 +00:00
Borghorst, Hendrik via groups.io
6573ae8c85 OvmfPkg/PlatformBootManagerLib: fix PCI interrupt link (LNKx)
This patch fixes an issue with the current programming of the i440fx
PCI Interrupt routing assignment.

Explanation by Laszlo Ersek:

(1) The rotating pattern is a map:

  (slot, function) --> (interrupt link) [LNKA..LNKD]

(more precisely, it is a pattern from (slot, pin) to (interrupt link),
but function<->pin is an identity mapping in the QEMU hardware, so we
can just use (slot, function) rather than (slot, pin) on the left hand
side. But I digress.)

The ACPI _PRT object is generated by QEMU; it describes this map.

(2) Another map is

  (interrupt link) --> { set of possible interrupt numbers,
                         for this link }

This map is given by the LNK[A..D] ACPI objects, also given by QEMU.

(3) What the firmware is expected to do is:

(3a) for each interrupt link, select an *actual* interrupt from the set
that's possible for that link, yielding a deterministic map

  (interrupt link) --> (actual interrupt number)

and

(3b) for each PCI device/function with an interrupt pin, resolve the

  (slot, function) --> (interrupt link) --> (actual interrupt number)

functional composition, and program the result into the Interrupt Line
register of the device.

In OVMF, we do not parse the rotating map described under (1) from
QEMU's _PRT object. Instead, we duplicate the code. This is not a
problem.

In OVMF, we also do not parse the map described under (2) from QEMU's
ACPI content. Instead, we pick a specific selection (3a) that we
"apriori" know satisfies (2). This is also not a problem. OVMF's
particular selection is the PciHostIrqs table.

(

Table (2) from QEMU is

  LNKA -> { 5, 10, 11 }
  LNKB -> { 5, 10, 11 }
  LNKC -> { 5, 10, 11 }
  LNKD -> { 5, 10, 11 }

and our specific pick in OVMF, in the PciHostIrqs table, is

  LNKA -> 10
  LNKB -> 10
  LNKC -> 11
  LNKD -> 11

)

In OVMF, we also cover step (3b), in the SetPciIntLine() function.

What's missing in OVMF -- and what this patch corrects -- is that we
currently fail to program our selection for table (3) into the hardware.
We pick a specific LNKx->IRQ# mapping for each interrupt link, and we
correctly program the PCI Interrupt Line registers through those
link-to-IRQ mappings -- but we don't tell the hardware about the
link-to-IRQ mappings. More precisely, we program such a link-to-IRQ
mapping table into the hardware that is then not matched by the mapping
we use for programming the PCI device/function interrupt lines. As a
result, some PCI Interrupt Line registers will have impossible values --
a given (slot, function) may use a particular link, but also report an
interrupt number that was never picked for that link.

Output of Linux PCI Interrupt Links for i440fx before the patch:

[    0.327305] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 10 *11)
[    0.327944] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 10 *11)
[    0.328582] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 *10 11)
[    0.329208] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 *10 11)
[    0.329807] ACPI: PCI Interrupt Link [LNKS] (IRQs *9)

after the patch:

[    0.327292] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11)
[    0.327934] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
[    0.328564] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
[    0.329195] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11)
[    0.329785] ACPI: PCI Interrupt Link [LNKS] (IRQs *9)

Output of Linux PCI Interrupt Links for q35 before the patch:

[    0.307474] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11)
[    0.308027] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
[    0.308764] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
[    0.309310] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11)
[    0.309853] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11)
[    0.310508] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11)
[    0.311051] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11)
[    0.311589] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11)

after the patch:

[    0.301991] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11)
[    0.302833] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
[    0.303354] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
[    0.303873] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11)
[    0.304399] ACPI: PCI Interrupt Link [LNKE] (IRQs 5 *10 11)
[    0.304918] ACPI: PCI Interrupt Link [LNKF] (IRQs 5 *10 11)
[    0.305436] ACPI: PCI Interrupt Link [LNKG] (IRQs 5 10 *11)
[    0.305954] ACPI: PCI Interrupt Link [LNKH] (IRQs 5 10 *11)

Signed-off-by: Hendrik Borghorst <hborghor@amazon.de>
Reviewed-by: David Woodhouse <dwmw@amazon.co.uk>
Message-Id: <8dbedc4c7a1c3fd390aca915270814e3b35e13a5.camel@amazon.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-18 12:51:37 +00:00
Laszlo Ersek
089285b42c Revert "UefiCpuPkg/CpuDxe: Fix boot error"
This reverts commit cee5b0441a.

Commit cee5b0441a ("UefiCpuPkg/CpuDxe: Fix boot error", 2020-12-08)
breaks CpuDxe (and with it, OVMF boot) on AMD processors. AMD processors
cannot do far jumps to 64-bit targets, as documented in the AMD64
Architecture Programmer's Manual.

Revert the patch until a RETFQ-based substitute is posted.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Thomas Lendacky <thomas.lendacky@amd.com>
Ref: https://edk2.groups.io/g/devel/message/68597
Ref: https://www.redhat.com/archives/edk2-devel-archive/2020-December/msg00493.html
Reported-by: Thomas Lendacky <thomas.lendacky@amd.com>
Ref: https://edk2.groups.io/g/devel/message/68832
Ref: https://www.redhat.com/archives/edk2-devel-archive/2020-December/msg00737.html
Reported-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201217085055.15131-1-lersek@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3121
[lersek@redhat.com: add BZ link]
2020-12-18 11:20:55 +00:00
James Bottomley
96201ae7bf OvmfPkg/AmdSev/SecretDxe: make secret location naming generic
It is anticipated that this part of the code will work for both Intel
TDX and AMD SEV, so remove the SEV specific naming and change to
ConfidentialComputing as a more architecture neutral prefix. Apart
from the symbol rename, there are no code changes.

Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Message-Id: <20201216014146.2229-3-jejb@linux.ibm.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-18 10:45:52 +00:00
James Bottomley
caf8b3872a OvmfPkg: Change SEV Launch Secret API to be UINT64 for base and size
Although the SEV secret location must always be below 4GB, the same is
not necessarily true for Intel TDX, so change the configuration table
to contain a pair of UINT64 parameters instead of UINT32 so that any X64
location can be represented.

Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Message-Id: <20201216014146.2229-2-jejb@linux.ibm.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-18 10:45:52 +00:00
Laszlo Ersek
c487970ac8 OvmfPkg/PlatformCI: stick with "ubuntu-18.04" for now
"vm_image: 'ubuntu-latest'" now refers to Ubuntu Focal (20.04LTS), not
Ubuntu Bionic (18.04LTS), according to
<https://github.com/actions/virtual-environments/issues/1816>.

In Focal, the "qemu" package is a dummy package with no dependencies, and
so the actual emulators are not pulled in. Compare:

  https://packages.ubuntu.com/bionic/qemu
  https://packages.ubuntu.com/focal/qemu

This causes CI runs to fail.

It would be best to switch to the "qemu-system" package name, which
continues to depend on the emulators:

  https://packages.ubuntu.com/bionic/qemu-system
  https://packages.ubuntu.com/focal/qemu-system

However, while that package does make the emulators available, the
emulators crash. So for now, stick with the previous Ubuntu environment,
which continues to be supported, per
<https://github.com/actions/virtual-environments/issues/1816>.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201217204049.26817-3-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 09:51:16 +00:00
Laszlo Ersek
90683caedf ArmVirtPkg/PlatformCI: stick with "ubuntu-18.04" for now
"vm_image: 'ubuntu-latest'" now refers to Ubuntu Focal (20.04LTS), not
Ubuntu Bionic (18.04LTS), according to
<https://github.com/actions/virtual-environments/issues/1816>.

In Focal, the "qemu" package is a dummy package with no dependencies, and
so the actual emulators are not pulled in. Compare:

  https://packages.ubuntu.com/bionic/qemu
  https://packages.ubuntu.com/focal/qemu

This causes CI runs to fail.

It would be best to switch to the "qemu-system" package name, which
continues to depend on the emulators:

  https://packages.ubuntu.com/bionic/qemu-system
  https://packages.ubuntu.com/focal/qemu-system

However, while that package does make the emulators available, the
emulators crash. So for now, stick with the previous Ubuntu environment,
which continues to be supported, per
<https://github.com/actions/virtual-environments/issues/1816>.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201217204049.26817-2-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-18 09:51:16 +00:00
Abner Chang
e6ae24e1d6 RedfishPkg/RedfishCredentialDxe: EDKII Redfish Credential DXE driver
EDKII Redfish Credential DXE driver which abstracts platform Redfish
credential implementation.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-12-16 08:24:26 +00:00
Abner Chang
2255a2b107 RedfishPkg/Include: EDKII Redfish Credential Header file
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-12-16 08:24:26 +00:00
Sheng Wei
5c3cdebf95 MdePkg/include: Add DMAR SATC Table Definition
SoC Integrated Address Translation Cache (SATC) reporting structure is one
of the Remapping Structure, which is imported since Intel(R) Virtualization
Technology for Directed I/O (VT-D) Architecture Specification v3.2.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Kowalewski Robert <robert.kowalewski@intel.com>
Cc: Feng Roger <roger.feng@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-15 11:18:52 +00:00
Chen, Christine
532f907b75 BaseTools: Add comments in StructurePcd DSC file.
Currently VFR files have variables comments which will not be
added into StructurePcd.dsc file. Thus, it is not convenient for
developer to Modify Pcds. To solve this problem, The comments will
be modified to user friendly format and added after the corresponding
Pcd values in StructurePcd.dsc file.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-12-15 07:17:12 +00:00
Michael D Kinney
dcaa939365 MdeModulePkg/Variable/RuntimeDxe: Add Variable Lock Protocol Unit Tests
https://bugzilla.tianocore.org/show_bug.cgi?id=3111

Add host based unit tests for the multiple lock case using Variable Lock
Protocol, Variable Policy Protocol, and mixes of Variable Lock Protocol
and Variable Policy Protocol.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-12-15 06:26:34 +00:00
Bret Barkelew
a18a9bde36 MdeModulePkg/Variable/RuntimeDxe: Restore Variable Lock Protocol behavior
https://bugzilla.tianocore.org/show_bug.cgi?id=3111

The VariableLock shim currently fails if called twice because the
underlying Variable Policy engine returns an error if a policy is set
on an existing variable.

This breaks existing code which expect it to silently pass if a variable
is locked multiple times (because it should "be locked").

Refactor the shim to confirm that the variable is indeed locked and then
change the error to EFI_SUCCESS and generate a DEBUG_ERROR message so
the duplicate lock can be reported in a debug log and removed.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-12-15 06:26:34 +00:00
Michael D Kinney
be746104d1 .azurepipelines: Use alternate cmocka repo
Use git config insteadOf feature to use an alternate
cmocka repo from github when running CI.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-15 05:43:49 +00:00
James Bottomley
01726b6d23 OvmfPkg/AmdSev: Expose the Sev Secret area using a configuration table
Now that the secret area is protected by a boot time HOB, extract its
location details into a configuration table referenced by
gSevLaunchSecretGuid so the boot loader or OS can locate it before a
call to ExitBootServices().

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201130202819.3910-7-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: fix indentation of InstallConfigurationTable() args]
2020-12-14 19:56:18 +00:00
James Bottomley
bff2811c6d OvmfPkg/AmdSev: assign and reserve the Sev Secret area
Create a one page secret area in the MEMFD and reserve the area with a
boot time HOB.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201130202819.3910-6-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: s/protect/reserve/g in the commit message, at Ard's
 and James's suggestion]
2020-12-14 19:56:18 +00:00
James Bottomley
224752eced OvmfPkg: create a SEV secret area in the AmdSev memfd
SEV needs an area to place an injected secret where OVMF can find it
and pass it up as a ConfigurationTable.  This patch implements the
area itself as an addition to the SEV enhanced reset vector table using
an additional guid (4c2eb361-7d9b-4cc3-8081-127c90d3d294).

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201130202819.3910-5-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: fix typo in "ResetVectorVtf0.asm" comments]
2020-12-14 19:56:18 +00:00
James Bottomley
b261a30c90 OvmfPkg/AmdSev: add Grub Firmware Volume Package
This is used to package up the grub bootloader into a firmware volume
where it can be executed as a shell like the UEFI Shell.  Grub itself
is built as a minimal entity into a Fv and then added as a boot
option.  By default the UEFI shell isn't built but for debugging
purposes it can be enabled and will then be presented as a boot option
(This should never be allowed for secure boot in an external data
centre but may be useful for local debugging).  Finally all other boot
options except grub and possibly the shell are stripped and the boot
timeout forced to 0 so the system will not enter a setup menu and will
only boot to grub.  This is done by copying the
Library/PlatformBootManagerLib into Library/PlatformBootManagerLibGrub
and then customizing it.

Boot failure is fatal to try to prevent secret theft.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Message-Id: <20201130202819.3910-4-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
[lersek@redhat.com: replace local variable initialization with assignment]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: squash 'OvmfPkg: add "gGrubFileGuid=Grub" to
 GuidCheck.IgnoreDuplicates', reviewed stand-alone by Phil (msgid
 <e6eae551-8563-ccfb-5547-7a97da6d46e5@redhat.com>) and Ard (msgid
 <10aeda37-def6-d9a4-6e02-4c66c1492f57@arm.com>)]
2020-12-14 19:56:18 +00:00
James Bottomley
30d277ed7a OvmfPkg/Amdsev: Base commit to build encrypted boot specific OVMF
This commit represents the file copied from OvmfPkgX64 with minor
changes to change the build name.

This package will form the basis for adding Sev specific features.
Since everything must go into a single rom file for attestation, the
separated build of code and variables is eliminated.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Message-Id: <20201130202819.3910-3-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-14 19:56:18 +00:00
James Bottomley
ae1ef911a9 OvmfPkg/ResetVector: convert SEV-ES Reset Block structure to be GUIDed
Convert the current ES reset block structure to an extensible guid
based structure by appending a header and length, which allow for
multiple guid based data packets to be inserted.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3077
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Message-Id: <20201130202819.3910-2-jejb@linux.ibm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-14 19:56:18 +00:00
Sean Brogan
ef3e73c6a0 OvmfPkg: Disable EccCheck CI until EccCheck issues are fixed
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Message-Id: <20201210215640.1260-1-mikuback@linux.microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-14 17:29:31 +00:00
Ray Ni
793c59da13 UefiCpuPkg/CpuFeature: reduce time complexty to calc CpuInfo.First
CpuInfo.First stores whether the current thread belongs to the first
package in the platform, first core in a package, first thread in a
core.

But the time complexity of original algorithm to calculate the
CpuInfo.First is O (n) * O (p) * O (c).
  n: number of processors
  p: number of packages
  c: number of cores per package

The patch trades time with space by storing the first package, first
core per package, first thread per core in an array.
The time complexity becomes O (n).

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
2020-12-14 08:54:22 +00:00
Star Zeng
004f9776f4 UefiCpuPkg RegisterCpuFeaturesLib: Use AllocatePages() for InitOrder
The required buffer size for InitOrder will be 96K when NumberOfCpus=1024.
sizeof (CPU_FEATURES_INIT_ORDER) = 96
NumberOfCpus = 1024 = 1K
sizeof (CPU_FEATURES_INIT_ORDER) * NumberOfCpus = 96K

AllocateZeroPool() will call to PeiServicesAllocatePool() which will use
EFI_HOB_MEMORY_POOL to management memory pool.
EFI_HOB_MEMORY_POOL.Header.HobLength is UINT16 type, so there is no way
for AllocateZeroPool() to allocate > 64K memory.

So AllocateZeroPool() could not be used anymore for the case above or
even bigger required buffer size.

This patch updates the code to use AllocatePages() instead of
AllocateZeroPool() to allocate buffer for InitOrder.

Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
2020-12-14 05:49:50 +00:00
Baraneedharan Anbazhagan
1f304300ff MdeModulePkg: Fix SetMem parameter in OnigurumaUefiPort
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3085

Coding error in converting memset call to SetMem - Length and Value
is not swapped on calling SetMem

Signed-off-by: Baraneedharan Anbazhagan <anbazhagan@hp.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-14 02:11:33 +00:00
Marc Moisson-Franckhauser
d4633b36b9 ShellPkg/AcpiView: PCCT Parser
Bugzilla: 3047 (https://bugzilla.tianocore.org/show_bug.cgi?id=3047)

Create a new parser for the PCCT Table.

The PCCT Table is used to describe how the OSPM can
communicate with entities outside the platform. It
describes which memory spaces correspond to which
entity as well as a few of the needed information
to handle the communications.

This new PCCT parser dumps the values and names of
the table fields. It also performs some validation
on the table's fields.

Signed-off-by: Marc Moisson-Franckhauser <marc.moisson-franckhauser@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-12-11 02:21:23 +00:00
Sami Mujawar
856cf5abf7 ShellPkg/AcpiView: Fix field validator invocation
Bugzilla: 3046 (https://bugzilla.tianocore.org/show_bug.cgi?id=3046)

The field validator function provides means to validate fields
in the ACPI table structures. To print complex field types a
print formatter function is provided.

The field validator was being invoked for simple data fields
for which the default print format is used. However, the field
validator function was not invoked if a print formatter function
was provided.

This problem is noticed when a Generic Address Structure (GAS)
is printed using DumpGas() and a field validator is present
to validate the GAS structure.

To fix this move the invocation of the field validator after
the field is printed such that the validation function is
called even when a print formatter function is present.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-12-11 02:21:23 +00:00
Abner Chang
10dc8c561c RedfishPkg/RedfishRestExDxe: Implementation of EFI REST EX Protocol
BZ#: 2908
https://bugzilla.tianocore.org/show_bug.cgi?id=2908

Implementation of EFI EX Protocol according to UEFI spec
2.8 Section 29.7.2 EFI REST EX Protocol.
This is the network stack based EFI REST EX protocol instance.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-12-10 06:04:49 +00:00
Rebecca Cran
0db89a661f MdePkg,ShellPkg: Fix typo in SMBIOS_TABLE_TYPE17 field FirmwareVersion
"FirmwareVersion" was misspelled "FirwareVersion".
Also, update SmbiosView PrintInfo.c to use the new field name.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-10 02:24:10 +00:00
Rebecca Cran
bd9da7b1da MdePkg,ShellPkg: Fix typo in SMBIOS_TABLE_TYPE4 field ProcessorManufacturer
In SmBios.h, the SMBIOS_TABLE_TYPE4 field "ProcessorManufacture"
should be "ProcessorManufacturer".

Also, update SmbiosView PrintInfo.c to use the new field name.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-10 02:24:10 +00:00
Rebecca Cran
e157c8f9ed MdePkg: Fix typos in SmBios.h PROCESSOR_CHARACTERISTIC_FLAGS struct
Fix typos of "Processor64BitCapable", "ProcessorEnhancedVirtualization",
and Processor128BitCapable.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-12-10 02:24:10 +00:00
Pierre Gondois
272a1db63a ArmPlatformPkg: Fix cspell reported spelling/wording
The edk2 CI runs the "cspell" spell checker tool. Some words
are not recognized by the tool, triggering errors.
This patch modifies some spelling/wording detected by cspell.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
061cbbc111 ArmPlatformPkg: Fix Ecc error 8001 in PrePi
This patch fixes the following Ecc reported error:
Only capital letters are allowed to be used for #define
declarations

The "SerialPrint" macro is definied for the PrePi module
residing in the ArmPlatformPkg. It is never used in the module.
The macro is thus removed.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
2dfd81aaf5 ArmPlatformPkg: Fix Ecc error 10006 in ArmPlatformPkg.dsc
This patch fixes the following Ecc reported error:
There should be no unnecessary inclusion of library
classes in the INF file

This comes with the additional information:
"The Library Class [TimeBaseLib] is not used
in any platform"
"The Library Class [PL011UartClockLib] is not used
in any platform"
"The Library Class [PL011UartLib] is not used
in any platform"

Indeed, the PL011SerialPortLib module requires the
PL011UartClockLib and PL011UartLib libraries.
The PL031RealTimeClockLib module requires the TimeBaseLib
library.
ArmPlatformPkg/ArmPlatformPkg.dsc builds the two modules,
but doesn't build the required libraries. This patch adds
the missing libraries to the [LibraryClasses.common] section.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
42bec8c810 ArmPlatformPkg: Fix Ecc error 10014 in SP805WatchdogDxe
This patch fixes the following Ecc reported error:
No used module files found

The source file
[ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.h]
is existing in module directory but it is not described
in INF file.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
2e0cbfcbed ArmPlatformPkg: Fix Ecc error 10014 in PL061GpioDxe
This patch fixes the following Ecc reported error:
No used module files found

The source file
[ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.h]
is existing in module directory but it is not described
in INF file.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
a36a0f1d81 ArmPlatformPkg: Fix Ecc error 10014 in LcdGraphicsOutputDxe
This patch fixes the following Ecc reported error:
No used module files found

The source file
[ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h]
is existing in module directory but it is not described
in INF file.

Files in [Sources.common] are also alphabetically re-ordered.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
c5d970a01e ArmPlatformPkg: Fix Ecc error 10016 in LcdPlatformNullLib
This patch fixes the following Ecc reported error:
Module file has FILE_GUID collision with other
module file

The two .inf files with clashing GUID are:
edk2\ArmPlatformPkg\PrePeiCore\PrePeiCoreMPCore.inf
edk2\ArmPlatformPkg\Library\LcdPlatformNullLib\LcdPlatformNullLib.inf

The PrePeiCoreMPCore module has been imported in 2011 and the
LcdPlatformNullLib module has been created in 2017. The
PrePeiCoreMPCore has the precedence.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
746dda63b2 ArmPlatformPkg: Fix Ecc error 10016 in PrePi
This patch fixes the following Ecc reported error:
Module file has FILE_GUID collision with other
module file

The two .inf files with clashing GUID are:
edk2\ArmPlatformPkg\PrePi\PeiUniCore.inf
edk2\ArmPlatformPkg\PrePi\PeiMPCore.inf

Both files seem to have been imported from the previous
svn repository as the same time.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
28978df0bd ArmPlatformPkg: Fix Ecc error 5007 in PL031RealTimeClockLib
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
1485e8bbc8 ArmPlatformPkg: Fix Ecc error 5007 in PL061GpioDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
4c7e107810 ArmPlatformPkg: Fix Ecc error 5007 in NorFlashDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
eb97f13839 ArmPlatformPkg: Fix Ecc error 5007 in LcdGraphicsOutputDxe
This patch fixes the following Ecc reported error:
There should be no initialization of a variable as
part of its declaration

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
d315bd2286 ArmPlatformPkg: Fix Ecc error 3002 in PL061GpioDxe
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
ee78edceca ArmPlatformPkg: Fix Ecc error 3002 in PL011UartLib
This patch fixes the following Ecc reported error:
Non-Boolean comparisons should use a compare operator
(==, !=, >, < >=, <=)

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Pierre Gondois
dd917bae85 ArmPlatformPkg: Fix Ecc error 3001 in NorFlashDxe
This patch fixes the following Ecc reported error:
Boolean values and variable type BOOLEAN should not use
explicit comparisons to TRUE or FALSE

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-12-09 15:32:12 +00:00
Chasel Chiu
f95e80d832 IntelFsp2Pkg/GenCfgOpt.py: Incremental build with UPD in sub DSC.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3107

Current script only compares main DSC and output file datetime
to determine if re-generation required or not.
When UPD defined in sub DSC and was modified current script cannot
detect and will not re-generate output files which caused incremental
build issue.

Since UPD can be defined in any sub DSC the script has been updated
to compare all DSC datetime with output files to determine re-generation
is needed or not.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Tested-by: Yuwei Chen <yuwei.chen@intel.com>
2020-12-09 12:26:10 +00:00
Guo Dong
7061294be5 UefiCpuPkg/SmmCpuFeaturesLib: Add Tiger Lake support
Add Tiger Lake ModelId support in the SMM CPU feature lib.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-12-08 23:07:22 +00:00
Guo Dong
cee5b0441a UefiCpuPkg/CpuDxe: Fix boot error
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3084

When DXE drivers are dispatched above 4GB memory and
the system is already in 64bit mode, the address
setCodeSelectorLongJump in stack will be override
by parameter. so change to use 64bit address and
jump to qword address.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-12-08 22:17:55 +00:00
wenyi,xie via groups.io
8e4cb8fbce ArmPkg/ArmDisassemblerLib: fix incorrect comparison
As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3,
so the comparison between shift and 0x12 will always be false. The right
shift type of ASR is 0x2.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-12-08 13:58:33 +00:00
Abner Chang
4b69fab6e2 EmulatorPkg: Define default value of NETWORK_HTTP_ENABLE
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=3104
Incorporate with commit 126115a9, set default NETWORK_HTTP_ENABLE
to FALSE.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2020-12-07 08:14:50 +00:00
Divneil Rai Wadhawan
265eabc905 UnitTestFrameworkPg: Fix build failure of MdeModulePkg with UnitTestLib
o LIBRARY_CLASS for UnitTestLib has been extended to support the classes
  required in building of MdeModulePkg

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-12-05 01:52:14 +00:00
Abner Chang
97e2b622d1 NetworkPkg/HttpBootDxe: Utilize HttpIoLib
Remove HTTP IO realted funcitons from HttpBootDxe
and use HttpIoLib instead.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-12-04 11:45:07 +00:00
Abner Chang
375e9b190e NetworkPkg: Add Http IO Helper Library to NetworkPkg
This library provides HTTP IO helper functions.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-12-04 11:45:07 +00:00
Abner Chang
71a4041541 NetworkPkg/Library: Implementation of Http IO Helper Library
Add HTTP IO helper library which could be used by HTTP applications
such as HTTP Boot, Redfish HTTP REST EX driver instance and etc.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-12-04 11:45:07 +00:00
wenyi xie
c02bdb276b MdeModulePkg/FileExplorerLib: remove redundant null pointer check
If "Info" is a valid pointer to an EFI_FILE_SYSTEM_VOLUME_LABEL
structure, then "Info->VolumeLabel" denotes a valid array object.
When the "Info->VolumeLabel" expression is evaluated, as seen in
the LibFindFileSystem(), it is implicitly converted to
(&Info->VolumeLabel[0]). Because the object described by the
expression (Info->VolumeLabel[0]) is a valid CHAR16 object, its
address can never compare equal to NULL. Therefore, the condition
(Info->VolumeLabel == NULL) will always evaluate to FALSE.
Substitute the constant FALSE into the "if" statement, and
simplify the resultant code (eliminate the dead branch).

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-04 05:56:09 +00:00
Vitaly Cheptsov
31e8a47b62 MdeModulePkg: Fix undefined reference to memcpy with XCODE5
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3098

XCODE5 toolchain in NOOPT mode generates memcpy when trying
to copy PEI_CORE_FV_HANDLE structure. This breaks OVMF
compilation with XCODE5.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Vitaly Cheptsov <cheptsov@ispras.ru>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-12-04 02:59:38 +00:00
Ray Ni
6af76adbbf UefiCpuPkg/Feature: Support different thread count per core
Today's code assumes every core contains the same number of threads.
It's not always TRUE for certain model.
Such assumption causes system hang when thread count per core
is different and there is core or package dependency between CPU
features (using CPU_FEATURE_CORE_BEFORE/AFTER,
CPU_FEATURE_PACKAGE_BEFORE/AFTER).

The change removes such assumption by calculating the actual thread
count per package and per core.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Yun Lou <yun.lou@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-12-04 01:18:56 +00:00
Abner Chang
126115a9fb NetworkPkg: Add NETWORK_HTTP_ENABLE macro
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2917

Add NETWORK_HTTP_ENABLE macro and separate HttpDxe
and HttpUtilitiesDxe drivers from
HTTP_NETWORK_HTTP_BOOT_ENABLE macro.

Current NETWORK_HTTP_BOOT_ENABLE macro is defined to enable HTTP
boot feature in POST, this macro is not only enabling HTTP Boot
related modules but also enabling other generic HTTP modules
such as HttpDxe, HttpUtilitiesDxe and DnsDxe.
These HTTP base drivers would not be only used by HTTP boot
when we introduce the use case of Redfish implementation over
HTTP to edk2.
We should have a dedicate macro to enable generic HTTP functions
on Network stack and additionally provide NETWORK_HTTP_BOOT_ENABLE
for HTTP boot functionality for the use case that platform doesn't
require HTTP boot.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-12-03 17:08:11 +00:00
Guo Dong
6d95eff882 UefiPayloadPkg: Fix master by adding SafeIntLib
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2020-12-03 15:54:29 +00:00
Abner Chang
484e869dfd EmulatorPkg: Redfish related changes on EmulatorPkg
BZ:
https://bugzilla.tianocore.org/show_bug.cgi?id=3102

- REDFISH_ENABLE definition to control EFI Redfish support
- Add Redfish platform host interface library to
  EmulatorPkg build.
- Set RestExServiceDevicePath PCD value.
- Add Redfish host interface config EFI application
  to EmulatorPkg build.
- Use Redfish DSC/FDF include file.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2020-12-03 07:54:44 +00:00
Abner Chang
f94487284b EmulatorPkg: Add allowable dependency
BZ:
https://bugzilla.tianocore.org/show_bug.cgi?id=3102

Add RedfishPkg to DependencyCheck section in
yaml file.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2020-12-03 07:54:44 +00:00
Abner Chang
59935c3813 EmulatorPkg/Application: Publish Redfish Host Interface Record
BZ:
https://bugzilla.tianocore.org/show_bug.cgi?id=3102

The EFI application to configure the network information of
Redfish service.
The configurations are stored in EFI variables.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2020-12-03 07:54:44 +00:00
Abner Chang
cc5faa780d EmulatorPkg/RedfishPlatformHostInterfaceLib library
BZ:
https://bugzilla.tianocore.org/show_bug.cgi?id=3102

Platform specific implementation of providing
Redfish host interface information.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Acked-by: Ray Ni <ray.ni@intel.com>
2020-12-03 07:54:44 +00:00
Guo Dong
7c4ab1c2ef UefiPayloadPkg: Remove PEI phase from Payload
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100

It is not necessary to have a PEI phase in the UEFI payload since no
specific PEI task is required. This patch adds a UefiPayloadEntry
driver to get UEFI Payload required information from the bootloaders,
convert them into a HOB list, load DXE core and transfer control to it.

Here is the change details:
1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc.
2) Added UefiPayloadEntry driver. this is the only driver before DXE core.
3) Added Pure X64 support, dropped Pure IA32 (Could add later if required)
   64bit payload with 32bit entry point is still supported.
4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build.
   Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc

Tested with SBL and coreboot on QEMU.

Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
2020-12-02 23:10:22 +00:00
Rebecca Cran
9fb629edd7 OvmfPkg/Bhyve: Fix various style issues
Fix ordering of includes, sources, libraries etc.
Remove leading/trailing underscores from include guards.
Change INF and DSC version numbers to be decimal.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201130053412.2-6-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30 17:49:39 +00:00
Rebecca Cran
3cdfedc20e OvmfPkg: Improve style and formatting in BhyveFwCtlLib.h
There were some problems with the formatting and style that made the
file difficult to read.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201130053412.2-5-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30 17:49:39 +00:00
Rebecca Cran
8d676f54ff OvmfPkg: Fix style of BhyveFwCtlLib.inf
Fix the order of libraries and update INF_VERSION to 1.29.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201130053412.2-4-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30 17:49:39 +00:00
Rebecca Cran
f2d262e402 OvmfPkg: Improve code style/formatting in BhyveFwCtlLib.c
The code style in Library/BhyveFwCtlLib/BhyveFwCtlLib.c was very
inconsistent. Fix it to pass the ECC tool checks by typedef'ing
structs, and improve indentation.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201130053412.2-3-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30 17:49:39 +00:00
Rebecca Cran
666923359e OvmfPkg: Fix BhyveFwCtlLib build with VS2019
Update BhyveFwCtlLib.c to fix problems with UINT32/UINTN types that
prevented Bhyve from building with VS2019.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201130053412.2-2-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-30 17:49:39 +00:00
Chen, Christine
8501bb0c05 BaseTools: Collect full Header files for struct finding.
Currently, only parts of the Header files can be collected which
caused some struct definition can not be found. To solve this issue,
Header files full collection has been added in this file to support
the struct finding.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-11-30 02:55:39 +00:00
Wenyi Xie
f69a2b9a42 OvmfPkg/XenPvBlkDxe: add return value if allocting fail
return EFI_OUT_OF_RESOURCES if pool allocating fail.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Message-Id: <1606183592-81879-2-git-send-email-xiewenyi2@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-27 17:52:59 +00:00
Rebecca Cran
73b604bb1e OvmfPkg/Bhyve: Copy Real16ToFlat32.asm and enable cache in CR0
Copy UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm to
OvmfPkg/Bhyve/ResetVector/Ia16, with one change, as has also been
made in XenResetVector:

  - SEC_DEFAULT_CR0: enable cache (bit 30 or CD set to 0)

With the CD bit set to 1, this has the downside on AMD systems of
actually running with the cache disabled, which slows the entire system
to a crawl.
There's no need for this bit to be set in virtualized
environments.

This patch reapplies the change from the freebsd uefi-edk2 repo at
08c00f4e8d

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201124005733.18107-4-rebecca@bsdio.com>
2020-11-27 16:48:47 +00:00
Rebecca Cran
029677943f OvmfPkg/Bhyve: Add support for the AMD host bridge
On bhyve, either an Intel or AMD host bridge can be specified, with the
default being Intel.
Both are identical, except the AMD one uses a PCI vendor ID of AMD.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201124005733.18107-3-rebecca@bsdio.com>
2020-11-27 16:48:47 +00:00
Rebecca Cran
337fda061c OvmfPkg/Bhyve: Add VariablePolicy engine to Bhyve
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201124005733.18107-2-rebecca@bsdio.com>
2020-11-27 16:48:47 +00:00
James Bottomley
872f953262 MdeModulePkg/VariablePolicyLib: Fix runtime panic in ValidateSetVariable()
The current variable policy is allocated by AllocatePool(), which is
boot time only.  This means that if you do any variable setting in the
runtime, the policy has been freed.  Ordinarily this isn't detected
because freed memory is still there, but when you boot the Linux
kernel, it's been remapped so the actual memory no longer exists in
the memory map causing a page fault.

Fix this by making it AllocateRuntimePool().  For SMM drivers, the
platform DSC is responsible for resolving the MemoryAllocationLib
class to the SmmMemoryAllocationLib instance. In the
SmmMemoryAllocationLib instance, AllocatePool() and
AllocateRuntimePool() are implemented identically. Therefore this
change is a no-op when the RegisterVariablePolicy() function is built
into an SMM driver. The fix affects runtime DXE drivers only.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3092
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-27 01:19:34 +00:00
Kun Qin
21f984cede CryptoPkg: BaseCryptLib: Fix buffer double free in CryptPkcs7VerifyEku
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2459

SignerCert is part of Pkcs7 instance when both have valid content. OpenSLL
PKCS7_free function will release the memory of SignerCert when applicable.
Freeing SignerCert with X509_free again might cause page fault if use-
after-free guard is enabled.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>

Signed-off-by: Kun Qin <kun.q@outlook.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2020-11-26 03:22:24 +00:00
gaoliming
e9d62effa3 Revert "SecurityPkg: Add RPMC Index to the RpmcLib"
This reverts commit 6c8dd15c4a.

Based on the discussion https://edk2.groups.io/g/devel/message/67764,
this change is regarded as the feature request. But, it doesn't pass
reviewed before 202011 stable tag soft feature freeze. So, it should
not be merged into 202011 stable tag.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Nishant C Mistry <nishant.c.mistry@intel.com>
Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2020-11-26 01:22:29 +00:00
Michael D Kinney
388f9a9355 CryptoPkg/Test/UnitTest/Library/BaseCryptLib: Fix MD5 Hash tests
Only include MD5 unit tests if ENABLE_MD5_DEPRECATED_INTERFACES
is defined and define ENABLE_MD5_DEPRECATED_INTERFACES for host
based unit tests so MD5 services are always tested.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-11-25 17:54:11 +00:00
Michael D Kinney
3ab9d60fcb OvmfPkg/PlatformCI/.azurepiplines: Use stable release of QEMU
Install the 2020.08.14 release of QEMU for Windows.

The QEMU release from 2020.11.20 is installed into the incorrect
directory and is causing EDK II CI failures in the run to shell
step.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2020-11-25 17:54:11 +00:00
Sean Brogan
3d39107f2d .azurepipelines/templates/platform-build-run-steps.yml: Fetch target branch
Update Platform build steps process to fetch target branch

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-11-25 17:54:11 +00:00
Sean Brogan
391610903b .azurepipelines/templates/pr-gate-steps.yml: Fetch target branch
Add step to fetch target branch so that PR_EVAL can resolve diff

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-11-25 17:54:11 +00:00
Laszlo Ersek
e7bd0dd26d MdeModulePkg/LzmaCustomDecompressLib: catch 4GB+ uncompressed buffer sizes
The LzmaUefiDecompressGetInfo() function
[MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaDecompress.c] currently
silently truncates the UINT64 "DecodedSize" property of the compressed
blob to the UINT32 "DestinationSize" output parameter.

If "DecodedSize" is 0x1_0000_0100, for example, then the subsequent memory
allocation (for decompression) will likely succeed (allocating 0x100 bytes
only), but then the LzmaUefiDecompress() function (which re-fetches the
uncompressed buffer size from the same LZMA header into a "SizeT"
variable) will overwrite the buffer.

Catch (DecodedSize > MAX_UINT32) in LzmaUefiDecompressGetInfo() at once.
This should not be a practical limitation. (The issue cannot be fixed for
32-bit systems without spec modifications anyway, given that the
"OutputSize" output parameter of
EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL.ExtractSection() has type UINTN,
not UINT64.)

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1816
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201119115034.12897-2-lersek@redhat.com>
2020-11-21 02:04:40 +00:00
Laszlo Ersek
47343af304 MdeModulePkg/Core/Dxe: limit FwVol encapsulation section recursion
The DXE Core sets up a protocol notify function in its entry point, for
instances of the Firmware Volume Block2 Protocol:

  DxeMain()           [DxeMain/DxeMain.c]
    FwVolDriverInit() [FwVol/FwVol.c]

Assume that a 3rd party UEFI driver or application installs an FVB
instance, with crafted contents. The notification function runs:

  NotifyFwVolBlock() [FwVol/FwVol.c]

installing an instance of the Firmware Volume 2 Protocol on the handle.

(Alternatively, assume that a 3rd party application calls
gDS->ProcessFirmwareVolume(), which may also produce a Firmware Volume 2
Protocol instance.)

The EFI_FIRMWARE_VOLUME2_PROTOCOL.ReadSection() member performs "a
depth-first, left-to-right search algorithm through all sections found in
the specified file" (quoting the PI spec), as follows:

  FvReadFileSection()   [FwVol/FwVolRead.c]
    GetSection()        [SectionExtraction/CoreSectionExtraction.c]
      FindChildNode()   [SectionExtraction/CoreSectionExtraction.c]
        FindChildNode() // recursive call

FindChildNode() is called recursively for encapsulation sections.

Currently this recursion is not limited. Introduce a new PCD
(fixed-at-build, or patchable-in-module), and make FindChildNode() track
the section nesting depth against that PCD.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1743
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201119105340.16225-3-lersek@redhat.com>
2020-11-21 01:40:53 +00:00
Laszlo Ersek
b9bdfc7285 MdeModulePkg/Core/Dxe: assert SectionInstance invariant in FindChildNode()
FindChildNode() has two callers: GetSection(), and FindChildNode() itself.

- At the GetSection() call site, a positive (i.e., nonzero)
  SectionInstance is passed. This is because GetSection() takes a
  zero-based (UINTN) SectionInstance, and then passes
  Instance=(SectionInstance+1) to FindChildNode().

- For reaching the recursive FindChildNode() call site, a section type
  mismatch, or a section instance mismatch, is necessary. This means,
  respectively, that SectionInstance will either not have been decreased,
  or not to zero anyway, at the recursive FindChildNode() call site.

Add two ASSERT()s to FindChildNode(), for expressing the (SectionSize>0)
invariant.

In turn, the invariant provides the explanation why, after the recursive
call, a zero SectionInstance implies success. Capture it in a comment.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201119105340.16225-2-lersek@redhat.com>
2020-11-21 01:40:53 +00:00
Nishant Mistry
6c8dd15c4a SecurityPkg: Add RPMC Index to the RpmcLib
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2594

The re-design requires multiple RPMC counter usages.
The consumer will be capable of selecting amongst multiple counters.

Signed-off-by: Nishant C Mistry <nishant.c.mistry@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-19 08:18:03 +00:00
Bob Feng
098af8b408 IntelFsp2Pkg/Tools: Fixed PatchFv.py to parse new Fv map file format
The commit 76e8aac158 changed Fv map format.
It added the image type to better support source level debug. But it broke
the function of PatchFv.py because PatchFv.py also consume Fv map file.

This patch is to update PatchFv.py to make it work again.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Yunhua Feng <fengyunhua@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-19 07:35:23 +00:00
Mingyue Liang
6c4efc0509 BaseTools: Resolve index out of range errors.
This problem is generated by solving bz2972's
patch, and the commit ID is
0af7f8e6a9.

This is a problem when updating the DEPs file.
The code does not consider that there is only
one line of content in the file, so the filter
condition is added to prevent the index from
exceeding the range.

Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-19 02:22:57 +00:00
Sheng Wei
404250c8f7 UefiCpuPkg/PiSmmCpuDxeSmm: Reflect page table depth with page table address
When trying to get page table base, if mInternalCr3 is zero, it will use
 the page table from CR3, and reflect the page table depth by CR4 LA57 bit.
If mInternalCr3 is non zero, it will use the page table from mInternalCr3
 and reflect the page table depth of mInternalCr3 at same time.
In the case of X64, we use m5LevelPagingNeeded to reflect the depth of
 the page table. And in the case of IA32, it will not the page table depth
 information.

This patch is a bug fix when enable CET feature with 5 level paging.
The SMM page tables are allocated / initialized in PiCpuSmmEntry().
When CET is enabled, PiCpuSmmEntry() must further modify the attribute of
 shadow stack pages. This page table is not set to CR3 in PiCpuSmmEntry().
 So the page table base address is set to mInternalCr3 for modifty the
 page table attribute. It could not use CR4 LA57 bit to reflect the
 page table depth for mInternalCr3.
So we create a architecture-specific implementation GetPageTable() with
 2 output parameters. One parameter is used to output the page table
 address. Another parameter is used to reflect if it is 5 level paging
 or not.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3015

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-11-18 04:52:26 +00:00
Sheng Wei
1a110fcd4e UefiCpuPkg/PiSmmCpuDxeSmm: Correct the Cr3 typo
Change the variable name from mInternalGr3 to mInternalCr3.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3015

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2020-11-18 04:52:26 +00:00
Gao, Zhichao
e6a12a0fc8 CryptoPkg: Make the MD5 disable as default for security
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3021

Make the deprecated MD5 disable as default setting for
security.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20201112055558.2348-14-zhichao.gao@intel.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
4ecb1ba5ef NetworkPkg/Defines: Make iSCSI disable as default
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

iSCSI is using the deprecated function MD5. It is
better to make the default setting secure. If the platforms
want to use the iSCSI, they should enable it in the platforms'
dsc file and be aware they are using an function with weak
cryptography.

Enable iSCSI in NetworkPkg.dsc for build.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20201112055558.2348-13-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
c8b94334ca OvmfPkg/BhyveX64.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-12-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
4e56034b5e OvmfPkg/OvmfXen.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-11-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
0cbf1b772b OvmfPkg/OvmfPkgX64.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-10-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
397f1f4138 OvmfPkg/OvmfPkgIa32X64.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-9-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
a2dd544f85 OvmfPkg/OvmfPkgIa32.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-8-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
99e5cf5574 ArmVirtPkg/ArmVirtQemuKernel.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-7-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
be7dc48727 ArmVirtPkg/ArmVirtQemu.dsc: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.

Enable iSCSI.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Message-Id: <20201112055558.2348-6-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
1aa2cf0521 NetworkPkg: Enable MD5 while enable iSCSI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3003

There is a plan to make MD5 disable as default.
The new MACRO ENABLE_MD5_DEPRECATED_INTERFACES
would be introduced to enable MD5. Make the
definition ahead of the change to avoid build
error after the MACRO changed.
1. Add the NetworkBuildOptions.dsc.inc to define
the MACRO for build (support: GCC, INTEL, MSFT and
RVCT)
2. Add the BuildOption file to Network.dsc.inc

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20201112055558.2348-5-zhichao.gao@intel.com>
[lersek@redhat.com: clean up comments in "NetworkBuildOptions.dsc.inc"]
[lersek@redhat.com: hoist "BuildOptions" above "Components" in
 "Network.dsc.inc" for bug compat with edk2-platforms]
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
d3d560e0f0 CryptoPkg/dsc: Enable MD5 when CRYPTO_SERVICES enable MD5
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3021

CRYPTO_SERVICES PACKAGES and ALL config would enable MD5
function. So explicitly enable MD5 while CRYPTO_SERVICES
are set PACKAGES and ALL.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20201112055558.2348-4-zhichao.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
fedd32d82f SecurityPkg/Hash2DxeCrypto: Remove SHA1 support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3027

Remove the deprecated SHA1 support of Hash2DxeCrypto
driver.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20201112055558.2348-3-zhichao.gao@intel.com>
2020-11-17 19:26:50 +00:00
Gao, Zhichao
0a1b6d0be3 SecurityPkg/Hash2DxeCrypto: Remove MD5 support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3027

Remove the deprecated MD5 support of Hash2DxeCrypto
driver.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20201112055558.2348-2-zhichao.gao@intel.com>
2020-11-17 19:26:50 +00:00
Michael D Kinney
29d59baa39 MdePkg/IndustryStandard: Fix CXL 1.1 structure layout issues
https://bugzilla.tianocore.org/show_bug.cgi?id=3074

* Fix offset of LinkLayerControlAndStatus in the
  CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerAckTimerControl in the
  CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Fix offset of LinkLayerDefeature in
  the CXL_1_1_LINK_CAPABILITY_STRUCTURE structure
* Add CXL_11_SIZE_ASSERT() macro to verify the size of
  a register layout structure at compile time and use
  it to verify the sizes of the CXL 1.1 register structures.
* Add CXL_11_OFFSET_ASSERT() macro to verify the offset of
  fields in a register layout structure at compiler time and
  use it to verify the offset of fields in CXL 1.1
  register structures.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ashraf Javeed <ashraf.javeed@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ashraf Javeed <ashraf.javeed@intel.com>
2020-11-17 01:57:22 +00:00
Bret Barkelew
124b3f9289 MdeModulePkg: Drop VarLock from RuntimeDxe variable driver
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Now that everything should be moved to
VariablePolicy, drop support for the
deprecated VarLock SMI interface and
associated functions from variable RuntimeDxe.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
98ee0c68a2 MdeModulePkg: Change TCG MOR variables to use VariablePolicy
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

These were previously using VarLock, which is
being deprecated.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
28f4616fde SecurityPkg: Allow VariablePolicy state to delete authenticated variables
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Causes AuthService to check
IsVariablePolicyEnabled() before enforcing
write protections to allow variable deletion
when policy engine is disabled.

Only allows deletion, not modification.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
e176bafc9d MdeModulePkg: Allow VariablePolicy state to delete protected variables
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

TcgMorLockSmm provides special protections for
the TCG MOR variables. This will check
IsVariablePolicyEnabled() before enforcing
them to allow variable deletion when policy
engine is disabled.

Only allows deletion, not modification.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
b6490426e3 MdeModulePkg: Connect VariablePolicy business logic to VariableServices
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

VariablePolicy is an updated interface to
replace VarLock and VarCheckProtocol.

Add connective code to publish the VariablePolicy protocol
and wire it to either the SMM communication interface
or directly into the VariablePolicyLib business logic.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-17 01:03:43 +00:00
Bret Barkelew
d49fe0ca20 UefiPayloadPkg: Add VariablePolicy engine to UefiPayloadPkg platform
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
e691d80e37 ArmVirtPkg: Add VariablePolicy engine to ArmVirtPkg platform
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
61a85646eb EmulatorPkg: Add VariablePolicy engine to EmulatorPkg platform
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
435a05aff5 OvmfPkg: Add VariablePolicy engine to OvmfPkg platform
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
483449c9da MdeModulePkg: Define the VarCheckPolicyLib and SMM interface
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

VariablePolicy is an updated interface to
replace VarLock and VarCheckProtocol.

This is an instance of a VarCheckLib that is backed by the
VariablePolicyLib business logic. It also publishes the SMM
calling interface for messages from the DXE protocol.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
b6104becb9 MdeModulePkg: Define the VariablePolicyHelperLib
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

VariablePolicy is an updated interface to
replace VarLock and VarCheckProtocol.

Add the VariablePolicyHelperLib library, containing
several functions to help with the repetitive process
of creating a correctly structured and packed
VariablePolicy entry.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
355b181f74 MdeModulePkg: Define the VariablePolicyLib
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

VariablePolicy is an updated interface to
replace VarLock and VarCheckProtocol.

Add the VariablePolicyLib library that implements
the portable business logic for the VariablePolicy
engine.

Also add host-based CI test cases for the lib.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Bret Barkelew
d11e235976 MdeModulePkg: Define the VariablePolicy protocol interface
https://bugzilla.tianocore.org/show_bug.cgi?id=2522

VariablePolicy is an updated interface to
replace VarLock and VarCheckProtocol.

Add the VariablePolicy protocol interface
header and add to the MdeModulePkg.dec file.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Bret Barkelew <brbarkel@microsoft.com>
Signed-off-by: Bret Barkelew <brbarkel@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2020-11-17 01:03:43 +00:00
Maurice Ma
d448574e73 IntelFsp2Pkg: Fix FSP binary rebasing issue for PE32+ image
Current FSP rebasing script SplitFspBin.py has support for both
PE32 and PE32+ image formats. However, while updating the ImageBase
field in the image header, it always assumed the ImageBase field is
32bit long. Since PE32+ image format defined ImageBase as 64bit,
the current script will only update the lower 32bit value and leave
the upper 32bit untouched. It does not work well for PE32+ image
that requires update in the upper 32bit ImageBase field. The
expected behavior is to update the full 64bit field. This patch
implemented this fix.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2020-11-15 00:17:18 +00:00
Rebecca Cran
5e9a8a6dfb OvmfPkg/Bhyve: fix build breakage after SEV-ES changes
Consume the SEV-ES-independent reset vector restored in the previous
patch. Use the Null instance of VmgExitLib.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201112053153.22038-3-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-13 23:16:39 +00:00
Rebecca Cran
cabd0de9f6 OvmfPkg/Bhyve: detach ResetVector from before the SEV-ES changes
Commits 6995a1b79b, 8a2732186a and 30937f2f98 modified all four
regular files under "OvmfPkg/ResetVector" with SEV-ES dependencies.
These are not relevant for Bhyve. Detach the pre-SEV-ES version of
ResetVector for Bhyve.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Message-Id: <20201112053153.22038-2-rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2020-11-13 23:16:39 +00:00
Yunhua Feng
662b42db76 BaseTools: Fix BrotliCompress tool issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2946

This is the regression issue in BaseTools BrotliCompress after Brotli
is changed to submodule. BrotliCompress should store the source size
and scratch buffer size into the header of the compressed binary data.
But now, BrotliCompress doesn't store them. So, BrotliDecompress
can't work.

To fix this issue, BrotliCompress tool main() function should be provided.
It needs to support the options of -e, -d, -o file, -g gap, -q level.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-13 06:23:56 +00:00
Pete Batard
4eea8f0136 MdePkg/BaseRngLibDxe: Add DXE_RUNTIME_DRIVER class to RngLib
The Raspberry Pi platform with Secure Boot enabled currently fails to build
with error:

  Module type [DXE_RUNTIME_DRIVER] is not supported by library instance
  [/home/appveyor/projects/rpi4/edk2/MdePkg/Library/DxeRngLib/DxeRngLib.inf]

Add the missing class to fix this issue.

Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Reviewed-by: Andrei Warkentin <awarkentin@vmware.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-13 03:39:41 +00:00
gechao
544cb0132d MdeModulePkg DisplayEngineDxe: Correct the local variable name.
Signed-off-by: gechao <gechao@greatwall.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-12 14:32:44 +00:00
Abner Chang
b470520d75 RedfishPkg: Use DSC include file
- Include Redfish.dsc.inc in RedfishPkg.dsc. which
  consolidates the necessary components in Redfish.dsc.inc.
- Remove unnecessary library instances from RedfishPkg.dsc.
- Add build option in RedfishPkg.yaml.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-12 07:23:21 +00:00
Abner Chang
1c48866e04 RedfishPkg: DSC and FDF include files for enabling EFI Redfish support
Provide the DSC/FDF include files of edk2 Redfish related
modules and definitions which can be included in platform's
DSC/FDF.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-11 07:48:51 +00:00
Abner Chang
a4d2ddb947 RedfishPkg: Add PCD definition to RedfishPkg
This PCD is the UEFI device path which is used as the Redfish
host interface.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Peter O'Hanley <peter.ohanley@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-11 07:25:16 +00:00
Albecki, Mateusz
91d95113d0 MdeModulePkg/AtaAtapiPassThru: Trace ATA packets
This simplify ATA driver debugging all ATA packets will be printed to
debug port on DEBUG_VERBOSE level along with the packet execution
status. Additionally failed packets and the failed packet execution
status will be printed on DEBUG_ERROR level.

Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
2020-11-11 02:27:59 +00:00
Albecki, Mateusz
64e25d4b06 MdeModulePkg/AtaAtapiPassThru: Restart failed packets
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3026

This commit adds code to restart the ATA packets that failed due to the
CRC error or other link condition. For sync transfers the code will try
to get the command working for up to 5 times. For async transfers, the
command will be retried until the timeout value timeout specified by the
requester is reached. For sync case the count of 5 retries has been
chosen arbitrarily and if needed can be increased or decreased.

Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
2020-11-11 02:27:59 +00:00
Albecki, Mateusz
b465a81100 MdeModulePkg/AtaAtapiPassThru: Add SATA error recovery flow
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3025

This commit adds error recovery flow on SATA port when the error
condition is reported. Commit only implements SATA port reset flow which
is executed when PxTFD indicates BSY or DRQ. Commit does not implement
HBA level reset.

Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
2020-11-11 02:27:59 +00:00
Albecki, Mateusz
cc28ab7a1d MdeModulePkg/AtaAtapiPassThru: Check IS to check for command completion
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3024

AHCI driver used to poll D2H register type to determine whether the FIS
has been received. This caused a problem of long timeouts when the link
got a CRC error and the FIS never arrives. To fix this this change
switches AHCI driver to poll the IS register which will signal both the
reception of FIS and the occurrence of error.

Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
2020-11-11 02:27:59 +00:00
Abner Chang
36c50bd5d5 MdeModulePkg/DriverSampleDxe: Add HII sample options
Add x-uefi-ns keyword REST_STYLE HII option and non
x-uefi keyword REST_STYLE HII option.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-11 00:53:00 +00:00
Abner Chang
2cfec1d840 MdeModulePkg/Library: Revise HiiLib to check REST_STYLE
This change checks REST_STYLE flag.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Ting Ye <ting.ye@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-11 00:53:00 +00:00
Abner Chang
1b840718f7 BaseTools/VfrCompile: VFR compiler supports REST_STYLE in HII option
Add REST_STYLE support on VFR language

BZ: 2916
https://bugzilla.tianocore.org/show_bug.cgi?id=2916

Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Signed-off-by: Ye Ting <ting.ye@intel.com>
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Signed-off-by: Wang Fan <fan.wang@intel.com>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-11 00:53:00 +00:00
Abner Chang
5ec3033154 MdePkg: Add GUID for REST Style Formset
BZ: 2916
https://bugzilla.tianocore.org/show_bug.cgi?id=2916

Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Signed-off-by: Ye Ting <ting.ye@intel.com>
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Signed-off-by: Wang Fan <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-11 00:53:00 +00:00
Tom Lendacky
d150439b72 UefiCpuPkg/MpInitLib: For SEV-ES guest, set stack based on processor number
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

Set the SEV-ES reset stack address for an AP based on the processor number
instead of the APIC ID in case the APIC IDs are not zero-based and densely
packed/enumerated. This will ensure an AP reset stack address does not get
set outside of the AP reset stack memory allocation.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <24866de07d2a954dec71df70972f1851273020d8.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
1b0db1ec87 UefiCpuPkg, OvmfPkg: Disable interrupts when using the GHCB
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

The QemuFlashPtrWrite() flash services runtime uses the GHCB and VmgExit()
directly to perform the flash write when running as an SEV-ES guest. If an
interrupt arrives between VmgInit() and VmgExit(), the Dr7 read in the
interrupt handler will generate a #VC, which can overwrite information in
the GHCB that QemuFlashPtrWrite() has set. This has been seen with the
timer interrupt firing and the CpuExceptionHandlerLib library code,
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/
  Xcode5ExceptionHandlerAsm.nasm and
  ExceptionHandlerAsm.nasm
reading the Dr7 register while QemuFlashPtrWrite() is using the GHCB. In
general, it is necessary to protect the GHCB whenever it is used, not just
in QemuFlashPtrWrite().

Disable interrupts around the usage of the GHCB by modifying the VmgInit()
and VmgDone() interfaces:
- VmgInit() will take an extra parameter that is a pointer to a BOOLEAN
  that will hold the interrupt state at the time of invocation. VmgInit()
  will get and save this interrupt state before updating the GHCB.
- VmgDone() will take an extra parameter that is used to indicate whether
  interrupts are to be (re)enabled. Before exiting, VmgDone() will enable
  interrupts if that is requested.

Fixes: 437eb3f7a8
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <c326a4fd78253f784b42eb317589176cf7d8592a.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
fdce11226c OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Fix erase blocks for SEV-ES
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

The original SEV-ES support missed updating the QemuFlashEraseBlock()
function to successfully erase blocks. Update QemuFlashEraseBlock() to
call the QemuFlashPtrWrite() to be able to successfully perform the
commands under SEV-ES.

Fixes: 437eb3f7a8
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <309c5317a3107bd0e650be20731842a2e1d4b59a.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
f714fd67f2 OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Set the SwScratch valid bit
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bit for the scratch
area field (SwScratch).

Fixes: 437eb3f7a8
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <cc8c8449740d2be0b287e6c69d48bf6cb067c7d8.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
fb2a1a36a2 UefiCpuPkg/MpInitLib: Set the SW exit fields when performing VMGEXIT
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bits for the
software exit information fields when performing a VMGEXIT (SwExitCode,
SwExitInfo1, SwExitInfo2).

Fixes: 20da7ca42a
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <6e11dd7e161bddeacc3fb4817467cef24510c31c.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
12a0c11e81 OvmfPkg/VmgExitLib: Set the SwScratch valid bit for MMIO events
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bit for the scratch
area field (SwScratch).

Fixes: c45f678a1e
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <45ccb63c2dadd834e2c47bf10c9e59c6766d7eb6.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
8d9698ecf8 OvmfPkg/VmgExitLib: Set the SwScratch valid bit for IOIO events
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bit for the scratch
area field (SwScratch).

Fixes: 0020157a98
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <f817d034cea37fa78e00e86f61c3445f1208226d.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
6133e72c00 OvmfPkg/VmgExitLib: Set the SW exit fields when performing VMGEXIT
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bits for the
software exit information fields when performing a VMGEXIT (SwExitCode,
SwExitInfo1, SwExitInfo2).

Fixes: 61bacc0fa1
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <986e157c13bf33e529b1d16ab1b52e99a74a734f.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
a13967f2a3 OvmfPkg/VmgExitLib: Implement new VmgExitLib interfaces
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

The VmgExitLib library added two new interfaces, VmgSetOffsetValid() and
VmgIsOffsetValid(), that must now be implemented in the OvmfPkg version
of the library.

Implement VmgSetOffsetValid() and VmgIsOffsetValid() and update existing
code, that is directly accessing ValidBitmap, to use the new interfaces.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <939e9dc375e6085bc67942fe9a00ecd4c6b77ecf.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
8a7ca9923e UefiCpuPkg/VmgExitLib: Add interfaces to set/read GHCB ValidBitmap bits
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

In upcoming patches, the setting of the bits in the GHCB ValidBitmap will
be performed in multiple places. In order to reduce code duplication, add
an interface, VmgSetOffsetValid(), to VmgExitLib library to perform this
function. Also, to keep management of the ValidBitmap within the library,
add an inteface, VmgIsOffsetValid(), to return whether the bit in the
ValidBitmap is set for a specified offset.

The new VmgSetOffsetValid() function is a VOID function and will be an
empty function in the VmgExitLibNull implementation of the VmgExitLib
library.

The new VmgIsOffsetValid() function returns a BOOLEAN to indicate if the
offset is valid. This will always return FALSE in the VmgExitLibNull
implementation of the VmgExitLib library.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <0bcb2373f8c6e0171ae277d3d7c2eb284621355e.1604685192.git.thomas.lendacky@amd.com>
2020-11-10 19:07:55 +00:00
Tom Lendacky
990ab937c2 MdePkg: Clean up GHCB field offsets and save area
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008

Use OFFSET_OF () and sizeof () to calculate the GHCB register field
offsets instead of hardcoding the values in the GHCB_REGISTER enum.
Define only fields that are used per the GHCB specification, which will
result in removing some fields and adding others.

Also, remove the DR7 field from the GHCB_SAVE_AREA structure since it is
not used/defined in the GHCB specification and then rename the reserved
fields as appropriate.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <5e9245c7600b9b2d55dd7586b8df28b91b75b72b.1604685192.git.thomas.lendacky@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-10 19:07:55 +00:00
Mingyue Liang
8c610e6075 BaseTools: Limit command line length.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2528

Currently, CL command contains multiple C files will be compiled,
and that caused command line too long, which may trigger build error.

In order to solve this issue, the following rules is used in this scene:

If the number of C files is greater than one, a txt file will be used
to record these C files, and replaces the corresponding content in
command line with the file name.

Else (only one C file listed in the command line), the length of the
whole CL command line will determine whether use a file to record. If
the length exceeds the limited max length, use the recording file; else
C file name directly listed in the command line

Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-11-10 05:49:38 +00:00
Yunhua Feng
8577d63cd8 BaseTools: Update report map file format
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2977

For a source-level BIOS debugger the .map files are quite useful with one
major shortcoming: the debugger cannot know, solely from the .map file,
the format (PE/COFF vs. TE) of the image included in the final BIOS ROM

Update report map file format

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-11-10 04:22:27 +00:00
Yunhua Feng
76e8aac158 BaseTools: Add image type into generate map file
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2977

For a source-level BIOS debugger the .map files are quite useful with one
major shortcoming: the debugger cannot know, solely from the .map file,
the format (PE/COFF vs. TE) of the image included in the final BIOS ROM

Add Type=PE or TE in the map file

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-11-10 04:22:27 +00:00
Michael Kubacki
b96b44feab FmpDevicePkg/FmpDxe: Call FmpDeviceLib WithStatus() functions
Commit 6ad819c introduced two new functions in FmpDeviceLib:
1. FmpDeviceCheckImageWithStatus ()
2. FmpDeviceSetImageWithStatus ()

These functions allow an FmpDeviceLib implementation to return a
Last Attempt Status code value within the Device Library range from
LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MIN_ERROR_CODE_VALUE to
LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MAX_ERROR_CODE_VALUE.

To maintain backward compatibility, commit 6ad819c did not update
the FmpDxe driver to invoke these functions. FmpDeviceLib instances
should update their FmpDeviceCheckImage () function to simply call
FmpDeviceCheckImageWithStatus (). Similarly, FmpDeviceSetImage ()
should simply call FmpDeviceSetImageWithStatus (). This is
demonstrated in the implementation of these functions in
FmpDevicePkg/Library/FmpDeviceLibNull/FmpDeviceLib.c. By doing so,
the library can remain compatible with FmpDxe implementations before
and after this transition.

This commit updates FmpDxe to call the WithStatus () version of
these functions enabling the Last Attempt Status code returned to
be accessible to FmpDxe.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-10 01:32:43 +00:00
Mingyue Liang
0af7f8e6a9 BaseTools: Incremental build issue for included ASI file's deletion.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2972

When using incremental build to delete an included xxx.asi file from
the ASL file, the xxx.asl.trim.deps file generated by previous build
process will not be deleted from the OUTPUT directory, which caused
the dependency file still include the xxx.asl.trim.deps file.

If the include file is deleted and DEPs is empty.

Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-11-10 00:24:06 +00:00
Laszlo Ersek
1366cd58cd MdeModulePkg/Core/Dxe: log memory base and length, after lib ctors again
CoreInitializeMemoryServices() logs "BaseAddress" and "Length" with
DEBUG() before DxeMain() calls ProcessLibraryConstructorList()
explicitly. (Library construction is not an automatic part of the DXE
Core entry point.)

So those DEBUG()s in CoreInitializeMemoryServices() are issued against
an un-constructed DebugLib, and also against a -- possibly underlying --
un-constructed SerialPortLib.

Some DebugLib instances can deal with this (see for example commit
91a5b13650, "OvmfPkg/PlatformDebugLibIoPort: fix port detection for
use in the DXE Core", 2018-08-06), while some others can't (see for
example the DebugLib instance
"MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf"
coupled with the SerialPortLib instance
"ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf").

Addressing this issue in a SerialPortLib instance that underlies
BaseDebugLibSerialPort seems wrong; either the DebugLib instance should
cope directly with being called un-constructed (see again commit
91a5b13650), or the DXE Core should log relevant information *at
least* after library instances have been constructed. This patch
implements the latter (only for the "BaseAddress" and "Length" values
calculated by CoreInitializeMemoryServices()).

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20201103161557.30621-1-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-06 20:37:22 +00:00
fengyunhua
dc0dae2d18 BaseTools: Fix BaseTools nmake cleanall hang issue
On windows system, when use command chcp displays the number of the
active console code page, if the active console code is 936, run
make cleanall in the BaseTools will hang.
Issue reproduce step:
chcp 936
edksetup.bat VS2015
cd BaseTools
nmake cleanall

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-06 02:45:40 +00:00
Enze Zhu
d00719485f ShellPkg:Fix bug in FileBuffer.c
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2998

In the function FileBufferCutLine(),set the CutLine pointer to NULL,
The function header specifies that the pointer is valid on a successful
or failed return code.

Signed-off-by: Enze Zhu <zhuenze@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-11-06 01:34:11 +00:00
Bob Feng
09af9bd9be BaseTools: Enable Module Scope Structure Pcd
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2648

This patch is to enable the Module scoped Structure Pcd usage.
User can set structure pcd field value in module scope. For example,
under the [components] section of a dsc file, user can override some
field value for a specific module.

  Package/Module.inf{
      <PcdsFixedAtBuild>
      gUefiTokenSpaceGuid.StructurePcdModule.FieldName | 5
  }

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Tested-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-05 04:27:28 +00:00
Jeff Brasen
978b9d511f MdeModulePkg/Gcd: Check memory allocation when initializing memory
CoreInitializeMemoryServices was not checking for any existing memory
allocation created in the HOB producer phase. If there are memory
allocations outside of the region covered by the HOB List then Gcd could
select that region for memory which can result in the memory allocation
to not be handled and memory overwrites.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2020-11-05 03:37:37 +00:00
Bob Feng
8d57088335 BaseTools: Remove the dependency on the build intermediate file
When generating compressed section, the build tool rely on the
build intermediate files, which were generated in last build, to
get the file list. This method will cause the incremental build to
generate incorrect build result. To reproduce this incremental build
error, you can do:
1. build Ovmf
2. change the module OvmfPkg\AcpiTables a source file Facp.aslc
name from Facp.aslc to Facpxxx.aslc.
3. change the Facp.aslc file name in [sources] section of AcpiTables.inf
4. incremental build Ovmf

you will see the in AcpiTables module Makefile, the corresponding
Facp.acpi file is not changed.

This patch is to make the build always get file list from the INF.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-04 12:00:16 +00:00
Pierre Gondois
375683654d DynamicTablesPkg: Add SSDT CMN-600 Table generator
The Generic ACPI for Arm Components 1.0 Platform Design
Document, s2.6.4 "ASL code examples" provides information
to describe an Arm CoreLink CMN-600 Coherent Mesh Network
using an ASL definition block table.

The SSDT CMN-600 Table Generator uses the Configuration
Manager protocol to obtain the following information about
the CMN-600 device on the platform:
 - the PERIPHBASE address location and address range;
 - the ROOTNODEBASE address location;
 - the number of Debug and Trace Controller (DTC)
   and their respective interrupt number;

The CMN-600 mesh is described using the CM_ARM_CMN_600_INFO
and CM_ARM_EXTENDED_INTERRUPT structures in the Configuration
Manager.

The SSDT CMN-600 Table generator:
 - gets the CMN-600 hardware information
   from the configuration manager.
 - uses the AmlLib interfaces to parse the AML
   template BLOB and construct an AML tree.
 - uses the AmlLib to update:
   - the "_UID" value;
   - the address location and range of the PERIPHBASE;
   - the address location of the ROOTNODEBASE;
   - the number of Debug and Trace Controller (DTC)
     and their respective interrupt number;
 - serializes the AML tree to an output buffer.
   This output buffer contains the fixed-up AML code,
   which is then installed as an ACPI SSDT table.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Co-authored-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-11-03 09:09:22 +00:00
Sami Mujawar
aa49066fe6 MdePkg: Definitions for Extended Interrupt Flags
Add Interrupt Vector Flag definitions for Extended Interrupt
Descriptor, and macros to test the flags.
Ref: ACPI specification 6.4.3.6

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-11-03 09:09:22 +00:00
fengyunhua
0166dad496 BaseTools: Update the FV Space Information to display decimal and Hex
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3009

Update the FV Space Information to display decimal and Hex

FV Space Information
before format:
SECFV [13%Full] 212992 total, 28400 used, 184592 free
Updated format:
SECFV [13%Full] 212992 (0x34000) total, 28400 (0x6ef0) used,
184592 (0x2d110) free

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-03 01:40:43 +00:00
Abner Chang
ffddac3e0f RedfishPkg/Include: EFI Redfish Discover Protocol header file
Header file of EFI Redfish Discover Protocol for UEFI spec
v2.8 Section 31.1.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 06:51:26 +00:00
Abner Chang
1946bee22a RedfishPkg: Add RedfishHostInterfaceDxe to RedfishPkg
Add RedfishHostInterfaceDxe and PlatformHostInterfaceLibNull to Redfish
package.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 05:50:17 +00:00
Abner Chang
d4fae44d0d RedfishPkg/RedfishHostInterfaceDxe: Create SMBIOS type 42 record
This is the abstract driver to consume the contents of SMBIOS type 42h
device descriptor and protocol type data which provided by
PlatformHostInterfaceLib, and create SMBIOS type 42 record through
EFI SMBIOS protocol.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 05:50:17 +00:00
Abner Chang
adad542ba1 RedfishPkg/PlatformHostInterfaceLib: Platform NULL lib
NULL instance of PlatformHostInterfaceLib.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 05:50:17 +00:00
Abner Chang
c527aecd48 RedfishPkg/Include: PlatformHostInterfaceLib header file
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 05:50:17 +00:00
Abner Chang
dc7e206ac6 RedfishPkg/Include: Definitions of SMBIOS Redfish Host Interface
Add definitions of SMBIOS Type 42 Host Interface.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 05:50:17 +00:00
Abner Chang
4f808c62a3 RedfishPkg: Changes on RedfishPkg for CI test
Add accepted dependency of RedfishPkg in RedfishPkg CI
yaml file.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 04:31:54 +00:00
Abner Chang
5692db78a8 RedfishPkg/RestJsonStructureDxe: EFI REST JSON Structure Protocol
Implementation of EFI_REST_JSON_STRUCTURE_PROTOCOL, refer to UEFI spec
2.8 Section 29.7.3 EFI REST JSON Resource to C Structure Converter.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-11-02 04:31:54 +00:00
Abner Chang
ed038688bf MdePkg/Include: Definitions of EFI REST JSON Structure Protocol
Add definitions of EFI REST JSON Structure according to UEFI spec
2.8 Section 29.7.3 EFI REST JSON Resource to C Structure Converter.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Fan Wang <fan.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-11-02 04:31:54 +00:00
Jon Hunter
2363c69260 MdeModulePkg/XhciDxe: Retry device slot init on failure
With some super-speed USB mass storage devices it has been observed
that a USB transaction error may occur when attempting the set the
device address during enumeration.

According the the xHCI specification (section 4.6.5) ...

"A USB Transaction ErrorCompletion Code for an Address Device Command
 may be due to a Stall response from a device. Software should issue a
 Disable Slot Commandfor the Device Slot then an Enable Slot Command
 to recover from this error."

To fix this, retry the device slot initialization if it fails due to a
device error.

Change was verified using a superspeed mass storage device that was
occasionally failing to enumerate in UEFI. With this change this failure
to enumerate was resolved. This failure was also only seen in UEFI and not
in the OS.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-11-02 01:30:24 +00:00
Ard Biesheuvel
8ead7af22b MdeModulePkg/AcpiTableDxe: use pool allocation for RSDP if possible
Use a pool allocation for the RSDP ACPI root pointer structure if no
memory limit is in effect that forces us to use page based allocation,
which may be wasteful if they get rounded up to 64 KB as is the case
on AArch64.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 14:50:33 +00:00
Ard Biesheuvel
cf299745ae MdeModulePkg/AcpiTableDxe: use pool allocation for RSDT/XSDT if possible
If no memory allocation limit is in effect for ACPI tables, prefer
pool allocations over page allocations, to avoid wasting memory on
systems where page based allocations are rounded up to 64 KB, such
as AArch64.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 14:50:33 +00:00
Ard Biesheuvel
0e0ae47da6 MdeModulePkg/AcpiTableDxe: use pool allocations when possible
On AArch64 systems, page based allocations for memory types that are
relevant to the OS are rounded up to 64 KB multiples. This wastes
some space in the ACPI table memory allocator, since it uses page
based allocations in order to be able to place the ACPI tables low
in memory.

Since the latter requirement does not exist on AArch64, switch to pool
allocations for all ACPI tables except the root tables if the active
allocation policy permits them to be anywhere in memory. The root
tables will be handled in a subsequent patch.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 14:50:33 +00:00
Rebecca Cran
8cadcaa13d MdePkg: Fix SmBios.h PROCESSOR_CHARACTERISTIC_FLAGS to be UINT16
The ProcessorCharacteristics is a UINT16 field, so the
PROCESSOR_CHARACTERISTIC_FLAGS bitfield should be UINT16 too.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2020-10-30 01:39:30 +00:00
Rebecca Cran
3cb6315933 MdePkg: Update SmBios.h to add SMBIOS 3.4.0 ARM64 SoC ID field
SMBIOS 3.4.0 defines bit 9 of the Type 4 table Processor Characteristics
field to be the ARM64 SoC ID support. Add it to the
PROCESSOR_CHARACTERISTIC_FLAGS struct bitfield.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 01:39:30 +00:00
Rebecca Cran
0ec33398b4 ShellPkg: Add ARM64 SoC ID to Processor Characteristics in smbiosview
SMBIOS 3.4.0 defines bit 9 of the Type 4 table Processor Characteristics
field to be the ARM64 SoC ID support. Add support for it to the
smbiosview command.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 01:39:30 +00:00
Rebecca Cran
a46e4738f5 ShellPkg: Fix smbiosview string definition name for "boot from CD"
The "boot from CD supported" string definition name should contain the
word "from" instead of "form".

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 01:39:30 +00:00
Rebecca Cran
4ae3b05a5a ShellPkg: Fix a couple of typos in smbiosview
Fix a couple of typos in SmbiosViewStrings.uni:
"Boot form CD" should be "Boot from CD", and "plugged from the wall"
should be "plugged into the wall".

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-30 01:39:30 +00:00
Siyuan Fu
c26e291375 MdeModulePkg/Core: Support standalone MM in FV2 protocol GetNextFile().
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3028

The FirmwareVolume2Protocol->GetNextFile() produced by DXE Core can be used
to search for a file based on the value of *FileType input. However, this
service will always return EFI_NOT_FOUND if the input FileType is set to
EFI_FV_FILETYPE_MM_STANDALONE or EFI_FV_FILETYPE_MM_CORE_STANDALONE, Which
means user can't use this service to search any standalone MM image in that
FV.
This patch update the FirmwareVolume2Protocol->GetNextFile() service to
support searching standalone MM module.

Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-29 05:29:42 +00:00
Michael Kubacki
6ad819c1ab FmpDevicePkg/FmpDeviceLib: Add Last Attempt Status to Check/Set API
Provides the ability for a given FMP device library instance to
return a Last Attempt Status code during check image and set image
operations with FmpDeviceCheckImageEx() and FmpDeviceSetImageEx().

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Michael Kubacki
207414cba4 FmpDevicePkg: Add Last Attempt Status support to dependency libs
The FMP dependency libraries are leveraged during firmware update
to check for dependencies required to update the image.

This change adds granular Last Attempt Status code support to these
services so failures can be more easily observed during the firmware
update process via Last Attempt Status codes.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Michael Kubacki
004ce0ab04 FmpDevicePkg/FmpDxe: Improve set image path Last Attempt Status granularity
Increases the level of granularity for Last Attempt Status codes
returned from SetTheImage() in FmpDxe. This allows better
identification of the error that occurred in the set image
operation using Last Attempt Status codes.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Michael Kubacki
5550f4d33b FmpDevicePkg/FmpDxe: Add check image path Last Attempt Status capability
CheckTheImage() is currently used to provide the CheckImage()
implementation for the EFI_FIRMWARE_MANAGEMENT_PROTOCOL instance
produced by FmpDxe in addition to being called internally in the
SetImage() path.

Since CheckTheImage() plays a major role in determining the
validity of a given firmware image, an internal version of the
function is introduced - CheckTheImageInternal() that is capable
of returning a Last Attempt Status code to internal callers such
as SetTheImage().

The CheckImage() API as defined in the UEFI Specification for
EFI_FIRMWARE_MANAGEMENT_PROTOCOL is not impacted by this change.

CheckTheImageInternal() contains unique Last Attempt Status codes
during error paths in the function so it is easier to identify
the issue with a particular image through the Last Attempt Status
code value.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Michael Kubacki
2c1e9f1dc5 FmpDevicePkg: Add Last Attempt Status header files
Introduces a public and a private header file to define more
granular usage of the UEFI Specification defined unsuccessful
vendor range for Last Attempt Status codes. The unsuccessful
vendor range is described in UEFI Specification 2.8A section 23.4.

The public header file Include/LastAttemptStatus.h defines ranges
within the unsuccessful vendor range. At a high-level, the two
main ranges are defined are the FMP Reserved range and the Device
Library Reserved range.

The FMP Reserved range is reserved for usage of components within
FmpDevicePkg. PrivateInclude/FmpLastAttemptStatus.h contains
usage details and specific Last Attempt Status code definitions.

The Device Library Reserved range is reserved for usage by
FmpDeviceLib instances. Each library may define custom Last
Attempt Status codes within the bounds defined in
Include/LastAttemptStatus.h:
[LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MIN_ERROR_CODE_VALUE,
 LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MAX_ERROR_CODE_VALUE]

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Michael Kubacki
da29cc0e98 MdePkg/SystemResourceTable.h: Add vendor range values
Adds the following macros to define the unsuccessful vendor range
min and max (defined in UEFI Specification 2.8):
  1. LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MIN
  2. LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL_VENDOR_RANGE_MAX

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-28 06:05:52 +00:00
Abner Chang
3b87d72874 MdePkg/Include: Fix wrong spelling in http11.h
BZ #3019, https://bugzilla.tianocore.org/show_bug.cgi?id=3019

Fix wrong spelling of CHUNK_TRNASFER_* in HTTP11.h.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Wang Fan <fan.wang@intel.com>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-28 02:45:47 +00:00
Yunhua Feng
eb520b93d2 BaseTools/Ecc: Fix ECC check MetaFile Copyright information issue
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3011

MetaFile Copyright support below format:

#  Copyright (C) 2020 Hewlett Packard Enterprise Development LP<BR>
#  (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-27 06:50:06 +00:00
Cosmo Lai
31e97bdae2 IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3017

Platform microcode FV may have padding between each version of microcode
binary, and current FSP-T/LoadMicrocodeDefault() cannot handle this case
and return not_found unexpectedly.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Cosmo Lai <cosmo.lai@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2020-10-27 06:06:03 +00:00
Luo, Heng
a3212009d9 MdeModulePkg/XhciDxe: Error handle for USB slot initialization failure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3007

Currently UsbDevContext is not cleaned up if USB slot initialization is
failed, the wrong context data will affect next USB devices and
the USB devices can not be enumerated.
Need to disable slot if USB slot initialization is failed.

Below test cases are passed on UpXtreme:
a. USB 3.0 thumb drives can be recognized in UEFI shell
b. SUT can boot to Puppylinux  from USB3.0 mass storage,
 the storage can be recognized in linux
c. Plug in a USB  keyboard (hot plug) and enumeration is OK
 in UEFI shell and linux
d. Plug in a USB mouse(hot plug) and enumeration is OK in linux.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-10-27 01:09:28 +00:00
Bob Feng
b70c4fdcde BaseTools: Fix PcdValueInit tool build issue with VS compiler x64
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3001

When the 64-bit version of VS compiler is used, the generated
PcdValueInit tool will be failed to compile.

This patch is going to fix that issue.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>

Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-26 02:58:00 +00:00
Michael Kubacki
264eccb5df ArmPkg/ArmMmuLib: Explicitly cast function pointer argument
The function ArmReplaceLiveTranslationEntry () is passed as a VOID
pointer to WriteBackDataCacheRange (). This produces the following
warning on VS2019:

warning C4152: nonstandard extension, function/data pointer
conversion in expression

This change explicitly casts the argument to the formal parameter
type VOID*.

This can be reproduced with the following build command:
build -b DEBUG -a AARCH64 -t VS2019 -p ArmPkg/ArmPkg.dsc
-m ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-22 14:48:12 +00:00
Michael Kubacki
2bdc90429a ArmPkg/ArmMmuLib: Explicitly cast UINT32 data conversions
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2835

There's several occurrences of a UINT64 or an EFI_PHYSICAL_ADDRESS
being assigned to a UINT32 value in ArmMmuLib. These result in
warning C4244 in VS2019:

warning C4244: '=': conversion from 'UINT64' to 'UINT32', possible
loss of data

warning C4244: '=': conversion from 'EFI_PHYSICAL_ADDRESS' to
'UINT32', possible loss of data

This change explicitly casts the values to UINT32.

These can be reproduced with the following build command:
build -b DEBUG -a ARM -t VS2019 -p ArmPkg/ArmPkg.dsc
-m ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf

Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-22 14:48:12 +00:00
Pete Batard
24cf727265 EmbeddedPkg/VirtualRealTimeClockLib: Explicit cast to UINT32
Addresses BZ https://bugzilla.tianocore.org/show_bug.cgi?id=2380 where
explicit casts are required for 64 to 32 bit assignment.

We can apply a straight cast for Time->Nanosecond since we already checked
for overflow.

On the other hand, we may have a frequency that is greater than UINT32_MAX
for Capabilities->Resolution. But using the frequency for the resolution
is the wrong approach anyway, since we can't actually vouch for the actual
resolution of the virtual library. Instead, play it safe by defaulting to
1 Hz, which is what a standard PC-AT CMOS RTC device would use.

Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-22 13:23:48 +00:00
Sami Mujawar
e3c7db50ca DynamicTablesPkg: SsdtSerialPortFixupLib fix ECC errors
Fix the following ECC reported errors in SsdtSerialPortFixupLib.
  - [9002]  The function headers should follow Doxygen special
            documentation blocks in section 2.3.5 in Comment,
            <@param [in]> does NOT have [in, out]

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
8670a4ce67 DynamicTablesPkg: AmlEncoding change debug macro
Change the AML_DEBUG_STR() macro to AML_OPCODE_DEF() that takes a string
and the AML OpCode as input so that the text description and the AML
OpCode are grouped. The AML_OPCODE_DEF() macro also strips the string
description for release builds.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
e18bc21d6a DynamicTablesPkg: AmlLib\AmlDbgPrint fix ECC error
Fix ECC error 8001 reported errors in AmlDbgPrint.
  [8001] Only capital letters are allowed to be used
         for #define declarations.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
5e0b708f74 DynamicTablesPkg: AmlLib fix ECC errors
Fix the following ECC reported errors in AmlLib.
  - [1008]  File has invalid Non-ACSII char.
  - [9002]  The function headers should follow Doxygen special
            documentation blocks in section 2.3.5 Comment does NOT
            have tail **/

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
e4dfb2ffa3 DynamicTablesPkg: AcpiSratLibArm fix ECC error
Fix the following ECC reported error in AcpiSratLibArm.
  - [9002]  The function headers should follow Doxygen special
            documentation blocks in section 2.3.5 Comment does NOT
            have tail **/

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
324931009e DynamicTablesPkg: SsdtSerialPortLibArm fix ECC error
Fix the following ECC reported error in SsdtSerialPortLibArm.
  - [5007]  There should be no initialization of a variable as part of
            its declaration Variable Name.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Sami Mujawar
653fb710ce DynamicTablesPkg: Fix order of assert checks
Reordered the asserts to first check if the pointer is valid
before de-referencing the pointer.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-10-21 13:33:03 +00:00
Jian J Wang
26442d11e6 CryptoPkg/BaseCryptLib: fix NULL dereference (CVE-2019-14584)
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1914

AuthenticodeVerify() calls OpenSSLs d2i_PKCS7() API to parse asn encoded
signed authenticode pkcs#7 data. when this successfully returns, a type
check is done by calling PKCS7_type_is_signed() and then
Pkcs7->d.sign->contents->type is used. It is possible to construct an asn1
blob that successfully decodes and have d2i_PKCS7() return a valid pointer
and have PKCS7_type_is_signed() also return success  but have Pkcs7->d.sign
be a NULL pointer.

Looking at how PKCS7_verify() [inside of OpenSSL] implements checking for
pkcs7 structs it does the following:
- call PKCS7_type_is_signed()
- call PKCS7_get_detached()
Looking into how PKCS7_get_detatched() is implemented, it checks to see if
p7->d.sign is NULL or if p7->d.sign->contents->d.ptr is NULL.

As such, the fix is to do the same as OpenSSL after calling d2i_PKCS7().
- Add call to PKS7_get_detached() to existing error handling

Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2020-10-21 06:32:46 +00:00
Zhichao Gao
f82b827c92 Revert "MdeModulePkg/PartitionDxe: Fix the incorrect LBA size in child ..."
This reverts commit e0eacd7daa.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3012

The patch to fix LBA size would cause a regression that make the
partition of CD image with media type other than NO_EMULATOR unobserved.

The patch used to fix the CD image's MBR table issue. The CD MBR
table would always be ignored because it would be handled by the
Eltorito partition handler first and never go into the MBR handler.
So directly revert it.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Tested-by: Gary Lin <glin@suse.com>
2020-10-20 06:12:12 +00:00
fengyunhua
29d14d3a30 IntelFsp2Pkg/Tools: Fix a typo issue
Error message:
raise Exception ("'%s' is not a valid directory!" % FvDir)
NameError: name 'FvDir' is not defined

FvDir should be fvDir.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2020-10-19 23:57:57 +00:00
Tom Lendacky
93edd1887e UefiCpuPkg/MpInitLib: Reduce reset vector memory pressure
The AP reset vector stack allocation is only required if running as an
SEV-ES guest. Since the reset vector allocation is below 1MB in memory,
eliminate the requirement for bare-metal systems and non SEV-ES guests
to allocate the extra stack area, which can be large if the
PcdCpuMaxLogicalProcessorNumber value is large, and also remove the
CPU_STACK_ALIGNMENT alignment.

Fixes: 7b7508ad78 ("UefiCpuPkg: Allow AP booting under SEV-ES")
Cc: Garrett Kirkendall <garrett.kirkendall@amd.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <21345cdbc906519558202b3851257ca07b9239ba.1600884239.git.thomas.lendacky@amd.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: supply missing space character after "PcdGet32"]
2020-10-19 21:47:21 +00:00
Michael Kubacki
92e9c44f20 FmpDevicePkg: Add RngLib instance to DSC
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3010

Commit b5701a4 in CryptoPkg introduced a dependency on RngLib.

The FmpDevicePkg build currently fails since it does not specify
a RngLib instance and OpensslLib links against RngLib.

Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Matthew Carlson <matthewfcarlson@gmail.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-19 01:58:15 +00:00
Terry Lee
709b163940 SecurityPkg/Tcg2PhysicalPresenceLib: Fix incorrect TCG VER comparision
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2697

Tcg2PhysicalPresenceLibConstructor set the module variable
mIsTcg2PPVerLowerThan_1_3 with incorrect TCG version comparision.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-10-18 01:14:43 +00:00
Matthew Carlson
73e3cb6c7e AzurePipelines : Pr Gate: Turn on HBUT for CryptoPkg
Turns on Host Based Unit Tests for CryptoPkg by enabling the target
NOOPT in the CI pipeline.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>

Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2020-10-18 00:49:58 +00:00
Matthew Carlson
694bfd6ff5 CryptoPkg: BaseCryptLib: Add unit tests (Host and Shell based)
This adds a new INF for BaseCryptLib suitable for
host based environments. It adds a host based unit test for
BaseCryptLib that can also be built as a shell based Unit Test.

In addition, this also adds a UnitTestHostCrtWrapper.c file, which provides
some of the functionality not provided by the default host based unit test
system that OpenSSL expects. This is used by UnitTestHostBaseCryptLib, a
version of the BaseCryptLib meant specifically for host based unit testing.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-10-18 00:49:58 +00:00
Sami Mujawar
30f0ec8d80 Maintainer.txt: Add Kvmtool platform reviewer
Kvmtool is a virtual machine manager that can be used
to launch guest partitions. It additionally emulates
some hardware components e.g. RTC, CFI etc. essentially
providing a virtual platform for a guest operating
system (OS) to run.

A standards-based OS would need UEFI firmware support
for the Kvmtool virtual platform, for which additional
modules are added to ArmVirtPkg.
Adding myself as reviewer for these modules as
advised on mailing list discussion at
- https://edk2.groups.io/g/devel/topic/30915279#30693
- https://edk2.groups.io/g/devel/topic/74200911#59650

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
870ee2f6c8 .python/SpellCheck: Add 'XIPFLAGS' to "words" section
The EDKII Core CI reports spelling error for XIPFLAGS. The
XIPFLAGS are typically used to specify XIP options to the
compiler. e.g. GCC:*_*_*_CC_XIPFLAGS = -fno-jump-tables

Add 'XIPFLAGS' to "words" section in cspell.base.yaml file
to avoid spelling check error.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
6a9d0c1753 ArmVirtPkg: Add kvmtool to package dictionary
Kvmtool is a virtual machine manager that can be used
to launch guest VMs. Support for Kvmtool virtual
platform has been added to ArmVirtPkg.

Add kvmtool to the ArmVirtPkg dictionary to prevent
the CI Spell check plugin from failing.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
4a57aeaa7e ArmVirtPkg: Package dependency for MC146818 RTC
Kvmtool emulates a MC146818 RTC controller in the
MMIO space. To support this the MC146818 RTC driver
PcatRealTimeClockRuntimeDxe has been updated to
support MMIO accesses. PCDs for RTC Index and
Target register base addresses in the MMIO space
have been introduced. The KvmtoolRtcFdtClientLib
reads the MC146818 RTC MMIO base address region
from the Kvmtool device tree and updates the
Index and Target register PCDs.

As these PCDs are defined in PcAtChipsetPkg.dec,
this patch updates the CI script to add this
dependency.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
6038e7a2c2 ArmVirtPkg: Support for kvmtool virtual platform
Kvmtool is a virtual machine manager that enables hosting
KVM guests. Kvmtool emulates certain devices like serial
port, RTC, etc. essentially providing a virtual platform.

This patch adds support for kvmtool virtual platform.

Following is a brief description of the firmware
implementation choices:

- Serial Port: 16550 UART
  On some platforms the 16550 UART is interfaced using
  PCI. Therefore, the 16550 Serial port library is
  dependent on the PCI library. The 16550 UART driver
  checks the Device ID represented using the PCD
  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo
  to determine if the UART is behind PCI.
  If the Device ID is 0xFF then the serial 16550 UART
  is not behind PCI.

  On Kvmtool the Serial 16550 UART is not behind PCI,
  and therefore a combination of BasePciLibPciExpress
  and BasePciExpressLib is used to satisfy the PCI
  library dependency.

  The PcdSerialPciDeviceInfo is also set to 0xFF to
  indicate that the Serial 16550 UART is not behind
  PCI. The PCD PcdSerialUseMmio is also set to TRUE
  to indicate MMIO accesses are required for the
  UART registers.

  Additionally two instances of PlatformHookLibs are
  provided EarlyFdt16550SerialPortHookLib and
  Fdt16550SerialPortHookLib to patch the
  PcdSerialRegisterBase so that BaseSerialPortLib16550
  and retrieve the base address of the 16550 UART.

- Dependency order for Flash
  FaultTolerantWriteDxe makes use of PCDs (e.g.
  PcdFlashNvStorageFtwSpareBase64 etc.), which in
  case of kvmtool will be evaluated based on the CFI
  flash base address read from the DT. These variables
  are populated in the NorFlashPlatformLib loaded by
  ArmVeNorFlashDxe.

  This results in a dependency issue with
  FaultTolerantWriteDxe. To resolve this make the
  NorFlashPlatformLib as a library dependency for
  FaultTolerantWriteDxe.

- RTC Controller
  A separate patch updates the MC146818 RTC controller
  driver to support MMIO accesses.
  A KvmtoolRtcFdtClientLib has been introduced to
  extract the base addresses of the RTC controller
  from the platform device tree and map the RTC
  register space as Runtime Memory.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
e556cebb2f ArmVirtPkg: Add Kvmtool Platform Pei Lib
The PlatformPeim() in the PlatformPeiLib is invoked
by the PrePiMain() and provides the platform an
opportunity to setup the plaform specific HOBs.

This PlatfromPeiLib initialises the Kvmtool platform
HOBs like the Fdt, 16550BaseAddress, etc.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
a482f08d99 ArmVirtPkg: 16550 UART Platform hook library
The BaseSerialPort16550 library invokes the
PlatformHookSerialPortInitialize() implemented as
part of the PlatformHook library, to perform platform
specific initialization required to enable use of the
16550 device. The BaseSerialPort16550 library uses
the PcdSerialRegisterBase to obtain the base address
of the UART for MMIO operations.

Some VMMs like Kvmtool provide the base address of
the console serial port in the platform device tree.

This patch introduces two instances of the Platform
Hook library:
1. EarlyFdt16550SerialPortHookLib - parses the
   platform device tree to extract the base
   address of the 16550 UART and update the PCD
   PcdSerialRegisterBase.
2. Fdt16550SerialPortHookLib - reads the GUID
   Hob gEarly16550UartBaseAddressGuid (that caches
   the base address of the 16550 UART discovered
   during early stages) and updates the PCD
   PcdSerialRegisterBase.

Note:
  a. The PCD PcdSerialRegisterBase is configured
     as PatchableInModule.
  b. A separate patch introduces a PlatformPeiLib
     that trampolines the 16550 UART base address
     from the Pcd PcdSerialRegisterBase to the
     GUID Hob gEarly16550UartBaseAddressGuid.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
d30886d24c ArmVirtPkg: GUID Hob for 16550 UART base address
Introduce a new GUID Hob gEarly16550UartBaseAddressGuid
to cache the base address of the 16550 UART, for when
PCD access is not available.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
1c03498a25 MdeModulePkg: Fix constructor invocation ordering
The BaseSerialPortLib16550 library does not implement
a constructor. This prevents the correct constructor
invocation order for dependent libraries.
e.g. A PlatformHookLib (for the Serial Port) may have
a dependency on retrieving data from a Hob. A Hob
library implementation may configure its initial state
in the HobLib constructor. Since BaseSerialPortLib16550
does not implement a constructor, the Basetools do not
resolve the correct order for constructor invocation.

To fix this, add an empty constructor to the serial port
library BaseSerialPortLib16550.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
69f8ef04a8 ArmVirtPkg: Add Kvmtool NOR flash lib
Kvmtool places the base address of the CFI flash in
the device tree it passes to UEFI. This library
parses the kvmtool device tree to read the CFI base
address and initialise the PCDs use by the NOR flash
driver and the variable storage.

UEFI takes ownership of the CFI flash hardware, and
exposes its functionality through the UEFI Runtime
Variable Service. Therefore, disable the device tree
node for the CFI flash used for storing the UEFI
variables, to prevent the OS from attaching its device
driver as well.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
4c5e875ec1 ArmVirtPkg: kvmtool platform memory map
Kvmtool is a virtual machine manager that enables
hosting KVM guests. Kvmtool allows to vary the
hardware configuration of the virtual platform
it provides to the guest partition. It provides
the current hardware configuration to the firmware
by handing off a device tree containing the hardware
information.

This library parses the kvmtool provided device
tree and populates the system memory map for the
kvmtool virtual platform.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
39d76b2596 ArmVirtPkg: Add kvmtool platform driver
Kvmtool is a virtual machine manager that enables
hosting KVM guests. It essentially provides a
virtual hardware platform for guest operating
systems.

Kvmtool hands of a device tree containing the
current hardware configuration to the firmware.

A standards-based operating system would use
ACPI to consume the platform hardware
information, while some operating systems may
prefer to use Device Tree.

The KvmtoolPlatformDxe performs the platform
actions like determining if the firmware should
expose ACPI or the Device Tree based hardware
description to the operating system.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
d3095addf3 ArmPlatformPkg: Dynamic flash variable base
Some virtual machine managers like kvmtool can relocate
the devices in the system memory map. The information
about the devices location in memory is described in the
device tree. Therefore, the CFI memory region and the
associated Non volatile storage variables need to be
adjusted accordingly.

To support such use cases the non-volatile storage
variable base PCD PcdFlashNvStorageVariableBase has
been defined as a dynamic PCD.

The NOR flash driver was using the Flash non-volatile
storage variable base PCD as a fixed PCD, thereby
preventing runtime resolution of the variable base
address.

Therefore update the NOR flash driver to load the
PCD using PcdGet32 instead of FixedPcdGet32.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <Ard.Biesheuvel@arm.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
cd09c38465 ArmVirtPkg: Add Kvmtool RTC Fdt Client Library
Add library that parses the Kvmtool device tree and updates
the dynamic PCDs describing the RTC Memory map.

It also maps the MMIO region used by the RTC as runtime memory
so that the RTC registers are accessible post ExitBootServices.

Since UEFI takes ownership of the RTC hardware disable the RTC
node in the DT to prevent the OS from attaching its device
driver as well.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Sami Mujawar
015be4075f PcAtChipsetPkg: Add MMIO Support to RTC driver
Some virtual machine managers like Kvmtool emulate the MC146818
RTC controller in the MMIO space so that architectures that do
not support I/O Mapped I/O can use the RTC. This patch adds MMIO
support to the RTC controller driver.

The PCD PcdRtcUseMmio has been added to select I/O or MMIO support.
  If PcdRtcUseMmio is:
    TRUE  - Indicates the RTC port registers are in MMIO space.
    FALSE - Indicates the RTC port registers are in I/O space.
            Default is I/O space.

Additionally two new PCDs PcdRtcIndexRegister64 and
PcdRtcTargetRegister64 have been introduced to provide the base
address for the RTC registers in the MMIO space.

When MMIO support is selected (PcdRtcUseMmio == TRUE) the driver
converts the pointers to the RTC MMIO registers so that the
RTC registers are accessible post ExitBootServices.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-16 17:21:04 +00:00
Abner Chang
a7d977040b MdePkg/Include: Add HTTP definitions
BZ #2915, https://bugzilla.tianocore.org/show_bug.cgi?id=2915

Add HTTP chunk transfer definitions.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wang Fan <fan.wang@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-16 10:10:05 +00:00
Compostella, Jeremy
d25fd8710d BaseMemoryLibSse2: Take advantage of write combining buffers
The current SSE2 implementation of the ZeroMem(), SetMem(),
SetMem16(), SetMem32 and SetMem64 functions is writing 16 bytes per 16
bytes. It hurts the performances so bad that this is even slower than
a simple 'rep stos' (4% slower) in regular DRAM.

To take full advantages of the 'movntdq' instruction it is better to
"queue" a total of 64 bytes in the write combining buffers.  This
patch implement such a change.  Below is a table where I measured
(with 'rdtsc') the time to write an entire 100MB RAM buffer. These
functions operate almost two times faster.

| Function | Arch | Untouched | 64 bytes | Result |
|----------+------+-----------+----------+--------|
| ZeroMem  | Ia32 |  17765947 |  9136062 | 1.945x |
| ZeroMem  | X64  |  17525170 |  9233391 | 1.898x |
| SetMem   | Ia32 |  17522291 |  9137272 | 1.918x |
| SetMem   | X64  |  17949261 |  9176978 | 1.956x |
| SetMem16 | Ia32 |  18219673 |  9372062 | 1.944x |
| SetMem16 | X64  |  17523331 |  9275184 | 1.889x |
| SetMem32 | Ia32 |  18495036 |  9273053 | 1.994x |
| SetMem32 | X64  |  17368864 |  9285885 | 1.870x |
| SetMem64 | Ia32 |  18564473 |  9241362 | 2.009x |
| SetMem64 | X64  |  17506951 |  9280148 | 1.886x |

Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-16 01:12:05 +00:00
Abner Chang
19c87b7d44 .azurepipelines/templates: Add RedfishPkg to target build
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2020-10-15 02:19:47 +00:00
Abner Chang
c4add64fd4 .pytool: Add CI on RedfishPkg
Add RedfishPkg to CI test.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nickle.wang@hpe.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2020-10-15 02:19:47 +00:00
Abner Chang
b9b7406c43 RedfishPkg/Include: PCD definitions of Host Interface EFI device path
The definitions of Host Interface EFI device path structure PCD.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>

Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
2020-10-15 01:07:24 +00:00
Abner Chang
f77e3faa04 MdePkg/Include: Definitions of EFI REST EX Protocol
Add definitions of EFI REST EX Protocol according
to UEFI spec v2.8 Section 29.7.2 EFI REST EX Protocol.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Fan Wang <fan.wang@intel.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>

Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-15 01:07:24 +00:00
Gao, Zhichao
5d0a827122 ShellPkg/SmbiosView: Add DDR5 support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

Refer to SMBIOS 3.4 spec, add new memory device type - DDR5
and LPDDR5 support for the shell command "smbiosview".

Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-10-14 08:44:12 +00:00
Jan Bobek
9380177354 MdePkg/BaseLib: Fix invalid memory access in AArch64 SetJump/LongJump
Correct the memory offsets used in REG_ONE/REG_PAIR macros to
synchronize them with definition of the BASE_LIBRARY_JUMP_BUFFER
structure on AArch64.

The REG_ONE macro declares only a single 64-bit register be
read/written; however, the subsequent offset is 16 bytes larger,
creating an unused memory gap in the middle of the structure and
causing SetJump/LongJump functions to read/write 8 bytes of memory
past the end of the jump buffer struct.

Signed-off-by: Jan Bobek <jbobek@nvidia.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-13 03:20:49 +00:00
fengyunhua
b65afdde74 BaseTools: Add EDKII_DSC_PLATFORM_GUID MACRO
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2969

Add EDKII_DSC_PLATFORM_GUID MACRO to AutoGen.h and AutoGen.c

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Tested-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-13 02:35:08 +00:00
Zhang, Shenglei
5d1af380d3 MdeModulePkg: Remove code wrapped by DISABLE_NEW_DEPRECATED_INTERFACES
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2777
Code wrapped by DISABLE_NEW_DEPRECATED_INTERFACES is deprecated.
So remove it.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-13 01:35:03 +00:00
Zhang, Shenglei
9c1f455f5f MdePkg: Remove code wrapped by DISABLE_NEW_DEPRECATED_INTERFACES
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2777
Code wrapped by DISABLE_NEW_DEPRECATED_INTERFACES is deprecated.
So remove it.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-13 01:35:03 +00:00
Chasel Chiu
cc942105ed IntelFsp2Pkg/GenCfgOpt: skip unnecessarily header/BSF recreating.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2967

When no change in FSP UPD DSC files, GenCfgOpt.py should skip
recreating UPD header and BSF files.
This patch added a check to handle this case.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-12 01:54:13 +00:00
gaoliming
ae511331e0 BaseTools Build_Rule: Add the missing ASM16_FLAGS for ASM16 source file
Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2020-10-10 06:52:41 +00:00
gaoliming
151c270899 BaseTools: Move C tool flags before the common flags
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2938

C tool may add the additional INC include path. They should have
high priority than the common INC include path.
This fix is to resolve the structure PCD issue to refer to the same
header file defined in BaseTools and MdePkg. The one in MdePkg should
be used.

Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Tested-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
2020-10-10 05:43:11 +00:00
gaoliming
cf0d09ca7b BaseTools: Copy PACKED definition from MdePkg Base.h
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2938

MdePkg Acpi10.h definition depends on PACKED.
When structure PCD refers to Acpi10.h, build will fail,
because PACKED definition is missing in BaseTools BaseTypes.h.

C source tools include BaseTools BaseTypes.h. They don't include MdePkg Base.h.
When C source tools include MdePkg Acpi10.h, they also need PACKED definition.
So, add PACKED definition into BaseTools BaseTypes.h.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Tested-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
2020-10-10 05:43:11 +00:00
Malgorzata Kukiello
f1567720b1 MdeModulePkg/Core/Dxe: expose SP and CRYPTO capabilities in UEFI memmap
OSs are now capable of treating SP and CRYPTO memory as true capabilities
and therefore these should be exposed. This requires usage of a separate
ACCESS_MASK to hide all page-access permission capabilities.
Change in masking and hiding of SP and CRYPTO was introduced in
3bd5c994c8

Signed-off-by: Malgorzata Kukiello <jacek.kukiello@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Oleksiy Yakovlev <oleksiyy@ami.com>
Cc: Ard Biesheuvel (ARM address) <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-10 04:04:50 +00:00
Malgorzata Kukiello
61915c4144 MdePkg/UefiSpec: separate page access bitmask from SP and CRYPTO caps
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2982

Operating systems are capable of treating SP and CRYPTO memory capabilities
and not as attributes. This means that these capabilites cannot be hidden
from OSs. For this reason, the SP and CRYPTO bits should be separated from
the bitmask that we use for hiding the page-access attributes.
Common mask for ATTRIBUTES was introduced in
3bd5c994c8

Signed-off-by: Malgorzata Kukiello <jacek.kukiello@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Oleksiy Yakovlev <oleksiyy@ami.com>
Cc: Ard Biesheuvel (ARM address) <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-10-10 04:04:50 +00:00
Wang, Sanyo
244be783ae MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Sanyo Wang <sanyo.wang@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2020-10-10 03:16:46 +00:00
Vladimir Olovyannikov via groups.io
70c2f10fde NetworkPkg: Fix possible infinite loop in HTTP msg body parser
When an HTTP server sends a non-chunked body data with no
Content-Length header, the HttpParserMessageBody in DxeHttpLib
gets confused and never sets the Char pointer beyond the body start.
This causes "for" loop to never break because the condition of
"Char >= Body + BodyLength" is never satisfied.
Use BodyLength as the ContentLength for the parser when
ContentLength is absent in HTTP response headers.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2941

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-10-09 10:40:33 +00:00
Abner Chang
5df413119e NetworkPkg/HttpDxe: TlsChildHandle is not cleared when reset
BZ #2909,
https://bugzilla.tianocore.org/show_bug.cgi?id=2909

When Http->Configure() is invoked with HttpConfigData set to
NULL to reset the EFI HTTP instance, TLS child instance is
destroyed but HttpInstance->TlsChildHandle is not set to
NULL. After reconfiguring HTTP through Http->Configure()
and sending the HTTP request to HTTPS URL, TLS child
instance is not recreated because
HttpInstance->TlsChildHandle is not NULL.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2020-10-09 09:38:13 +00:00
Maciej Rabeda
091ab12b34 NetworkPkg: Add RngLib entry to .dsc file.
Recent change to OpensslLib (b5701a4c7a)
causes NetworkPkg build to fail due to lack of RngLib entry in
NetworkPkg's .dsc file.

Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Signed-off-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
2020-10-09 09:01:45 +00:00
Abner Chang
69e95b9efe edk2: Add maintainers to RedfishPkg
Signed-off-by: Chang Abner <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-08 13:10:03 +00:00
Abner Chang
c63e13055a RedfishPkg: Initial commit of RedfishPkg.
Initial version of RedfishPkg.

Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Signed-off-by: Wang Fan <fan.wang@intel.com>
Signed-off-by: Chang Abner <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-10-08 13:10:03 +00:00
Jeff Brasen
c640186ec8 MdeModulePkg/HiiDatabase: Do not modify CONST string
Update function behavior to not modify the incoming string that is
marked as CONST in the prototype.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2020-10-07 04:20:56 +00:00
Vladimir Olovyannikov
2d8ca4f90e OvmfPkg: enable HttpDynamicCommand
Enable HttpDynamicCommand (Shell command "http") for OvmfPkg platforms.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2857

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Message-Id: <20200722205434.4348-3-vladimir.olovyannikov@broadcom.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: remove groups.io corruption from Author meta-datum]
2020-10-01 11:36:06 +00:00
Vladimir Olovyannikov
ebb3cc35f5 ArmVirtPkg: enable HttpDynamiCommand
Enable HttpDynamicCommand (http Shell command)
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2857

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Message-Id: <20200722205434.4348-2-vladimir.olovyannikov@broadcom.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: remove groups.io corruption from Author meta-datum]
2020-10-01 11:36:06 +00:00
Vladimir Olovyannikov
d8ab884fe9 ShellPkg/DynamicCommand: add HttpDynamicCommand
Introduce an http client utilizing EDK2 HTTP protocol, to
allow fast image downloading from http/https servers.
HTTP download speed is usually faster than tftp.
The client is based on the same approach as tftp dynamic command, and
uses the same UEFI Shell command line parameters. This makes it easy
integrating http into existing UEFI Shell scripts.
Note that to enable HTTP download, feature Pcd
gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections must
be set to TRUE.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2860

Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Nd <nd@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2020-09-30 01:28:51 +00:00
Wang, Jian J
52dbaaeace CryptoPkg/BaseCryptLib: add crypto algorithms needed by variable protection
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2594

Crypto algorithms, hkdf-sha256/hmac-sha256/aes, are needed to verify
integrity of variable data, derive hmac and encryption keys, and
encrypt/decrypt varible. Replacing null version source code with real
implementations makes sure we can enable full functionalities of protected
variable later.

Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Nishant C Mistry <nishant.c.mistry@intel.com>
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-09-29 05:58:58 +00:00
Nikita
ffa51b3bde BaseTools: Add RISCV64 binding
- Add RISCV64 ProcessorBind.h

- Add RISCV64 to Makefiles

Signed-off-by: Nikita Ermakov <sh1r4s3@mail.si-head.nl>
Ack-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Abner Chang <abner.chang@hpe.com>
2020-09-29 03:31:56 +00:00
Patrick Henz
71dd80f14f MdeModulePkg/XhciDxe: Fix Broken Timeouts
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948

Timeouts in the XhciDxe driver are taking longer than
expected due to the timeout loops not accounting for
code execution time. As en example, 5 second timeouts
have been observed to take around 36 seconds to complete.
Use SetTimer and Create/CheckEvent from Boot Services to
determine when timeout occurred.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Patrick Henz <patrick.henz@hpe.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-09-29 01:28:58 +00:00
Michael D Kinney
2793a49565 Readme.rst: Add EmulatorPkg SECURE_BOOT_ENABLE CI status
https://bugzilla.tianocore.org/show_bug.cgi?id=2979

Add CI status badges for the EmulatorPkg CI builds with
SECURE_BOOT_ENABLE=TRUE for IA32/X64 and DEBUG/RELEASE/NOOPT.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-09-28 20:23:04 +00:00
Michael D Kinney
2e14ee75c0 EmulatorPkg: Add CI build for SECURE_BOOT_ENABLE
https://bugzilla.tianocore.org/show_bug.cgi?id=2979

Add EmulatorPkg CI builds for SECURE_BOOT_ENABLE=TRUE
for IA32/X64 and DEBUG/RELEASE/NOOPT.  Label these as
FULL builds, so if additional build options are added
in the future, they can be added to these FULL builds.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-09-28 20:23:04 +00:00
gaoliming
1d058c3e86 IntelFsp2Pkg GenCfgOpt.py: Initialize IncLines as empty list
IncLines as empty list for the case when InputHeaderFile is not specified.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2020-09-25 07:33:31 +00:00
Bob Feng
d8be01079b BaseTools: Set section alignment as zero if its type is Auto
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2881

Currently, the build tool try to read the section alignment
from efi file if the section alignment type is Auto.
If there is no efi generated, the section alignment will
be set to zero. This behavior causes the Makefile to be different
between the full build and the incremental build.

Since the Genffs can auto get the section alignment from
efi file during Genffs procedure, the build tool can just set section
alignment as zero. This change can make the autogen makefile
consistent for the full build and the incremental build.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
2020-09-25 02:27:35 +00:00
Bob Feng
3a7a676114 BaseTools: Remove CanSkip calling for incremental build
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2978

If a module add a new PCD, the pcd token number will be
reassigned. The new Pcd token number should be updated
to all module's autogen files. CanSkip can only detect a
single module's change but not others. CanSkip block the
pcd token number update in incremental build, so this
patch is going to remove this call.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
2020-09-25 02:27:35 +00:00
Mingyue Liang
9641a7f975 BaseTools: Normalize case of pathname when evaluating Macros.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2880

Currently, When doing the Incremental build, the directory
macros extended to absolute path in output Makefile, which
is inconsistent with the output of Clean build.

When we do macro replacement, we can't replace macro due to
inconsistent path case, which results in inconsistent display
of incremental build and clean build in makefile.Therefore,
the path is converted to achieve the correct macro replacement.

Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2020-09-25 02:27:35 +00:00
Bob Feng
a8c77eba37 BaseTools: Clean the ffs folder before generating files in it
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2965

The content in Guid.xref depends on the files under the corresponding
ffs folder.(refer to the commit 5e9256cd7f)
To make Guid.xref update in the incremental build,
clean the files under that ffs folder before generating files in it.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
2020-09-25 02:27:35 +00:00
Mingyue Liang
aec99d9bc3 BaseTools: Add included files to deps_target file.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2882

After changing the name of the include source file,
when doing incremental build, the previous source file
is not covered in the. DEPs file, and a build error occurs.

The root cause is that the build tools filter out some dependency
files, which are listed in inf source section, from the deps_target file.
Add those files back to deps_target file to resolve the above problem.

Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Reviewed-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2020-09-25 02:27:35 +00:00
wenyi,xie via groups.io
dd5c7e3c52 EmulatorPkg/host: fix overflow in Mult
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2947

When calculating memory regions and store the information in the
gSystemMemory in file WinHost.c, the code below will cause overflow,
because _wtoi (MemorySizeStr) return an int value and SIZE_1MB is
also an int value, if MemorySizeStr is lager for example 2048, then
result of multiplication will overflow.

for (Index = 0, Done = FALSE; !Done; Index++) {
  //
  // Save the size of the memory and make a Unicode filename SystemMemory00
  //
  gSystemMemory[Index].Size = _wtoi (MemorySizeStr) * SIZE_1MB;

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
2020-09-23 02:53:41 +00:00
Laszlo Ersek
3f3daf8930 OvmfPkg/README: HTTPS Boot: describe host-side TLS cipher suites forwarding
In QEMU commit range 4abf70a661a5..69699f3055a5 (later fixed up in QEMU
commit 4318432ccd3f), Phil implemented a QEMU facility for exposing the
host-side TLS cipher suite configuration to OVMF. The purpose is to
control the permitted ciphers in the guest's UEFI HTTPS boot. This
complements the forwarding of the host-side crypto policy from the host to
the guest -- the other facet was the set of CA certificates (for which
p11-kit patches had been upstreamed, on the host side).

Mention the new command line options in "OvmfPkg/README".

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Gary Lin <glin@suse.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2852
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Gary Lin <glin@suse.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200922091827.12617-1-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2020-09-22 16:27:58 +00:00
Laszlo Ersek
fb97626fe0 .mailmap: add entries for Rebecca Cran
... for git-shortlog purposes.

NOTE: this patch does not introduce a cross-domain mapping; it only maps
both email addresses of Rebecca to the full name "Rebecca Cran".

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
4fc6912b96 .mailmap: add (another) entry for Liming Gao
... for git-shortlog purposes.

NOTE: this patch does not introduce a cross-domain mapping; it only maps
the name "gaoliming" in Liming's new email address to "Liming Gao" (see
the Author field on commit aad9cba85f).

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
e97c78c546 .mailmap: add entry for Matt DeVillier
... for git-shortlog purposes.

Cc: Matt DeVillier <matt.devillier@gmail.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Matt DeVillier <matt.devillier@gmail.com>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
a6e9a9c025 .mailmap: add entry for Wei6 Xu
... for git-shortlog purposes.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Wei6 Xu <wei6.xu@intel.com>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
00b51fcb1e .mailmap: add entry for Zhiguang Liu
... for git-shortlog purposes.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
86b3bee2f3 .mailmap: add entry for Tom Lendacky
... for git-shortlog purposes.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
2020-09-22 13:53:46 +00:00
Laszlo Ersek
440121b542 .mailmap: add entry for Zhichao Gao
... for git-shortlog purposes.

Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Zhichao Gao <zhichao.gao@intel.com>
2020-09-22 13:53:46 +00:00
Divneil Rai Wadhawan
ea9af51479 EmulatorPkg: Add RngLib to satisfy dependency of OpensslLib
* Recently, OpensslLib [LibraryClasses] has been changed
  to include RngLib which causes the SECURE_BOOT_ENABLE
  build to fail in want of RngLib

* This patch adds the RngLib for OpensslLib

Signed-off-by: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-09-21 02:59:28 +00:00
Divneil Rai Wadhawan
7faece6985 EmulatorPkg: Enable support for Secure Boot
SECURE_BOOT_ENABLE feature flag is introduced to enable Secure Boot.
The following gets enabled with this patch:
* Secure Boot Menu in "Device Manager" for enrolling keys
* Storage space for Authenticated Variables
* Authenticated execution of 3rd party images

Signed-off-by: Divneil Rai Wadhawan <divneil.r.wadhawan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-09-18 11:53:29 +00:00
Jeff Brasen
698d3d7726 MdeModulePkg/NonDiscoverablePciDeviceDxe: Add NULL pointer check
Add check for NULL HostAddress in AllocateBuffer as required by UEFI
specification.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-09-18 02:45:21 +00:00
Matthew Carlson
b5701a4c7a CryptoPkg: OpensslLib: Use RngLib to generate entropy in rand_pool
Ref: https://github.com/tianocore/edk2/pull/845
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

Changes OpenSSL to no longer depend on TimerLib and instead use RngLib.
This allows platforms to decide for themsevles what sort of entropy source
they provide to OpenSSL and TlsLib.

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>

Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-18 02:19:21 +00:00
Matthew Carlson
4168137537 ArmVirtPkg: Add RngLib based on TimerLib for CryptoPkg
Updates the DSC for the ArmVirtPkg platform to add a RngLib that uses the
TimerLib. This is due to a later change that adds TimerLib as a dependency
for OpenSSL. The TimerLib based RngLib mimics the behavior of OpenSSL
previously and it is recommended to switch to a better source of
entropy than the system's performance counter.

Ref: https://github.com/tianocore/edk2/pull/845
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-18 02:19:21 +00:00
Matthew Carlson
a09df5d2e1 OvmfPkg: Add RngLib based on TimerLib for Crypto
Updates the DSC's for Ovmf based platforms to add a RngLib that uses the
TimerLib. This is due to a later change that adds TimerLib as a dependency
for OpenSSL. The TimerLib based RngLib mimics the behavior of OpenSSL
previously and it is recommended to switch to a better source of
entropy than the system's performance counter.

Ref: https://github.com/tianocore/edk2/pull/845
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-18 02:19:21 +00:00
Matthew Carlson
ed0dce7d54 MdePkg: BaseRngLibDxe: Add RngLib that uses RngDxe
This adds a RngLib that uses the RngProtocol to provide randomness.
This means that the RngLib is meant to be used with DXE_DRIVERS.

Ref: https://github.com/tianocore/edk2/pull/845
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-18 02:19:21 +00:00
Matthew Carlson
f56ed0e51d MdePkg: TimerRngLib: Added RngLib that uses TimerLib
Added a new RngLib that provides random numbers from the TimerLib
using the performance counter. This is meant to be used for OpenSSL
to replicate past behavior. This should not be used in production as
a real source of entropy.

Ref: https://github.com/tianocore/edk2/pull/845
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1871

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-18 02:19:21 +00:00
Michael Kubacki
32b0a492d5 MdePkg: Correct EFI_BLOCK_IO_PROTOCOL_REVISION3 value
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2961

The value of EFI_BLOCK_IO_PROTOCOL_REVISION3 is currently
0x00020031. However, the value assigned in the UEFI Specification
2.8B is ((2<<16) | (31)) which is 0x0002001F.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-09-18 01:36:07 +00:00
Leif Lindholm
5648836987 OvmfPkg: drop redundant VendorID check in VirtioMmioDeviceLib
There is a DEBUG warning printout in VirtioMmioDeviceLib if the current
device's VendorID does not match the traditional 16-bit Red Hat PCIe
vendor ID used with virtio-pci. The virtio-mmio vendor ID is 32-bit and
has no connection to the PCIe registry.

Most specifically, this causes a bunch of noise when booting an AArch64
QEMU platform, since QEMU's virtio-mmio implementation used 'QEMU' as
the vendor ID:
VirtioMmioInit: Warning:
  The VendorId (0x554D4551) does not match the VirtIo VendorId (0x1AF4).

Drop the warning message.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-09-17 12:01:11 +00:00
Marcello Sylvester Bauer
8028b2907e UefiPayloadPkg: Support variable size MMCONF space
The default size is still 256MiB, but will be overwritten by
UefiPayloadPkg with the real MMCONF size.

e.g.: On embedded AMD platforms the MMCONF window size is usually
      only 64MiB.

Fixes crash on platforms not exposing 256 buses.
Tested on:
* AMD Stoney Ridge

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2020-09-16 06:36:18 +00:00
Marcello Sylvester Bauer
5c06585528 MdePkg: PciExpressLib support variable size MMCONF
Add support for arbitrary sized MMCONF by introducing a new PCD.
Add a return value to point out invalid PCI addresses.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-09-16 06:36:18 +00:00
Patrick Rudolph
28d7eea97e UefiPayloadPkg: Store the size of the MMCONF window
Store the real size of the Pcie Memory Mapped Address Space.
This change is necessary to support variable size of MMCONF spaces.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2020-09-16 06:36:18 +00:00
Qi Zhang
7bcb021a6d SecurityPkg/PeiTpmMeasurementLib: remove gEfiTpmDeviceSelectedGuid
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2963

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2020-09-16 05:16:02 +00:00
Qi Zhang
414d7d11e6 IntelFsp2WrapperPkg: remove gPeiTpmInitializationDonePpiGuid from Depex
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2963

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2020-09-16 05:16:02 +00:00
Matthew Carlson
a62fb4229d BaseTools: update IASL extdep to more modern version
The IASL extdep is used for CI only and a recent fork of the ACPICA
repo was made to make nuget builds more regular and easier to audit.
https://dev.azure.com/projectmu/_git/acpica

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Matthew Carlson <matthewfcarlson@gmail.com>
2020-09-16 01:26:08 +00:00
Chasel Chiu
1b461403ee UefiCpuPkg/RegisterCpuFeaturesLib: Support MpServices2 only case.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2883

MpServices Ppi can be replaced by MpServices2 Ppi and MpServices2
Ppi is mandatory for RegisterCpuFeaturesLib functionality,
basing on this we can drop MpServices Ppi usage from the library
and the constraint that both Ppis must be installed.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-09-14 13:07:37 +00:00
Wenyi Xie
067503a8c6 EmulatorPkg:Change DEC_VERSION to DEC_SPECIFICATION
edk2 DEC specification document only knows about DEC_SPECIFICATION,
so using DEC_VERSION in [Defines] section in EmulatorPkg.dec is not
correct.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-09-14 04:01:27 +00:00
Guo Dong
317d84abe3 UefiPayloadPkg:Remove x86 legacy UART defaults
The BaseSerialPortLib16550 does fallback to a fixed address UART defined
by PcdSerialRegisterBase and does not initialize if it is zero. Do not
assume a serial port at 0x3F8, otherwise it could cause errors during
initialization of a non-existent serial port on non legacy platforms.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2020-09-09 00:13:02 +00:00
Laszlo Ersek
f94345d9ea EmbeddedPkg/TimeBaseLib: remove the SEC_PER_MONTH, SEC_PER_YEAR macros
The SEC_PER_MONTH and SEC_PER_YEAR macros are wrong: they both evaluate to
0 (of type "int"). They are also unused (they could never be used for
division, for example); so remove them. The macros were originally
introduced in commit 0f4386e775 ("ArmPlatformPkg/PL031RealTimeClockLib:
Implement PL031 RTC drive", 2011-06-11).

Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Reported-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20200904154541.23340-1-lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-09-08 10:30:28 +00:00
Bob Feng
859e09523d BaseTools: Sort the Pcd set when generating the VPD binary
If VPD PcdNvStoreDefaultValueBuffer is used, all DynamicHii and
DynamicExHii PCD value will be generated into that VPD.

In order to generate the same VPD binary file in every build,
sort the Pcd set when generating VPD.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2020-09-08 08:48:24 +00:00
Zhichao Gao
cdfc7ed34f SecurityPkg/DxeImageVerificationLib: Disable SHA1 base on MACRO
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2943

Disable SHA1 base on the MACRO DISABLE_SHA1_DEPRECATED_INTERFACES.
SHA1 is deprecated function and the MACRO is used to remove the whole
implementation of the SHA1. For the platforms that do not need SHA1
for security, the MACRO should works for DxeImageVerificationLib as
well.

Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-09-07 02:38:42 +00:00
Abner Chang
2ace920de1 Maintainers.txt: Update reviewers of */RiscV64
Add reviewers for all /RiscV64 folders.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20200904071913.17295-1-abner.chang@hpe.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
[lersek@redhat.com: pick up Leif's R-b from <20200830114401.GB20124@vanye>]
2020-09-04 10:01:55 +00:00
1023 changed files with 76549 additions and 15317 deletions

View File

@@ -7,8 +7,10 @@
##
trigger:
- master
- stable/*
pr:
- master
- stable/*
jobs:
- template: templates/pr-gate-build-job.yml

View File

@@ -5,7 +5,7 @@
# NOTE: This example monitors pull requests against the edk2-ci branch. Most
# environments would replace 'edk2-ci' with 'master'.
#
# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
# https://github.com/tianocore
@@ -16,6 +16,7 @@ trigger: none
pr:
- master
- stable/*
pool:
vmImage: 'ubuntu-latest'

View File

@@ -6,9 +6,11 @@
##
trigger:
- master
- stable/*
pr:
- master
- stable/*
jobs:
- template: templates/pr-gate-build-job.yml

View File

@@ -51,6 +51,15 @@ steps:
# Set default
- bash: echo "##vso[task.setvariable variable=pkg_count]${{ 1 }}"
# Use altername cmocka repo
- bash: git config --global url.https://github.com/neverware-mirrors/cmocka.git.insteadOf https://git.cryptomilk.org/projects/cmocka.git
# Fetch the target branch so that pr_eval can diff them.
# Seems like azure pipelines/github changed checkout process in nov 2020.
- script: git fetch origin $(System.PullRequest.targetBranch)
displayName: fetch target branch
condition: eq(variables['Build.Reason'], 'PullRequest')
# trim the package list if this is a PR
- task: CmdLine@1
displayName: Check if ${{ parameters.build_pkg }} need testing

View File

@@ -4,7 +4,7 @@
# template file used to build supported packages.
#
# Copyright (c) Microsoft Corporation.
# Copyright (c) 2020, ARM Limited. All rights reserved.<BR>
# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@@ -31,17 +31,17 @@ jobs:
Build.Pkgs: 'MdeModulePkg'
Build.Targets: 'RELEASE,NO-TARGET'
TARGET_NETWORK:
Build.Pkgs: 'NetworkPkg'
Build.Pkgs: 'NetworkPkg,RedfishPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_OTHER:
Build.Pkgs: 'PcAtChipsetPkg,ShellPkg'
Build.Pkgs: 'PcAtChipsetPkg,ShellPkg,StandaloneMmPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_FMP_FAT_TEST:
Build.Pkgs: 'FmpDevicePkg,FatPkg,UnitTestFrameworkPkg,DynamicTablesPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
TARGET_CRYPTO:
Build.Pkgs: 'CryptoPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
TARGET_SECURITY:
Build.Pkgs: 'SecurityPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'

View File

@@ -31,6 +31,15 @@ steps:
echo "##vso[task.setvariable variable=pkgs_to_build]${{ parameters.build_pkgs }}"
echo "##vso[task.setvariable variable=pkg_count]${{ 1 }}"
# Use altername cmocka repo
- bash: git config --global url.https://github.com/neverware-mirrors/cmocka.git.insteadOf https://git.cryptomilk.org/projects/cmocka.git
# Fetch the target branch so that pr_eval can diff them.
# Seems like azure pipelines/github changed checkout process in nov 2020.
- script: git fetch origin $(System.PullRequest.targetBranch)
displayName: fetch target branch
condition: eq(variables['Build.Reason'], 'PullRequest')
# trim the package list if this is a PR
- task: CmdLine@1
displayName: Check if ${{ parameters.build_pkgs }} need testing

3
.gitmodules vendored
View File

@@ -17,3 +17,6 @@
path = BaseTools/Source/C/BrotliCompress/brotli
url = https://github.com/google/brotli
ignore = untracked
[submodule "RedfishPkg/Library/JsonLib/jansson"]
path = RedfishPkg/Library/JsonLib/jansson
url = https://github.com/akheron/jansson

View File

@@ -38,6 +38,7 @@ Jim Dailey <Jim.Dailey@Dell.com>
Jim Dailey <Jim.Dailey@Dell.com> <Jim_Dailey@Dell.com>
Laszlo Ersek <lersek@redhat.com> <lersek@6f19259b-4bc3-4df7-8a09-765794883524>
Laszlo Ersek <lersek@redhat.com> <lersek@Edk2>
Liming Gao <gaoliming@byosoft.com.cn>
Liming Gao <liming.gao@intel.com> <Gao, Liming liming.gao@intel.com>
Liming Gao <liming.gao@intel.com> <lgao4@6f19259b-4bc3-4df7-8a09-765794883524>
Liming Gao <liming.gao@intel.com> <lgao4@Edk2>
@@ -47,6 +48,7 @@ Marc-André Lureau <marcandre.lureau@redhat.com> <marcandre.lureau@redhat.com>
Marvin Häuser <Marvin.Haeuser@outlook.com>
Marvin Häuser <Marvin.Haeuser@outlook.com> edk2-devel <edk2-devel-bounces@lists.01.org>
Marvin Häuser <mhaeuser@outlook.de>
Matt DeVillier <matt.devillier@gmail.com>
Maurice Ma <maurice.ma@intel.com>
Michael Kubacki <michael.a.kubacki@intel.com>
Michael Kubacki <michael.a.kubacki@intel.com> </o=Intel/ou=External (FYDIBOHF25SPDLT)/cn=Recipients/cn=3c8b0226e75f4ab08d20c151cb7a8a72>
@@ -60,14 +62,20 @@ Ray Ni <ray.ni@intel.com> <niruiyu@Edk2>
Ray Ni <ray.ni@intel.com> <ruiyu.ni@intel.com>
Ray Ni <ray.ni@intel.com> <Ruiyu.ni@Intel.com>
Ray Ni <ray.ni@intel.com> <ruyu.ni@intel.com>
Rebecca Cran <rebecca@bluestop.org>
Rebecca Cran <rebecca@bsdio.com>
Samer El-Haj-Mahmoud <samer@elhajmahmoud.com> <elhaj@hpe.com>
Samer El-Haj-Mahmoud <samer@elhajmahmoud.com> <Samer El-Haj-Mahmoud elhaj@hp.com>
Shenglei Zhang <shenglei.zhang@intel.com>
Star Zeng <star.zeng@intel.com>
Star Zeng <star.zeng@intel.com> <lzeng14@6f19259b-4bc3-4df7-8a09-765794883524>
Star Zeng <star.zeng@intel.com> <lzeng14@Edk2>
Tom Lendacky <thomas.lendacky@amd.com>
Vitaly Cheptsov <vit9696@protonmail.com> Vitaly Cheptsov via Groups.Io <vit9696=protonmail.com@groups.io>
Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Vladimir Olovyannikov via edk2-devel <edk2-devel@lists.01.org>
Wei6 Xu <wei6.xu@intel.com>
Yonghong Zhu <yonghong.zhu@intel.com>
Yonghong Zhu <yonghong.zhu@intel.com> <yzhu52@Edk2>
Yu-Chen Lin <yuchenlin@synology.com>
Zhichao Gao <zhichao.gao@intel.com>
Zhiguang Liu <zhiguang.liu@intel.com>

View File

@@ -16,7 +16,7 @@
# * This file must be checked into the 'default' branch of a repo. Copies
# of this file on other branches of a repo are ignored by Mergify.
#
# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
# https://github.com/apps/mergify
@@ -28,7 +28,7 @@ pull_request_rules:
- name: Automatically merge a PR when all required checks pass and 'push' label is present
conditions:
- base=master
- base~=(^master|^stable/)
- label=push
- author=@tianocore/edk-ii-maintainers
- status-success=tianocore.PatchCheck
@@ -41,7 +41,7 @@ pull_request_rules:
- name: Automatically close a PR when all required checks pass and 'push' label is not present
conditions:
- base=master
- base~=(^master|^stable/)
- -label=push
- -closed
- status-success=tianocore.PatchCheck
@@ -55,7 +55,7 @@ pull_request_rules:
- name: Post a comment on a PR that can not be merged due to a merge conflict
conditions:
- base=master
- base~=(^master|^stable/)
- conflict
actions:
comment:
@@ -63,7 +63,7 @@ pull_request_rules:
- name: Automatically close a PR that fails the EDK II Maintainers membership check and 'push' label is present
conditions:
- base=master
- base~=(^master|^stable/)
- label=push
- -author=@tianocore/edk-ii-maintainers
actions:
@@ -72,7 +72,7 @@ pull_request_rules:
- name: Post a comment on a PR if PatchCheck fails
conditions:
- base=master
- base~=(^master|^stable/)
- status-failure=tianocore.PatchCheck
actions:
comment:
@@ -80,7 +80,7 @@ pull_request_rules:
- name: Post a comment on a PR if Ubuntu GCC5 fails
conditions:
- base=master
- base~=(^master|^stable/)
- status-failure=Ubuntu GCC5 PR
- status-success=Ubuntu GCC5 PR (FAILED)
actions:
@@ -89,7 +89,7 @@ pull_request_rules:
- name: Post a comment on a PR if Windows VS2019 fails
conditions:
- base=master
- base~=(^master|^stable/)
- status-failure=Windows VS2019 PR
- status-success=Windows VS2019 PR (FAILED)
actions:

View File

@@ -2,7 +2,7 @@
#
# Copyright (c) Microsoft Corporation.
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# Copyright (c) 2020, ARM Limited. All rights reserved.<BR>
# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
@@ -22,16 +22,24 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
self.ActualTargets = []
self.ActualArchitectures = []
self.ActualToolChainTag = ""
self.UseBuiltInBaseTools = None
self.ActualScopes = None
# ####################################################################################### #
# Extra CmdLine configuration #
# ####################################################################################### #
def AddCommandLineOptions(self, parserObj):
pass
group = parserObj.add_mutually_exclusive_group()
group.add_argument("-force_piptools", "--fpt", dest="force_piptools", action="store_true", default=False, help="Force the system to use pip tools")
group.add_argument("-no_piptools", "--npt", dest="no_piptools", action="store_true", default=False, help="Force the system to not use pip tools")
def RetrieveCommandLineOptions(self, args):
pass
super().RetrieveCommandLineOptions(args)
if args.force_piptools:
self.UseBuiltInBaseTools = True
if args.no_piptools:
self.UseBuiltInBaseTools = False
# ####################################################################################### #
# Default Support for this Ci Build #
@@ -52,10 +60,12 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"UefiCpuPkg",
"FmpDevicePkg",
"ShellPkg",
"StandaloneMmPkg",
"FatPkg",
"CryptoPkg",
"UnitTestFrameworkPkg",
"OvmfPkg"
"OvmfPkg",
"RedfishPkg"
)
def GetArchitecturesSupported(self):
@@ -126,19 +136,38 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
def GetActiveScopes(self):
''' return tuple containing scopes that should be active for this process '''
scopes = ("cibuild", "edk2-build", "host-based-test")
if self.ActualScopes is None:
scopes = ("cibuild", "edk2-build", "host-based-test")
self.ActualToolChainTag = shell_environment.GetBuildVars().GetValue("TOOL_CHAIN_TAG", "")
self.ActualToolChainTag = shell_environment.GetBuildVars().GetValue("TOOL_CHAIN_TAG", "")
if GetHostInfo().os.upper() == "LINUX" and self.ActualToolChainTag.upper().startswith("GCC"):
if "AARCH64" in self.ActualArchitectures:
scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
if "RISCV64" in self.ActualArchitectures:
scopes += ("gcc_riscv64_unknown",)
is_linux = GetHostInfo().os.upper() == "LINUX"
return scopes
if self.UseBuiltInBaseTools is None:
is_linux = GetHostInfo().os.upper() == "LINUX"
# try and import the pip module for basetools
try:
import edk2basetools
self.UseBuiltInBaseTools = True
except ImportError:
self.UseBuiltInBaseTools = False
pass
if self.UseBuiltInBaseTools == True:
scopes += ('pipbuild-unix',) if is_linux else ('pipbuild-win',)
logging.warning("Using Pip Tools based BaseTools")
else:
logging.warning("Falling back to using in-tree BaseTools")
if is_linux and self.ActualToolChainTag.upper().startswith("GCC"):
if "AARCH64" in self.ActualArchitectures:
scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
if "RISCV64" in self.ActualArchitectures:
scopes += ("gcc_riscv64_unknown",)
self.ActualScopes = scopes
return self.ActualScopes
def GetRequiredSubmodules(self):
''' return iterable containing RequiredSubmodule objects.
@@ -157,6 +186,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"MdeModulePkg/Library/BrotliCustomDecompressLib/brotli", False))
rs.append(RequiredSubmodule(
"BaseTools/Source/C/BrotliCompress/brotli", False))
rs.append(RequiredSubmodule(
"RedfishPkg/Library/JsonLib/jansson", False))
return rs
def GetName(self):

View File

@@ -178,5 +178,6 @@
"vcruntimed",
"ucrtd",
"msvcrtd",
"XIPFLAGS"
]
}

View File

@@ -24,7 +24,7 @@
| ShellPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 3 modules are not being built by DSC
| SignedCapsulePkg |
| SourceLevelDebugPkg |
| StandaloneMmPkg |
| StandaloneMmPkg | :heavy_check_mark: | :heavy_check_mark: |
| UefiCpuPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 2 binary modules not being built by DSC
| UefiPayloadPkg |
| UnitTestFrameworkPkg | :heavy_check_mark: | :heavy_check_mark: |

View File

@@ -84,6 +84,13 @@
# hardware coherency (i.e., no virtualization or cache coherent DMA)
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043
[PcdsFeatureFlag.AARCH64]
## Used to select method for requesting services from S-EL1.<BR><BR>
# TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.<BR>
# FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR>
# @Prompt Enable FF-A support.
gArmTokenSpaceGuid.PcdFfaEnable|FALSE|BOOLEAN|0x0000005B
[PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
@@ -115,6 +122,20 @@
# The Primary Core is ClusterId[0] & CoreId[0]
gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
#
# SMBIOS PCDs
#
gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053
gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054
gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055
gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056
gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057
gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071
gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072
gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073
gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074
gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075
#
# ARM L2x0 PCDs
#
@@ -215,6 +236,9 @@
gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045
gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046
gArmTokenSpaceGuid.PcdSystemBiosRelease|0xFFFF|UINT16|0x30000058
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0xFFFF|UINT16|0x30000059
[PcdsFixedAtBuild.common, PcdsDynamic.common]
#
# ARM Architectural Timer

View File

@@ -84,6 +84,8 @@
ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
OemMiscLib|ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
[LibraryClasses.common.PEIM]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -146,6 +148,9 @@
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
[Components.AARCH64]
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf

View File

@@ -25,10 +25,13 @@
+ ARM_GICR_SGI_RESERVED_FRAME_SIZE)
#define ISENABLER_ADDRESS(base,offset) ((base) + \
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * offset))
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + 4 * (offset))
#define ICENABLER_ADDRESS(base,offset) ((base) + \
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * offset))
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
#define IPRIORITY_ADDRESS(base,offset) ((base) + \
ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset))
/**
*
@@ -199,6 +202,50 @@ ArmGicEndOfInterrupt (
}
}
VOID
EFIAPI
ArmGicSetInterruptPriority (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source,
IN UINTN Priority
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate register offset and bit position
RegOffset = Source / 4;
RegShift = (Source % 4) * 8;
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
MmioAndThenOr32 (
GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
Priority << RegShift
);
} else {
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
GicRedistributorBase,
Revision
);
if (GicCpuRedistributorBase == 0) {
return;
}
MmioAndThenOr32 (
IPRIORITY_ADDRESS (GicCpuRedistributorBase, RegOffset),
~(0xff << RegShift),
Priority << RegShift
);
}
}
VOID
EFIAPI
ArmGicEnableInterrupt (

View File

@@ -374,8 +374,6 @@ GicV3DxeInitialize (
{
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
UINTN RegShift;
UINT64 CpuTarget;
UINT64 MpId;
@@ -397,12 +395,11 @@ GicV3DxeInitialize (
GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
// Set Priority
RegOffset = Index / 4;
RegShift = (Index % 4) * 8;
MmioAndThenOr32 (
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
ARM_GIC_DEFAULT_PRIORITY << RegShift
ArmGicSetInterruptPriority (
mGicDistributorBase,
mGicRedistributorsBase,
Index,
ARM_GIC_DEFAULT_PRIORITY
);
}

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
Copyright (c) 2017-2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -161,8 +161,9 @@ ScmiProtocolDiscoveryCommon (
)
{
SCMI_COMMAND Command;
UINT32 PayloadLength = 0;
UINT32 PayloadLength;
PayloadLength = 0;
Command.ProtocolId = ProtocolId;
Command.MessageId = MessageId;

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
Copyright (c) 2017-2021, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -189,12 +189,14 @@ ClockDescribeRates (
CLOCK_DESCRIBE_RATES *DescribeRates;
CLOCK_RATE_DWORD *Rate;
UINT32 RequiredArraySize = 0;
UINT32 RateIndex = 0;
UINT32 RequiredArraySize;
UINT32 RateIndex;
UINT32 RateNo;
UINT32 RateOffset;
*TotalRates = 0;
RequiredArraySize = 0;
RateIndex = 0;
Status = ScmiCommandGetPayload (&MessageParams);
if (EFI_ERROR (Status)) {

View File

@@ -2,7 +2,7 @@
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
Portions copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -189,7 +189,7 @@ SyncCacheConfig (
)
{
EFI_STATUS Status;
UINT32 PageAttribute = 0;
UINT32 PageAttribute;
UINT64 *FirstLevelTableAddress;
UINTN TableLevel;
UINTN TableCount;
@@ -282,12 +282,12 @@ EfiAttributeToArmAttribute (
ArmAttributes |= TT_AF;
// Determine protection attributes
if (EfiAttributes & EFI_MEMORY_RO) {
if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
ArmAttributes |= TT_AP_RO_RO;
}
// Process eXecute Never attribute
if (EfiAttributes & EFI_MEMORY_XP) {
if ((EfiAttributes & EFI_MEMORY_XP) != 0) {
ArmAttributes |= TT_PXN_MASK;
}

View File

@@ -2,7 +2,7 @@
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
Portions copyright (c) 2013-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -155,8 +155,8 @@ SyncCacheConfigPage (
EFI_STATUS Status;
UINT32 i;
volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
UINT32 NextPageAttributes = 0;
UINT32 PageAttributes = 0;
UINT32 NextPageAttributes;
UINT32 PageAttributes;
UINT32 BaseAddress;
UINT64 GcdAttributes;
@@ -226,8 +226,8 @@ SyncCacheConfig (
UINT32 i;
EFI_PHYSICAL_ADDRESS NextRegionBase;
UINT64 NextRegionLength;
UINT32 NextSectionAttributes = 0;
UINT32 SectionAttributes = 0;
UINT32 NextSectionAttributes;
UINT32 SectionAttributes;
UINT64 GcdAttributes;
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINTN NumberOfDescriptors;
@@ -366,14 +366,14 @@ EfiAttributeToArmAttribute (
}
// Determine protection attributes
if (EfiAttributes & EFI_MEMORY_RO) {
if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
} else {
ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
}
// Determine eXecute Never attribute
if (EfiAttributes & EFI_MEMORY_XP) {
if ((EfiAttributes & EFI_MEMORY_XP) != 0) {
ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
}

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
Portions Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -14,7 +14,8 @@
EFI_STATUS
InitializeExceptions (
IN EFI_CPU_ARCH_PROTOCOL *Cpu
) {
)
{
EFI_STATUS Status;
EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
@@ -92,7 +93,8 @@ EFI_STATUS
RegisterInterruptHandler(
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
) {
)
{
// pass down to CpuExceptionHandlerLib
return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
}

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016-2019, ARM Limited. All rights reserved.
Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -96,7 +96,7 @@ MmCommunication2Communicate (
sizeof (CommunicateHeader->MessageLength);
// If the length of the CommBuffer is 0 then return the expected length.
if (CommSize) {
if (CommSize != 0) {
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) ||

View File

@@ -1,7 +1,7 @@
/** @file
Timer Architecture Protocol driver of the ARM flavor
Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -307,7 +307,7 @@ TimerInterruptHandler (
// Check if the timer interrupt is active
if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
if (mTimerNotifyFunction) {
if (mTimerNotifyFunction != 0) {
mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
}
@@ -359,7 +359,7 @@ TimerInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_HANDLE Handle = NULL;
EFI_HANDLE Handle;
EFI_STATUS Status;
UINTN TimerCtrlReg;
UINT32 TimerHypIntrNum;
@@ -408,6 +408,7 @@ TimerInitialize (
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
ASSERT_EFI_ERROR (Status);
Handle = NULL;
// Install the Timer Architectural Protocol onto a new handle
Status = gBS->InstallMultipleProtocolInterfaces(
&Handle,

View File

@@ -2,7 +2,7 @@
Support a Semi Host file system over a debuggers JTAG
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
Portions copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -90,8 +90,9 @@ AllocateFCB (
VOID
)
{
SEMIHOST_FCB *Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
SEMIHOST_FCB *Fcb;
Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
if (Fcb != NULL) {
CopyMem (&Fcb->File, &gSemihostFsFile, sizeof (gSemihostFsFile));
Fcb->Signature = SEMIHOST_FCB_SIGNATURE;
@@ -122,7 +123,7 @@ VolumeOpen (
OUT EFI_FILE **Root
)
{
SEMIHOST_FCB *RootFcb = NULL;
SEMIHOST_FCB *RootFcb;
if (Root == NULL) {
return EFI_INVALID_PARAMETER;
@@ -196,8 +197,8 @@ FileOpen (
return EFI_INVALID_PARAMETER;
}
if ((OpenMode & EFI_FILE_MODE_CREATE) &&
(Attributes & EFI_FILE_DIRECTORY) ) {
if (((OpenMode & EFI_FILE_MODE_CREATE) != 0) &&
((Attributes & EFI_FILE_DIRECTORY) != 0)) {
return EFI_WRITE_PROTECTED;
}
@@ -234,7 +235,7 @@ FileOpen (
Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
if (RETURN_ERROR (Return)) {
if (OpenMode & EFI_FILE_MODE_CREATE) {
if ((OpenMode & EFI_FILE_MODE_CREATE) != 0) {
//
// In the create if does not exist case, if the opening in update
// mode failed, create it and open it in update mode. The update
@@ -277,7 +278,8 @@ FileOpen (
FileFcb->Info.FileSize = Length;
FileFcb->Info.PhysicalSize = Length;
FileFcb->Info.Attribute = (OpenMode & EFI_FILE_MODE_CREATE) ? Attributes : 0;
FileFcb->Info.Attribute = ((OpenMode & EFI_FILE_MODE_CREATE) != 0) ?
Attributes : 0;
InsertTailList (&gFileList, &FileFcb->Link);
@@ -758,12 +760,13 @@ GetFileInfo (
OUT VOID *Buffer
)
{
EFI_FILE_INFO *Info = NULL;
UINTN NameSize = 0;
EFI_FILE_INFO *Info;
UINTN NameSize;
UINTN ResultSize;
UINTN Index;
if (Fcb->IsRoot == TRUE) {
if (Fcb->IsRoot) {
NameSize = 0;
ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
} else {
NameSize = AsciiStrLen (Fcb->FileName) + 1;
@@ -783,7 +786,7 @@ GetFileInfo (
// Fill in the structure
Info->Size = ResultSize;
if (Fcb->IsRoot == TRUE) {
if (Fcb->IsRoot) {
Info->FileName[0] = L'\0';
} else {
for (Index = 0; Index < NameSize; Index++) {

View File

@@ -112,6 +112,10 @@
#define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
// build for ARMv8.0, we need to define the register here.
#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
#define VECTOR_BASE(tbl) \
.section .text.##tbl##,"ax"; \
.align 11; \

View File

@@ -0,0 +1,44 @@
/** @file
Header file for FF-A ABI's that will be used for
communication between S-EL0 and the Secure Partition
Manager(SPM)
Copyright (c) 2020, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- FF-A Version 1.0
**/
#ifndef ARM_FFA_SVC_H_
#define ARM_FFA_SVC_H_
#define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070
#define SPM_MAJOR_VERSION_FFA 1
#define SPM_MINOR_VERSION_FFA 0
#define ARM_FFA_SPM_RET_SUCCESS 0
#define ARM_FFA_SPM_RET_NOT_SUPPORTED -1
#define ARM_FFA_SPM_RET_INVALID_PARAMETERS -2
#define ARM_FFA_SPM_RET_NO_MEMORY -3
#define ARM_FFA_SPM_RET_BUSY -4
#define ARM_FFA_SPM_RET_INTERRUPTED -5
#define ARM_FFA_SPM_RET_DENIED -6
#define ARM_FFA_SPM_RET_RETRY -7
#define ARM_FFA_SPM_RET_ABORTED -8
// For now, the destination id to be used in the FF-A calls
// is being hard-coded. Subsequently, support will be added
// to get the endpoint id's dynamically
// This is the endpoint id used by the optee os's implementation
// of the spmc.
// https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/stmm_sp.c#L66
#define ARM_FFA_DESTINATION_ENDPOINT_ID 3
#endif // ARM_FFA_SVC_H_

View File

@@ -41,4 +41,7 @@
#define ARM_SVC_SPM_RET_DENIED -3
#define ARM_SVC_SPM_RET_NO_MEMORY -5
#define SPM_MAJOR_VERSION 0
#define SPM_MINOR_VERSION 1
#endif

View File

@@ -1,9 +1,13 @@
/** @file
*
* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
* @par Revision Reference:
* - SMC Calling Convention version 1.2
* (https://developer.arm.com/documentation/den0028/c/?lang=en)
**/
#ifndef __ARM_STD_SMC_H__
@@ -52,6 +56,18 @@
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
// ARM Architecture Calls
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_SOC_ID 0x80000002
#define SMCCC_ARCH_WORKAROUND_1 0x80008000
#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
#define SMC_ARCH_CALL_SUCCESS 0
#define SMC_ARCH_CALL_NOT_SUPPORTED -1
#define SMC_ARCH_CALL_NOT_REQUIRED -2
#define SMC_ARCH_CALL_INVALID_PARAMETER -3
/*
* Power State Coordination Interface (PSCI) calls cover a subset of the
* Standard Service Call range.

View File

@@ -208,6 +208,15 @@ ArmGicSetPriorityMask (
IN INTN PriorityMask
);
VOID
EFIAPI
ArmGicSetInterruptPriority (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source,
IN UINTN Priority
);
VOID
EFIAPI
ArmGicEnableInterrupt (

View File

@@ -2,6 +2,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -108,6 +109,10 @@ typedef enum {
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
// The ARM Architecture Reference Manual for ARMv8-A defines up
// to 7 levels of cache, L1 through L7.
#define MAX_ARM_CACHE_LEVEL 7
UINTN
EFIAPI
ArmDataCacheLineLength (
@@ -132,18 +137,6 @@ ArmIsArchTimerImplemented (
VOID
);
UINTN
EFIAPI
ArmReadIdPfr0 (
VOID
);
UINTN
EFIAPI
ArmReadIdPfr1 (
VOID
);
UINTN
EFIAPI
ArmCacheInfo (
@@ -715,4 +708,49 @@ ArmGetPhysicalAddressBits (
VOID
);
///
/// ID Register Helper functions
///
/**
Check whether the CPU supports the GIC system register interface (any version)
@return Whether GIC System Register Interface is supported
**/
BOOLEAN
EFIAPI
ArmHasGicSystemRegisters (
VOID
);
/** Checks if CCIDX is implemented.
@retval TRUE CCIDX is implemented.
@retval FALSE CCIDX is not implemented.
**/
BOOLEAN
EFIAPI
ArmHasCcidx (
VOID
);
#ifdef MDE_CPU_ARM
///
/// AArch32-only ID Register Helper functions
///
/**
Check whether the CPU supports the Security extensions
@return Whether the Security extensions are implemented
**/
BOOLEAN
EFIAPI
ArmHasSecurityExtensions (
VOID
);
#endif // MDE_CPU_ARM
#endif // __ARM_LIB__

View File

@@ -27,10 +27,16 @@ typedef struct {
/**
Trigger an SVC call
SVC calls can take up to 7 arguments and return up to 4 return values.
Therefore, the 4 first fields in the ARM_SVC_ARGS structure are used
SVC calls can take up to 8 arguments and return up to 8 return values.
Therefore, the 8 first fields in the ARM_SVC_ARGS structure are used
for both input and output values.
@param[in, out] Args Arguments to be passed as part of the SVC call
The return values of the SVC call are also placed
in the same structure
@retval None
**/
VOID
ArmCallSvc (

View File

@@ -0,0 +1,165 @@
/** @file
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
* Copyright (c) 2015, Linaro Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef OEM_MISC_LIB_H_
#define OEM_MISC_LIB_H_
#include <Uefi.h>
#include <IndustryStandard/SmBios.h>
typedef enum
{
CpuCacheL1 = 1,
CpuCacheL2,
CpuCacheL3,
CpuCacheL4,
CpuCacheL5,
CpuCacheL6,
CpuCacheL7,
CpuCacheLevelMax
} OEM_MISC_CPU_CACHE_LEVEL;
typedef struct
{
UINT8 Voltage; ///< Processor voltage
UINT16 CurrentSpeed; ///< Current clock speed in MHz
UINT16 MaxSpeed; ///< Maximum clock speed in MHz
UINT16 ExternalClock; ///< External clock speed in MHz
UINT16 CoreCount; ///< Number of cores available
UINT16 CoresEnabled; ///< Number of cores enabled
UINT16 ThreadCount; ///< Number of threads per processor
} OEM_MISC_PROCESSOR_DATA;
typedef enum
{
ProductNameType01,
SerialNumType01,
UuidType01,
SystemManufacturerType01,
SkuNumberType01,
FamilyType01,
AssertTagType02,
SerialNumberType02,
BoardManufacturerType02,
SkuNumberType02,
ChassisLocationType02,
AssetTagType03,
SerialNumberType03,
VersionType03,
ChassisTypeType03,
ManufacturerType03,
SkuNumberType03,
SmbiosHiiStringFieldMax
} OEM_MISC_SMBIOS_HII_STRING_FIELD;
/*
* The following are functions that the each platform needs to
* implement in its OemMiscLib library.
*/
/** Gets the CPU frequency of the specified processor.
@param ProcessorIndex Index of the processor to get the frequency for.
@return CPU frequency in Hz
**/
UINTN
EFIAPI
OemGetCpuFreq (
IN UINT8 ProcessorIndex
);
/** Gets information about the specified processor and stores it in
the structures provided.
@param ProcessorIndex Index of the processor to get the information for.
@param ProcessorStatus Processor status.
@param ProcessorCharacteristics Processor characteritics.
@param MiscProcessorData Miscellaneous processor information.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetProcessorInformation (
IN UINTN ProcessorIndex,
IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData
);
/** Gets information about the cache at the specified cache level.
@param ProcessorIndex The processor to get information for.
@param CacheLevel The cache level to get information for.
@param DataCache Whether the cache is a data cache.
@param UnifiedCache Whether the cache is a unified cache.
@param SmbiosCacheTable The SMBIOS Type7 cache information structure.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetCacheInformation (
IN UINT8 ProcessorIndex,
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache,
IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
);
/** Gets the maximum number of processors supported by the platform.
@return The maximum number of processors.
**/
UINT8
EFIAPI
OemGetMaxProcessors (
VOID
);
/** Gets the type of chassis for the system.
@retval The type of the chassis.
**/
MISC_CHASSIS_TYPE
EFIAPI
OemGetChassisType (
VOID
);
/** Returns whether the specified processor is present or not.
@param ProcessIndex The processor index to check.
@return TRUE is the processor is present, FALSE otherwise.
**/
BOOLEAN
EFIAPI
OemIsProcessorPresent (
IN UINTN ProcessorIndex
);
/** Updates the HII string for the specified field.
@param HiiHandle The HII handle.
@param TokenToUpdate The string to update.
@param Field The field to get information about.
**/
VOID
EFIAPI
OemUpdateSmbiosInfo (
IN EFI_HII_HANDLE HiiHandle,
IN EFI_STRING_ID TokenToUpdate,
IN OEM_MISC_SMBIOS_HII_STRING_FIELD Field
);
#endif // OEM_MISC_LIB_H_

View File

@@ -56,7 +56,7 @@ TimerConstructor (
// If the security extension is not implemented, set Timer Frequency
// here.
//
if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {
if (ArmHasSecurityExtensions ()) {
ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
}
#endif

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -20,11 +20,14 @@ CacheRangeOperation (
IN UINTN LineLength
)
{
UINTN ArmCacheLineAlignmentMask = LineLength - 1;
UINTN ArmCacheLineAlignmentMask;
// Align address (rounding down)
UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
UINTN EndAddress = (UINTN)Start + Length;
UINTN AlignedAddress;
UINTN EndAddress;
ArmCacheLineAlignmentMask = LineLength - 1;
AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
EndAddress = (UINTN)Start + Length;
// Perform the line operation on an address in each cache line
while (AlignedAddress < EndAddress) {

View File

@@ -2,6 +2,7 @@
Default exception handler
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -157,7 +158,7 @@ DisassembleArmInstruction (
IN BOOLEAN Extended
)
{
UINT32 OpCode = **OpCodePtr;
UINT32 OpCode;
CHAR8 *Type, *Root;
BOOLEAN I, P, U, B, W, L, S, H;
UINT32 Rn, Rd, Rm;
@@ -165,6 +166,8 @@ DisassembleArmInstruction (
UINT32 Index;
UINT32 shift_imm, shift;
OpCode = **OpCodePtr;
I = (OpCode & BIT25) == BIT25;
P = (OpCode & BIT24) == BIT24;
U = (OpCode & BIT23) == BIT23;
@@ -240,7 +243,7 @@ DisassembleArmInstruction (
if (shift_imm == 0) {
shift_imm = 32;
}
} else if (shift == 0x12) {
} else if (shift == 0x2) {
Type = "ASR";
} else if (shift_imm == 0) {
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W));
@@ -270,7 +273,7 @@ DisassembleArmInstruction (
if (shift_imm == 0) {
shift_imm = 32;
}
} else if (shift == 0x12) {
} else if (shift == 0x2) {
Type = "ASR";
} else if (shift_imm == 0) {
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]);
@@ -367,7 +370,11 @@ DisassembleArmInstruction (
AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
} else {
imode = (OpCode >> 18) & 0x3;
Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a", (imode == 3) ? "ID":"IE", (OpCode & BIT8) ? "A":"", (OpCode & BIT7) ? "I":"", (OpCode & BIT6) ? "F":"");
Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
(imode == 3) ? "ID":"IE",
((OpCode & BIT8) != 0) ? "A":"",
((OpCode & BIT7) != 0) ? "I":"",
((OpCode & BIT6) != 0) ? "F":"");
if ((OpCode & BIT17) != 0) {
AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
}

View File

@@ -2,7 +2,7 @@
* Main file supporting the SEC Phase for Versatile Express
*
* Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
* Copyright (c) 2016 HP Development Company, L.P.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -253,7 +253,8 @@ RETURN_STATUS
RegisterCpuInterruptHandler(
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_CPU_INTERRUPT_HANDLER ExceptionHandler
) {
)
{
if (ExceptionType > gMaxExceptionNumber) {
return RETURN_UNSUPPORTED;
}

View File

@@ -1,60 +0,0 @@
/** @file
*
* Copyright (c) 2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Library/ArmLib.h>
#include <Library/ArmGicLib.h>
STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
RETURN_STATUS
EFIAPI
ArmGicArchLibInitialize (
VOID
)
{
UINT32 IccSre;
// Ideally we would like to use the GICC IIDR Architecture version here, but
// this does not seem to be very reliable as the implementation could easily
// get it wrong. It is more reliable to check if the GICv3 System Register
// feature is implemented on the CPU. This is also convenient as our GICv3
// driver requires SRE. If only Memory mapped access is available we try to
// drive the GIC as a v2.
if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
// Make sure System Register access is enabled (SRE). This depends on the
// higher privilege level giving us permission, otherwise we will either
// cause an exception here, or the write doesn't stick in which case we need
// to fall back to the GICv2 MMIO interface.
// Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
// at the same exception level.
// It is the OS responsibility to set this bit.
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
if (!(IccSre & ICC_SRE_EL2_SRE)) {
ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
goto Done;
}
}
mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
Done:
return RETURN_SUCCESS;
}
ARM_GIC_ARCH_REVISION
EFIAPI
ArmGicGetSupportedArchRevision (
VOID
)
{
return mGicArchRevision;
}

View File

@@ -25,7 +25,7 @@ ArmGicArchLibInitialize (
// feature is implemented on the CPU. This is also convenient as our GICv3
// driver requires SRE. If only Memory mapped access is available we try to
// drive the GIC as a v2.
if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
if (ArmHasGicSystemRegisters ()) {
// Make sure System Register access is enabled (SRE). This depends on the
// higher privilege level giving us permission, otherwise we will either
// cause an exception here, or the write doesn't stick in which case we need

View File

@@ -14,11 +14,8 @@
LIBRARY_CLASS = ArmGicArchLib|DXE_DRIVER UEFI_DRIVER UEFI_APPLICATION
CONSTRUCTOR = ArmGicArchLibInitialize
[Sources.ARM]
Arm/ArmGicArchLib.c
[Sources.AARCH64]
AArch64/ArmGicArchLib.c
[Sources]
ArmGicArchLib.c
[Packages]
MdePkg/MdePkg.dec

View File

@@ -1,45 +0,0 @@
/** @file
*
* Copyright (c) 2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Library/ArmLib.h>
#include <Library/ArmGicLib.h>
ARM_GIC_ARCH_REVISION
EFIAPI
ArmGicGetSupportedArchRevision (
VOID
)
{
UINT32 IccSre;
// Ideally we would like to use the GICC IIDR Architecture version here, but
// this does not seem to be very reliable as the implementation could easily
// get it wrong. It is more reliable to check if the GICv3 System Register
// feature is implemented on the CPU. This is also convenient as our GICv3
// driver requires SRE. If only Memory mapped access is available we try to
// drive the GIC as a v2.
if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
// Make sure System Register access is enabled (SRE). This depends on the
// higher privilege level giving us permission, otherwise we will either
// cause an exception here, or the write doesn't stick in which case we need
// to fall back to the GICv2 MMIO interface.
// Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
// at the same exception level.
// It is the OS responsibility to set this bit.
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
if (!(IccSre & ICC_SRE_EL2_SRE)) {
ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
return ARM_GIC_ARCH_REVISION_3;
}
}
return ARM_GIC_ARCH_REVISION_2;
}

View File

@@ -23,7 +23,7 @@ ArmGicGetSupportedArchRevision (
// feature is implemented on the CPU. This is also convenient as our GICv3
// driver requires SRE. If only Memory mapped access is available we try to
// drive the GIC as a v2.
if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
if (ArmHasGicSystemRegisters ()) {
// Make sure System Register access is enabled (SRE). This depends on the
// higher privilege level giving us permission, otherwise we will either
// cause an exception here, or the write doesn't stick in which case we need

View File

@@ -13,11 +13,8 @@
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmGicArchLib|SEC
[Sources.ARM]
Arm/ArmGicArchLib.c
[Sources.AARCH64]
AArch64/ArmGicArchLib.c
[Sources]
ArmGicArchLib.c
[Packages]
MdePkg/MdePkg.dec

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@@ -2,6 +2,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -71,3 +72,35 @@ ArmCleanDataCache (
ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
/**
Check whether the CPU supports the GIC system register interface (any version)
@return Whether GIC System Register Interface is supported
**/
BOOLEAN
EFIAPI
ArmHasGicSystemRegisters (
VOID
)
{
return ((ArmReadIdAA64Pfr0 () & AARCH64_PFR0_GIC) != 0);
}
/** Checks if CCIDX is implemented.
@retval TRUE CCIDX is implemented.
@retval FALSE CCIDX is not implemented.
**/
BOOLEAN
EFIAPI
ArmHasCcidx (
VOID
)
{
UINTN Mmfr2;
Mmfr2 = ArmReadIdAA64Mmfr2 ();
return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
}

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@@ -2,6 +2,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -35,5 +36,21 @@ ArmCleanInvalidateDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
UINTN
EFIAPI
ArmReadIdAA64Pfr0 (
VOID
);
/** Reads the ID_AA64MMFR2_EL1 register.
@return The contents of the ID_AA64MMFR2_EL1 register.
**/
UINTN
EFIAPI
ArmReadIdAA64Mmfr2 (
VOID
);
#endif // __AARCH64_LIB_H__

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@@ -3,6 +3,7 @@
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
# Copyright (c) 2016, Linaro Limited. All rights reserved.
# Copyright (c) 2020, NUVIA Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -395,7 +396,7 @@ ASM_FUNC(ArmReadVBar)
ASM_FUNC(ArmEnableVFP)
// Check whether floating-point is implemented in the processor.
mov x1, x30 // Save LR
bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
bl ArmReadIdAA64Pfr0 // Read EL1 Processor Feature Register (PFR0)
mov x30, x1 // Restore LR
ubfx x0, x0, #16, #4 // Extract the FP bits 16:19
cmp x0, #0xF // Check if FP bits are '1111b',
@@ -424,6 +425,9 @@ ASM_FUNC(ArmCallWFI)
wfi
ret
ASM_FUNC(ArmReadIdAA64Mmfr2)
mrs x0, ID_AA64MMFR2_EL1 // read EL1 MMFR2
ret
ASM_FUNC(ArmReadMpidr)
mrs x0, mpidr_el1 // read EL1 MPIDR
@@ -448,19 +452,11 @@ ASM_FUNC(ArmIsArchTimerImplemented)
ret
ASM_FUNC(ArmReadIdPfr0)
ASM_FUNC(ArmReadIdAA64Pfr0)
mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
ret
// Q: id_aa64pfr1_el1 not defined yet. What does this function want to access?
// A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
// See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
// Not defined yet, but stick in here for now, should read all zeros.
ASM_FUNC(ArmReadIdPfr1)
mrs x0, id_aa64pfr1_el1 // Read ID_PFR1 Register
ret
// VOID ArmWriteHcr(UINTN Hcr)
ASM_FUNC(ArmWriteHcr)
msr hcr_el2, x0 // Write the passed HCR value

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@@ -84,7 +84,7 @@ ASM_FUNC(ArmDisableAllExceptions)
ret
// UINT32
// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )

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@@ -60,7 +60,11 @@ ASM_FUNC(ArmDisableInterrupts)
isb
bx LR
// UINT32
ASM_FUNC(ArmReadIdMmfr4)
mrc p15,0,r0,c0,c2,6 @ Read ID_MMFR4 Register
bx lr
// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
@@ -70,6 +74,16 @@ ASM_FUNC(ReadCCSIDR)
mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
bx lr
// UINT32
// ReadCCSIDR2 (
// IN UINT32 CSSELR
// )
ASM_FUNC(ReadCCSIDR2)
mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
isb
mrc p15,1,r0,c0,c0,2 @ Read current CP15 Cache Size ID Register (CCSIDR2)
bx lr
// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR

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@@ -64,7 +64,11 @@
isb
bx LR
// UINT32
RVCT_ASM_EXPORT ArmReadIdMmfr4
mrc p15,0,r0,c0,c2,6 ; Read ID_MMFR4 Register
bx LR
// UINTN
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
@@ -74,6 +78,16 @@
mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
bx lr
// UINT32
// ReadCCSIDR2 (
// IN UINT32 CSSELR
// )
RVCT_ASM_EXPORT ReadCCSIDR2
mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
isb
mrc p15,1,r0,c0,c0,2 ; Read current CP15 Cache Size ID Register (CCSIDR2)
bx lr
// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR

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@@ -2,6 +2,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -71,3 +72,50 @@ ArmCleanDataCache (
ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
/**
Check whether the CPU supports the GIC system register interface (any version)
@return Whether GIC System Register Interface is supported
**/
BOOLEAN
EFIAPI
ArmHasGicSystemRegisters (
VOID
)
{
return ((ArmReadIdPfr1 () & ARM_PFR1_GIC) != 0);
}
/**
Check whether the CPU supports the Security extensions
@return Whether the Security extensions are implemented
**/
BOOLEAN
EFIAPI
ArmHasSecurityExtensions (
VOID
)
{
return ((ArmReadIdPfr1 () & ARM_PFR1_SEC) != 0);
}
/** Checks if CCIDX is implemented.
@retval TRUE CCIDX is implemented.
@retval FALSE CCIDX is not implemented.
**/
BOOLEAN
EFIAPI
ArmHasCcidx (
VOID
)
{
UINTN Mmfr4;
Mmfr4 = ArmReadIdMmfr4 ();
return (((Mmfr4 >> 24) & 0xF) == 1) ? TRUE : FALSE;
}

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@@ -48,5 +48,21 @@ ArmCleanInvalidateDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
/** Reads the ID_MMFR4 register.
@return The contents of the ID_MMFR4 register.
**/
UINT32
EFIAPI
ArmReadIdMmfr4 (
VOID
);
UINTN
EFIAPI
ArmReadIdPfr1 (
VOID
);
#endif // __ARM_V7_LIB_H__

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@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2011 - 2021, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -19,9 +19,7 @@ ArmSetAuxCrBit (
IN UINT32 Bits
)
{
UINT32 val = ArmReadAuxCr();
val |= Bits;
ArmWriteAuxCr(val);
ArmWriteAuxCr(ArmReadAuxCr() | Bits);
}
VOID
@@ -30,9 +28,7 @@ ArmUnsetAuxCrBit (
IN UINT32 Bits
)
{
UINT32 val = ArmReadAuxCr();
val &= ~Bits;
ArmWriteAuxCr(val);
ArmWriteAuxCr(ArmReadAuxCr() & ~Bits);
}
//
@@ -45,10 +41,7 @@ ArmSetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value |= Bits;
ArmWriteCpuActlr (Value);
ArmWriteCpuActlr (ArmReadCpuActlr () | Bits);
}
VOID
@@ -57,10 +50,7 @@ ArmUnsetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value &= ~Bits;
ArmWriteCpuActlr (Value);
ArmWriteCpuActlr (ArmReadCpuActlr () & ~Bits);
}
UINTN

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@@ -1,5 +1,7 @@
/** @file
ArmLibPrivate.h
Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -50,6 +52,101 @@
#define CACHE_ARCHITECTURE_UNIFIED (0UL)
#define CACHE_ARCHITECTURE_SEPARATE (1UL)
/// Defines the structure of the CSSELR (Cache Size Selection) register
typedef union {
struct {
UINT32 InD :1; ///< Instruction not Data bit
UINT32 Level :3; ///< Cache level (zero based)
UINT32 TnD :1; ///< Allocation not Data bit
UINT32 Reserved :27; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CSSELR_DATA;
/// The cache type values for the InD field of the CSSELR register
typedef enum
{
/// Select the data or unified cache
CsselrCacheTypeDataOrUnified = 0,
/// Select the instruction cache
CsselrCacheTypeInstruction,
CsselrCacheTypeMax
} CSSELR_CACHE_TYPE;
/// Defines the structure of the CCSIDR (Current Cache Size ID) register
typedef union {
struct {
UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity :10; ///< Associativity - 1
UINT64 NumSets :15; ///< Number of sets in the cache -1
UINT64 Unknown :4; ///< Reserved, UNKNOWN
UINT64 Reserved :32; ///< Reserved, RES0
} BitsNonCcidx; ///< Bitfield definition of the register when FEAT_CCIDX is not supported.
struct {
UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity :21; ///< Associativity - 1
UINT64 Reserved1 :8; ///< Reserved, RES0
UINT64 NumSets :24; ///< Number of sets in the cache -1
UINT64 Reserved2 :8; ///< Reserved, RES0
} BitsCcidxAA64; ///< Bitfield definition of the register when FEAT_IDX is supported.
struct {
UINT64 LineSize : 3;
UINT64 Associativity : 21;
UINT64 Reserved : 8;
UINT64 Unallocated : 32;
} BitsCcidxAA32;
UINT64 Data; ///< The entire 64-bit value
} CCSIDR_DATA;
/// Defines the structure of the AARCH32 CCSIDR2 register.
typedef union {
struct {
UINT32 NumSets :24; ///< Number of sets in the cache - 1
UINT32 Reserved :8; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CCSIDR2_DATA;
/** Defines the structure of the CLIDR (Cache Level ID) register.
*
* The lower 32 bits are the same for both AARCH32 and AARCH64
* so we can use the same structure for both.
**/
typedef union {
struct {
UINT32 Ctype1 : 3; ///< Level 1 cache type
UINT32 Ctype2 : 3; ///< Level 2 cache type
UINT32 Ctype3 : 3; ///< Level 3 cache type
UINT32 Ctype4 : 3; ///< Level 4 cache type
UINT32 Ctype5 : 3; ///< Level 5 cache type
UINT32 Ctype6 : 3; ///< Level 6 cache type
UINT32 Ctype7 : 3; ///< Level 7 cache type
UINT32 LoUIS : 3; ///< Level of Unification Inner Shareable
UINT32 LoC : 3; ///< Level of Coherency
UINT32 LoUU : 3; ///< Level of Unification Uniprocessor
UINT32 Icb : 3; ///< Inner Cache Boundary
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CLIDR_DATA;
/// The cache types reported in the CLIDR register.
typedef enum {
/// No cache is present
ClidrCacheTypeNone = 0,
/// There is only an instruction cache
ClidrCacheTypeInstructionOnly,
/// There is only a data cache
ClidrCacheTypeDataOnly,
/// There are separate data and instruction caches
ClidrCacheTypeSeparate,
/// There is a unified cache
ClidrCacheTypeUnified,
ClidrCacheTypeMax
} CLIDR_CACHE_TYPE;
#define CLIDR_GET_CACHE_TYPE(x, level) ((x >> (3 * (level))) & 0b111)
VOID
CPSRMaskInsert (
IN UINT32 Mask,
@@ -61,11 +158,29 @@ CPSRRead (
VOID
);
UINT32
/** Reads the CCSIDR register for the specified cache.
@param CSSELR The CSSELR cache selection register value.
@return The contents of the CCSIDR_EL1 register for the specified cache, when in AARCH64 mode.
Returns the contents of the CCSIDR register in AARCH32 mode.
**/
UINTN
ReadCCSIDR (
IN UINT32 CSSELR
);
/** Reads the CCSIDR2 for the specified cache.
@param CSSELR The CSSELR cache selection register value
@return The contents of the CCSIDR2 register for the specified cache.
**/
UINT32
ReadCCSIDR2 (
IN UINT32 CSSELR
);
UINT32
ReadCLIDR (
VOID

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@@ -294,7 +294,7 @@ UpdateRegionMapping (
{
UINTN T0SZ;
if (((RegionStart | RegionLength) & EFI_PAGE_MASK)) {
if (((RegionStart | RegionLength) & EFI_PAGE_MASK) != 0) {
return EFI_INVALID_PARAMETER;
}

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@@ -1,10 +1,10 @@
#/* @file
#
# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#*/
/** @file
Copyright (c) 2016, Linaro Limited. All rights reserved.
Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
*/
#include <Base.h>
@@ -47,7 +47,7 @@ ArmMmuPeiLibConstructor (
// The ArmReplaceLiveTranslationEntry () helper function may be invoked
// with the MMU off so we have to ensure that it gets cleaned to the PoC
//
WriteBackDataCacheRange (ArmReplaceLiveTranslationEntry,
WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize);
}

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@@ -225,7 +225,7 @@ FillTranslationTable (
return;
}
PhysicalBase = MemoryRegion->PhysicalBase;
PhysicalBase = (UINT32)MemoryRegion->PhysicalBase;
RemainLength = MIN(MemoryRegion->Length, SIZE_4GB - PhysicalBase);
switch (MemoryRegion->Attributes) {
@@ -291,7 +291,7 @@ FillTranslationTable (
PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
} else {
PageMapLength = MIN (RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
PageMapLength = MIN ((UINT32)RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
(PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE));
// Case: Physical address aligned on the Section Size (1MB) && the length

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@@ -1,7 +1,7 @@
/** @file
* File managing the MMU for ARMv7 architecture
*
* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -105,7 +105,7 @@ UpdatePageEntries (
// EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
// EntryValue: values at bit positions specified by EntryMask
EntryMask = TT_DESCRIPTOR_PAGE_TYPE_MASK | TT_DESCRIPTOR_PAGE_AP_MASK;
if (Attributes & EFI_MEMORY_XP) {
if ((Attributes & EFI_MEMORY_XP) != 0) {
EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN;
} else {
EntryValue = TT_DESCRIPTOR_PAGE_TYPE_PAGE;
@@ -116,33 +116,33 @@ UpdatePageEntries (
// is irrelevant. If no memory attribute is specified, we preserve whatever
// memory type is set in the page tables, and update the permission attributes
// only.
if (Attributes & EFI_MEMORY_UC) {
if ((Attributes & EFI_MEMORY_UC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
// map to strongly ordered
EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
} else if (Attributes & EFI_MEMORY_WC) {
} else if ((Attributes & EFI_MEMORY_WC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
// map to normal non-cachable
EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
} else if (Attributes & EFI_MEMORY_WT) {
} else if ((Attributes & EFI_MEMORY_WT) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
// write through with no-allocate
EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
} else if (Attributes & EFI_MEMORY_WB) {
} else if ((Attributes & EFI_MEMORY_WB) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK;
// write back (with allocate)
EntryValue |= TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
} else if (Attributes & CACHE_ATTRIBUTE_MASK) {
} else if ((Attributes & CACHE_ATTRIBUTE_MASK) != 0) {
// catch unsupported memory type attributes
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
if (Attributes & EFI_MEMORY_RO) {
if ((Attributes & EFI_MEMORY_RO) != 0) {
EntryValue |= TT_DESCRIPTOR_PAGE_AP_RO_RO;
} else {
EntryValue |= TT_DESCRIPTOR_PAGE_AP_RW_RW;
@@ -152,7 +152,7 @@ UpdatePageEntries (
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
// Calculate number of 4KB page table entries to change
NumPageEntries = Length / TT_DESCRIPTOR_PAGE_SIZE;
NumPageEntries = (UINT32)(Length / TT_DESCRIPTOR_PAGE_SIZE);
// Iterate for the number of 4KB pages to change
Offset = 0;
@@ -220,7 +220,7 @@ UpdateSectionEntries (
IN UINT64 Attributes
)
{
EFI_STATUS Status = EFI_SUCCESS;
EFI_STATUS Status;
UINT32 EntryMask;
UINT32 EntryValue;
UINT32 FirstLevelIdx;
@@ -231,6 +231,8 @@ UpdateSectionEntries (
VOID *Mva;
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
Status = EFI_SUCCESS;
// EntryMask: bitmask of values to change (1 = change this value, 0 = leave alone)
// EntryValue: values at bit positions specified by EntryMask
@@ -244,39 +246,39 @@ UpdateSectionEntries (
// is irrelevant. If no memory attribute is specified, we preserve whatever
// memory type is set in the page tables, and update the permission attributes
// only.
if (Attributes & EFI_MEMORY_UC) {
if ((Attributes & EFI_MEMORY_UC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
// map to strongly ordered
EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
} else if (Attributes & EFI_MEMORY_WC) {
} else if ((Attributes & EFI_MEMORY_WC) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
// map to normal non-cachable
EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
} else if (Attributes & EFI_MEMORY_WT) {
} else if ((Attributes & EFI_MEMORY_WT) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
// write through with no-allocate
EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
} else if (Attributes & EFI_MEMORY_WB) {
} else if ((Attributes & EFI_MEMORY_WB) != 0) {
// modify cacheability attributes
EntryMask |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK;
// write back (with allocate)
EntryValue |= TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
} else if (Attributes & CACHE_ATTRIBUTE_MASK) {
} else if ((Attributes & CACHE_ATTRIBUTE_MASK) != 0) {
// catch unsupported memory type attributes
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
if (Attributes & EFI_MEMORY_RO) {
if ((Attributes & EFI_MEMORY_RO) != 0) {
EntryValue |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
} else {
EntryValue |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
}
if (Attributes & EFI_MEMORY_XP) {
if ((Attributes & EFI_MEMORY_XP) != 0) {
EntryValue |= TT_DESCRIPTOR_SECTION_XN_MASK;
}
@@ -288,7 +290,7 @@ UpdateSectionEntries (
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
// calculate number of 1MB first level entries this applies to
NumSections = Length / TT_DESCRIPTOR_SECTION_SIZE;
NumSections = (UINT32)(Length / TT_DESCRIPTOR_SECTION_SIZE);
// iterate through each descriptor
for(i=0; i<NumSections; i++) {

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@@ -33,9 +33,11 @@ ASM_PFX(ArmCallSvc):
ldr x9, [sp, #16]
// Store the SVC returned values into the ARM_SVC_ARGS structure.
// A SVC call can return up to 4 values - we do not need to store back x4-x7.
// A SVC call can return up to 8 values
stp x0, x1, [x9, #0]
stp x2, x3, [x9, #16]
stp x4, x5, [x9, #32]
stp x6, x7, [x9, #48]
mov x0, x9

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@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2019, Pete Batard. All rights reserved.
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -17,10 +18,13 @@ int memcmp(void *, void *, size_t);
#pragma function(memcmp)
int memcmp(const void *s1, const void *s2, size_t n)
{
unsigned char const *t1 = s1;
unsigned char const *t2 = s2;
unsigned char const *t1;
unsigned char const *t2;
while (n--) {
t1 = s1;
t2 = s2;
while (n-- != 0) {
if (*t1 != *t2)
return (int)*t1 - (int)*t2;
t1++;

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@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -10,11 +11,15 @@ typedef __SIZE_TYPE__ size_t;
static void __memcpy(void *dest, const void *src, size_t n)
{
unsigned char *d = dest;
unsigned char const *s = src;
unsigned char *d;
unsigned char const *s;
while (n--)
d = dest;
s = src;
while (n-- != 0) {
*d++ = *s++;
}
}
void *memcpy(void *dest, const void *src, size_t n)

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@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -17,11 +18,15 @@ void* memcpy(void *, const void *, size_t);
#pragma function(memcpy)
void* memcpy(void *dest, const void *src, size_t n)
{
unsigned char *d = dest;
unsigned char const *s = src;
unsigned char *d;
unsigned char const *s;
while (n--)
d = dest;
s = src;
while (n-- != 0) {
*d++ = *s++;
}
return dest;
}

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@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2019, Pete Batard. All rights reserved.
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -17,17 +18,22 @@ void* memmove(void *, const void *, size_t);
#pragma function(memmove)
void* memmove(void *dest, const void *src, size_t n)
{
unsigned char *d = dest;
unsigned char const *s = src;
unsigned char *d;
unsigned char const *s;
d = dest;
s = src;
if (d < s) {
while (n--)
while (n-- != 0) {
*d++ = *s++;
}
} else {
d += n;
s += n;
while (n--)
while (n-- != 0) {
*--d = *--s;
}
}
return dest;

View File

@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -11,10 +12,13 @@ typedef __SIZE_TYPE__ size_t;
static __attribute__((__used__))
void *__memset(void *s, int c, size_t n)
{
unsigned char *d = s;
unsigned char *d;
while (n--)
d = s;
while (n-- != 0) {
*d++ = c;
}
return s;
}

View File

@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -17,10 +18,13 @@ void* memset(void *, int, size_t);
#pragma function(memset)
void *memset(void *s, int c, size_t n)
{
unsigned char *d = s;
unsigned char *d;
while (n--)
d = s;
while (n-- != 0) {
*d++ = (unsigned char)c;
}
return s;
}

View File

@@ -2,7 +2,7 @@
Default exception handler
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2012 - 2021, Arm Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -34,6 +34,20 @@ typedef struct {
CHAR8 Char;
} CPSR_CHAR;
STATIC CONST CPSR_CHAR mCpsrChar[] = {
{ 31, 'n' },
{ 30, 'z' },
{ 29, 'c' },
{ 28, 'v' },
{ 9, 'e' },
{ 8, 'a' },
{ 7, 'i' },
{ 6, 'f' },
{ 5, 't' },
{ 0, '?' }
};
CHAR8 *
GetImageName (
IN UINTN FaultAddress,
@@ -45,7 +59,7 @@ GetImageName (
Convert the Current Program Status Register (CPSR) to a string. The string is
a defacto standard in the ARM world.
It is possible to add extra bits by adding them to CpsrChar array.
It is possible to add extra bits by adding them to mCpsrChar array.
@param Cpsr ARM CPSR register value
@param ReturnStr CPSR_STRING_SIZE byte string that contains string
@@ -61,25 +75,12 @@ CpsrString (
UINTN Index;
CHAR8* Str;
CHAR8* ModeStr;
CPSR_CHAR CpsrChar[] = {
{ 31, 'n' },
{ 30, 'z' },
{ 29, 'c' },
{ 28, 'v' },
{ 9, 'e' },
{ 8, 'a' },
{ 7, 'i' },
{ 6, 'f' },
{ 5, 't' },
{ 0, '?' }
};
Str = ReturnStr;
for (Index = 0; CpsrChar[Index].BIT != 0; Index++, Str++) {
*Str = CpsrChar[Index].Char;
if ((Cpsr & (1 << CpsrChar[Index].BIT)) != 0) {
for (Index = 0; mCpsrChar[Index].BIT != 0; Index++, Str++) {
*Str = mCpsrChar[Index].Char;
if ((Cpsr & (1 << mCpsrChar[Index].BIT)) != 0) {
// Concert to upper case if bit is set
*Str &= ~0x20;
}
@@ -186,7 +187,9 @@ DefaultExceptionHandler (
UINT32 DfsrStatus;
UINT32 IfsrStatus;
BOOLEAN DfsrWrite;
UINT32 PcAdjust = 0;
UINT32 PcAdjust;
PcAdjust = 0;
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n%a Exception PC at 0x%08x CPSR 0x%08x ",
gExceptionTypeString[ExceptionType], SystemContext.SystemContextArm->PC, SystemContext.SystemContextArm->CPSR);

View File

@@ -3,6 +3,7 @@
secure monitor calls.
Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -227,7 +228,7 @@ OpteeOpenSession (
MessageArg->NumParams = 2;
if (OpteeCallWithArg ((UINTN)MessageArg)) {
if (OpteeCallWithArg ((UINTN)MessageArg) != 0) {
MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
}
@@ -431,7 +432,7 @@ OpteeInvokeFunction (
MessageArg->NumParams = OPTEE_MAX_CALL_PARAMS;
if (OpteeCallWithArg ((UINTN)MessageArg)) {
if (OpteeCallWithArg ((UINTN)MessageArg) != 0) {
MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
}
@@ -440,7 +441,7 @@ OpteeInvokeFunction (
InvokeFunctionArg->Params,
OPTEE_MAX_CALL_PARAMS,
MessageArg->Params
)) {
) != 0) {
MessageArg->Return = OPTEE_ERROR_COMMUNICATION;
MessageArg->ReturnOrigin = OPTEE_ORIGIN_COMMUNICATION;
}

View File

@@ -848,11 +848,15 @@ PlatformBootManagerUnableToBoot (
// If the number of configured boot options has changed, reboot
// the system so the new boot options will be taken into account
// while executing the ordinary BDS bootflow sequence.
// *Unless* persistent varstore is being emulated, since we would
// then end up in an endless reboot loop.
//
if (NewBootOptionCount != OldBootOptionCount) {
DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n",
__FUNCTION__));
gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
if (!PcdGetBool (PcdEmuVariableNvModeEnable)) {
if (NewBootOptionCount != OldBootOptionCount) {
DEBUG ((DEBUG_WARN, "%a: rebooting after refreshing all boot options\n",
__FUNCTION__));
gRT->ResetSystem (EfiResetCold, EFI_SUCCESS, 0, NULL);
}
}
Status = EfiBootManagerGetBootManagerMenu (&BootManagerMenu);

View File

@@ -55,6 +55,7 @@
gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
[FixedPcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits

View File

@@ -2,6 +2,7 @@
Serial I/O Port library functions with no library constructor/destructor
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -55,10 +56,13 @@ SerialPortWrite (
)
{
UINT8 PrintBuffer[PRINT_BUFFER_SIZE];
UINTN SourceIndex = 0;
UINTN DestinationIndex = 0;
UINTN SourceIndex;
UINTN DestinationIndex;
UINT8 CurrentCharacter;
SourceIndex = 0;
DestinationIndex = 0;
while (SourceIndex < NumberOfBytes)
{
CurrentCharacter = Buffer[SourceIndex++];

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2013 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -135,9 +135,7 @@ SemihostFileClose (
IN UINTN FileHandle
)
{
INT32 Result = Semihost_SYS_CLOSE(&FileHandle);
if (Result == -1) {
if (Semihost_SYS_CLOSE (&FileHandle) == -1) {
return RETURN_INVALID_PARAMETER;
} else {
return RETURN_SUCCESS;

View File

@@ -1,21 +1,149 @@
/** @file
* File managing the MMU for ARMv8 architecture in S-EL0
*
* Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
File managing the MMU for ARMv8 architecture in S-EL0
Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- [1] SPM based on the MM interface.
(https://trustedfirmware-a.readthedocs.io/en/latest/components/
secure-partition-manager-mm.html)
- [2] Arm Firmware Framework for Armv8-A, DEN0077A, version 1.0
(https://developer.arm.com/documentation/den0077/a)
**/
#include <Uefi.h>
#include <IndustryStandard/ArmMmSvc.h>
#include <IndustryStandard/ArmFfaSvc.h>
#include <Library/ArmLib.h>
#include <Library/ArmMmuLib.h>
#include <Library/ArmSvcLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
/** Send memory permission request to target.
@param [in, out] SvcArgs Pointer to SVC arguments to send. On
return it contains the response parameters.
@param [out] RetVal Pointer to return the response value.
@retval EFI_SUCCESS Request successfull.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval EFI_NOT_READY Callee is busy or not in a state to handle
this request.
@retval EFI_UNSUPPORTED This function is not implemented by the
callee.
@retval EFI_ABORTED Message target ran into an unexpected error
and has aborted.
@retval EFI_ACCESS_DENIED Access denied.
@retval EFI_OUT_OF_RESOURCES Out of memory to perform operation.
**/
STATIC
EFI_STATUS
SendMemoryPermissionRequest (
IN OUT ARM_SVC_ARGS *SvcArgs,
OUT INT32 *RetVal
)
{
if ((SvcArgs == NULL) || (RetVal == NULL)) {
return EFI_INVALID_PARAMETER;
}
ArmCallSvc (SvcArgs);
if (FeaturePcdGet (PcdFfaEnable)) {
// Get/Set memory attributes is an atomic call, with
// StandaloneMm at S-EL0 being the caller and the SPM
// core being the callee. Thus there won't be a
// FFA_INTERRUPT or FFA_SUCCESS response to the Direct
// Request sent above. This will have to be considered
// for other Direct Request calls which are not atomic
// We therefore check only for Direct Response by the
// callee.
if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) {
// A Direct Response means FF-A success
// Now check the payload for errors
// The callee sends back the return value
// in Arg3
*RetVal = SvcArgs->Arg3;
} else {
// If Arg0 is not a Direct Response, that means we
// have an FF-A error. We need to check Arg2 for the
// FF-A error code.
// See [2], Table 10.8: FFA_ERROR encoding.
*RetVal = SvcArgs->Arg2;
switch (*RetVal) {
case ARM_FFA_SPM_RET_INVALID_PARAMETERS:
return EFI_INVALID_PARAMETER;
case ARM_FFA_SPM_RET_DENIED:
return EFI_ACCESS_DENIED;
case ARM_FFA_SPM_RET_NOT_SUPPORTED:
return EFI_UNSUPPORTED;
case ARM_FFA_SPM_RET_BUSY:
return EFI_NOT_READY;
case ARM_FFA_SPM_RET_ABORTED:
return EFI_ABORTED;
default:
// Undefined error code received.
ASSERT (0);
return EFI_INVALID_PARAMETER;
}
}
} else {
*RetVal = SvcArgs->Arg0;
}
// Check error response from Callee.
if (*RetVal & BIT31) {
// Bit 31 set means there is an error retured
// See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 and
// Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
switch (*RetVal) {
case ARM_SVC_SPM_RET_NOT_SUPPORTED:
return EFI_UNSUPPORTED;
case ARM_SVC_SPM_RET_INVALID_PARAMS:
return EFI_INVALID_PARAMETER;
case ARM_SVC_SPM_RET_DENIED:
return EFI_ACCESS_DENIED;
case ARM_SVC_SPM_RET_NO_MEMORY:
return EFI_OUT_OF_RESOURCES;
default:
// Undefined error code received.
ASSERT (0);
return EFI_INVALID_PARAMETER;
}
}
return EFI_SUCCESS;
}
/** Request the permission attributes of a memory region from S-EL0.
@param [in] BaseAddress Base address for the memory region.
@param [out] MemoryAttributes Pointer to return the memory attributes.
@retval EFI_SUCCESS Request successfull.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval EFI_NOT_READY Callee is busy or not in a state to handle
this request.
@retval EFI_UNSUPPORTED This function is not implemented by the
callee.
@retval EFI_ABORTED Message target ran into an unexpected error
and has aborted.
@retval EFI_ACCESS_DENIED Access denied.
@retval EFI_OUT_OF_RESOURCES Out of memory to perform operation.
**/
STATIC
EFI_STATUS
GetMemoryPermissions (
@@ -23,70 +151,89 @@ GetMemoryPermissions (
OUT UINT32 *MemoryAttributes
)
{
ARM_SVC_ARGS GetMemoryPermissionsSvcArgs = {0};
EFI_STATUS Status;
INT32 Ret;
ARM_SVC_ARGS SvcArgs;
GetMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
GetMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
GetMemoryPermissionsSvcArgs.Arg2 = 0;
GetMemoryPermissionsSvcArgs.Arg3 = 0;
ArmCallSvc (&GetMemoryPermissionsSvcArgs);
if (GetMemoryPermissionsSvcArgs.Arg0 == ARM_SVC_SPM_RET_INVALID_PARAMS) {
*MemoryAttributes = 0;
if (MemoryAttributes == NULL) {
return EFI_INVALID_PARAMETER;
}
*MemoryAttributes = GetMemoryPermissionsSvcArgs.Arg0;
return EFI_SUCCESS;
// Prepare the message parameters.
// See [1], Section 13.5.5.1 MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64.
ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS));
if (FeaturePcdGet (PcdFfaEnable)) {
// See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ.
SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;
SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID;
SvcArgs.Arg2 = 0;
SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
SvcArgs.Arg4 = BaseAddress;
} else {
SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
SvcArgs.Arg1 = BaseAddress;
SvcArgs.Arg2 = 0;
SvcArgs.Arg3 = 0;
}
Status = SendMemoryPermissionRequest (&SvcArgs, &Ret);
if (EFI_ERROR (Status)) {
*MemoryAttributes = 0;
return Status;
}
*MemoryAttributes = Ret;
return Status;
}
/** Set the permission attributes of a memory region from S-EL0.
@param [in] BaseAddress Base address for the memory region.
@param [in] Length Length of the memory region.
@param [in] Permissions Memory access controls attributes.
@retval EFI_SUCCESS Request successfull.
@retval EFI_INVALID_PARAMETER A parameter is invalid.
@retval EFI_NOT_READY Callee is busy or not in a state to handle
this request.
@retval EFI_UNSUPPORTED This function is not implemented by the
callee.
@retval EFI_ABORTED Message target ran into an unexpected error
and has aborted.
@retval EFI_ACCESS_DENIED Access denied.
@retval EFI_OUT_OF_RESOURCES Out of memory to perform operation.
**/
STATIC
EFI_STATUS
RequestMemoryPermissionChange (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINTN Permissions
IN UINT32 Permissions
)
{
EFI_STATUS Status;
ARM_SVC_ARGS ChangeMemoryPermissionsSvcArgs = {0};
INT32 Ret;
ARM_SVC_ARGS SvcArgs;
ChangeMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64;
ChangeMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
ChangeMemoryPermissionsSvcArgs.Arg2 = EFI_SIZE_TO_PAGES(Length);
ChangeMemoryPermissionsSvcArgs.Arg3 = Permissions;
ArmCallSvc (&ChangeMemoryPermissionsSvcArgs);
Status = ChangeMemoryPermissionsSvcArgs.Arg0;
switch (Status) {
case ARM_SVC_SPM_RET_SUCCESS:
Status = EFI_SUCCESS;
break;
case ARM_SVC_SPM_RET_NOT_SUPPORTED:
Status = EFI_UNSUPPORTED;
break;
case ARM_SVC_SPM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SVC_SPM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SVC_SPM_RET_NO_MEMORY:
Status = EFI_BAD_BUFFER_SIZE;
break;
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
// Prepare the message parameters.
// See [1], Section 13.5.5.2 MM_SP_MEMORY_ATTRIBUTES_SET_AARCH64.
ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS));
if (FeaturePcdGet (PcdFfaEnable)) {
// See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ.
SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;
SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID;
SvcArgs.Arg2 = 0;
SvcArgs.Arg3 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64;
SvcArgs.Arg4 = BaseAddress;
SvcArgs.Arg5 = EFI_SIZE_TO_PAGES (Length);
SvcArgs.Arg6 = Permissions;
} else {
SvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64;
SvcArgs.Arg1 = BaseAddress;
SvcArgs.Arg2 = EFI_SIZE_TO_PAGES (Length);
SvcArgs.Arg3 = Permissions;
}
return Status;
return SendMemoryPermissionRequest (&SvcArgs, &Ret);
}
EFI_STATUS
@@ -100,7 +247,7 @@ ArmSetMemoryRegionNoExec (
UINT32 CodePermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
if (!EFI_ERROR (Status)) {
CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
@@ -108,7 +255,7 @@ ArmSetMemoryRegionNoExec (
MemoryAttributes | CodePermission
);
}
return EFI_INVALID_PARAMETER;
return Status;
}
EFI_STATUS
@@ -122,7 +269,7 @@ ArmClearMemoryRegionNoExec (
UINT32 CodePermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
if (!EFI_ERROR (Status)) {
CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
@@ -130,7 +277,7 @@ ArmClearMemoryRegionNoExec (
MemoryAttributes & ~CodePermission
);
}
return EFI_INVALID_PARAMETER;
return Status;
}
EFI_STATUS
@@ -144,7 +291,7 @@ ArmSetMemoryRegionReadOnly (
UINT32 DataPermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
if (!EFI_ERROR (Status)) {
DataPermission = SET_MEM_ATTR_DATA_PERM_RO << SET_MEM_ATTR_DATA_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
@@ -152,7 +299,7 @@ ArmSetMemoryRegionReadOnly (
MemoryAttributes | DataPermission
);
}
return EFI_INVALID_PARAMETER;
return Status;
}
EFI_STATUS
@@ -166,7 +313,7 @@ ArmClearMemoryRegionReadOnly (
UINT32 PermissionRequest;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
if (!EFI_ERROR (Status)) {
PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (SET_MEM_ATTR_DATA_PERM_RW,
MemoryAttributes);
return RequestMemoryPermissionChange (
@@ -175,5 +322,5 @@ ArmClearMemoryRegionReadOnly (
PermissionRequest
);
}
return EFI_INVALID_PARAMETER;
return Status;
}

View File

@@ -23,6 +23,9 @@
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
[FeaturePcd.AARCH64]
gArmTokenSpaceGuid.PcdFfaEnable
[LibraryClasses]
ArmLib
CacheMaintenanceLib

View File

@@ -0,0 +1,141 @@
/** @file
* OemMiscLib.c
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
* Copyright (c) 2018, Linaro Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Uefi.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/OemMiscLib.h>
/** Gets the CPU frequency of the specified processor.
@param ProcessorIndex Index of the processor to get the frequency for.
@return CPU frequency in Hz
**/
UINTN
EFIAPI
OemGetCpuFreq (
IN UINT8 ProcessorIndex
)
{
ASSERT (FALSE);
return 0;
}
/** Gets information about the specified processor and stores it in
the structures provided.
@param ProcessorIndex Index of the processor to get the information for.
@param ProcessorStatus Processor status.
@param ProcessorCharacteristics Processor characteritics.
@param MiscProcessorData Miscellaneous processor information.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetProcessorInformation (
IN UINTN ProcessorIndex,
IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData
)
{
ASSERT (FALSE);
return TRUE;
}
/** Gets information about the cache at the specified cache level.
@param ProcessorIndex The processor to get information for.
@param CacheLevel The cache level to get information for.
@param DataCache Whether the cache is a data cache.
@param UnifiedCache Whether the cache is a unified cache.
@param SmbiosCacheTable The SMBIOS Type7 cache information structure.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetCacheInformation (
IN UINT8 ProcessorIndex,
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache,
IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
)
{
ASSERT (FALSE);
return TRUE;
}
/** Gets the maximum number of processors supported by the platform.
@return The maximum number of processors.
**/
UINT8
EFIAPI
OemGetMaxProcessors (
VOID
)
{
ASSERT (FALSE);
return 1;
}
/** Gets the type of chassis for the system.
@retval The type of the chassis.
**/
MISC_CHASSIS_TYPE
EFIAPI
OemGetChassisType (
VOID
)
{
ASSERT (FALSE);
return MiscChassisTypeUnknown;
}
/** Returns whether the specified processor is present or not.
@param ProcessIndex The processor index to check.
@return TRUE is the processor is present, FALSE otherwise.
**/
BOOLEAN
EFIAPI
OemIsProcessorPresent (
IN UINTN ProcessorIndex
)
{
ASSERT (FALSE);
return FALSE;
}
/** Updates the HII string for the specified field.
@param HiiHandle The HII handle.
@param TokenToUpdate The string to update.
@param Field The field to get information about.
**/
VOID
EFIAPI
OemUpdateSmbiosInfo (
IN EFI_HII_HANDLE HiiHandle,
IN EFI_STRING_ID TokenToUpdate,
IN OEM_MISC_SMBIOS_HII_STRING_FIELD Field
)
{
ASSERT (FALSE);
}

View File

@@ -0,0 +1,31 @@
#/** @file
# OemMiscLib.inf
#
# Copyright (c) 2021, NUVIA Inc. All rights reserved.
# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
# Copyright (c) 2018, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#**/
[Defines]
INF_VERSION = 1.29
BASE_NAME = OemMiscLibNull
FILE_GUID = e80b8e6b-fffb-4c39-b433-41de67c9d7b8
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = OemMiscLib
[Sources.common]
OemMiscLib.c
[Packages]
ArmPkg/ArmPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseMemoryLib
DebugLib

View File

@@ -0,0 +1,752 @@
/** @file
ProcessorSubClass.c
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.
Copyright (c) 2015, Linaro Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <Protocol/Smbios.h>
#include <IndustryStandard/ArmStdSmc.h>
#include <IndustryStandard/SmBios.h>
#include <Library/ArmLib.h>
#include <Library/ArmSmcLib.h>
#include <Library/ArmLib/ArmLibPrivate.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
#include "SmbiosProcessor.h"
extern UINT8 ProcessorSubClassStrings[];
#define CACHE_SOCKETED_SHIFT 3
#define CACHE_LOCATION_SHIFT 5
#define CACHE_ENABLED_SHIFT 7
#define CACHE_OPERATION_MODE_SHIFT 8
typedef enum {
CacheModeWriteThrough = 0, ///< Cache is write-through
CacheModeWriteBack, ///< Cache is write-back
CacheModeVariesWithAddress, ///< Cache mode varies by address
CacheModeUnknown, ///< Cache mode is unknown
CacheModeMax
} CACHE_OPERATION_MODE;
typedef enum {
CacheLocationInternal = 0, ///< Cache is internal to the processor
CacheLocationExternal, ///< Cache is external to the processor
CacheLocationReserved, ///< Reserved
CacheLocationUnknown, ///< Cache location is unknown
CacheLocationMax
} CACHE_LOCATION;
EFI_HII_HANDLE mHiiHandle;
EFI_SMBIOS_PROTOCOL *mSmbios;
SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate = {
{ // Hdr
EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // Type
sizeof (SMBIOS_TABLE_TYPE4), // Length
0 // Handle
},
1, // Socket
CentralProcessor, // ProcessorType
ProcessorFamilyIndicatorFamily2, // ProcessorFamily
2, // ProcessorManufacture
{ // ProcessorId
{ // Signature
0
},
{ // FeatureFlags
0
}
},
3, // ProcessorVersion
{ // Voltage
0
},
0, // ExternalClock
0, // MaxSpeed
0, // CurrentSpeed
0, // Status
ProcessorUpgradeUnknown, // ProcessorUpgrade
0xFFFF, // L1CacheHandle
0xFFFF, // L2CacheHandle
0xFFFF, // L3CacheHandle
4, // SerialNumber
5, // AssetTag
6, // PartNumber
0, // CoreCount
0, //EnabledCoreCount
0, // ThreadCount
0, // ProcessorCharacteristics
ProcessorFamilyARM, // ProcessorFamily2
0, // CoreCount2
0, // EnabledCoreCount2
0 // ThreadCount2
};
/** Sets the HII variable `StringId` is `Pcd` isn't empty.
@param Pcd The FixedAtBuild PCD that contains the string to fetch.
@param StringId The string identifier to set.
**/
#define SET_HII_STRING_IF_PCD_NOT_EMPTY(Pcd, StringId) \
do { \
CHAR16 *Str; \
Str = (CHAR16*)PcdGetPtr (Pcd); \
if (StrLen (Str) > 0) { \
HiiSetString (mHiiHandle, StringId, Str, NULL); \
} \
} while (0)
/** Fetches the specified processor's frequency in Hz.
@param ProcessorNumber The processor number
@return The clock frequency in MHz
**/
UINT16
GetCpuFrequency (
IN UINT8 ProcessorNumber
)
{
return (UINT16)(OemGetCpuFreq (ProcessorNumber) / 1000 / 1000);
}
/** Gets a description of the specified cache.
@param[in] CacheLevel Zero-based cache level (e.g. L1 cache is 0).
@param[in] DataCache Cache is a data cache.
@param[in] UnifiedCache Cache is a unified cache.
@param[out] CacheSocketStr The description of the specified cache
@return The number of Unicode characters in CacheSocketStr not including the
terminating NUL.
**/
UINTN
GetCacheSocketStr (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache,
OUT CHAR16 *CacheSocketStr
)
{
UINTN CacheSocketStrLen;
if (CacheLevel == CpuCacheL1 && !DataCache && !UnifiedCache) {
CacheSocketStrLen = UnicodeSPrint (
CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Instruction Cache",
CacheLevel);
} else if (CacheLevel == CpuCacheL1 && DataCache) {
CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Data Cache",
CacheLevel);
} else {
CacheSocketStrLen = UnicodeSPrint (CacheSocketStr,
SMBIOS_STRING_MAX_LENGTH - 1,
L"L%x Cache",
CacheLevel);
}
return CacheSocketStrLen;
}
/** Fills in the Type 7 record with the cache architecture information
read from the CPU registers.
@param[in] CacheLevel Cache level (e.g. L1, L2).
@param[in] DataCache Cache is a data cache.
@param[in] UnifiedCache Cache is a unified cache.
@param[out] Type7Record The Type 7 record to fill in.
**/
VOID
ConfigureCacheArchitectureInformation (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache,
OUT SMBIOS_TABLE_TYPE7 *Type7Record
)
{
UINT8 Associativity;
UINT32 CacheSize32;
UINT16 CacheSize16;
UINT64 CacheSize64;
if (!DataCache && !UnifiedCache) {
Type7Record->SystemCacheType = CacheTypeInstruction;
} else if (DataCache) {
Type7Record->SystemCacheType = CacheTypeData;
} else if (UnifiedCache) {
Type7Record->SystemCacheType = CacheTypeUnified;
} else {
ASSERT(FALSE);
}
CacheSize64 = SmbiosProcessorGetCacheSize (CacheLevel,
DataCache,
UnifiedCache
);
Associativity = SmbiosProcessorGetCacheAssociativity (CacheLevel,
DataCache,
UnifiedCache
);
CacheSize64 /= 1024; // Minimum granularity is 1K
// Encode the cache size into the format SMBIOS wants
if (CacheSize64 < MAX_INT16) {
CacheSize16 = CacheSize64;
CacheSize32 = CacheSize16;
} else if ((CacheSize64 / 64) < MAX_INT16) {
CacheSize16 = (1 << 15) | (CacheSize64 / 64);
CacheSize32 = CacheSize16;
} else {
if ((CacheSize64 / 1024) <= 2047) {
CacheSize32 = CacheSize64;
} else {
CacheSize32 = (1 << 31) | (CacheSize64 / 64);
}
CacheSize16 = -1;
}
Type7Record->MaximumCacheSize = CacheSize16;
Type7Record->InstalledSize = CacheSize16;
Type7Record->MaximumCacheSize2 = CacheSize32;
Type7Record->InstalledSize2 = CacheSize32;
switch (Associativity) {
case 2:
Type7Record->Associativity = CacheAssociativity2Way;
break;
case 4:
Type7Record->Associativity = CacheAssociativity4Way;
break;
case 8:
Type7Record->Associativity = CacheAssociativity8Way;
break;
case 12:
Type7Record->Associativity = CacheAssociativity12Way;
break;
case 16:
Type7Record->Associativity = CacheAssociativity16Way;
break;
case 20:
Type7Record->Associativity = CacheAssociativity20Way;
break;
case 24:
Type7Record->Associativity = CacheAssociativity24Way;
break;
case 32:
Type7Record->Associativity = CacheAssociativity32Way;
break;
case 48:
Type7Record->Associativity = CacheAssociativity48Way;
break;
case 64:
Type7Record->Associativity = CacheAssociativity64Way;
break;
default:
Type7Record->Associativity = CacheAssociativityOther;
break;
}
Type7Record->CacheConfiguration = (CacheModeUnknown << CACHE_OPERATION_MODE_SHIFT) |
(1 << CACHE_ENABLED_SHIFT) |
(CacheLocationUnknown << CACHE_LOCATION_SHIFT) |
(0 << CACHE_SOCKETED_SHIFT) |
(CacheLevel - 1);
}
/** Allocates and initializes an SMBIOS_TABLE_TYPE7 structure.
@param[in] CacheLevel The cache level (L1-L7).
@param[in] DataCache Cache is a data cache.
@param[in] UnifiedCache Cache is a unified cache.
@return A pointer to the Type 7 structure. Returns NULL on failure.
**/
SMBIOS_TABLE_TYPE7 *
AllocateAndInitCacheInformation (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
SMBIOS_TABLE_TYPE7 *Type7Record;
EFI_STRING CacheSocketStr;
UINTN CacheSocketStrLen;
UINTN StringBufferSize;
CHAR8 *OptionalStrStart;
UINTN TableSize;
// Allocate and fetch the cache description
StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
CacheSocketStr = AllocateZeroPool (StringBufferSize);
if (CacheSocketStr == NULL) {
return NULL;
}
CacheSocketStrLen = GetCacheSocketStr (CacheLevel,
DataCache,
UnifiedCache,
CacheSocketStr);
TableSize = sizeof (SMBIOS_TABLE_TYPE7) + CacheSocketStrLen + 1 + 1;
Type7Record = AllocateZeroPool (TableSize);
if (Type7Record == NULL) {
FreePool(CacheSocketStr);
return NULL;
}
Type7Record->Hdr.Type = EFI_SMBIOS_TYPE_CACHE_INFORMATION;
Type7Record->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE7);
Type7Record->Hdr.Handle = SMBIOS_HANDLE_PI_RESERVED;
Type7Record->SocketDesignation = 1;
Type7Record->SupportedSRAMType.Unknown = 1;
Type7Record->CurrentSRAMType.Unknown = 1;
Type7Record->CacheSpeed = 0;
Type7Record->ErrorCorrectionType = CacheErrorUnknown;
OptionalStrStart = (CHAR8 *)(Type7Record + 1);
UnicodeStrToAsciiStrS (CacheSocketStr, OptionalStrStart, CacheSocketStrLen + 1);
FreePool (CacheSocketStr);
return Type7Record;
}
/**
Add Type 7 SMBIOS Record for Cache Information.
@param[in] ProcessorIndex Processor number of specified processor.
@param[out] L1CacheHandle Pointer to the handle of the L1 Cache SMBIOS record.
@param[out] L2CacheHandle Pointer to the handle of the L2 Cache SMBIOS record.
@param[out] L3CacheHandle Pointer to the handle of the L3 Cache SMBIOS record.
**/
VOID
AddSmbiosCacheTypeTable (
IN UINTN ProcessorIndex,
OUT EFI_SMBIOS_HANDLE *L1CacheHandle,
OUT EFI_SMBIOS_HANDLE *L2CacheHandle,
OUT EFI_SMBIOS_HANDLE *L3CacheHandle
)
{
EFI_STATUS Status;
SMBIOS_TABLE_TYPE7 *Type7Record;
EFI_SMBIOS_HANDLE SmbiosHandle;
UINT8 CacheLevel;
UINT8 MaxCacheLevel;
BOOLEAN DataCacheType;
BOOLEAN SeparateCaches;
Status = EFI_SUCCESS;
MaxCacheLevel = 0;
// See if there's an L1 cache present.
MaxCacheLevel = SmbiosProcessorGetMaxCacheLevel ();
if (MaxCacheLevel < 1) {
return;
}
for (CacheLevel = 1; CacheLevel <= MaxCacheLevel; CacheLevel++) {
Type7Record = NULL;
SeparateCaches = SmbiosProcessorHasSeparateCaches (CacheLevel);
// At each level of cache, we can have a single type (unified, instruction or data),
// or two types - separate data and instruction caches. If we have separate
// instruction and data caches, then on the first iteration (CacheSubLevel = 0)
// process the instruction cache.
for (DataCacheType = 0; DataCacheType <= 1; DataCacheType++) {
// If there's no separate data/instruction cache, skip the second iteration
if (DataCacheType == 1 && !SeparateCaches) {
continue;
}
Type7Record = AllocateAndInitCacheInformation (CacheLevel,
DataCacheType,
!SeparateCaches
);
if (Type7Record == NULL) {
continue;
}
ConfigureCacheArchitectureInformation(CacheLevel,
DataCacheType,
!SeparateCaches,
Type7Record
);
// Allow the platform to fill in other information such as speed, SRAM type etc.
if (!OemGetCacheInformation (ProcessorIndex, CacheLevel,
DataCacheType, !SeparateCaches, Type7Record)) {
continue;
}
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
// Finally, install the table
Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type7Record);
if (EFI_ERROR (Status)) {
continue;
}
// Config L1/L2/L3 Cache Handle
switch (CacheLevel) {
case CpuCacheL1:
*L1CacheHandle = SmbiosHandle;
break;
case CpuCacheL2:
*L2CacheHandle = SmbiosHandle;
break;
case CpuCacheL3:
*L3CacheHandle = SmbiosHandle;
break;
default:
break;
}
}
}
}
/** Allocates a Type 4 Processor Information structure and sets the
strings following the data fields.
@param[out] Type4Record The Type 4 structure to allocate and initialize
@param[in] ProcessorIndex The index of the processor
@param[in] Populated Whether the specified processor is
populated.
@retval EFI_SUCCESS The Type 4 structure was successfully
allocated and the strings initialized.
@retval EFI_OUT_OF_RESOURCES Could not allocate memory needed.
**/
EFI_STATUS
AllocateType4AndSetProcessorInformationStrings (
SMBIOS_TABLE_TYPE4 **Type4Record,
UINT8 ProcessorIndex,
BOOLEAN Populated
)
{
EFI_STATUS Status;
EFI_STRING_ID ProcessorManu;
EFI_STRING_ID ProcessorVersion;
EFI_STRING_ID SerialNumber;
EFI_STRING_ID AssetTag;
EFI_STRING_ID PartNumber;
EFI_STRING ProcessorStr;
EFI_STRING ProcessorManuStr;
EFI_STRING ProcessorVersionStr;
EFI_STRING SerialNumberStr;
EFI_STRING AssetTagStr;
EFI_STRING PartNumberStr;
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN ProcessorStrLen;
UINTN ProcessorManuStrLen;
UINTN ProcessorVersionStrLen;
UINTN SerialNumberStrLen;
UINTN AssetTagStrLen;
UINTN PartNumberStrLen;
UINTN TotalSize;
UINTN StringBufferSize;
Status = EFI_SUCCESS;
ProcessorManuStr = NULL;
ProcessorVersionStr = NULL;
SerialNumberStr = NULL;
AssetTagStr = NULL;
PartNumberStr = NULL;
ProcessorManu = STRING_TOKEN (STR_PROCESSOR_MANUFACTURE);
ProcessorVersion = STRING_TOKEN (STR_PROCESSOR_VERSION);
SerialNumber = STRING_TOKEN (STR_PROCESSOR_SERIAL_NUMBER);
AssetTag = STRING_TOKEN (STR_PROCESSOR_ASSET_TAG);
PartNumber = STRING_TOKEN (STR_PROCESSOR_PART_NUMBER);
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorManufacturer, ProcessorManu);
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorVersion, ProcessorVersion);
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorSerialNumber, SerialNumber);
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorAssetTag, AssetTag);
SET_HII_STRING_IF_PCD_NOT_EMPTY (PcdProcessorPartNumber, PartNumber);
// Processor Designation
StringBufferSize = sizeof (CHAR16) * SMBIOS_STRING_MAX_LENGTH;
ProcessorStr = AllocateZeroPool (StringBufferSize);
if (ProcessorStr == NULL) {
return EFI_OUT_OF_RESOURCES;
}
ProcessorStrLen = UnicodeSPrint (ProcessorStr, StringBufferSize,
L"CPU%02d", ProcessorIndex + 1);
// Processor Manufacture
ProcessorManuStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorManu, NULL);
ProcessorManuStrLen = StrLen (ProcessorManuStr);
// Processor Version
ProcessorVersionStr = HiiGetPackageString (&gEfiCallerIdGuid, ProcessorVersion, NULL);
ProcessorVersionStrLen = StrLen (ProcessorVersionStr);
// Serial Number
SerialNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, SerialNumber, NULL);
SerialNumberStrLen = StrLen (SerialNumberStr);
// Asset Tag
AssetTagStr = HiiGetPackageString (&gEfiCallerIdGuid, AssetTag, NULL);
AssetTagStrLen = StrLen (AssetTagStr);
// Part Number
PartNumberStr = HiiGetPackageString (&gEfiCallerIdGuid, PartNumber, NULL);
PartNumberStrLen = StrLen (PartNumberStr);
TotalSize = sizeof (SMBIOS_TABLE_TYPE4) +
ProcessorStrLen + 1 +
ProcessorManuStrLen + 1 +
ProcessorVersionStrLen + 1 +
SerialNumberStrLen + 1 +
AssetTagStrLen + 1 +
PartNumberStrLen + 1 + 1;
*Type4Record = AllocateZeroPool (TotalSize);
if (*Type4Record == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
CopyMem (*Type4Record, &mSmbiosProcessorTableTemplate, sizeof (SMBIOS_TABLE_TYPE4));
OptionalStrStart = (CHAR8 *)(*Type4Record + 1);
UnicodeStrToAsciiStrS (
ProcessorStr,
OptionalStrStart,
ProcessorStrLen + 1
);
StrStart = OptionalStrStart + ProcessorStrLen + 1;
UnicodeStrToAsciiStrS (
ProcessorManuStr,
StrStart,
ProcessorManuStrLen + 1
);
StrStart += ProcessorManuStrLen + 1;
UnicodeStrToAsciiStrS (
ProcessorVersionStr,
StrStart,
ProcessorVersionStrLen + 1
);
StrStart += ProcessorVersionStrLen + 1;
UnicodeStrToAsciiStrS (
SerialNumberStr,
StrStart,
SerialNumberStrLen + 1
);
StrStart += SerialNumberStrLen + 1;
UnicodeStrToAsciiStrS (
AssetTagStr,
StrStart,
AssetTagStrLen + 1
);
StrStart += AssetTagStrLen + 1;
UnicodeStrToAsciiStrS (
PartNumberStr,
StrStart,
PartNumberStrLen + 1
);
Exit:
FreePool (ProcessorStr);
FreePool (ProcessorManuStr);
FreePool (ProcessorVersionStr);
FreePool (SerialNumberStr);
FreePool (AssetTagStr);
FreePool (PartNumberStr);
return Status;
}
/**
Add Type 4 SMBIOS Record for Processor Information.
@param[in] ProcessorIndex Processor index of specified processor.
**/
EFI_STATUS
AddSmbiosProcessorTypeTable (
IN UINTN ProcessorIndex
)
{
EFI_STATUS Status;
SMBIOS_TABLE_TYPE4 *Type4Record;
EFI_SMBIOS_HANDLE SmbiosHandle;
EFI_SMBIOS_HANDLE L1CacheHandle;
EFI_SMBIOS_HANDLE L2CacheHandle;
EFI_SMBIOS_HANDLE L3CacheHandle;
UINT8 *LegacyVoltage;
PROCESSOR_STATUS_DATA ProcessorStatus;
UINT64 *ProcessorId;
PROCESSOR_CHARACTERISTIC_FLAGS ProcessorCharacteristics;
OEM_MISC_PROCESSOR_DATA MiscProcessorData;
BOOLEAN ProcessorPopulated;
Type4Record = NULL;
MiscProcessorData.Voltage = 0;
MiscProcessorData.CurrentSpeed = 0;
MiscProcessorData.CoreCount = 0;
MiscProcessorData.CoresEnabled = 0;
MiscProcessorData.ThreadCount = 0;
MiscProcessorData.MaxSpeed = 0;
L1CacheHandle = 0xFFFF;
L2CacheHandle = 0xFFFF;
L3CacheHandle = 0xFFFF;
ProcessorPopulated = OemIsProcessorPresent (ProcessorIndex);
Status = AllocateType4AndSetProcessorInformationStrings (
&Type4Record,
ProcessorIndex,
ProcessorPopulated
);
if (EFI_ERROR (Status)) {
return Status;
}
OemGetProcessorInformation (ProcessorIndex,
&ProcessorStatus,
(PROCESSOR_CHARACTERISTIC_FLAGS*)
&Type4Record->ProcessorCharacteristics,
&MiscProcessorData);
if (ProcessorPopulated) {
AddSmbiosCacheTypeTable (ProcessorIndex, &L1CacheHandle,
&L2CacheHandle, &L3CacheHandle);
}
LegacyVoltage = (UINT8*)&Type4Record->Voltage;
*LegacyVoltage = MiscProcessorData.Voltage;
Type4Record->CurrentSpeed = MiscProcessorData.CurrentSpeed;
Type4Record->MaxSpeed = MiscProcessorData.MaxSpeed;
Type4Record->Status = ProcessorStatus.Data;
Type4Record->L1CacheHandle = L1CacheHandle;
Type4Record->L2CacheHandle = L2CacheHandle;
Type4Record->L3CacheHandle = L3CacheHandle;
Type4Record->CoreCount = MiscProcessorData.CoreCount;
Type4Record->CoreCount2 = MiscProcessorData.CoreCount;
Type4Record->EnabledCoreCount = MiscProcessorData.CoresEnabled;
Type4Record->EnabledCoreCount2 = MiscProcessorData.CoresEnabled;
Type4Record->ThreadCount = MiscProcessorData.ThreadCount;
Type4Record->ThreadCount2 = MiscProcessorData.ThreadCount;
Type4Record->CurrentSpeed = GetCpuFrequency (ProcessorIndex);
Type4Record->ExternalClock =
(UINT16)(SmbiosGetExternalClockFrequency () / 1000 / 1000);
ProcessorId = (UINT64*)&Type4Record->ProcessorId;
*ProcessorId = SmbiosGetProcessorId ();
ProcessorCharacteristics = SmbiosGetProcessorCharacteristics ();
Type4Record->ProcessorCharacteristics |= *((UINT64*)&ProcessorCharacteristics);
Type4Record->ProcessorFamily = SmbiosGetProcessorFamily ();
Type4Record->ProcessorFamily2 = SmbiosGetProcessorFamily2 ();
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
Status = mSmbios->Add (mSmbios, NULL, &SmbiosHandle,
(EFI_SMBIOS_TABLE_HEADER *)Type4Record);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type04 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (Type4Record);
return Status;
}
/**
Standard EFI driver point.
@param ImageHandle Handle for the image of this driver
@param SystemTable Pointer to the EFI System Table
@retval EFI_SUCCESS The data was successfully stored.
**/
EFI_STATUS
EFIAPI
ProcessorSubClassEntryPoint(
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINT32 ProcessorIndex;
//
// Locate dependent protocols
//
Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&mSmbios);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", Status));
return Status;
}
//
// Add our default strings to the HII database. They will be modified later.
//
mHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
NULL,
ProcessorSubClassStrings,
NULL,
NULL
);
if (mHiiHandle == NULL) {
return EFI_OUT_OF_RESOURCES;
}
//
// Add SMBIOS tables for populated sockets.
//
for (ProcessorIndex = 0; ProcessorIndex < OemGetMaxProcessors (); ProcessorIndex++) {
Status = AddSmbiosProcessorTypeTable (ProcessorIndex);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Add Processor Type Table Failed! %r.\n", Status));
return Status;
}
}
return Status;
}

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@@ -0,0 +1,66 @@
#/** @file
# ProcessorSubClassDxe.inf
#
# Copyright (c) 2021, NUVIA Inc. All rights reserved.
# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
# Copyright (c) 2015, Linaro Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#**/
[Defines]
INF_VERSION = 1.29
BASE_NAME = ProcessorSubClass
FILE_GUID = f3fe0e33-ea38-4069-9fb5-be23407207c7
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = ProcessorSubClassEntryPoint
[Sources]
SmbiosProcessorArmCommon.c
ProcessorSubClass.c
ProcessorSubClassStrings.uni
SmbiosProcessor.h
[Sources.AARCH64]
SmbiosProcessorAArch64.c
[Sources.ARM]
SmbiosProcessorArm.c
[Packages]
ArmPkg/ArmPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
ArmLib
ArmSmcLib
BaseLib
BaseMemoryLib
DebugLib
HiiLib
IoLib
MemoryAllocationLib
OemMiscLib
PcdLib
PrintLib
UefiDriverEntryPoint
[Protocols]
gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
[Pcd]
gArmTokenSpaceGuid.PcdProcessorManufacturer
gArmTokenSpaceGuid.PcdProcessorVersion
gArmTokenSpaceGuid.PcdProcessorSerialNumber
gArmTokenSpaceGuid.PcdProcessorAssetTag
gArmTokenSpaceGuid.PcdProcessorPartNumber
[Guids]
[Depex]
gEfiSmbiosProtocolGuid

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@@ -0,0 +1,24 @@
/** @file
SMBIOS Type 4 strings
Copyright (c) 2021, NUVIA Inc. All rights reserved.
Copyright (c) 2015, Hisilicon Limited. All rights reserved.
Copyright (c) 2015, Linaro Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
#langdef en-US "English"
//
// Processor Information
//
#string STR_PROCESSOR_SOCKET_DESIGNATION #language en-US "Not Specified"
#string STR_PROCESSOR_MANUFACTURE #language en-US "Not Specified"
#string STR_PROCESSOR_VERSION #language en-US "Not Specified"
#string STR_PROCESSOR_SERIAL_NUMBER #language en-US "Not Specified"
#string STR_PROCESSOR_ASSET_TAG #language en-US "Not Specified"
#string STR_PROCESSOR_PART_NUMBER #language en-US "Not Specified"
#string STR_PROCESSOR_UNKNOWN #language en-US "Unknown"

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@@ -0,0 +1,102 @@
/** @file
SMBIOS Processor Related Functions.
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef SMBIOS_PROCESSOR_H_
#define SMBIOS_PROCESSOR_H_
#include <Uefi.h>
#include <IndustryStandard/SmBios.h>
/** Returns the maximum cache level implemented by the current CPU.
@return The maximum cache level implemented.
**/
UINT8
SmbiosProcessorGetMaxCacheLevel (
VOID
);
/** Returns whether or not the specified cache level has separate I/D caches.
@param CacheLevel The cache level (L1, L2 etc.).
@return TRUE if the cache level has separate I/D caches, FALSE otherwise.
**/
BOOLEAN
SmbiosProcessorHasSeparateCaches (
UINT8 CacheLevel
);
/** Gets the size of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache size.
**/
UINT64
SmbiosProcessorGetCacheSize (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
);
/** Gets the associativity of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache associativity.
**/
UINT32
SmbiosProcessorGetCacheAssociativity (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
);
/** Returns a value for the Processor ID field that conforms to SMBIOS
requirements.
@return Processor ID.
**/
UINT64
SmbiosGetProcessorId (VOID);
/** Returns the external clock frequency.
@return The external CPU clock frequency.
**/
UINTN
SmbiosGetExternalClockFrequency (VOID);
/** Returns the SMBIOS ProcessorFamily field value.
@return The value for the ProcessorFamily field.
**/
UINT8
SmbiosGetProcessorFamily (VOID);
/** Returns the ProcessorFamily2 field value.
@return The value for the ProcessorFamily2 field.
**/
UINT16
SmbiosGetProcessorFamily2 (VOID);
/** Returns the SMBIOS Processor Characteristics.
@return Processor Characteristics bitfield.
**/
PROCESSOR_CHARACTERISTIC_FLAGS
SmbiosGetProcessorCharacteristics (VOID);
#endif // SMBIOS_PROCESSOR_H_

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@@ -0,0 +1,93 @@
/** @file
Functions for AARCH64 processor information
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <Library/ArmLib.h>
#include <Library/ArmLib/ArmLibPrivate.h>
#include "SmbiosProcessor.h"
/** Gets the size of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache size.
**/
UINT64
SmbiosProcessorGetCacheSize (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT64 CacheSize;
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
CacheSize = (1 << (Ccsidr.BitsCcidxAA64.LineSize + 4)) *
(Ccsidr.BitsCcidxAA64.Associativity + 1) *
(Ccsidr.BitsCcidxAA64.NumSets + 1);
} else {
CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
(Ccsidr.BitsNonCcidx.Associativity + 1) *
(Ccsidr.BitsNonCcidx.NumSets + 1);
}
return CacheSize;
}
/** Gets the associativity of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache associativity.
**/
UINT32
SmbiosProcessorGetCacheAssociativity (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT32 Associativity;
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
Associativity = Ccsidr.BitsCcidxAA64.Associativity + 1;
} else {
Associativity = Ccsidr.BitsNonCcidx.Associativity + 1;
}
return Associativity;
}

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/** @file
Functions for ARM processor information
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <Library/ArmLib.h>
#include <Library/ArmLib/ArmLibPrivate.h>
#include "SmbiosProcessor.h"
/** Gets the size of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache size.
**/
UINT64
SmbiosProcessorGetCacheSize (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CCSIDR2_DATA Ccsidr2;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT64 CacheSize;
// Read the CCSIDR register to get the cache architecture
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *
(Ccsidr.BitsCcidxAA32.Associativity + 1) *
(Ccsidr2.Bits.NumSets + 1);
} else {
CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
(Ccsidr.BitsNonCcidx.Associativity + 1) *
(Ccsidr.BitsNonCcidx.NumSets + 1);
}
return CacheSize;
}
/** Gets the associativity of the specified cache.
@param CacheLevel The cache level (L1, L2 etc.).
@param DataCache Whether the cache is a dedicated data cache.
@param UnifiedCache Whether the cache is a unified cache.
@return The cache associativity.
**/
UINT32
SmbiosProcessorGetCacheAssociativity (
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache
)
{
CCSIDR_DATA Ccsidr;
CSSELR_DATA Csselr;
BOOLEAN CcidxSupported;
UINT32 Associativity;
// Read the CCSIDR register to get the cache architecture
Csselr.Data = 0;
Csselr.Bits.Level = CacheLevel - 1;
Csselr.Bits.InD = (!DataCache && !UnifiedCache);
Ccsidr.Data = ReadCCSIDR (Csselr.Data);
CcidxSupported = ArmHasCcidx ();
if (CcidxSupported) {
Associativity = Ccsidr.BitsCcidxAA32.Associativity + 1;
} else {
Associativity = Ccsidr.BitsNonCcidx.Associativity + 1;
}
return Associativity;
}

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/** @file
Functions for processor information common to ARM and AARCH64.
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi.h>
#include <IndustryStandard/ArmStdSmc.h>
#include <IndustryStandard/SmBios.h>
#include <Library/ArmLib.h>
#include <Library/ArmLib/ArmLibPrivate.h>
#include <Library/ArmSmcLib.h>
#include <Library/BaseMemoryLib.h>
#include "SmbiosProcessor.h"
/** Returns the maximum cache level implemented by the current CPU.
@return The maximum cache level implemented.
**/
UINT8
SmbiosProcessorGetMaxCacheLevel (
VOID
)
{
CLIDR_DATA Clidr;
UINT8 CacheLevel;
UINT8 MaxCacheLevel;
MaxCacheLevel = 0;
// Read the CLIDR register to find out what caches are present.
Clidr.Data = ReadCLIDR ();
// Get the cache type for the L1 cache. If it's 0, there are no caches.
if (CLIDR_GET_CACHE_TYPE (Clidr.Data, 1) == ClidrCacheTypeNone) {
return 0;
}
for (CacheLevel = 1; CacheLevel <= MAX_ARM_CACHE_LEVEL; CacheLevel++) {
if (CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel) == ClidrCacheTypeNone) {
MaxCacheLevel = CacheLevel;
break;
}
}
return MaxCacheLevel;
}
/** Returns whether or not the specified cache level has separate I/D caches.
@param CacheLevel The cache level (L1, L2 etc.).
@return TRUE if the cache level has separate I/D caches, FALSE otherwise.
**/
BOOLEAN
SmbiosProcessorHasSeparateCaches (
UINT8 CacheLevel
)
{
CLIDR_CACHE_TYPE CacheType;
CLIDR_DATA Clidr;
BOOLEAN SeparateCaches;
SeparateCaches = FALSE;
Clidr.Data = ReadCLIDR ();
CacheType = CLIDR_GET_CACHE_TYPE (Clidr.Data, CacheLevel - 1);
if (CacheType == ClidrCacheTypeSeparate) {
SeparateCaches = TRUE;
}
return SeparateCaches;
}
/** Checks if ther ARM64 SoC ID SMC call is supported
@return Whether the ARM64 SoC ID call is supported.
**/
BOOLEAN
HasSmcArm64SocId (
VOID
)
{
ARM_SMC_ARGS Args;
INT32 SmcCallStatus;
BOOLEAN Arm64SocIdSupported;
Arm64SocIdSupported = FALSE;
Args.Arg0 = SMCCC_VERSION;
ArmCallSmc (&Args);
SmcCallStatus = (INT32)Args.Arg0;
if (SmcCallStatus < 0 || (SmcCallStatus >> 16) >= 1) {
Args.Arg0 = SMCCC_ARCH_FEATURES;
Args.Arg1 = SMCCC_ARCH_SOC_ID;
ArmCallSmc (&Args);
if (Args.Arg0 >= 0) {
Arm64SocIdSupported = TRUE;
}
}
return Arm64SocIdSupported;
}
/** Fetches the JEP106 code and SoC Revision.
@param Jep106Code JEP 106 code.
@param SocRevision SoC revision.
@retval EFI_SUCCESS Succeeded.
@retval EFI_UNSUPPORTED Failed.
**/
EFI_STATUS
SmbiosGetSmcArm64SocId (
OUT INT32 *Jep106Code,
OUT INT32 *SocRevision
)
{
ARM_SMC_ARGS Args;
INT32 SmcCallStatus;
EFI_STATUS Status;
Status = EFI_SUCCESS;
Args.Arg0 = SMCCC_ARCH_SOC_ID;
Args.Arg1 = 0;
ArmCallSmc (&Args);
SmcCallStatus = (INT32)Args.Arg0;
if (SmcCallStatus >= 0) {
*Jep106Code = (INT32)Args.Arg0;
} else {
Status = EFI_UNSUPPORTED;
}
Args.Arg0 = SMCCC_ARCH_SOC_ID;
Args.Arg1 = 1;
ArmCallSmc (&Args);
SmcCallStatus = (INT32)Args.Arg0;
if (SmcCallStatus >= 0) {
*SocRevision = (INT32)Args.Arg0;
} else {
Status = EFI_UNSUPPORTED;
}
return Status;
}
/** Returns a value for the Processor ID field that conforms to SMBIOS
requirements.
@return Processor ID.
**/
UINT64
SmbiosGetProcessorId (
VOID
)
{
INT32 Jep106Code;
INT32 SocRevision;
UINT64 ProcessorId;
if (HasSmcArm64SocId ()) {
SmbiosGetSmcArm64SocId (&Jep106Code, &SocRevision);
ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision;
} else {
ProcessorId = ArmReadMidr ();
}
return ProcessorId;
}
/** Returns the external clock frequency.
@return The external clock frequency.
**/
UINTN
SmbiosGetExternalClockFrequency (
VOID
)
{
return ArmReadCntFrq ();
}
/** Returns the SMBIOS ProcessorFamily field value.
@return The value for the ProcessorFamily field.
**/
UINT8
SmbiosGetProcessorFamily (
VOID
)
{
return ProcessorFamilyIndicatorFamily2;
}
/** Returns the ProcessorFamily2 field value.
@return The value for the ProcessorFamily2 field.
**/
UINT16
SmbiosGetProcessorFamily2 (
VOID
)
{
UINTN MainIdRegister;
UINT16 ProcessorFamily2;
MainIdRegister = ArmReadMidr ();
if (((MainIdRegister >> 16) & 0xF) < 8) {
ProcessorFamily2 = ProcessorFamilyARM;
} else {
if (sizeof (VOID*) == 4) {
ProcessorFamily2 = ProcessorFamilyARMv7;
} else {
ProcessorFamily2 = ProcessorFamilyARMv8;
}
}
return ProcessorFamily2;
}
/** Returns the SMBIOS Processor Characteristics.
@return Processor Characteristics bitfield.
**/
PROCESSOR_CHARACTERISTIC_FLAGS
SmbiosGetProcessorCharacteristics (
VOID
)
{
PROCESSOR_CHARACTERISTIC_FLAGS Characteristics;
ZeroMem (&Characteristics, sizeof (Characteristics));
Characteristics.ProcessorArm64SocId = HasSmcArm64SocId ();
return Characteristics;
}

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/** @file
Header file for the SmbiosMisc Driver.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef SMBIOS_MISC_H_
#define SMBIOS_MISC_H_
#include <Protocol/Smbios.h>
#include <IndustryStandard/SmBios.h>
//
// Data table entry update function.
//
typedef EFI_STATUS (EFIAPI SMBIOS_MISC_DATA_FUNCTION) (
IN VOID *RecordData,
IN EFI_SMBIOS_PROTOCOL *Smbios
);
//
// Data table entry definition.
//
typedef struct {
//
// intermediate input data for SMBIOS record
//
VOID *RecordData;
SMBIOS_MISC_DATA_FUNCTION *Function;
} SMBIOS_MISC_DATA_TABLE;
//
// SMBIOS table extern definitions
//
#define SMBIOS_MISC_TABLE_EXTERNS(NAME1, NAME2, NAME3) \
extern NAME1 NAME2 ## Data; \
extern SMBIOS_MISC_DATA_FUNCTION NAME3 ## Function;
//
// SMBIOS data table entries
//
// This is used to define a pair of table structure pointer and functions
// in order to iterate through the list of tables, populate them and add
// them into the system.
#define SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION(NAME1, NAME2) \
{ \
& NAME1 ## Data, \
NAME2 ## Function \
}
//
// Global definition macros.
//
#define SMBIOS_MISC_TABLE_DATA(NAME1, NAME2) \
NAME1 NAME2 ## Data
#define SMBIOS_MISC_TABLE_FUNCTION(NAME2) \
EFI_STATUS EFIAPI NAME2 ## Function( \
IN VOID *RecordData, \
IN EFI_SMBIOS_PROTOCOL *Smbios \
)
//
// Data Table Array Entries
//
extern EFI_HII_HANDLE mSmbiosMiscHiiHandle;
typedef struct _SMBIOS_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING{
UINT8 *LanguageSignature;
EFI_STRING_ID InstallableLanguageLongString;
EFI_STRING_ID InstallableLanguageAbbreviateString;
} SMBIOS_TYPE13_BIOS_LANGUAGE_INFORMATION_STRING;
/**
Adds an SMBIOS record.
@param Buffer The data for the SMBIOS record.
The format of the record is determined by
EFI_SMBIOS_TABLE_HEADER.Type. The size of the
formatted area is defined by EFI_SMBIOS_TABLE_HEADER.Length
and either followed by a double-null (0x0000) or a set
of null terminated strings and a null.
@param SmbiosHandle A unique handle will be assigned to the SMBIOS record
if not NULL.
@retval EFI_SUCCESS Record was added.
@retval EFI_OUT_OF_RESOURCES Record was not added due to lack of system resources.
@retval EFI_ALREADY_STARTED The SmbiosHandle passed in was already in use.
**/
EFI_STATUS
SmbiosMiscAddRecord (
IN UINT8 *Buffer,
IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle OPTIONAL
);
/**
Get Link Type Handle.
@param [in] SmbiosType Get this Type from SMBIOS table
@param [out] HandleArray Pointer to handle array which will be freed by caller
@param [out] HandleCount Pointer to handle count
**/
VOID
SmbiosMiscGetLinkTypeHandle(
IN UINT8 SmbiosType,
OUT UINT16 **HandleArray,
OUT UINTN *HandleCount
);
//
// Data Table Array
//
extern SMBIOS_MISC_DATA_TABLE mSmbiosMiscDataTable[];
//
// Data Table Array Entries
//
extern UINTN mSmbiosMiscDataTableEntries;
extern UINT8 mSmbiosMiscDxeStrings[];
#endif // SMBIOS_MISC_H_

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/** @file
This file provides SMBIOS Misc Type.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent\
**/
#include "SmbiosMisc.h"
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE0,
MiscBiosVendor,
MiscBiosVendor)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE1,
MiscSystemManufacturer,
MiscSystemManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE3,
MiscChassisManufacturer,
MiscChassisManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE2,
MiscBaseBoardManufacturer,
MiscBaseBoardManufacturer)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE13,
MiscNumberOfInstallableLanguages,
MiscNumberOfInstallableLanguages)
SMBIOS_MISC_TABLE_EXTERNS (SMBIOS_TABLE_TYPE32,
MiscBootInformation,
MiscBootInformation)
SMBIOS_MISC_DATA_TABLE mSmbiosMiscDataTable[] = {
// Type0
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBiosVendor,
MiscBiosVendor),
// Type1
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscSystemManufacturer,
MiscSystemManufacturer),
// Type3
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscChassisManufacturer,
MiscChassisManufacturer),
// Type2
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBaseBoardManufacturer,
MiscBaseBoardManufacturer),
// Type13
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscNumberOfInstallableLanguages,
MiscNumberOfInstallableLanguages),
// Type32
SMBIOS_MISC_TABLE_ENTRY_DATA_AND_FUNCTION (MiscBootInformation,
MiscBootInformation),
};
//
// Number of Data Table entries.
//
UINTN mSmbiosMiscDataTableEntries =
(sizeof (mSmbiosMiscDataTable)) / sizeof (SMBIOS_MISC_DATA_TABLE);

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#/** @file
# Component description file for SmbiosMisc instance.
#
# Parses the MiscSubclassDataTable and reports any generated data to the DataHub.
# All .uni file who tagged with "ToolCode="DUMMY"" in following file list is included by
# MiscSubclassDriver.uni file, the StrGather tool will expand MiscSubclassDriver.uni file
# and parse all .uni file.
#
# Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
# Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#
# Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
#**/
[Defines]
INF_VERSION = 1.29
BASE_NAME = SmbiosMiscDxe
FILE_GUID = 7e5e26d4-0be9-401f-b5e1-1c2bda7ca777
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SmbiosMiscEntryPoint
[Sources]
SmbiosMisc.h
SmbiosMiscDataTable.c
SmbiosMiscEntryPoint.c
SmbiosMiscDxeStrings.uni
Type00/MiscBiosVendorData.c
Type00/MiscBiosVendorFunction.c
Type01/MiscSystemManufacturerData.c
Type01/MiscSystemManufacturerFunction.c
Type02/MiscBaseBoardManufacturerData.c
Type02/MiscBaseBoardManufacturerFunction.c
Type03/MiscChassisManufacturerData.c
Type03/MiscChassisManufacturerFunction.c
Type13/MiscNumberOfInstallableLanguagesData.c
Type13/MiscNumberOfInstallableLanguagesFunction.c
Type32/MiscBootInformationData.c
Type32/MiscBootInformationFunction.c
[Packages]
ArmPkg/ArmPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugLib
DevicePathLib
PcdLib
HiiLib
HobLib
MemoryAllocationLib
OemMiscLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiLib
UefiRuntimeServicesTableLib
[Protocols]
gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
[Pcd]
gArmTokenSpaceGuid.PcdFdSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
gArmTokenSpaceGuid.PcdSystemBiosRelease
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
gArmTokenSpaceGuid.PcdSystemProductName
gArmTokenSpaceGuid.PcdSystemVersion
gArmTokenSpaceGuid.PcdBaseBoardManufacturer
gArmTokenSpaceGuid.PcdBaseBoardProductName
gArmTokenSpaceGuid.PcdBaseBoardVersion
gArmTokenSpaceGuid.PcdFdBaseAddress
[Guids]
gEfiGenericVariableGuid
[Depex]
gEfiSmbiosProtocolGuid

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/** @file
* Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
* Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
* Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
*
**/
/=#
#langdef en-US "English"
#include "Type00/MiscBiosVendor.uni"
#include "Type01/MiscSystemManufacturer.uni"
#include "Type02/MiscBaseBoardManufacturer.uni"
#include "Type03/MiscChassisManufacturer.uni"
#include "Type13/MiscNumberOfInstallableLanguages.uni"

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/** @file
This driver parses the mSmbiosMiscDataTable structure and reports
any generated data using SMBIOS protocol.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
STATIC EFI_HANDLE mSmbiosMiscImageHandle;
STATIC EFI_SMBIOS_PROTOCOL *mSmbiosMiscSmbios = NULL;
EFI_HII_HANDLE mSmbiosMiscHiiHandle;
/**
Standard EFI driver point. This driver parses the mSmbiosMiscDataTable
structure and reports any generated data using SMBIOS protocol.
@param ImageHandle Handle for the image of this driver
@param SystemTable Pointer to the EFI System Table
@retval EFI_SUCCESS The data was successfully stored.
**/
EFI_STATUS
EFIAPI
SmbiosMiscEntryPoint(
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
UINTN Index;
EFI_STATUS EfiStatus;
mSmbiosMiscImageHandle = ImageHandle;
EfiStatus = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL,
(VOID**)&mSmbiosMiscSmbios);
if (EFI_ERROR (EfiStatus)) {
DEBUG ((DEBUG_ERROR, "Could not locate SMBIOS protocol. %r\n", EfiStatus));
return EfiStatus;
}
mSmbiosMiscHiiHandle = HiiAddPackages (&gEfiCallerIdGuid,
mSmbiosMiscImageHandle,
SmbiosMiscDxeStrings,
NULL
);
if (mSmbiosMiscHiiHandle == NULL) {
return EFI_OUT_OF_RESOURCES;
}
for (Index = 0; Index < mSmbiosMiscDataTableEntries; ++Index) {
//
// If the entry have a function pointer, just log the data.
//
if (mSmbiosMiscDataTable[Index].Function != NULL) {
EfiStatus = (*mSmbiosMiscDataTable[Index].Function)(mSmbiosMiscDataTable[Index].RecordData,
mSmbiosMiscSmbios
);
if (EFI_ERROR(EfiStatus)) {
DEBUG ((DEBUG_ERROR, "Misc smbios store error. Index=%d,"
"ReturnStatus=%r\n", Index, EfiStatus));
return EfiStatus;
}
}
}
return EfiStatus;
}
/**
Adds an SMBIOS record.
@param Buffer The data for the SMBIOS record.
The format of the record is determined by
EFI_SMBIOS_TABLE_HEADER.Type. The size of the
formatted area is defined by EFI_SMBIOS_TABLE_HEADER.Length
and either followed by a double-null (0x0000) or a set
of null terminated strings and a null.
@param SmbiosHandle A unique handle will be assigned to the SMBIOS record
if not NULL.
@retval EFI_SUCCESS Record was added.
@retval EFI_OUT_OF_RESOURCES Record was not added due to lack of system resources.
@retval EFI_ALREADY_STARTED The SmbiosHandle passed in was already in use.
**/
EFI_STATUS
SmbiosMiscAddRecord (
IN UINT8 *Buffer,
IN OUT EFI_SMBIOS_HANDLE *SmbiosHandle OPTIONAL
)
{
EFI_STATUS Status;
EFI_SMBIOS_HANDLE Handle;
Handle = SMBIOS_HANDLE_PI_RESERVED;
if (SmbiosHandle != NULL) {
Handle = *SmbiosHandle;
}
Status = mSmbiosMiscSmbios->Add (
mSmbiosMiscSmbios,
NULL,
&Handle,
(EFI_SMBIOS_TABLE_HEADER *)Buffer
);
if (SmbiosHandle != NULL) {
*SmbiosHandle = Handle;
}
return Status;
}
/** Fetches the number of handles of the specified SMBIOS type.
*
* @param SmbiosType The type of SMBIOS record to look for.
*
* @return The number of handles
*
**/
STATIC
UINTN
GetHandleCount (
IN UINT8 SmbiosType
)
{
UINTN HandleCount;
EFI_STATUS Status;
EFI_SMBIOS_HANDLE SmbiosHandle;
EFI_SMBIOS_TABLE_HEADER *Record;
HandleCount = 0;
// Iterate through entries to get the number
do {
Status = mSmbiosMiscSmbios->GetNext (mSmbiosMiscSmbios,
&SmbiosHandle,
&SmbiosType,
&Record,
NULL
);
if (Status == EFI_SUCCESS) {
HandleCount++;
}
} while (!EFI_ERROR (Status));
return HandleCount;
}
/**
Fetches a list of the specified SMBIOS table types.
@param[in] SmbiosType The type of table to fetch
@param[out] **HandleArray The array of handles
@param[out] *HandleCount Number of handles in the array
**/
VOID
SmbiosMiscGetLinkTypeHandle(
IN UINT8 SmbiosType,
OUT SMBIOS_HANDLE **HandleArray,
OUT UINTN *HandleCount
)
{
UINTN Index;
EFI_STATUS Status;
EFI_SMBIOS_HANDLE SmbiosHandle;
EFI_SMBIOS_TABLE_HEADER *Record;
if (mSmbiosMiscSmbios == NULL) {
return;
}
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
*HandleCount = GetHandleCount (SmbiosType);
*HandleArray = AllocateZeroPool (sizeof (SMBIOS_HANDLE) * (*HandleCount));
if (*HandleArray == NULL) {
DEBUG ((DEBUG_ERROR, "HandleArray allocate memory resource failed.\n"));
*HandleCount = 0;
return;
}
SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;
for (Index = 0; Index < (*HandleCount); Index++) {
Status = mSmbiosMiscSmbios->GetNext (mSmbiosMiscSmbios,
&SmbiosHandle,
&SmbiosType,
&Record,
NULL
);
if (!EFI_ERROR (Status)) {
(*HandleArray)[Index] = Record->Handle;
} else {
break;
}
}
}

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/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
#string STR_MISC_BIOS_VERSION #language en-US "Not Specified"
#string STR_MISC_BIOS_RELEASE_DATE #language en-US "Not Specified"
#string STR_MISC_BIOS_VENDOR #language en-US "Not Specified"
#string STR_MISC_BIOS_RELEASE_DATE #language en-US "12/02/2020"

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/** @file
This file provides Smbios Type0 Data
Based on the files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Bios Vendor data.
//
SMBIOS_MISC_TABLE_DATA(SMBIOS_TABLE_TYPE0, MiscBiosVendor) = {
{ // Hdr
EFI_SMBIOS_TYPE_BIOS_INFORMATION, // Type,
0, // Length,
0 // Handle
},
1, // Vendor
2, // BiosVersion
0xE000, // BiosSegment
3, // BiosReleaseDate
0, // BiosSize
{ // BiosCharacteristics
0, // Reserved :2
0, // Unknown :1
0, // BiosCharacteristicsNotSupported :1
0, // IsaIsSupported :1
0, // McaIsSupported :1
0, // EisaIsSupported :1
1, // PciIsSupported :1
0, // PcmciaIsSupported :1
1, // PlugAndPlayIsSupported :1
0, // ApmIsSupported :1
1, // BiosIsUpgradable :1
1, // BiosShadowingAllowed :1
0, // VlVesaIsSupported :1
0, // EscdSupportIsAvailable :1
1, // BootFromCdIsSupported :1
1, // SelectableBootIsSupported :1
0, // RomBiosIsSocketed :1
0, // BootFromPcmciaIsSupported :1
0, // EDDSpecificationIsSupported :1
0, // JapaneseNecFloppyIsSupported :1
0, // JapaneseToshibaFloppyIsSupported :1
0, // Floppy525_360IsSupported :1
0, // Floppy525_12IsSupported :1
0, // Floppy35_720IsSupported :1
0, // Floppy35_288IsSupported :1
0, // PrintScreenIsSupported :1
0, // Keyboard8042IsSupported :1
0, // SerialIsSupported :1
0, // PrinterIsSupported :1
0, // CgaMonoIsSupported :1
0, // NecPc98 :1
0 // ReservedForVendor :32
},
{
0x01, // BIOSCharacteristicsExtensionBytes[0]
// { // BiosReserved
// 1, // AcpiIsSupported :1
// 0, // UsbLegacyIsSupported :1
// 0, // AgpIsSupported :1
// 0, // I20BootIsSupported :1
// 0, // Ls120BootIsSupported :1
// 0, // AtapiZipDriveBootIsSupported :1
// 0, // Boot1394IsSupported :1
// 0 // SmartBatteryIsSupported :1
// },
0x0C //BIOSCharacteristicsExtensionBytes[1]
// { //SystemReserved
// 0, //BiosBootSpecIsSupported :1
// 0, //FunctionKeyNetworkBootIsSupported :1
// 1, //TargetContentDistributionEnabled :1
// 1, //UefiSpecificationSupported :1
// 0, //VirtualMachineSupported :1
// 0 //ExtensionByte2Reserved :3
// },
},
0xFF, // SystemBiosMajorRelease;
0xFF, // SystemBiosMinorRelease;
0xFF, // EmbeddedControllerFirmwareMajorRelease;
0xFF // EmbeddedControllerFirmwareMinorRelease;
};

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@@ -0,0 +1,296 @@
/** @file
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
typedef struct {
CONST CHAR8* MonthStr;
UINT32 MonthInt;
} MONTH_DESCRIPTION;
STATIC CONST
MONTH_DESCRIPTION mMonthDescription[] = {
{ "Jan", 1 },
{ "Feb", 2 },
{ "Mar", 3 },
{ "Apr", 4 },
{ "May", 5 },
{ "Jun", 6 },
{ "Jul", 7 },
{ "Aug", 8 },
{ "Sep", 9 },
{ "Oct", 10 },
{ "Nov", 11 },
{ "Dec", 12 },
{ "???", 1 }, // Use 1 as default month
};
/**
Field Filling Function. Transform an EFI_EXP_BASE2_DATA to a byte, with '64k'
as the unit.
@param Value Pointer to Base2_Data
@retval
**/
UINT8
Base2ToByteWith64KUnit (
IN UINTN Value
)
{
UINT8 Size;
Size = ((Value + (SIZE_64KB - 1)) >> 16);
return Size;
}
/**
Returns the date and time this file (and firmware) was built.
@param[out] *Time Pointer to the EFI_TIME structure to fill in.
**/
VOID
GetReleaseTime (
OUT EFI_TIME *Time
)
{
CONST CHAR8 *ReleaseDate = __DATE__;
CONST CHAR8 *ReleaseTime = __TIME__;
UINTN i;
for (i = 0; i < 12; i++) {
if (AsciiStrnCmp (ReleaseDate, mMonthDescription[i].MonthStr, 3) == 0) {
break;
}
}
Time->Month = mMonthDescription[i].MonthInt;
Time->Day = AsciiStrDecimalToUintn (ReleaseDate + 4);
Time->Year = AsciiStrDecimalToUintn (ReleaseDate + 7);
Time->Hour = AsciiStrDecimalToUintn (ReleaseTime);
Time->Minute = AsciiStrDecimalToUintn (ReleaseTime + 3);
Time->Second = AsciiStrDecimalToUintn (ReleaseTime + 6);
}
/**
Fetches the firmware ('BIOS') release date from the
FirmwareVersionInfo HOB.
@return The release date as a UTF-16 string
**/
CHAR16 *
GetBiosReleaseDate (
VOID
)
{
CHAR16 *ReleaseDate;
EFI_TIME BuildTime;
ReleaseDate = AllocateZeroPool ((sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH);
if (ReleaseDate == NULL) {
return NULL;
}
GetReleaseTime (&BuildTime);
(VOID)UnicodeSPrintAsciiFormat (ReleaseDate,
(sizeof (CHAR16)) * SMBIOS_STRING_MAX_LENGTH,
"%02d/%02d/%4d",
BuildTime.Month,
BuildTime.Day,
BuildTime.Year
);
return ReleaseDate;
}
/**
Fetches the firmware ('BIOS') version from the
FirmwareVersionInfo HOB.
@return The version as a UTF-16 string
**/
CHAR16 *
GetBiosVersion (
VOID
)
{
CHAR16 *ReleaseString;
ReleaseString = (CHAR16 *)FixedPcdGetPtr (PcdFirmwareVersionString);
return ReleaseString;
}
/**
This function makes boot time changes to the contents of the
MiscBiosVendor (Type 0) record.
@param RecordData Pointer to SMBIOS table with default values.
@param Smbios SMBIOS protocol.
@retval EFI_SUCCESS The SMBIOS table was successfully added.
@retval EFI_INVALID_PARAMETER Invalid parameter was found.
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor)
{
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN VendorStrLen;
UINTN VerStrLen;
UINTN DateStrLen;
UINTN BiosPhysicalSize;
CHAR16 *Vendor;
CHAR16 *Version;
CHAR16 *ReleaseDate;
CHAR16 *Char16String;
EFI_STATUS Status;
EFI_STRING_ID TokenToUpdate;
EFI_STRING_ID TokenToGet;
SMBIOS_TABLE_TYPE0 *SmbiosRecord;
SMBIOS_TABLE_TYPE0 *InputData;
//
// First check for invalid parameters.
//
if (RecordData == NULL) {
return EFI_INVALID_PARAMETER;
}
InputData = (SMBIOS_TABLE_TYPE0 *)RecordData;
Vendor = (CHAR16 *) PcdGetPtr (PcdFirmwareVendor);
if (StrLen (Vendor) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VENDOR);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Vendor, NULL);
}
Version = GetBiosVersion();
if (StrLen (Version) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
} else {
Version = (CHAR16 *) PcdGetPtr (PcdFirmwareVersionString);
if (StrLen (Version) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
}
}
Char16String = GetBiosReleaseDate ();
if (StrLen(Char16String) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Char16String, NULL);
}
TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VENDOR);
Vendor = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
VendorStrLen = StrLen (Vendor);
TokenToGet = STRING_TOKEN (STR_MISC_BIOS_VERSION);
Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
VerStrLen = StrLen (Version);
TokenToGet = STRING_TOKEN (STR_MISC_BIOS_RELEASE_DATE);
ReleaseDate = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
DateStrLen = StrLen (ReleaseDate);
//
// Now update the BiosPhysicalSize
//
BiosPhysicalSize = FixedPcdGet32 (PcdFdSize);
//
// Two zeros following the last string.
//
SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE0) + VendorStrLen + 1 +
VerStrLen + 1 +
DateStrLen + 1 + 1);
if (SmbiosRecord == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
(VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE0));
SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE0);
SmbiosRecord->BiosSegment = (UINT16)(FixedPcdGet32 (PcdFdBaseAddress) / SIZE_64KB);
if (BiosPhysicalSize < SIZE_16MB) {
SmbiosRecord->BiosSize = Base2ToByteWith64KUnit (BiosPhysicalSize) - 1;
SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1MB;
SmbiosRecord->ExtendedBiosSize.Unit = 0; // Size is in MB
} else {
SmbiosRecord->BiosSize = 0xFF;
if (BiosPhysicalSize > 0x3FFF) {
SmbiosRecord->ExtendedBiosSize.Size = BiosPhysicalSize / SIZE_1GB;
SmbiosRecord->ExtendedBiosSize.Unit = 1; // Size is in GB
}
}
SmbiosRecord->SystemBiosMajorRelease = (UINT8) (PcdGet16 (PcdSystemBiosRelease) >> 8);
SmbiosRecord->SystemBiosMinorRelease = (UINT8) (PcdGet16 (PcdSystemBiosRelease) & 0xFF);
SmbiosRecord->EmbeddedControllerFirmwareMajorRelease = (UINT16)
(PcdGet16 (PcdEmbeddedControllerFirmwareRelease) >> 8);
SmbiosRecord->EmbeddedControllerFirmwareMinorRelease = (UINT16)
(PcdGet16 (PcdEmbeddedControllerFirmwareRelease) & 0xFF);
OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
UnicodeStrToAsciiStrS (Vendor, OptionalStrStart, VendorStrLen + 1);
StrStart = OptionalStrStart + VendorStrLen + 1;
UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
StrStart += VerStrLen + 1;
UnicodeStrToAsciiStrS (ReleaseDate, StrStart, DateStrLen + 1);
//
// Now we have got the full smbios record, call smbios protocol to add this record.
//
Status = SmbiosMiscAddRecord ((UINT8*)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type00 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (SmbiosRecord);
Exit:
if (Vendor != NULL) {
FreePool (Vendor);
}
if (Version != NULL) {
FreePool (Version);
}
if (ReleaseDate != NULL) {
FreePool (ReleaseDate);
}
if (Char16String != NULL) {
FreePool (Char16String);
}
return Status;
}

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@@ -0,0 +1,20 @@
/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
#string STR_MISC_SYSTEM_MANUFACTURER #language en-US "Not Specified"
#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified"
#string STR_MISC_SYSTEM_PRODUCT_NAME #language en-US "Not Specified"
#string STR_MISC_SYSTEM_VERSION #language en-US "Not Specified"
#string STR_MISC_SYSTEM_SERIAL_NUMBER #language en-US "Not Specified"
#string STR_MISC_SYSTEM_SKU_NUMBER #language en-US "Not Specified"
#string STR_MISC_SYSTEM_FAMILY #language en-US "Not Specified"

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@@ -0,0 +1,36 @@
/** @file
This file provides Smbios Type1 Data
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) System Manufacturer data.
//
SMBIOS_MISC_TABLE_DATA(SMBIOS_TABLE_TYPE1, MiscSystemManufacturer) = {
{ // Hdr
EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, // Type,
0, // Length,
0 // Handle
},
1, // Manufacturer
2, // ProductName
3, // Version
4, // SerialNumber
{ // Uuid
0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
SystemWakeupTypePowerSwitch, // SystemWakeupType
5, // SKUNumber,
6 // Family
};

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/** @file
This driver parses the mMiscSubclassDataTable structure and reports
any generated data to smbios.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
/**
This function makes boot time changes to the contents of the
MiscSystemManufacturer (Type 1) record.
@param RecordData Pointer to SMBIOS table with default values.
@param Smbios SMBIOS protocol.
@retval EFI_SUCCESS The SMBIOS table was successfully added.
@retval EFI_INVALID_PARAMETER Invalid parameter was found.
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscSystemManufacturer)
{
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN ManuStrLen;
UINTN VerStrLen;
UINTN PdNameStrLen;
UINTN SerialNumStrLen;
UINTN SKUNumStrLen;
UINTN FamilyStrLen;
UINTN RecordLength;
EFI_STRING Manufacturer;
EFI_STRING ProductName;
EFI_STRING Version;
EFI_STRING SerialNumber;
EFI_STRING SKUNumber;
EFI_STRING Family;
EFI_STRING_ID TokenToGet;
SMBIOS_TABLE_TYPE1 *SmbiosRecord;
SMBIOS_TABLE_TYPE1 *InputData;
EFI_STATUS Status;
EFI_STRING_ID TokenToUpdate;
CHAR16 *Product;
CHAR16 *pVersion;
Status = EFI_SUCCESS;
//
// First check for invalid parameters.
//
if (RecordData == NULL) {
return EFI_INVALID_PARAMETER;
}
InputData = (SMBIOS_TABLE_TYPE1 *)RecordData;
Product = (CHAR16 *) PcdGetPtr (PcdSystemProductName);
if (StrLen (Product) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Product, NULL);
}
pVersion = (CHAR16 *) PcdGetPtr (PcdSystemVersion);
if (StrLen (pVersion) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, pVersion, NULL);
}
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER),
SerialNumType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER),
SystemManufacturerType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER),
SkuNumberType01);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_SYSTEM_FAMILY),
FamilyType01);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_MANUFACTURER);
Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ManuStrLen = StrLen (Manufacturer);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_PRODUCT_NAME);
ProductName = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
PdNameStrLen = StrLen (ProductName);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_VERSION);
Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
VerStrLen = StrLen (Version);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SERIAL_NUMBER);
SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
SerialNumStrLen = StrLen (SerialNumber);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_SKU_NUMBER);
SKUNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
SKUNumStrLen = StrLen (SKUNumber);
TokenToGet = STRING_TOKEN (STR_MISC_SYSTEM_FAMILY);
Family = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
FamilyStrLen = StrLen (Family);
//
// Two zeros following the last string.
//
RecordLength = sizeof (SMBIOS_TABLE_TYPE1) +
ManuStrLen + 1 +
PdNameStrLen + 1 +
VerStrLen + 1 +
SerialNumStrLen + 1 +
SKUNumStrLen + 1 +
FamilyStrLen + 1 + 1;
SmbiosRecord = AllocateZeroPool (RecordLength);
if (SmbiosRecord == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
(VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE1));
SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE1);
CopyGuid(&SmbiosRecord->Uuid, &InputData->Uuid);
OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen + 1);
StrStart = OptionalStrStart + ManuStrLen + 1;
UnicodeStrToAsciiStrS (ProductName, StrStart, PdNameStrLen + 1);
StrStart += PdNameStrLen + 1;
UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
StrStart += VerStrLen + 1;
UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
StrStart += SerialNumStrLen + 1;
UnicodeStrToAsciiStrS (SKUNumber, StrStart, SKUNumStrLen + 1);
StrStart += SKUNumStrLen + 1;
UnicodeStrToAsciiStrS (Family, StrStart, FamilyStrLen + 1);
//
// Now we have got the full smbios record, call smbios protocol to add this record.
//
Status = SmbiosMiscAddRecord ((UINT8*)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type01 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (SmbiosRecord);
Exit:
if (Manufacturer != NULL) {
FreePool (Manufacturer);
}
if (ProductName != NULL) {
FreePool (ProductName);
}
if (Version != NULL) {
FreePool (Version);
}
if (SerialNumber != NULL) {
FreePool (SerialNumber);
}
if (SKUNumber != NULL) {
FreePool (SKUNumber);
}
if (Family != NULL) {
FreePool (Family);
}
return Status;
}

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@@ -0,0 +1,20 @@
/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
#string STR_MISC_BASE_BOARD_MANUFACTURER #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_PRODUCT_NAME #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_VERSION #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_SERIAL_NUMBER #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_ASSET_TAG #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_CHASSIS_LOCATION #language en-US "Not Specified"
#string STR_MISC_BASE_BOARD_SKU_NUMBER #language en-US "Not Specified"

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@@ -0,0 +1,46 @@
/** @file
This file provide OEM to define Smbios Type2 Data
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Chassis Manufacturer data.
//
SMBIOS_MISC_TABLE_DATA(SMBIOS_TABLE_TYPE2, MiscBaseBoardManufacturer) = {
{ // Hdr
EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // Type,
0, // Length,
0 // Handle
},
1, // BaseBoardManufacturer
2, // BaseBoardProductName
3, // BaseBoardVersion
4, // BaseBoardSerialNumber
5, // BaseBoardAssetTag
{ // FeatureFlag
1, // Motherboard :1
0, // RequiresDaughterCard :1
0, // Removable :1
1, // Replaceable :1
0, // HotSwappable :1
0 // Reserved :3
},
6, // BaseBoardChassisLocation
0, // ChassisHandle;
BaseBoardTypeMotherBoard, // BoardType;
0, // NumberOfContainedObjectHandles;
{
0
} // ContainedObjectHandles[1];
};

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/** @file
This driver parses the mSmbiosMiscDataTable structure and reports
any generated data using SMBIOS protocol.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
/**
This function makes boot time changes to the contents of the
MiscBaseBoardManufacturer (Type 2) record.
@param RecordData Pointer to SMBIOS table with default values.
@param Smbios SMBIOS protocol.
@retval EFI_SUCCESS The SMBIOS table was successfully added.
@retval EFI_INVALID_PARAMETER Invalid parameter was found.
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscBaseBoardManufacturer)
{
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN RecordLength;
UINTN ManuStrLen;
UINTN ProductNameStrLen;
UINTN VerStrLen;
UINTN SerialNumStrLen;
UINTN AssetTagStrLen;
UINTN ChassisLocaStrLen;
UINTN HandleCount;
UINT16 *HandleArray;
CHAR16 *BaseBoardManufacturer;
CHAR16 *BaseBoardProductName;
CHAR16 *Version;
EFI_STRING SerialNumber;
EFI_STRING AssetTag;
EFI_STRING ChassisLocation;
EFI_STRING_ID TokenToGet;
SMBIOS_TABLE_TYPE2 *SmbiosRecord;
SMBIOS_TABLE_TYPE2 *InputData;
EFI_STATUS Status;
EFI_STRING_ID TokenToUpdate;
HandleCount = 0;
HandleArray = NULL;
InputData = NULL;
//
// First check for invalid parameters.
//
if (RecordData == NULL) {
return EFI_INVALID_PARAMETER;
}
InputData = (SMBIOS_TABLE_TYPE2*)RecordData;
BaseBoardManufacturer = (CHAR16 *) PcdGetPtr (PcdBaseBoardManufacturer);
if (StrLen (BaseBoardManufacturer) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, BaseBoardManufacturer, NULL);
}
BaseBoardProductName = (CHAR16 *) PcdGetPtr (PcdBaseBoardProductName);
if (StrLen (BaseBoardProductName) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, BaseBoardProductName, NULL);
}
Version = (CHAR16 *) PcdGetPtr (PcdBaseBoardVersion);
if (StrLen (Version) > 0) {
TokenToUpdate = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION);
HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
}
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG),
AssertTagType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER),
BoardManufacturerType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_SKU_NUMBER),
SerialNumberType02
);
OemUpdateSmbiosInfo (mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_BASE_BOARD_CHASSIS_LOCATION),
ChassisLocationType02
);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_MANUFACTURER);
BaseBoardManufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ManuStrLen = StrLen (BaseBoardManufacturer);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_PRODUCT_NAME);
BaseBoardProductName = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ProductNameStrLen = StrLen (BaseBoardProductName);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_VERSION);
Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
VerStrLen = StrLen (Version);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_SERIAL_NUMBER);
SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
SerialNumStrLen = StrLen (SerialNumber);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_ASSET_TAG);
AssetTag = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
AssetTagStrLen = StrLen (AssetTag);
TokenToGet = STRING_TOKEN (STR_MISC_BASE_BOARD_CHASSIS_LOCATION);
ChassisLocation = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ChassisLocaStrLen = StrLen (ChassisLocation);
//
// Two zeros following the last string.
//
RecordLength = sizeof (SMBIOS_TABLE_TYPE2) +
ManuStrLen + 1 +
ProductNameStrLen + 1 +
VerStrLen + 1 +
SerialNumStrLen + 1 +
AssetTagStrLen + 1 +
ChassisLocaStrLen + 1 + 1;
SmbiosRecord = AllocateZeroPool (RecordLength);
if (SmbiosRecord == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
(VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE2));
SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE2);
//
// Update Contained objects Handle
//
SmbiosRecord->NumberOfContainedObjectHandles = 0;
SmbiosMiscGetLinkTypeHandle (EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, &HandleArray,
&HandleCount);
// It's assumed there's at most a single chassis
ASSERT (HandleCount < 2);
if (HandleCount > 0) {
SmbiosRecord->ChassisHandle = HandleArray[0];
}
FreePool (HandleArray);
OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
UnicodeStrToAsciiStrS (BaseBoardManufacturer, OptionalStrStart, ManuStrLen + 1);
StrStart = OptionalStrStart + ManuStrLen + 1;
UnicodeStrToAsciiStrS (BaseBoardProductName, StrStart, ProductNameStrLen + 1);
StrStart += ProductNameStrLen + 1;
UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
StrStart += VerStrLen + 1;
UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
StrStart += SerialNumStrLen + 1;
UnicodeStrToAsciiStrS (AssetTag, StrStart, AssetTagStrLen + 1);
StrStart += AssetTagStrLen + 1;
UnicodeStrToAsciiStrS (ChassisLocation, StrStart, ChassisLocaStrLen + 1);
Status = SmbiosMiscAddRecord ((UINT8 *)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type02 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (SmbiosRecord);
Exit:
if (BaseBoardManufacturer != NULL) {
FreePool (BaseBoardManufacturer);
}
if (BaseBoardProductName != NULL) {
FreePool (BaseBoardProductName);
}
if (Version != NULL) {
FreePool (Version);
}
if (SerialNumber != NULL) {
FreePool (SerialNumber);
}
if (AssetTag != NULL) {
FreePool (AssetTag);
}
if (ChassisLocation != NULL) {
FreePool (ChassisLocation);
}
return 0;
}

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/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
#string STR_MISC_CHASSIS_MANUFACTURER #language en-US "Not Specified"
#string STR_MISC_CHASSIS_VERSION #language en-US "Not Specified"
#string STR_MISC_CHASSIS_SERIAL_NUMBER #language en-US "Not Specified"
#string STR_MISC_CHASSIS_ASSET_TAG #language en-US "Not Specified"
#string STR_MISC_CHASSIS_SKU_NUMBER #language en-US "Not Specified"

View File

@@ -0,0 +1,52 @@
/** @file
This file provides Smbios Type3 Data
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Chassis Manufacturer data.
//
SMBIOS_MISC_TABLE_DATA(SMBIOS_TABLE_TYPE3, MiscChassisManufacturer) = {
{ // Hdr
EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // Type,
0, // Length,
0 // Handle
},
1, // Manufactrurer
MiscChassisTypeMainServerChassis, // Type
2, // Version
3, // SerialNumber
4, // AssetTag
ChassisStateSafe, // BootupState
ChassisStateSafe, // PowerSupplyState
ChassisStateSafe, // ThermalState
ChassisSecurityStatusNone, // SecurityState
{
0, // OemDefined[0]
0, // OemDefined[1]
0, // OemDefined[2]
0 // OemDefined[3]
},
2, // Height
1, // NumberofPowerCords
0, // ContainedElementCount
0, // ContainedElementRecordLength
{ // ContainedElements[0]
{
0, // ContainedElementType
0, // ContainedElementMinimum
0 // ContainedElementMaximum
}
}
};

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@@ -0,0 +1,198 @@
/** @file
This driver parses the mMiscSubclassDataTable structure and reports
any generated data to smbios.
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
/**
This function makes boot time changes to the contents of the
MiscChassisManufacturer (Type 3) record.
@param RecordData Pointer to SMBIOS table with default values.
@param Smbios SMBIOS protocol.
@retval EFI_SUCCESS The SMBIOS table was successfully added.
@retval EFI_INVALID_PARAMETER Invalid parameter was found.
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscChassisManufacturer)
{
CHAR8 *OptionalStrStart;
CHAR8 *StrStart;
UINTN RecordLength;
UINTN ManuStrLen;
UINTN VerStrLen;
UINTN AssertTagStrLen;
UINTN SerialNumStrLen;
UINTN ChaNumStrLen;
EFI_STRING Manufacturer;
EFI_STRING Version;
EFI_STRING SerialNumber;
EFI_STRING AssertTag;
EFI_STRING ChassisSkuNumber;
EFI_STRING_ID TokenToGet;
SMBIOS_TABLE_TYPE3 *SmbiosRecord;
SMBIOS_TABLE_TYPE3 *InputData;
EFI_STATUS Status;
UINT8 ContainedElementCount;
CONTAINED_ELEMENT ContainedElements;
UINT8 ExtendLength;
ExtendLength = 0;
//
// First check for invalid parameters.
//
if (RecordData == NULL) {
return EFI_INVALID_PARAMETER;
}
InputData = (SMBIOS_TABLE_TYPE3 *)RecordData;
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG),
AssetTagType03
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER),
SerialNumberType03
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_CHASSIS_VERSION),
VersionType03
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER),
ManufacturerType03
);
OemUpdateSmbiosInfo (
mSmbiosMiscHiiHandle,
STRING_TOKEN (STR_MISC_CHASSIS_SKU_NUMBER),
SkuNumberType03
);
TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_MANUFACTURER);
Manufacturer = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ManuStrLen = StrLen (Manufacturer);
TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_VERSION);
Version = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
VerStrLen = StrLen (Version);
TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SERIAL_NUMBER);
SerialNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
SerialNumStrLen = StrLen (SerialNumber);
TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_ASSET_TAG);
AssertTag = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
AssertTagStrLen = StrLen (AssertTag);
TokenToGet = STRING_TOKEN (STR_MISC_CHASSIS_SKU_NUMBER);
ChassisSkuNumber = HiiGetPackageString (&gEfiCallerIdGuid, TokenToGet, NULL);
ChaNumStrLen = StrLen (ChassisSkuNumber);
ContainedElementCount = InputData->ContainedElementCount;
if (ContainedElementCount > 1) {
ExtendLength = (ContainedElementCount - 1) * sizeof (CONTAINED_ELEMENT);
}
//
// Two zeros following the last string.
//
RecordLength = sizeof (SMBIOS_TABLE_TYPE3) +
ExtendLength + 1 +
ManuStrLen + 1 +
VerStrLen + 1 +
SerialNumStrLen + 1 +
AssertTagStrLen + 1 +
ChaNumStrLen + 1 + 1;
SmbiosRecord = AllocateZeroPool (RecordLength);
if (SmbiosRecord == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto Exit;
}
(VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE3));
SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength + 1;
SmbiosRecord->Type = OemGetChassisType ();
//ContainedElements
ASSERT (ContainedElementCount < 2);
(VOID)CopyMem (SmbiosRecord + 1, &ContainedElements, ExtendLength);
//ChassisSkuNumber
*((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) + ExtendLength) = 5;
OptionalStrStart = (CHAR8 *)((UINT8 *)SmbiosRecord + sizeof (SMBIOS_TABLE_TYPE3) +
ExtendLength + 1);
UnicodeStrToAsciiStrS (Manufacturer, OptionalStrStart, ManuStrLen + 1);
StrStart = OptionalStrStart + ManuStrLen + 1;
UnicodeStrToAsciiStrS (Version, StrStart, VerStrLen + 1);
StrStart += VerStrLen + 1;
UnicodeStrToAsciiStrS (SerialNumber, StrStart, SerialNumStrLen + 1);
StrStart += SerialNumStrLen + 1;
UnicodeStrToAsciiStrS (AssertTag, StrStart, AssertTagStrLen + 1);
StrStart += AssertTagStrLen + 1;
UnicodeStrToAsciiStrS (ChassisSkuNumber, StrStart, ChaNumStrLen + 1);
//
// Now we have got the full smbios record, call smbios protocol to add this record.
//
Status = SmbiosMiscAddRecord ((UINT8*)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type03 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (SmbiosRecord);
Exit:
if (Manufacturer != NULL) {
FreePool (Manufacturer);
}
if (Version != NULL) {
FreePool (Version);
}
if (SerialNumber != NULL) {
FreePool (SerialNumber);
}
if (AssertTag != NULL) {
FreePool (AssertTag);
}
if (ChassisSkuNumber != NULL) {
FreePool (ChassisSkuNumber);
}
return 0;
}

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@@ -0,0 +1,43 @@
/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
/=#
/=#
//
// Language String (Long Format)
//
#string STR_MISC_BIOS_LANGUAGES_ENG_LONG #language en-US "en|US|iso8859-1"
#string STR_MISC_BIOS_LANGUAGES_FRA_LONG #language en-US "fr|CA|iso8859-1"
#string STR_MISC_BIOS_LANGUAGES_CHN_LONG #language en-US "zh|TW|unicode"
#string STR_MISC_BIOS_LANGUAGES_JPN_LONG #language en-US "ja|JP|unicode"
#string STR_MISC_BIOS_LANGUAGES_ITA_LONG #language en-US "it|IT|iso8859-1"
#string STR_MISC_BIOS_LANGUAGES_SPA_LONG #language en-US "es|ES|iso8859-1"
#string STR_MISC_BIOS_LANGUAGES_GER_LONG #language en-US "de|DE|iso8859-1"
#string STR_MISC_BIOS_LANGUAGES_POR_LONG #language en-US "pt|PT|iso8859-1"
//
// Language String (Abbreviated Format)
//
#string STR_MISC_BIOS_LANGUAGES_ENG_ABBREVIATE #language en-US "enUS"
#string STR_MISC_BIOS_LANGUAGES_FRA_ABBREVIATE #language en-US "frCA"
#string STR_MISC_BIOS_LANGUAGES_CHN_ABBREVIATE #language en-US "zhTW"
#string STR_MISC_BIOS_LANGUAGES_JPN_ABBREVIATE #language en-US "jaJP"
#string STR_MISC_BIOS_LANGUAGES_ITA_ABBREVIATE #language en-US "itIT"
#string STR_MISC_BIOS_LANGUAGES_SPA_ABBREVIATE #language en-US "esES"
#string STR_MISC_BIOS_LANGUAGES_GER_ABBREVIATE #language en-US "deDE"
#string STR_MISC_BIOS_LANGUAGES_POR_ABBREVIATE #language en-US "ptPT"
#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_ABBREVIATE #language en-US "zhCN"
#string STR_MISC_BIOS_LANGUAGES_SIMPLECH_LONG #language en-US "zh|CN|unicode"

View File

@@ -0,0 +1,33 @@
/** @file
This file provides Smbios Type13 Data
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "SmbiosMisc.h"
//
// Static (possibly build generated) Bios Vendor data.
//
SMBIOS_MISC_TABLE_DATA(SMBIOS_TABLE_TYPE13, MiscNumberOfInstallableLanguages) =
{
{ // Hdr
EFI_SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION, // Type,
0, // Length,
0 // Handle
},
0, // InstallableLanguages
0, // Flags
{
0 // Reserved[15]
},
1 // CurrentLanguage
};

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@@ -0,0 +1,166 @@
/** @file
Based on files under Nt32Pkg/MiscSubClassPlatformDxe/
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include "SmbiosMisc.h"
/**
Get next language from language code list (with separator ';').
@param LangCode Input: point to first language in the list. On
Otput: point to next language in the list, or
NULL if no more language in the list.
@param Lang The first language in the list.
**/
VOID
EFIAPI
GetNextLanguage (
IN OUT CHAR8 **LangCode,
OUT CHAR8 *Lang
)
{
UINTN Index;
CHAR8 *StringPtr;
if (LangCode == NULL || *LangCode == NULL || Lang == NULL) {
return;
}
Index = 0;
StringPtr = *LangCode;
while (StringPtr[Index] != 0 && StringPtr[Index] != ';') {
Index++;
}
(VOID)CopyMem (Lang, StringPtr, Index);
Lang[Index] = 0;
if (StringPtr[Index] == ';') {
Index++;
}
*LangCode = StringPtr + Index;
}
/**
This function returns the number of supported languages on HiiHandle.
@param HiiHandle The HII package list handle.
@retval The number of supported languages.
**/
UINT16
EFIAPI
GetSupportedLanguageNumber (
IN EFI_HII_HANDLE HiiHandle
)
{
CHAR8 *Lang;
CHAR8 *Languages;
CHAR8 *LanguageString;
UINT16 LangNumber;
Languages = HiiGetSupportedLanguages (HiiHandle);
if (Languages == NULL) {
return 0;
}
LangNumber = 0;
Lang = AllocatePool (AsciiStrSize (Languages));
if (Lang != NULL) {
LanguageString = Languages;
while (*LanguageString != 0) {
GetNextLanguage (&LanguageString, Lang);
LangNumber++;
}
FreePool (Lang);
}
FreePool (Languages);
return LangNumber;
}
/**
This function makes boot time changes to the contents of the
MiscNumberOfInstallableLanguages (Type 13) record.
@param RecordData Pointer to SMBIOS table with default values.
@param Smbios SMBIOS protocol.
@retval EFI_SUCCESS The SMBIOS table was successfully added.
@retval EFI_INVALID_PARAMETER Invalid parameter was found.
@retval EFI_OUT_OF_RESOURCES Failed to allocate required memory.
**/
SMBIOS_MISC_TABLE_FUNCTION(MiscNumberOfInstallableLanguages)
{
UINTN LangStrLen;
CHAR8 CurrentLang[SMBIOS_STRING_MAX_LENGTH + 1];
CHAR8 *OptionalStrStart;
EFI_STATUS Status;
SMBIOS_TABLE_TYPE13 *SmbiosRecord;
SMBIOS_TABLE_TYPE13 *InputData;
InputData = NULL;
//
// First check for invalid parameters.
//
if (RecordData == NULL) {
return EFI_INVALID_PARAMETER;
}
InputData = (SMBIOS_TABLE_TYPE13 *)RecordData;
InputData->InstallableLanguages = GetSupportedLanguageNumber (mSmbiosMiscHiiHandle);
//
// Try to check if current langcode matches with the langcodes in installed languages
//
ZeroMem (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1);
(VOID)AsciiStrCpyS (CurrentLang, SMBIOS_STRING_MAX_LENGTH - 1, "en|US|iso8859-1");
LangStrLen = AsciiStrLen (CurrentLang);
//
// Two zeros following the last string.
//
SmbiosRecord = AllocateZeroPool (sizeof (SMBIOS_TABLE_TYPE13) + LangStrLen + 1 + 1);
if (SmbiosRecord == NULL) {
return EFI_OUT_OF_RESOURCES;
}
(VOID)CopyMem (SmbiosRecord, InputData, sizeof (SMBIOS_TABLE_TYPE13));
SmbiosRecord->Hdr.Length = sizeof (SMBIOS_TABLE_TYPE13);
OptionalStrStart = (CHAR8 *)(SmbiosRecord + 1);
(VOID)AsciiStrCpyS (OptionalStrStart, SMBIOS_STRING_MAX_LENGTH - 1, CurrentLang);
//
// Now we have got the full smbios record, call smbios protocol to add this record.
//
Status = SmbiosMiscAddRecord ((UINT8*)SmbiosRecord, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Smbios Type13 Table Log Failed! %r \n",
__FUNCTION__, __LINE__, Status));
}
FreePool (SmbiosRecord);
return Status;
}

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