Compare commits

..

82 Commits

Author SHA1 Message Date
Jeremy Soller
a3c4616449 Fix compilation on impish 2021-09-09 11:51:27 -06:00
Bob Feng
e0e9606523 BaseTools: Fix the issue caused by tostring() removal on Py39
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3136

Python 3.9 remove the array.array.tostring and
array.array.fromstring() function. This patch
is to use other method to replace tostring() and
fromstring()

Signed-off-by: Bob Feng <bob.c.feng@intel.com>

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Mingyue Liang <mingyuex.liang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-05-12 11:10:32 -06:00
Cole Robinson
38519af0dc BaseTools: Work around array.array.tostring() removal in python 3.9
In python3, array.array.tostring() was a compat alias for tobytes().
tostring() was removed in python 3.9.

Convert this to use tolist() which should be valid for all python
versions.

This fixes this build error on python3.9:

(Python 3.9.0b5 on linux) Traceback (most recent call last):
  File "/root/edk2/edk2-edk2-stable202002/BaseTools/BinWrappers/PosixLike/../../Source/Python/Trim/Trim.py", line 593, in Main
    GenerateVfrBinSec(CommandOptions.ModuleName, CommandOptions.DebugDir, CommandOptions.OutputFile)
  File "/root/edk2/edk2-edk2-stable202002/BaseTools/BinWrappers/PosixLike/../../Source/Python/Trim/Trim.py", line 449, in GenerateVfrBinSec
    VfrUniOffsetList = GetVariableOffset(MapFileName, EfiFileName, VfrNameList)
  File "/root/edk2/edk2-edk2-stable202002/BaseTools/Source/Python/Common/Misc.py", line 88, in GetVariableOffset
    return _parseForGCC(lines, efifilepath, varnames)
  File "/root/edk2/edk2-edk2-stable202002/BaseTools/Source/Python/Common/Misc.py", line 151, in _parseForGCC
    efisecs = PeImageClass(efifilepath).SectionHeaderList
  File "/root/edk2/edk2-edk2-stable202002/BaseTools/Source/Python/Common/Misc.py", line 1638, in __init__
    if ByteArray.tostring() != b'PE\0\0':
AttributeError: 'array.array' object has no attribute 'tostring'

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2021-05-12 11:10:32 -06:00
Cole Robinson
0ab8646c67 BaseTools: fix ucs-2 lookup on python 3.9
python3.9 changed/fixed codec.register behavior to always replace
hyphen with underscore for passed in codec names:

  https://bugs.python.org/issue37751

So the custom Ucs2Search needs to be adapted to handle 'ucs_2' in
addition to existing 'ucs-2' for back compat.

This fixes test failures on python3.9, example:

======================================================================
FAIL: testUtf16InUniFile (CheckUnicodeSourceFiles.Tests)
----------------------------------------------------------------------
Traceback (most recent call last):
  File "/builddir/build/BUILD/edk2-edk2-stable202002/BaseTools/Source/Python/AutoGen/UniClassObject.py", line 375, in PreProcess
    FileIn = UniFileClassObject.OpenUniFile(LongFilePath(File.Path))
  File "/builddir/build/BUILD/edk2-edk2-stable202002/BaseTools/Source/Python/AutoGen/UniClassObject.py", line 303, in OpenUniFile
    UniFileClassObject.VerifyUcs2Data(FileIn, FileName, Encoding)
  File "/builddir/build/BUILD/edk2-edk2-stable202002/BaseTools/Source/Python/AutoGen/UniClassObject.py", line 312, in VerifyUcs2Data
    Ucs2Info = codecs.lookup('ucs-2')
LookupError: unknown encoding: ucs-2

Signed-off-by: Cole Robinson <crobinso@redhat.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2021-05-12 11:10:32 -06:00
Jeremy Soller
7b5e832086 Do not store ErrOut variable 2020-12-05 15:41:18 -07:00
Tim Crawford
f81f3474b3 MdeModulePkg/UiApp: Check for CSME device on PCI bus 2020-12-03 17:38:34 -07:00
Tim Crawford
996c3c4b40 MdeModulePkg/BM: Update boot options on device change
Register an event to trigger when a block device is added or removed
that will update the list of boot options. Use a refreshguid to force
the form to display the changes if it already open.
2020-11-25 11:43:01 -07:00
Tim Crawford
386fd08814 MdeModulePkg/Core: Signal notify events on protocol removal
In order for BootManager to maintain a valid list of boot options, it
must know when the BlockIo protocol is also removed, not just added.
2020-11-25 11:43:01 -07:00
Jon Hunter
07b51d4361 MdeModulePkg/XhciDxe: Retry device slot init on failure
With some super-speed USB mass storage devices it has been observed
that a USB transaction error may occur when attempting the set the
device address during enumeration.

According the the xHCI specification (section 4.6.5) ...

"A USB Transaction ErrorCompletion Code for an Address Device Command
 may be due to a Stall response from a device. Software should issue a
 Disable Slot Commandfor the Device Slot then an Enable Slot Command
 to recover from this error."

To fix this, retry the device slot initialization if it fails due to a
device error.

Change was verified using a superspeed mass storage device that was
occasionally failing to enumerate in UEFI. With this change this failure
to enumerate was resolved. This failure was also only seen in UEFI and not
in the OS.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-11-25 11:36:42 -07:00
Luo, Heng
ea0e6d960e MdeModulePkg/XhciDxe: Error handle for USB slot initialization failure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3007

Currently UsbDevContext is not cleaned up if USB slot initialization is
failed, the wrong context data will affect next USB devices and
the USB devices can not be enumerated.
Need to disable slot if USB slot initialization is failed.

Below test cases are passed on UpXtreme:
a. USB 3.0 thumb drives can be recognized in UEFI shell
b. SUT can boot to Puppylinux  from USB3.0 mass storage,
 the storage can be recognized in linux
c. Plug in a USB  keyboard (hot plug) and enumeration is OK
 in UEFI shell and linux
d. Plug in a USB mouse(hot plug) and enumeration is OK in linux.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-11-25 11:36:42 -07:00
Tim Crawford
22744e7305 MdeModulePkg/BootManagerUiLib: Fix line endings
edk2 stores files with CRLF. This file got converted to LF.
2020-11-25 11:35:49 -07:00
Jeremy Soller
8ad6d7b14f Do not store SystemSleepCheckpoint variable 2020-11-25 11:31:48 -07:00
Patrick Rudolph
6ad3ee1be8 UefiPayloadPkg: Fix build with TPM enabled
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
37ec7ab62f UefiPayloadPkg: Fix TPM1.2 detection
Check the actual TPM1.2 command response to prevent a false positive
when talking to a TPM2.0.

Tested using a ST33TPHF TPM 2.0.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
83c68bbe1d UefiCpuPkg: Disable MTRR programming for UefiPayloadPkg
The MTRRs have already been programmed by FSB.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
599f4a4ddd UefiPayloadPkg/Library/PciHostBridgeLib: Add warning for coreboot/EDK2 incompability
EDK2 expects PCI bars to be continously be allocated without "gaps" of reserverd
memory in between.
coreboot places PCI bars anyware in the PCI MMIO space, interleaved with MMCONF
and reserved I/O MMIO space.

Warn about this behaviour and refuse to add the BAR to the PCI aperature as it would
cause the PciHostBridgeDxe fo fail.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
d90d84a4f7 UefipayloadPkg: Protect coreboot tables
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
876c1d36b3 UefiPayloadPkg: Make TerminalDxe build time configurable
As the TerminalDxe significantly slows down the boot menu rendering,
disable it but default and add the option SERIAL_TERMINAL to enabled
it for headless platforms.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
e88dc61df6 UefiPayloadPkg: Do not use made up UART defaults
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-10-19 13:34:44 -06:00
Patrick Rudolph
6a78d4f41d HACK: BmMisc: Remove S4 memory check until VariableStore is implemented
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-08-13 12:30:45 -06:00
Christian Walter
97394de0f7 UefiPayloadPkg: Add TPM2 Support in EDK2 2020-08-13 12:30:45 -06:00
Tim Crawford
995df206c3 UefiPayloadPkg: Stall before connecting devices
USB devices are not being detected when booting. Pause a bit for them to
be initialized and detected by EfiBootManagerConnectAll().
2020-08-07 14:43:12 -06:00
Jeremy Soller
fa0e9ec925 Use video control interface as evidence of webcam 2020-08-06 16:03:47 -06:00
Jeremy Soller
00e2cc7a69 Add darp5 camera 2020-08-06 16:03:47 -06:00
Jeremy Soller
975d5b02da Add even more matching models, add default interface info 2020-08-06 16:03:47 -06:00
Jeremy Soller
86d6b0ca91 Add more matching models 2020-08-06 16:03:47 -06:00
Jeremy Soller
74b3823b0c Add webcam disconnect test 2020-08-06 16:03:47 -06:00
Jeremy Soller
4f29b65fbe Use CPUID instead of control registers for virtualization test 2020-08-06 16:03:47 -06:00
Jeremy Soller
26279e8f9a Dynamically generated firmware configuration information page 2020-08-06 16:03:47 -06:00
Patrick Rudolph
d46c7763aa [HACK] Load OptionROMs immediately
This will make sure the ConsoleInit is able to connect the driver installed
by the VGA Option ROMs.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-07-24 06:47:15 -06:00
Patrick Rudolph
46521fafea UefiPayloadPkg: Scan for Option ROMs
Install the gPciPlatformProtocol to scan for Option ROMs.

For every device we probe the Option ROM and provide a pointer
to the activated BAR if found.

It's safe to assume that all ROM bars have been enumerated,
reserved in the bridge resources and are disabled by default.

Enabling them and leaving them enabled will do no harm.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-07-24 06:47:15 -06:00
Patrick Rudolph
28d4682274 MdeModulePkg: Fix OptionROM scanning
The Option ROM scanner can't work as enumeration was done by the
first stage bootloader. Running it will disable the ability of the
PCIPlatform code to scan for ROMs.

Required for the following patch that enables custom Option ROM
scanning using gPciPlatformProtocol.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-07-24 06:47:15 -06:00
Tim Crawford
168bf9514f MdeModulePkg/BMM: Unregister F9 and F10 hotkeys 2020-07-21 12:42:46 -06:00
Tim Crawford
f17c7a730c MdeModulePkg/BMM: Disable Commit/Discard buttons 2020-07-21 12:42:46 -06:00
Tim Crawford
e807bc67b6 MdeModulePkg/BMM: Save BootOrder on list update 2020-07-21 12:42:46 -06:00
Tim Crawford
de23a37ab2 MdeModulePkg/BMM: Add some debug logging 2020-07-21 12:42:46 -06:00
Jeremy Soller
e30d17a0d2 Implement SerialPortLib and PlatformHookLib with System76EcLib 2020-07-02 11:15:13 -07:00
Jeremy Soller
c6f1c4e654 Use 0x7600 as FRONT_PAGE_ID to prevent conflicts with Device Manager 2020-07-02 11:15:13 -07:00
Jeremy Soller
0e66ac75c3 Merge pull request #11 from system76/skip-console-vars
MdeModulePkg/EmuRuntimeDxe: skip console NVRAM variables
2020-06-22 15:49:31 -06:00
Matt DeVillier
e10ad1c874 MdeModulePkg/EmuRuntimeDxe: skip console NVRAM variables
Tianocore currently reads/writes a lot of NVRAM variables that
don't actually need to be saved. Occasionally some, specifically
related to the graphical/serial consoles, can become corrupted,
leading to a bricked device. To avoid this, temporarily restrict
the reading/writing of variables to skip console related ones
(starting with 'Con') until a better solution can be found.

Test: build/boot google/eve, inject "bad" NVRAM data, observe
device boots normally instead of hanging with no display detected.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2020-06-22 09:37:18 -06:00
Jeremy Soller
e3e4f6ddd5 Add EXT4 and NTFS drivers 2020-06-11 11:10:19 -06:00
Tim Crawford
e61bb9222c MdeModulePkg/BM: Initialize variable before use 2020-05-20 16:26:41 -06:00
Matt DeVillier
8222473c5d MdeModulePkg: load boot logo into BGRT table
This is a shoehorned-in implementation of an ACPI BGRT
table, ported pretty much directly from the version used
under CorebootPayloadPkg.

EDK2 provides a facility to do this already, but it assumes
the ACPI tables already exist as EFI structures, so would need
to write code to populate those using the tables already in RAM
created by coreboot. This seemed like the easier option ATM.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2020-04-27 10:34:28 -06:00
ReddestDream
d52c0b860b BlSupportPei: prevent lower coreboot table from being overwritten
Exclude the bottom 4kb from being included in System Memory HoB
2020-04-17 14:58:30 -06:00
Tim Crawford
4984cdcb36 UefiPayloadPkg: Add library for logging to EC
Make use of the SMFI command interface to forward logs from edk2 to
System76 EC.
2020-04-17 10:45:17 -06:00
Tim Crawford
331d92a8ba UefiPayloadPkg: Add PCI support from DuetPkg
Skip PCI enumeration, which is already handled by Coreboot, by using
PciBusNoEnumerationDxe and PciRootBridgeNoEnumerationDxe from the
deleted DuetPkg.
2020-04-14 09:20:45 -06:00
Tim Crawford
5bbb149f55 UefiPayloadPkg: Reduce timeout to 2s
Current firmware does not honor PcdPlatformBootTimeOut and hard-codes a
timeout of 2s.
2020-04-13 13:01:31 -06:00
Tim Crawford
f4424abfe9 UefiPayloadPkg: Use EmuRuntimeDxe 2020-04-10 08:01:33 -06:00
Jeremy Soller
9a25338c4a MdeModulePkg/EmuRuntimeDxe: Delete SMMSTORE variable by appending it with size 0 2020-04-10 08:01:33 -06:00
Jeremy Soller
3cc1bab6db MdeModulePkg/EmuRuntimeDxe: Ignore keysizes of 0 2020-04-10 08:01:33 -06:00
Patrick Rudolph
394dfa9302 MdeModulePkg/EmuRuntimeDxe: Check SMM store return codes
Check SMM store return code and return on error.

Fixes significant boot delay in case no SMM store is present.
This can happend quite often if the tianocore payload is build standalone
and patched into a coreboot ROM.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2020-04-10 08:01:33 -06:00
Matt DeVillier
e32cbe0cab WIP: MdeModulePkg/EmuRuntimeDxe: Sync data with coreboot SMMSTORE
changed: buffer size from 64k to 256k

Change-Id: I7f443b9f36612f79787e1b4b1075176a91107686
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2020-04-10 08:01:33 -06:00
Tim Crawford
5d853c79de Revert "MdeModulePkg: Remove EmuVariableRuntimeDxe"
This reverts commit 4a7aa8d34a.
2020-04-10 08:01:33 -06:00
Tim Crawford
71ce340b44 MdeModulePkg/UefiBootManager: Remove serial number from description 2020-04-10 08:01:33 -06:00
Tim Crawford
67c4655bea MdeModulePkg/UefiBootManager: Remove 'UEFI' description prefix 2020-04-10 08:01:33 -06:00
Tim Crawford
ecaa4a790a MdeModulePkg/UefiBootManager: Skip non-EFI devices 2020-04-10 08:01:33 -06:00
Tim Crawford
40b9ce83bf MdeModulePkg/UiApp: Add warning if no bootable options found 2020-04-10 08:01:33 -06:00
Tim Crawford
b1bed529dc MdeModulePkg/BM: Add warning if no bootable options found 2020-04-10 08:01:33 -06:00
Tim Crawford
f189c6191b MdeModulePkg/BdsDxe: Forward any key for booting
Pressing escape will bring a user to the boot manager. Pressing any
other key will continue booting, forwarding the key to systemd-boot.
2020-04-10 08:01:33 -06:00
Tim Crawford
4249b8eb5b MdeModulePkg: Wait for input on each boot failure 2020-04-10 08:01:33 -06:00
Tim Crawford
e458f432b6 UefiPayloadPkg: Clear screen on boot error 2020-04-10 08:01:33 -06:00
Tim Crawford
65bb2a9982 UefiPayloadPkg: Copy PlatformBootManagerUnableToBoot() from OvmfPkg 2020-04-10 08:01:33 -06:00
Tim Crawford
f0b1403f40 MdeModulePkg/BootMaintenanceManagerUiLib: Make it look like current BMM 2020-04-10 08:01:33 -06:00
Tim Crawford
98633064c4 MdeModulePkg/UiApp: Fix reporting model/version
Use the SMBIOS table directly instead of the EFI SMBIOS protocol.
2020-04-10 08:01:33 -06:00
Tim Crawford
65d7e5bfaa MdeModulePkg/UiApp: Make it look like current FrontPage 2020-04-10 08:01:33 -06:00
Tim Crawford
9773fdd270 MdeModulePkg/BootManagerUiLib: Make it look like current BootMngr 2020-04-10 08:01:33 -06:00
Tim Crawford
f017dd1e1a MdeModulePkg/BootLogoLib: Center logo 38.2% from top of screen
Use Microsoft's recommended positioning [1] for the boot logo.

> We recommend that the logo is placed with its center at 38.2% from the
> screen's top edge. This positioning is based on the golden ratio's
> visual aesthetics and matches the Windows 10 design proportions.

[1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/boot-screen-components#position-the-logo-during-post
2020-04-10 08:01:33 -06:00
Tim Crawford
2c57af8da4 MdeModulePkg/Logo: Use System76 boot logo 2020-04-10 08:01:33 -06:00
Tim Crawford
e3754a7631 UefiPayloadPkg: Show boot message as progress text 2020-04-10 08:01:33 -06:00
Tim Crawford
d04e564e95 UefiPayloadPkg: Enable boot logo 2020-04-10 08:01:33 -06:00
Tim Crawford
dc0e568d10 UefiPayloadPkg: Disable Device Manager 2020-04-10 08:01:33 -06:00
Tim Crawford
bff3319ae5 UefiPayloadPkg: Disable EFI shell 2020-04-10 08:01:33 -06:00
Tim Crawford
68e4fc4a10 UefiPayloadPkg: Map ESC to boot manager 2020-04-10 08:01:33 -06:00
Tim Crawford
b3d4910fbd UefiPayloadPkg: Enable NVMe support 2020-04-10 08:01:33 -06:00
Jeremy Soller
cc4f44d4e7 UefiPayloadPkg: Load firmware-smmstore driver 2020-04-10 08:01:33 -06:00
Jeremy Soller
e106197ec2 MdeModulePkg/PartitionDxe: Prioritize UDF/ElTorito over MBR partitions
Fixes ISO boots.
2020-04-10 08:01:33 -06:00
Jeremy Soller
df3e6a4032 UefiCpuPkg: Ignore DEBUG interrupt (happens on gaze14) 2020-04-10 08:01:33 -06:00
Jeremy Soller
1bd847bd22 UefiPayloadPkg: Update serial port to use 2020-04-10 08:01:33 -06:00
Jeremy Soller
a258434cd8 UefiPayloadPkg: Add Intel GOP driver 2020-04-10 08:01:33 -06:00
Jeremy Soller
b99c14feb4 UefiPayloadPkg: Add System76 Setup menu 2020-04-10 08:01:33 -06:00
Tim Crawford
84d9737f71 UefiPayloadPkg: Enable PS2 keyboard 2020-04-10 08:01:33 -06:00
Tim Crawford
cf97530eea UefiPayloadPkg: Default to coreboot 2020-04-10 08:01:33 -06:00
5724 changed files with 484104 additions and 611641 deletions

View File

@@ -1,50 +0,0 @@
# Azure DevOps Pipelines
These yml files are used to provide CI builds using the Azure DevOps Pipeline Service.
Most of the CI leverages edk2-pytools to support cross platform building and execution.
## Core CI
Focused on building and testing all packages in Edk2 without an actual target platform.
See `.pytools/ReadMe.py` for more details
## Platform CI
Focused on building a single target platform and confirming functionality on that platform.
## Conventions
* Files extension should be *.yml. *.yaml is also supported but in Edk2 we use those for our package configuration.
* Platform CI files should be in the `<PlatformPkg>/.azurepipelines` folder.
* Core CI files are in the root folder.
* Shared templates are in the `templates` folder.
* Top level CI files should be named `<host os>-<tool_chain_tag>.yml`
## Links
* Basic Azure Landing Site - https://docs.microsoft.com/en-us/azure/devops/pipelines/?view=azure-devops
* Pipeline jobs - https://docs.microsoft.com/en-us/azure/devops/pipelines/process/phases?view=azure-devops&tabs=yaml
* Pipeline yml scheme - https://docs.microsoft.com/en-us/azure/devops/pipelines/yaml-schema?view=azure-devops&tabs=schema%2Cparameter-schema
* Pipeline expression - https://docs.microsoft.com/en-us/azure/devops/pipelines/process/expressions?view=azure-devops
* PyTools - https://github.com/tianocore/edk2-pytool-extensions and https://github.com/tianocore/edk2-pytool-library
## Lessons Learned
### Templates and parameters
They are great but evil. If they are used as part of determining the steps of a build they must resolve before the build starts. They can not use variables set in a yml or determined as part of a matrix. If they are used in a step then they can be bound late.
### File matching patterns
On Linux this can hang if there are too many files in the search list.
### Templates and file splitting
Suggestion is to do one big yaml file that does what you want for one of your targets. Then do the second one and find the deltas. From that you can start to figure out the right split of files, steps, jobs.
### Conditional steps
If you want the step to show up in the log but not run, use a step conditional. This is great when a platform doesn't currently support a feature but you want the builders to know that the features exists and maybe someday it will.
If you want the step to not show up use a template step conditional wrapper. Beware this will be evaluated early (at build start). This can hide things not needed on a given OS for example.

View File

@@ -2,20 +2,17 @@
# Azure Pipeline build file for a build using ubuntu and GCC5
#
# Copyright (c) Microsoft Corporation.
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
trigger:
- master
- stable/*
pr:
- master
- stable/*
jobs:
- template: templates/pr-gate-build-job.yml
parameters:
tool_chain_tag: 'GCC5'
vm_image: 'ubuntu-latest'
arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
arch_list: "IA32,X64,ARM,AARCH64"

View File

@@ -5,7 +5,7 @@
# NOTE: This example monitors pull requests against the edk2-ci branch. Most
# environments would replace 'edk2-ci' with 'master'.
#
# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
# https://github.com/tianocore
@@ -16,7 +16,6 @@ trigger: none
pr:
- master
- stable/*
pool:
vmImage: 'ubuntu-latest'

View File

@@ -6,11 +6,9 @@
##
trigger:
- master
- stable/*
pr:
- master
- stable/*
jobs:
- template: templates/pr-gate-build-job.yml

View File

@@ -1,59 +0,0 @@
# CI Templates
This folder contains azure pipeline yml templates for "Core" and "Platform" Continuous Integration and PR validation.
## Common CI templates
### basetools-build-steps.yml
This template compiles the Edk2 basetools from source. The steps in this template are
conditional and will only run if variable `pkg_count` is greater than 0.
It also has two conditional steps only used when the toolchain contains GCC. These two steps
use `apt` to update the system packages and add those necessary for Edk2 builds.
## Core CI templates
### pr-gate-build-job.yml
This templates contains the jobs and most importantly the matrix of which packages and
targets to run for Core CI.
### pr-gate-steps.yml
This template is the main Core CI template. It controls all the steps run and is responsible for most functionality of the Core CI process. This template sets
the `pkg_count` variable using the `stuart_pr_eval` tool when the
build type is "pull request"
### spell-check-prereq-steps.yml
This template installs the node based tools used by the spell checker plugin. The steps
in this template are conditional and will only run if variable `pkg_count` is greater than 0.
## Platform CI templates
### platform-build-run-steps.yml
This template makes heavy use of pytools to build and run a platform in the Edk2 repo
Also uses basetools-build-steps.yml to compile basetools
#### Special Notes
* For a build type of pull request it will conditionally build if the patches change files that impact the platform.
* uses `stuart_pr_eval` to determine impact
* For manual builds or CI builds it will always build the platform
* It compiles basetools from source
* Will use `stuart_build --FlashOnly` to attempt to run the built image if the `Run` parameter is set.
* See the parameters block for expected configuration options
* Parameter `extra_install_step` allows the caller to insert extra steps. This is useful if additional dependencies, tools, or other things need to be installed. Here is an example of installing qemu on Windows.
``` yaml
steps:
- template: ../../.azurepipelines/templates/build-run-steps.yml
parameters:
extra_install_step:
- powershell: choco install qemu; Write-Host "##vso[task.prependpath]c:\Program Files\qemu"
displayName: Install QEMU and Set QEMU on path # friendly name displayed in the UI
condition: and(gt(variables.pkg_count, 0), succeeded())
```

View File

@@ -1,140 +0,0 @@
## @file
# File steps.yml
#
# template file containing the steps to build
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
parameters:
- name: tool_chain_tag
type: string
default: ''
- name: build_pkg
type: string
default: ''
- name: build_target
type: string
default: ''
- name: build_arch
type: string
default: ''
- name: build_file
type: string
default: ''
- name: build_flags
type: string
default: ''
- name: run_flags
type: string
default: ''
- name: extra_install_step
type: stepList
default: []
steps:
- checkout: self
clean: true
fetchDepth: 1
- task: UsePythonVersion@0
inputs:
versionSpec: "3.8.x"
architecture: "x64"
- script: pip install -r pip-requirements.txt --upgrade
displayName: 'Install/Upgrade pip modules'
# Set default
- bash: echo "##vso[task.setvariable variable=pkg_count]${{ 1 }}"
# Fetch the target branch so that pr_eval can diff them.
# Seems like azure pipelines/github changed checkout process in nov 2020.
- script: git fetch origin $(System.PullRequest.targetBranch)
displayName: fetch target branch
condition: eq(variables['Build.Reason'], 'PullRequest')
# trim the package list if this is a PR
- task: CmdLine@1
displayName: Check if ${{ parameters.build_pkg }} need testing
inputs:
filename: stuart_pr_eval
arguments: -c ${{ parameters.build_file }} -t ${{ parameters.build_target}} -a ${{ parameters.build_arch}} --pr-target origin/$(System.PullRequest.targetBranch) --output-count-format-string "##vso[task.setvariable variable=pkg_count;isOutpout=true]{pkgcount}"
condition: eq(variables['Build.Reason'], 'PullRequest')
# Setup repo
- task: CmdLine@1
displayName: Setup
inputs:
filename: stuart_setup
arguments: -c ${{ parameters.build_file }} TOOL_CHAIN_TAG=${{ parameters.tool_chain_tag}} -t ${{ parameters.build_target}} -a ${{ parameters.build_arch}} ${{ parameters.build_flags}}
condition: and(gt(variables.pkg_count, 0), succeeded())
# Stuart Update
- task: CmdLine@1
displayName: Update
inputs:
filename: stuart_update
arguments: -c ${{ parameters.build_file }} TOOL_CHAIN_TAG=${{ parameters.tool_chain_tag}} -t ${{ parameters.build_target}} -a ${{ parameters.build_arch}} ${{ parameters.build_flags}}
condition: and(gt(variables.pkg_count, 0), succeeded())
# build basetools
# do this after setup and update so that code base dependencies
# are all resolved.
- template: basetools-build-steps.yml
parameters:
tool_chain_tag: ${{ parameters.tool_chain_tag }}
# Potential Extra steps
- ${{ parameters.extra_install_step }}
# Build
- task: CmdLine@1
displayName: Build
inputs:
filename: stuart_build
arguments: -c ${{ parameters.build_file }} TOOL_CHAIN_TAG=${{ parameters.tool_chain_tag}} TARGET=${{ parameters.build_target}} -a ${{ parameters.build_arch}} ${{ parameters.build_flags}}
condition: and(gt(variables.pkg_count, 0), succeeded())
# Run
- task: CmdLine@1
displayName: Run to shell
inputs:
filename: stuart_build
arguments: -c ${{ parameters.build_file }} TOOL_CHAIN_TAG=${{ parameters.tool_chain_tag}} TARGET=${{ parameters.build_target}} -a ${{ parameters.build_arch}} ${{ parameters.build_flags}} ${{ parameters.run_flags }} --FlashOnly
condition: and(and(gt(variables.pkg_count, 0), succeeded()), eq(variables['Run'], true))
timeoutInMinutes: 1
# Copy the build logs to the artifact staging directory
- task: CopyFiles@2
displayName: "Copy build logs"
inputs:
targetFolder: "$(Build.ArtifactStagingDirectory)"
SourceFolder: "Build"
contents: |
BUILDLOG_*.txt
BUILDLOG_*.md
CI_*.txt
CI_*.md
CISETUP.txt
SETUPLOG.txt
UPDATE_LOG.txt
PREVALLOG.txt
TestSuites.xml
**/BUILD_TOOLS_REPORT.html
**/OVERRIDELOG.TXT
BASETOOLS_BUILD*.*
flattenFolders: true
condition: succeededOrFailed()
# Publish build artifacts to Azure Artifacts/TFS or a file share
- task: PublishBuildArtifacts@1
continueOnError: true
displayName: "Publish build logs"
inputs:
pathtoPublish: "$(Build.ArtifactStagingDirectory)"
artifactName: "Build Logs $(System.JobName)"
condition: succeededOrFailed()

View File

@@ -4,7 +4,6 @@
# template file used to build supported packages.
#
# Copyright (c) Microsoft Corporation.
# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@@ -17,13 +16,10 @@ parameters:
jobs:
- job: Build_${{ parameters.tool_chain_tag }}
timeoutInMinutes: 120
#Use matrix to speed up the build process
strategy:
matrix:
TARGET_ARM_ARMPLATFORM:
Build.Pkgs: 'ArmPkg,ArmPlatformPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
TARGET_MDE_CPU:
Build.Pkgs: 'MdePkg,UefiCpuPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
@@ -34,28 +30,20 @@ jobs:
Build.Pkgs: 'MdeModulePkg'
Build.Targets: 'RELEASE,NO-TARGET'
TARGET_NETWORK:
Build.Pkgs: 'NetworkPkg,RedfishPkg'
Build.Pkgs: 'NetworkPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_OTHER:
Build.Pkgs: 'PcAtChipsetPkg,ShellPkg,StandaloneMmPkg'
Build.Pkgs: 'PcAtChipsetPkg,ShellPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_FMP_FAT_TEST:
Build.Pkgs: 'FmpDevicePkg,FatPkg,UnitTestFrameworkPkg,DynamicTablesPkg'
Build.Pkgs: 'FmpDevicePkg,FatPkg,UnitTestFrameworkPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
TARGET_CRYPTO:
Build.Pkgs: 'CryptoPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_SECURITY:
Build.Pkgs: 'SecurityPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_UEFIPAYLOAD:
Build.Pkgs: 'UefiPayloadPkg'
Build.Targets: 'DEBUG,RELEASE,NO-TARGET'
TARGET_PLATFORMS:
# For Platforms only check code. Leave it to Platform CI
# to build them.
Build.Pkgs: 'ArmVirtPkg,EmulatorPkg,OvmfPkg'
Build.Targets: 'NO-TARGET'
workspace:
clean: all
@@ -70,3 +58,23 @@ jobs:
build_pkgs: $(Build.Pkgs)
build_targets: $(Build.Targets)
build_archs: ${{ parameters.arch_list }}
- job: FINISHED
dependsOn: Build_${{ parameters.tool_chain_tag }}
condition: succeeded()
steps:
- checkout: none
- script: |
echo FINISHED
sleep 10
displayName: FINISHED
- job: FAILED
dependsOn: Build_${{ parameters.tool_chain_tag }}
condition: failed()
steps:
- checkout: none
- script: |
echo FAILED
sleep 10
displayName: FAILED

View File

@@ -20,7 +20,7 @@ steps:
- task: UsePythonVersion@0
inputs:
versionSpec: '3.8.x'
versionSpec: '3.7.x'
architecture: 'x64'
- script: pip install -r pip-requirements.txt --upgrade
@@ -31,12 +31,6 @@ steps:
echo "##vso[task.setvariable variable=pkgs_to_build]${{ parameters.build_pkgs }}"
echo "##vso[task.setvariable variable=pkg_count]${{ 1 }}"
# Fetch the target branch so that pr_eval can diff them.
# Seems like azure pipelines/github changed checkout process in nov 2020.
- script: git fetch origin $(System.PullRequest.targetBranch)
displayName: fetch target branch
condition: eq(variables['Build.Reason'], 'PullRequest')
# trim the package list if this is a PR
- task: CmdLine@1
displayName: Check if ${{ parameters.build_pkgs }} need testing
@@ -45,6 +39,11 @@ steps:
arguments: -c .pytool/CISettings.py -p ${{ parameters.build_pkgs }} --pr-target origin/$(System.PullRequest.targetBranch) --output-csv-format-string "##vso[task.setvariable variable=pkgs_to_build;isOutpout=true]{pkgcsv}" --output-count-format-string "##vso[task.setvariable variable=pkg_count;isOutpout=true]{pkgcount}"
condition: eq(variables['Build.Reason'], 'PullRequest')
# build basetools
- template: basetools-build-steps.yml
parameters:
tool_chain_tag: ${{ parameters.tool_chain_tag }}
# install spell check prereqs
- template: spell-check-prereq-steps.yml
@@ -63,13 +62,6 @@ steps:
arguments: -c .pytool/CISettings.py -p $(pkgs_to_build) -t ${{ parameters.build_targets}} -a ${{ parameters.build_archs}} TOOL_CHAIN_TAG=${{ parameters.tool_chain_tag}}
condition: and(gt(variables.pkg_count, 0), succeeded())
# build basetools
# do this after setup and update so that code base dependencies
# are all resolved.
- template: basetools-build-steps.yml
parameters:
tool_chain_tag: ${{ parameters.tool_chain_tag }}
- task: CmdLine@1
displayName: Build and Test ${{ parameters.build_pkgs }} ${{ parameters.build_archs}}
inputs:

View File

@@ -13,7 +13,7 @@ parameters:
steps:
- task: NodeTool@0
inputs:
versionSpec: '14.x'
versionSpec: '10.x'
#checkLatest: false # Optional
condition: and(gt(variables.pkg_count, 0), succeeded())

15
.gitmodules vendored
View File

@@ -6,17 +6,4 @@
url = https://github.com/ucb-bar/berkeley-softfloat-3.git
[submodule "UnitTestFrameworkPkg/Library/CmockaLib/cmocka"]
path = UnitTestFrameworkPkg/Library/CmockaLib/cmocka
url = https://github.com/tianocore/edk2-cmocka.git
[submodule "MdeModulePkg/Universal/RegularExpressionDxe/oniguruma"]
path = MdeModulePkg/Universal/RegularExpressionDxe/oniguruma
url = https://github.com/kkos/oniguruma
[submodule "MdeModulePkg/Library/BrotliCustomDecompressLib/brotli"]
path = MdeModulePkg/Library/BrotliCustomDecompressLib/brotli
url = https://github.com/google/brotli
[submodule "BaseTools/Source/C/BrotliCompress/brotli"]
path = BaseTools/Source/C/BrotliCompress/brotli
url = https://github.com/google/brotli
ignore = untracked
[submodule "RedfishPkg/Library/JsonLib/jansson"]
path = RedfishPkg/Library/JsonLib/jansson
url = https://github.com/akheron/jansson
url = https://git.cryptomilk.org/projects/cmocka.git

View File

@@ -1,7 +1,8 @@
#
# This list is used by git-shortlog to update a few name translations
# in the git archive to adjust for job changes or incorrect/inconsistent
# name usage.
# This list is used by git-shortlog to fix a few botched name translations
# in the git archive, either because the author's full name was messed up
# and/or not always written the same way, making contributions from the
# same person appearing not to be so or badly displayed.
#
# Please keep this file sorted alphabetically, and email in lowercase.
# The format used is:
@@ -22,8 +23,6 @@ Eric Dong <eric.dong@intel.com> Eric Dong <eirc.dong@intel.com>
Eric Dong <eric.dong@intel.com> <ydong10@6f19259b-4bc3-4df7-8a09-765794883524>
Eric Dong <eric.dong@intel.com> <ydong10@Edk2>
Erik Bjorge <erik.c.bjorge@intel.com> <geekboy15a@6f19259b-4bc3-4df7-8a09-765794883524>
Eugene Cohen <eugene@nuviainc.com>
Eugene Cohen <eugene@nuviainc.com> <eugene@hp.com>
Hao A Wu <hao.a.wu@intel.com>
Hao A Wu <hao.a.wu@intel.com> <hwu1225@Edk2>
Hot Tian <hot.tian@intel.com>
@@ -38,7 +37,6 @@ Jim Dailey <Jim.Dailey@Dell.com>
Jim Dailey <Jim.Dailey@Dell.com> <Jim_Dailey@Dell.com>
Laszlo Ersek <lersek@redhat.com> <lersek@6f19259b-4bc3-4df7-8a09-765794883524>
Laszlo Ersek <lersek@redhat.com> <lersek@Edk2>
Liming Gao <gaoliming@byosoft.com.cn>
Liming Gao <liming.gao@intel.com> <Gao, Liming liming.gao@intel.com>
Liming Gao <liming.gao@intel.com> <lgao4@6f19259b-4bc3-4df7-8a09-765794883524>
Liming Gao <liming.gao@intel.com> <lgao4@Edk2>
@@ -48,7 +46,6 @@ Marc-André Lureau <marcandre.lureau@redhat.com> <marcandre.lureau@redhat.com>
Marvin Häuser <Marvin.Haeuser@outlook.com>
Marvin Häuser <Marvin.Haeuser@outlook.com> edk2-devel <edk2-devel-bounces@lists.01.org>
Marvin Häuser <mhaeuser@outlook.de>
Matt DeVillier <matt.devillier@gmail.com>
Maurice Ma <maurice.ma@intel.com>
Michael Kubacki <michael.a.kubacki@intel.com>
Michael Kubacki <michael.a.kubacki@intel.com> </o=Intel/ou=External (FYDIBOHF25SPDLT)/cn=Recipients/cn=3c8b0226e75f4ab08d20c151cb7a8a72>
@@ -62,20 +59,14 @@ Ray Ni <ray.ni@intel.com> <niruiyu@Edk2>
Ray Ni <ray.ni@intel.com> <ruiyu.ni@intel.com>
Ray Ni <ray.ni@intel.com> <Ruiyu.ni@Intel.com>
Ray Ni <ray.ni@intel.com> <ruyu.ni@intel.com>
Rebecca Cran <rebecca@bluestop.org>
Rebecca Cran <rebecca@bsdio.com>
Samer El-Haj-Mahmoud <samer@elhajmahmoud.com> <elhaj@hpe.com>
Samer El-Haj-Mahmoud <samer@elhajmahmoud.com> <Samer El-Haj-Mahmoud elhaj@hp.com>
Shenglei Zhang <shenglei.zhang@intel.com>
Star Zeng <star.zeng@intel.com>
Star Zeng <star.zeng@intel.com> <lzeng14@6f19259b-4bc3-4df7-8a09-765794883524>
Star Zeng <star.zeng@intel.com> <lzeng14@Edk2>
Tom Lendacky <thomas.lendacky@amd.com>
Vitaly Cheptsov <vit9696@protonmail.com> Vitaly Cheptsov via Groups.Io <vit9696=protonmail.com@groups.io>
Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com> Vladimir Olovyannikov via edk2-devel <edk2-devel@lists.01.org>
Wei6 Xu <wei6.xu@intel.com>
Yonghong Zhu <yonghong.zhu@intel.com>
Yonghong Zhu <yonghong.zhu@intel.com> <yzhu52@Edk2>
Yu-Chen Lin <yuchenlin@synology.com>
Zhichao Gao <zhichao.gao@intel.com>
Zhiguang Liu <zhiguang.liu@intel.com>

View File

@@ -16,7 +16,7 @@
# * This file must be checked into the 'default' branch of a repo. Copies
# of this file on other branches of a repo are ignored by Mergify.
#
# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
# https://github.com/apps/mergify
@@ -24,27 +24,74 @@
#
##
queue_rules:
- name: default
conditions:
- base~=(^main|^master|^stable/)
- label=push
pull_request_rules:
- name: Automatically merge a PR when all required checks pass and 'push' label is present
conditions:
- base~=(^main|^master|^stable/)
- base=master
- label=push
- author=@tianocore/edk-ii-maintainers
- status-success=tianocore.PatchCheck
- status-success=Ubuntu GCC5 PR
- status-success=Windows VS2019 PR
actions:
queue:
merge:
strict: true
method: rebase
rebase_fallback: none
name: default
- name: Automatically close a PR when all required checks pass and 'push' label is not present
conditions:
- base=master
- -label=push
- -closed
- status-success=tianocore.PatchCheck
- status-success=Ubuntu GCC5 PR
- status-success=Windows VS2019 PR
- status-success=Ubuntu GCC5 PR (FINISHED)
- status-success=Windows VS2019 PR (FINISHED)
actions:
close:
message: All checks passed. Auto close personal build.
- name: Post a comment on a PR that can not be merged due to a merge conflict
conditions:
- base~=(^main|^master|^stable/)
- base=master
- conflict
actions:
comment:
message: PR can not be merged due to conflict. Please rebase and resubmit
- name: Automatically close a PR that fails the EDK II Maintainers membership check and 'push' label is present
conditions:
- base=master
- label=push
- -author=@tianocore/edk-ii-maintainers
actions:
close:
message: PR submitter is not a member of the Tianocore EDK II Maintainers team
- name: Post a comment on a PR if PatchCheck fails
conditions:
- base=master
- status-failure=tianocore.PatchCheck
actions:
comment:
message: PR can not be merged due to a PatchCheck failure. Please resolve and resubmit
- name: Post a comment on a PR if Ubuntu GCC5 fails
conditions:
- base=master
- status-failure=Ubuntu GCC5 PR
- status-success=Ubuntu GCC5 PR (FAILED)
actions:
comment:
message: PR can not be merged due to an Ubuntu GCC5 failure. Please resolve and resubmit
- name: Post a comment on a PR if Windows VS2019 fails
conditions:
- base=master
- status-failure=Windows VS2019 PR
- status-success=Windows VS2019 PR (FAILED)
actions:
comment:
message: PR can not be merged due to a Windows VS2019 failure. Please resolve and resubmit

View File

@@ -1,8 +1,6 @@
# @file
#
# Copyright (c) Microsoft Corporation.
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
@@ -22,24 +20,16 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
self.ActualTargets = []
self.ActualArchitectures = []
self.ActualToolChainTag = ""
self.UseBuiltInBaseTools = None
self.ActualScopes = None
# ####################################################################################### #
# Extra CmdLine configuration #
# ####################################################################################### #
def AddCommandLineOptions(self, parserObj):
group = parserObj.add_mutually_exclusive_group()
group.add_argument("-force_piptools", "--fpt", dest="force_piptools", action="store_true", default=False, help="Force the system to use pip tools")
group.add_argument("-no_piptools", "--npt", dest="no_piptools", action="store_true", default=False, help="Force the system to not use pip tools")
pass
def RetrieveCommandLineOptions(self, args):
super().RetrieveCommandLineOptions(args)
if args.force_piptools:
self.UseBuiltInBaseTools = True
if args.no_piptools:
self.UseBuiltInBaseTools = False
pass
# ####################################################################################### #
# Default Support for this Ci Build #
@@ -49,12 +39,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
''' return iterable of edk2 packages supported by this build.
These should be edk2 workspace relative paths '''
return ("ArmPkg",
"ArmPlatformPkg",
"ArmVirtPkg",
"DynamicTablesPkg",
"EmulatorPkg",
"MdePkg",
return ("MdePkg",
"MdeModulePkg",
"NetworkPkg",
"PcAtChipsetPkg",
@@ -62,23 +47,17 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"UefiCpuPkg",
"FmpDevicePkg",
"ShellPkg",
"StandaloneMmPkg",
"FatPkg",
"CryptoPkg",
"UnitTestFrameworkPkg",
"OvmfPkg",
"RedfishPkg",
"UefiPayloadPkg"
"UnitTestFrameworkPkg"
)
def GetArchitecturesSupported(self):
''' return iterable of edk2 architectures supported by this build '''
return (
"IA32",
return ("IA32",
"X64",
"ARM",
"AARCH64",
"RISCV64")
"AARCH64")
def GetTargetsSupported(self):
''' return iterable of edk2 target tags supported by this build '''
@@ -139,38 +118,20 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
def GetActiveScopes(self):
''' return tuple containing scopes that should be active for this process '''
if self.ActualScopes is None:
scopes = ("cibuild", "edk2-build", "host-based-test")
scopes = ("cibuild", "edk2-build", "host-based-test")
self.ActualToolChainTag = shell_environment.GetBuildVars().GetValue("TOOL_CHAIN_TAG", "")
self.ActualToolChainTag = shell_environment.GetBuildVars().GetValue("TOOL_CHAIN_TAG", "")
is_linux = GetHostInfo().os.upper() == "LINUX"
if GetHostInfo().os.upper() == "WINDOWS":
scopes += ('host-test-win',)
if self.UseBuiltInBaseTools is None:
is_linux = GetHostInfo().os.upper() == "LINUX"
# try and import the pip module for basetools
try:
import edk2basetools
self.UseBuiltInBaseTools = True
except ImportError:
self.UseBuiltInBaseTools = False
pass
if GetHostInfo().os.upper() == "LINUX" and self.ActualToolChainTag.upper().startswith("GCC"):
if "AARCH64" in self.ActualArchitectures:
scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
if self.UseBuiltInBaseTools == True:
scopes += ('pipbuild-unix',) if is_linux else ('pipbuild-win',)
logging.warning("Using Pip Tools based BaseTools")
else:
logging.warning("Falling back to using in-tree BaseTools")
if is_linux and self.ActualToolChainTag.upper().startswith("GCC"):
if "AARCH64" in self.ActualArchitectures:
scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
if "RISCV64" in self.ActualArchitectures:
scopes += ("gcc_riscv64_unknown",)
self.ActualScopes = scopes
return self.ActualScopes
return scopes
def GetRequiredSubmodules(self):
''' return iterable containing RequiredSubmodule objects.
@@ -183,14 +144,6 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"CryptoPkg/Library/OpensslLib/openssl", False))
rs.append(RequiredSubmodule(
"UnitTestFrameworkPkg/Library/CmockaLib/cmocka", False))
rs.append(RequiredSubmodule(
"MdeModulePkg/Universal/RegularExpressionDxe/oniguruma", False))
rs.append(RequiredSubmodule(
"MdeModulePkg/Library/BrotliCustomDecompressLib/brotli", False))
rs.append(RequiredSubmodule(
"BaseTools/Source/C/BrotliCompress/brotli", False))
rs.append(RequiredSubmodule(
"RedfishPkg/Library/JsonLib/jansson", False))
return rs
def GetName(self):

View File

@@ -1,407 +0,0 @@
# @file EccCheck.py
#
# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
import shutil
import re
import csv
import xml.dom.minidom
from typing import List, Dict, Tuple
import logging
from io import StringIO
from edk2toolext.environment import shell_environment
from edk2toolext.environment.plugintypes.ci_build_plugin import ICiBuildPlugin
from edk2toolext.environment.var_dict import VarDict
from edk2toollib.utility_functions import RunCmd
class EccCheck(ICiBuildPlugin):
"""
A CiBuildPlugin that finds the Ecc issues of newly added code in pull request.
Configuration options:
"EccCheck": {
"ExceptionList": [],
"IgnoreFiles": []
},
"""
FindModifyFile = re.compile(r'\+\+\+ b\/(.*)')
LineScopePattern = (r'@@ -\d*\,*\d* \+\d*\,*\d* @@.*')
LineNumRange = re.compile(r'@@ -\d*\,*\d* \+(\d*)\,*(\d*) @@.*')
def GetTestName(self, packagename: str, environment: VarDict) -> tuple:
""" Provide the testcase name and classname for use in reporting
testclassname: a descriptive string for the testcase can include whitespace
classname: should be patterned <packagename>.<plugin>.<optionally any unique condition>
Args:
packagename: string containing name of package to build
environment: The VarDict for the test to run in
Returns:
a tuple containing the testcase name and the classname
(testcasename, classname)
"""
return ("Check for efi coding style for " + packagename, packagename + ".EccCheck")
##
# External function of plugin. This function is used to perform the task of the ci_build_plugin Plugin
#
# - package is the edk2 path to package. This means workspace/packagepath relative.
# - edk2path object configured with workspace and packages path
# - PkgConfig Object (dict) for the pkg
# - EnvConfig Object
# - Plugin Manager Instance
# - Plugin Helper Obj Instance
# - Junit Logger
# - output_stream the StringIO output stream from this plugin via logging
def RunBuildPlugin(self, packagename, Edk2pathObj, pkgconfig, environment, PLM, PLMHelper, tc, output_stream=None):
workspace_path = Edk2pathObj.WorkspacePath
basetools_path = environment.GetValue("EDK_TOOLS_PATH")
python_path = os.path.join(basetools_path, "Source", "Python")
env = shell_environment.GetEnvironment()
env.set_shell_var('PYTHONPATH', python_path)
env.set_shell_var('WORKSPACE', workspace_path)
env.set_shell_var('PACKAGES_PATH', os.pathsep.join(Edk2pathObj.PackagePathList))
self.ECC_PASS = True
# Create temp directory
temp_path = os.path.join(workspace_path, 'Build', '.pytool', 'Plugin', 'EccCheck')
try:
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
# Copy package being scanned to temp_path
shutil.copytree (
os.path.join(workspace_path, packagename),
os.path.join(temp_path, packagename),
symlinks=True
)
# Copy exception.xml to temp_path
shutil.copyfile (
os.path.join(basetools_path, "Source", "Python", "Ecc", "exception.xml"),
os.path.join(temp_path, "exception.xml")
)
# Output file to use for git diff operations
temp_diff_output = os.path.join (temp_path, 'diff.txt')
self.ApplyConfig(pkgconfig, temp_path, packagename)
modify_dir_list = self.GetModifyDir(packagename, temp_diff_output)
patch = self.GetDiff(packagename, temp_diff_output)
ecc_diff_range = self.GetDiffRange(patch, packagename, temp_path)
#
# Use temp_path as working directory when running ECC tool
#
self.GenerateEccReport(modify_dir_list, ecc_diff_range, temp_path, basetools_path)
ecc_log = os.path.join(temp_path, "Ecc.log")
if self.ECC_PASS:
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetSuccess()
return 0
else:
with open(ecc_log, encoding='utf8') as output:
ecc_output = output.readlines()
for line in ecc_output:
logging.error(line.strip())
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck failed for {0}".format(packagename), "CHECK FAILED")
return 1
except KeyboardInterrupt:
# If EccCheck is interrupted by keybard interrupt, then return failure
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck interrupted for {0}".format(packagename), "CHECK FAILED")
return 1
else:
# If EccCheck fails for any other exception type, raise the exception
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck exception for {0}".format(packagename), "CHECK FAILED")
raise
return 1
def GetDiff(self, pkg: str, temp_diff_output: str) -> List[str]:
patch = []
#
# Generate unified diff between origin/master and HEAD.
#
params = "diff --output={} --unified=0 origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
with open(temp_diff_output) as file:
patch = file.read().strip().split('\n')
return patch
def GetModifyDir(self, pkg: str, temp_diff_output: str) -> List[str]:
#
# Generate diff between origin/master and HEAD using --diff-filter to
# exclude deleted and renamed files that do not need to be scanned by
# ECC. Also use --name-status to only generate the names of the files
# with differences. The output format of this git diff command is a
# list of files with the change status and the filename. The filename
# is always at the end of the line. Examples:
#
# M MdeModulePkg/Application/CapsuleApp/CapsuleApp.h
# M MdeModulePkg/Application/UiApp/FrontPage.h
#
params = "diff --output={} --diff-filter=dr --name-status origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
dir_list = []
with open(temp_diff_output) as file:
dir_list = file.read().strip().split('\n')
modify_dir_list = []
for modify_dir in dir_list:
#
# Parse file name from the end of the line
#
file_path = modify_dir.strip().split()
#
# Skip lines that do not have at least 2 elements (status and file name)
#
if len(file_path) < 2:
continue
#
# Parse the directory name from the file name
#
file_dir = os.path.dirname(file_path[-1])
#
# Skip directory names that do not start with the package being scanned.
#
if file_dir.split('/')[0] != pkg:
continue
#
# Skip directory names that are identical to the package being scanned.
# The assumption here is that there are no source files at the package
# root. Instead, the only expected files in the package root are
# EDK II meta data files (DEC, DSC, FDF).
#
if file_dir == pkg:
continue
#
# Skip directory names that are already in the modified dir list
#
if file_dir in modify_dir_list:
continue
#
# Add the candidate directory to scan to the modified dir list
#
modify_dir_list.append(file_dir)
#
# Remove duplicates from modify_dir_list
# Given a folder path, ECC performs a recursive scan of that folder.
# If a parent and child folder are both present in modify_dir_list,
# then ECC will perform redudanct scans of source files. In order
# to prevent redundant scans, if a parent and child folder are both
# present, then remove all the child folders.
#
# For example, if modified_dir_list contains the following elements:
# MdeModulePkg/Core/Dxe
# MdeModulePkg/Core/Dxe/Hand
# MdeModulePkg/Core/Dxe/Mem
#
# Then MdeModulePkg/Core/Dxe/Hand and MdeModulePkg/Core/Dxe/Mem should
# be removed because the files in those folders are covered by a scan
# of MdeModulePkg/Core/Dxe.
#
filtered_list = []
for dir1 in modify_dir_list:
Append = True
for dir2 in modify_dir_list:
if dir1 == dir2:
continue
common = os.path.commonpath([dir1, dir2])
if os.path.normpath(common) == os.path.normpath(dir2):
Append = False
break
if Append and dir1 not in filtered_list:
filtered_list.append(dir1)
return filtered_list
def GetDiffRange(self, patch_diff: List[str], pkg: str, temp_path: str) -> Dict[str, List[Tuple[int, int]]]:
IsDelete = True
StartCheck = False
range_directory: Dict[str, List[Tuple[int, int]]] = {}
for line in patch_diff:
modify_file = self.FindModifyFile.findall(line)
if modify_file and pkg in modify_file[0] and not StartCheck and os.path.isfile(modify_file[0]):
modify_file_comment_dic = self.GetCommentRange(modify_file[0], temp_path)
IsDelete = False
StartCheck = True
modify_file_dic = modify_file[0]
modify_file_dic = modify_file_dic.replace("/", os.sep)
range_directory[modify_file_dic] = []
elif line.startswith('--- '):
StartCheck = False
elif re.match(self.LineScopePattern, line, re.I) and not IsDelete and StartCheck:
start_line = self.LineNumRange.search(line).group(1)
line_range = self.LineNumRange.search(line).group(2)
if not line_range:
line_range = '1'
range_directory[modify_file_dic].append((int(start_line), int(start_line) + int(line_range) - 1))
for i in modify_file_comment_dic:
if int(i[0]) <= int(start_line) <= int(i[1]):
range_directory[modify_file_dic].append(i)
return range_directory
def GetCommentRange(self, modify_file: str, temp_path: str) -> List[Tuple[int, int]]:
comment_range: List[Tuple[int, int]] = []
modify_file_path = os.path.join(temp_path, modify_file)
if not os.path.exists (modify_file_path):
return comment_range
with open(modify_file_path) as f:
line_no = 1
Start = False
for line in f:
if line.startswith('/**'):
start_no = line_no
Start = True
if line.startswith('**/') and Start:
end_no = line_no
Start = False
comment_range.append((int(start_no), int(end_no)))
line_no += 1
if comment_range and comment_range[0][0] == 1:
del comment_range[0]
return comment_range
def GenerateEccReport(self, modify_dir_list: List[str], ecc_diff_range: Dict[str, List[Tuple[int, int]]],
temp_path: str, basetools_path: str) -> None:
ecc_need = False
ecc_run = True
config = os.path.normpath(os.path.join(basetools_path, "Source", "Python", "Ecc", "config.ini"))
exception = os.path.normpath(os.path.join(temp_path, "exception.xml"))
report = os.path.normpath(os.path.join(temp_path, "Ecc.csv"))
for modify_dir in modify_dir_list:
target = os.path.normpath(os.path.join(temp_path, modify_dir))
logging.info('Run ECC tool for the commit in %s' % modify_dir)
ecc_need = True
ecc_params = "-c {0} -e {1} -t {2} -r {3}".format(config, exception, target, report)
return_code = RunCmd("Ecc", ecc_params, workingdir=temp_path)
if return_code != 0:
ecc_run = False
break
if not ecc_run:
logging.error('Fail to run ECC tool')
self.ParseEccReport(ecc_diff_range, temp_path)
if not ecc_need:
logging.info("Doesn't need run ECC check")
return
def ParseEccReport(self, ecc_diff_range: Dict[str, List[Tuple[int, int]]], temp_path: str) -> None:
ecc_log = os.path.join(temp_path, "Ecc.log")
ecc_csv = os.path.join(temp_path, "Ecc.csv")
row_lines = []
ignore_error_code = self.GetIgnoreErrorCode()
if os.path.exists(ecc_csv):
with open(ecc_csv) as csv_file:
reader = csv.reader(csv_file)
for row in reader:
for modify_file in ecc_diff_range:
if modify_file in row[3]:
for i in ecc_diff_range[modify_file]:
line_no = int(row[4])
if i[0] <= line_no <= i[1] and row[1] not in ignore_error_code:
row[0] = '\nEFI coding style error'
row[1] = 'Error code: ' + row[1]
row[3] = 'file: ' + row[3]
row[4] = 'Line number: ' + row[4]
row_line = '\n *'.join(row)
row_lines.append(row_line)
break
break
if row_lines:
self.ECC_PASS = False
with open(ecc_log, 'a') as log:
all_line = '\n'.join(row_lines)
all_line = all_line + '\n'
log.writelines(all_line)
return
def ApplyConfig(self, pkgconfig: Dict[str, List[str]], temp_path: str, pkg: str) -> None:
if "IgnoreFiles" in pkgconfig:
for a in pkgconfig["IgnoreFiles"]:
a = os.path.join(temp_path, pkg, a)
a = a.replace(os.sep, "/")
logging.info("Ignoring Files {0}".format(a))
if os.path.exists(a):
if os.path.isfile(a):
os.remove(a)
elif os.path.isdir(a):
shutil.rmtree(a)
else:
logging.error("EccCheck.IgnoreInf -> {0} not found in filesystem. Invalid ignore files".format(a))
if "ExceptionList" in pkgconfig:
exception_list = pkgconfig["ExceptionList"]
exception_xml = os.path.join(temp_path, "exception.xml")
try:
logging.info("Appending exceptions")
self.AppendException(exception_list, exception_xml)
except Exception as e:
logging.error("Fail to apply exceptions")
raise e
return
def AppendException(self, exception_list: List[str], exception_xml: str) -> None:
error_code_list = exception_list[::2]
keyword_list = exception_list[1::2]
dom_tree = xml.dom.minidom.parse(exception_xml)
root_node = dom_tree.documentElement
for error_code, keyword in zip(error_code_list, keyword_list):
customer_node = dom_tree.createElement("Exception")
keyword_node = dom_tree.createElement("KeyWord")
keyword_node_text_value = dom_tree.createTextNode(keyword)
keyword_node.appendChild(keyword_node_text_value)
customer_node.appendChild(keyword_node)
error_code_node = dom_tree.createElement("ErrorID")
error_code_text_value = dom_tree.createTextNode(error_code)
error_code_node.appendChild(error_code_text_value)
customer_node.appendChild(error_code_node)
root_node.appendChild(customer_node)
with open(exception_xml, 'w') as f:
dom_tree.writexml(f, indent='', addindent='', newl='\n', encoding='UTF-8')
return
def GetIgnoreErrorCode(self) -> set:
"""
Below are kinds of error code that are accurate in ecc scanning of edk2 level.
But EccCheck plugin is partial scanning so they are always false positive issues.
The mapping relationship of error code and error message is listed BaseTools/Sourc/Python/Ecc/EccToolError.py
"""
ignore_error_code = {
"10000",
"10001",
"10002",
"10003",
"10004",
"10005",
"10006",
"10007",
"10008",
"10009",
"10010",
"10011",
"10012",
"10013",
"10015",
"10016",
"10017",
"10022",
}
return ignore_error_code

View File

@@ -1,11 +0,0 @@
## @file
# CiBuildPlugin used to check Ecc issues
#
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"scope": "cibuild",
"name": "EccCheck Test",
"module": "EccCheck"
}

View File

@@ -1,15 +0,0 @@
# EFI Coding style Check Plugin
This CiBuildPlugin finds the Ecc issues of newly added code in pull request.
## Configuration
The plugin can be configured to ignore certain files and issues.
"EccCheck": {
"ExceptionList": [],
"IgnoreFiles": []
},
"""
OPTIONAL List of file to ignore.

View File

@@ -1,123 +0,0 @@
# @file LicenseCheck.py
#
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
import shutil
import logging
import re
from io import StringIO
from typing import List, Tuple
from edk2toolext.environment.plugintypes.ci_build_plugin import ICiBuildPlugin
from edk2toolext.environment.var_dict import VarDict
from edk2toollib.utility_functions import RunCmd
class LicenseCheck(ICiBuildPlugin):
"""
A CiBuildPlugin to check the license for new added files.
Configuration options:
"LicenseCheck": {
"IgnoreFiles": []
},
"""
license_format_preflix = 'SPDX-License-Identifier'
bsd2_patent = 'BSD-2-Clause-Patent'
Readdedfileformat = re.compile(r'\+\+\+ b\/(.*)')
file_extension_list = [".c", ".h", ".inf", ".dsc", ".dec", ".py", ".bat", ".sh", ".uni", ".yaml",
".fdf", ".inc", "yml", ".asm", ".asm16", ".asl", ".vfr", ".s", ".S", ".aslc",
".nasm", ".nasmb", ".idf", ".Vfr", ".H"]
def GetTestName(self, packagename: str, environment: VarDict) -> tuple:
""" Provide the testcase name and classname for use in reporting
testclassname: a descriptive string for the testcase can include whitespace
classname: should be patterned <packagename>.<plugin>.<optionally any unique condition>
Args:
packagename: string containing name of package to build
environment: The VarDict for the test to run in
Returns:
a tuple containing the testcase name and the classname
(testcasename, classname)
"""
return ("Check for license for " + packagename, packagename + ".LicenseCheck")
##
# External function of plugin. This function is used to perform the task of the ci_build_plugin Plugin
#
# - package is the edk2 path to package. This means workspace/packagepath relative.
# - edk2path object configured with workspace and packages path
# - PkgConfig Object (dict) for the pkg
# - EnvConfig Object
# - Plugin Manager Instance
# - Plugin Helper Obj Instance
# - Junit Logger
# - output_stream the StringIO output stream from this plugin via logging
def RunBuildPlugin(self, packagename, Edk2pathObj, pkgconfig, environment, PLM, PLMHelper, tc, output_stream=None):
# Create temp directory
temp_path = os.path.join(Edk2pathObj.WorkspacePath, 'Build', '.pytool', 'Plugin', 'LicenseCheck')
if not os.path.exists(temp_path):
os.makedirs(temp_path)
# Output file to use for git diff operations
temp_diff_output = os.path.join (temp_path, 'diff.txt')
params = "diff --output={} --unified=0 origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
with open(temp_diff_output) as file:
patch = file.read().strip().split("\n")
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
ignore_files = []
if "IgnoreFiles" in pkgconfig:
ignore_files = pkgconfig["IgnoreFiles"]
self.ok = True
self.startcheck = False
self.license = True
self.all_file_pass = True
count = len(patch)
line_index = 0
for line in patch:
if line.startswith('--- /dev/null'):
nextline = patch[line_index + 1]
added_file = self.Readdedfileformat.search(nextline).group(1)
added_file_extension = os.path.splitext(added_file)[1]
if added_file_extension in self.file_extension_list and packagename in added_file:
if (self.IsIgnoreFile(added_file, ignore_files)):
line_index = line_index + 1
continue
self.startcheck = True
self.license = False
if self.startcheck and self.license_format_preflix in line:
if self.bsd2_patent in line:
self.license = True
if line_index + 1 == count or patch[line_index + 1].startswith('diff --') and self.startcheck:
if not self.license:
self.all_file_pass = False
error_message = "Invalid license in: " + added_file + " Hint: Only BSD-2-Clause-Patent is accepted."
logging.error(error_message)
self.startcheck = False
self.license = True
line_index = line_index + 1
if self.all_file_pass:
tc.SetSuccess()
return 0
else:
tc.SetFailed("License Check {0} Failed. ".format(packagename), "LICENSE_CHECK_FAILED")
return 1
def IsIgnoreFile(self, file: str, ignore_files: List[str]) -> bool:
for f in ignore_files:
if f in file:
return True
return False

View File

@@ -1,11 +0,0 @@
## @file
# CiBuildPlugin used to check license issues for new added files
#
# Copyright (c) 2020, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"scope": "cibuild",
"name": "License Check Test",
"module": "LicenseCheck"
}

View File

@@ -1,17 +0,0 @@
# License Check Plugin
This CiBuildPlugin scans all new added files in a package to make sure code
is contributed under BSD-2-Clause-Patent.
## Configuration
The plugin can be configured to ignore certain files.
``` yaml
"LicenseCheck": {
"IgnoreFiles": []
}
```
### IgnoreFiles
OPTIONAL List of file to ignore.

View File

@@ -37,12 +37,12 @@ class SpellCheck(ICiBuildPlugin):
#
# A package can remove any of these using IgnoreStandardPaths
#
STANDARD_PLUGIN_DEFINED_PATHS = ("*.c", "*.h",
STANDARD_PLUGIN_DEFINED_PATHS = ["*.c", "*.h",
"*.nasm", "*.asm", "*.masm", "*.s",
"*.asl",
"*.dsc", "*.dec", "*.fdf", "*.inf",
"*.md", "*.txt"
)
]
def GetTestName(self, packagename: str, environment: VarDict) -> tuple:
""" Provide the testcase name and classname for use in reporting
@@ -107,8 +107,7 @@ class SpellCheck(ICiBuildPlugin):
version_aggregator.GetVersionAggregator().ReportVersion(
"CSpell", cspell_version, version_aggregator.VersionTypes.INFO)
# copy the default as a list
package_relative_paths_to_spell_check = list(SpellCheck.STANDARD_PLUGIN_DEFINED_PATHS)
package_relative_paths_to_spell_check = SpellCheck.STANDARD_PLUGIN_DEFINED_PATHS
#
# Allow the ci.yaml to remove any of the above standard paths
@@ -134,8 +133,7 @@ class SpellCheck(ICiBuildPlugin):
#
relpath = os.path.relpath(abs_pkg_path)
cpsell_paths = " ".join(
# Double quote each path to defer expansion to cspell parameters
[f'"{relpath}/**/{x}"' for x in package_relative_paths_to_spell_check])
[f"{relpath}/**/{x}" for x in package_relative_paths_to_spell_check])
# Make the config file
config_file_path = os.path.join(

View File

@@ -22,8 +22,6 @@
],
"minWordLength": 5,
"allowCompoundWords": false,
"maxNumberOfProblems": 200,
"maxDuplicateProblems": 200,
"ignoreWords": [
"muchange"
],
@@ -163,21 +161,5 @@
"bootability",
"Sdhci",
"inmodule",
"RISCV",
"edksetup",
"iscsi",
"nvdata",
"pytools",
"NTDDI",
"Wnonportable",
"CLANGPDB",
"nologo",
"lldmap",
"ASMLINK",
"NODEFAULTLIB",
"vcruntimed",
"ucrtd",
"msvcrtd",
"XIPFLAGS"
]
}

View File

@@ -1,120 +0,0 @@
# UncrustifyCheck Plugin
This CiBuildPlugin scans all the files in a given package and checks for coding standard compliance issues.
This plugin is enabled by default. If a package would like to prevent the plugin from reporting errors, it can do
so by enabling [`AuditOnly`](#auditonly) mode.
This plugin requires the directory containing the Uncrustify executable that should be used for this plugin to
be specified in an environment variable named `UNCRUSTIFY_CI_PATH`. This unique variable name is used to avoid confusion
with other paths to Uncrustify which might not be the expected build for use by this plugin.
By default, an Uncrustify configuration file named "uncrustify.cfg" located in the same directory as the plugin is
used. The value can be overridden to a package-specific path with the `ConfigFilePath` configuration file option.
* Uncrustify source code and documentation: https://github.com/uncrustify/uncrustify
* Project Mu Uncrustify fork source code and documentation: https://dev.azure.com/projectmu/Uncrustify
## Files Checked in a Package
By default, this plugin will discover all files in the package with the following default paths:
```python
[
# C source
"*.c",
"*.h"
]
```
From this list of files, any files ignored by Git or residing in a Git submodule will be removed. If Git is not
found, submodules are not found, or ignored files are not found no changes are made to the list of discovered files.
To control the paths checked in a given package, review the configuration options described in this file.
## Configuration
The plugin can be configured with a few optional configuration options.
``` yaml
"UncrustifyCheck": {
"AdditionalIncludePaths": [], # Additional paths to check formatting (wildcards supported).
"AuditOnly": False, # Don't fail the build if there are errors. Just log them.
"ConfigFilePath": "", # Custom path to an Uncrustify config file.
"IgnoreStandardPaths": [], # Standard Plugin defined paths that should be ignored.
"OutputFileDiffs": False, # Output chunks of formatting diffs in the test case log.
# This can significantly slow down the plugin on very large packages.
"SkipGitExclusions": False # Don't exclude git ignored files and files in git submodules.
}
```
### `AdditionalIncludePaths`
A package configuration file can specify any additional paths to be included with this option.
At this time, it is recommended all files run against the plugin be written in the C or C++ language.
### `AuditOnly`
`Boolean` - Default is `False`.
If `True`, run the test in an "audit only mode" which will log all errors but instead of failing the build, it will set
the test as skipped. This allows visibility into the failures without breaking the build.
### `ConfigFilePath`
`String` - Default is `"uncrustify.cfg"`
When specified in the config file, this is a package relative path to the Uncrustify configuration file.
### `IgnoreStandardPaths`
This plugin by default will check the below standard paths. A package configuration file can specify any of these paths
to be ignored.
```python
[
# C source
"*.c",
"*.h"
]
```
### `OutputFileDiffs`
`Boolean` - Default is `False`.
If `True`, output diffs of formatting changes into the test case log. This is helpful to exactly understand what changes
need to be made to the source code in order to fix a coding standard compliance issue.
Note that calculating the file diffs on a very large set of of results (e.g. >100 files) can significantly slow down
plugin execution.
### `SkipGitExclusions`
`Boolean` - Default is `False`.
By default, files in paths matched in a .gitignore file or a recognized git submodule are excluded. If this option
is `True`, the plugin will not attempt to recognize these files and exclude them.
## High-Level Plugin Operation
This plugin generates two main sets of temporary files:
1. A working directory in the directory `Build/.pytool/Plugin/Uncrustify`
2. For each source file with formatting errors, a sibling file with the `.uncrustify_plugin` extension
The working directory contains temporary files unique to operation of the plugin. All of these files are removed on
exit of the plugin including successful or unsuccessful execution (such as a Python exception occurring). If for any
reason, any files in the package exist prior to running the plugin with the `.uncrustify_plugin` extension, the plugin
will inform the user to remove these files and exit before running Uncrustify. This is to ensure the accuracy of the
results reported from each execution instance of the plugin.
The plugin determines the list of relevant files to check with Uncrustify and then invokes Uncrustify with that file
list. For any files not compliant to the configuration file provided, Uncrustify will generate a corresponding file
with the `.uncrustify_plugin` extension. The plugin discovers all of these files. If any such files are present, this
indicates a formatting issue was found and the test is marked failed (unless `AuditOnly` mode is enabled).
The test case log will contain a report of which files failed to format properly, allowing the user to run Uncrustify
against the file locally to fix the issue. If the `OutputFileDiffs` configuration option is set to `True`, the plugin
will output diff chunks for all code formatting issues in the test case log.

View File

@@ -1,618 +0,0 @@
# @file UncrustifyCheck.py
#
# An edk2-pytool based plugin wrapper for Uncrustify
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import configparser
import difflib
import errno
import logging
import os
import pathlib
import shutil
import timeit
from edk2toolext.environment import version_aggregator
from edk2toolext.environment.plugin_manager import PluginManager
from edk2toolext.environment.plugintypes.ci_build_plugin import ICiBuildPlugin
from edk2toolext.environment.plugintypes.uefi_helper_plugin import HelperFunctions
from edk2toolext.environment.var_dict import VarDict
from edk2toollib.log.junit_report_format import JunitReportTestCase
from edk2toollib.uefi.edk2.path_utilities import Edk2Path
from edk2toollib.utility_functions import RunCmd
from io import StringIO
from typing import Any, Dict, List, Tuple
#
# Provide more user friendly messages for certain scenarios
#
class UncrustifyException(Exception):
def __init__(self, message, exit_code):
super().__init__(message)
self.exit_code = exit_code
class UncrustifyAppEnvVarNotFoundException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -101)
class UncrustifyAppVersionErrorException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -102)
class UncrustifyAppExecutionException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -103)
class UncrustifyStalePluginFormattedFilesException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -120)
class UncrustifyInputFileCreationErrorException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -121)
class UncrustifyInvalidIgnoreStandardPathsException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -122)
class UncrustifyGitIgnoreFileException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -140)
class UncrustifyGitSubmoduleException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -141)
class UncrustifyCheck(ICiBuildPlugin):
"""
A CiBuildPlugin that uses Uncrustify to check the source files in the
package being tested for coding standard issues.
By default, the plugin runs against standard C source file extensions but
its configuration can be modified through its configuration file.
Configuration options:
"UncrustifyCheck": {
"AdditionalIncludePaths": [], # Additional paths to check formatting (wildcards supported).
"AuditOnly": False, # Don't fail the build if there are errors. Just log them.
"ConfigFilePath": "", # Custom path to an Uncrustify config file.
"IgnoreStandardPaths": [], # Standard Plugin defined paths that should be ignored.
"OutputFileDiffs": False, # Output chunks of formatting diffs in the test case log.
# This can significantly slow down the plugin on very large packages.
"SkipGitExclusions": False # Don't exclude git ignored files and files in git submodules.
}
"""
#
# By default, use an "uncrustify.cfg" config file in the plugin directory
# A package can override this path via "ConfigFilePath"
#
# Note: Values specified via "ConfigFilePath" are relative to the package
#
DEFAULT_CONFIG_FILE_PATH = os.path.join(
pathlib.Path(__file__).parent.resolve(), "uncrustify.cfg")
#
# The extension used for formatted files produced by this plugin
#
FORMATTED_FILE_EXTENSION = ".uncrustify_plugin"
#
# A package can add any additional paths with "AdditionalIncludePaths"
# A package can remove any of these paths with "IgnoreStandardPaths"
#
STANDARD_PLUGIN_DEFINED_PATHS = ("*.c", "*.h")
#
# The Uncrustify application path should set in this environment variable
#
UNCRUSTIFY_PATH_ENV_KEY = "UNCRUSTIFY_CI_PATH"
def GetTestName(self, packagename: str, environment: VarDict) -> Tuple:
""" Provide the testcase name and classname for use in reporting
Args:
packagename: string containing name of package to build
environment: The VarDict for the test to run in
Returns:
A tuple containing the testcase name and the classname
(testcasename, classname)
testclassname: a descriptive string for the testcase can include whitespace
classname: should be patterned <packagename>.<plugin>.<optionally any unique condition>
"""
return ("Check file coding standard compliance in " + packagename, packagename + ".UncrustifyCheck")
def RunBuildPlugin(self, package_rel_path: str, edk2_path: Edk2Path, package_config: Dict[str, List[str]], environment_config: Any, plugin_manager: PluginManager, plugin_manager_helper: HelperFunctions, tc: JunitReportTestCase, output_stream=None) -> int:
"""
External function of plugin. This function is used to perform the task of the CiBuild Plugin.
Args:
- package_rel_path: edk2 workspace relative path to the package
- edk2_path: Edk2Path object with workspace and packages paths
- package_config: Dictionary with the package configuration
- environment_config: Environment configuration
- plugin_manager: Plugin Manager Instance
- plugin_manager_helper: Plugin Manager Helper Instance
- tc: JUnit test case
- output_stream: The StringIO output stream from this plugin (logging)
Returns
>0 : Number of errors found
0 : Passed successfully
-1 : Skipped for missing prereq
"""
try:
# Initialize plugin and check pre-requisites.
self._initialize_environment_info(
package_rel_path, edk2_path, package_config, tc)
self._initialize_configuration()
self._check_for_preexisting_formatted_files()
# Log important context information.
self._log_uncrustify_app_info()
# Get template file contents if specified
self._get_template_file_contents()
# Create meta input files & directories
self._create_temp_working_directory()
self._create_uncrustify_file_list_file()
self._run_uncrustify()
# Post-execution actions.
self._process_uncrustify_results()
except UncrustifyException as e:
self._tc.LogStdError(
f"Uncrustify error {e.exit_code}. Details:\n\n{str(e)}")
logging.warning(
f"Uncrustify error {e.exit_code}. Details:\n\n{str(e)}")
return -1
else:
if self._formatted_file_error_count > 0:
if self._audit_only_mode:
logging.info(
"Setting test as skipped since AuditOnly is enabled")
self._tc.SetSkipped()
return -1
else:
self._tc.SetFailed(
f"{self._plugin_name} failed due to {self._formatted_file_error_count} incorrectly formatted files.", "CHECK_FAILED")
else:
self._tc.SetSuccess()
return self._formatted_file_error_count
finally:
self._cleanup_temporary_formatted_files()
self._cleanup_temporary_directory()
def _initialize_configuration(self) -> None:
"""
Initializes plugin configuration.
"""
self._initialize_app_info()
self._initialize_config_file_info()
self._initialize_file_to_format_info()
self._initialize_test_case_output_options()
def _check_for_preexisting_formatted_files(self) -> None:
"""
Checks if any formatted files from prior execution are present.
Existence of such files is an unexpected condition. This might result
from an error that occurred during a previous run or a premature exit from a debug scenario. In any case, the package should be clean before starting a new run.
"""
pre_existing_formatted_file_count = len(
[str(path.resolve()) for path in pathlib.Path(self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')])
if pre_existing_formatted_file_count > 0:
raise UncrustifyStalePluginFormattedFilesException(
f"{pre_existing_formatted_file_count} formatted files already exist. To prevent overwriting these files, please remove them before running this plugin.")
def _cleanup_temporary_directory(self) -> None:
"""
Cleans up the temporary directory used for this execution instance.
This removes the directory and all files created during this instance.
"""
if hasattr(self, '_working_dir'):
self._remove_tree(self._working_dir)
def _cleanup_temporary_formatted_files(self) -> None:
"""
Cleans up the temporary formmatted files produced by Uncrustify.
This will recursively remove all formatted files generated by Uncrustify
during this execution instance.
"""
if hasattr(self, '_abs_package_path'):
formatted_files = [str(path.resolve()) for path in pathlib.Path(
self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')]
for formatted_file in formatted_files:
os.remove(formatted_file)
def _create_temp_working_directory(self) -> None:
"""
Creates the temporary directory used for this execution instance.
"""
self._working_dir = os.path.join(
self._abs_workspace_path, "Build", ".pytool", "Plugin", f"{self._plugin_name}")
try:
pathlib.Path(self._working_dir).mkdir(parents=True, exist_ok=True)
except OSError as e:
raise UncrustifyInputFileCreationErrorException(
f"Error creating plugin directory {self._working_dir}.\n\n{repr(e)}.")
def _create_uncrustify_file_list_file(self) -> None:
"""
Creates the file with the list of source files for Uncrustify to process.
"""
self._app_input_file_path = os.path.join(
self._working_dir, "uncrustify_file_list.txt")
with open(self._app_input_file_path, 'w', encoding='utf8') as f:
f.writelines(f"\n".join(self._abs_file_paths_to_format))
def _execute_uncrustify(self) -> None:
"""
Executes Uncrustify with the initialized configuration.
"""
output = StringIO()
self._app_exit_code = RunCmd(
self._app_path,
f"-c {self._app_config_file} -F {self._app_input_file_path} --if-changed --suffix {UncrustifyCheck.FORMATTED_FILE_EXTENSION}", outstream=output)
self._app_output = output.getvalue().strip().splitlines()
def _get_git_ignored_paths(self) -> List[str]:
""""
Returns a list of file absolute path strings to all files ignored in this git repository.
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
outstream_buffer = StringIO()
exit_code = RunCmd("git", "ls-files --other",
workingdir=self._abs_workspace_path, outstream=outstream_buffer, logging_level=logging.NOTSET)
if (exit_code != 0):
raise UncrustifyGitIgnoreFileException(
f"An error occurred reading git ignore settings. This will prevent Uncrustify from running against the expected set of files.")
# Note: This will potentially be a large list, but at least sorted
return outstream_buffer.getvalue().strip().splitlines()
def _get_git_submodule_paths(self) -> List[str]:
"""
Returns a list of directory absolute path strings to the root of each submodule in the workspace repository.
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
if os.path.isfile(os.path.join(self._abs_workspace_path, ".gitmodules")):
logging.info(
f".gitmodules file found. Excluding submodules in {self._package_name}.")
outstream_buffer = StringIO()
exit_code = RunCmd("git", "config --file .gitmodules --get-regexp path", workingdir=self._abs_workspace_path, outstream=outstream_buffer, logging_level=logging.NOTSET)
if (exit_code != 0):
raise UncrustifyGitSubmoduleException(
f".gitmodule file detected but an error occurred reading the file. Cannot proceed with unknown submodule paths.")
submodule_paths = []
for line in outstream_buffer.getvalue().strip().splitlines():
submodule_paths.append(
os.path.normpath(os.path.join(self._abs_workspace_path, line.split()[1])))
return submodule_paths
else:
return []
def _get_template_file_contents(self) -> None:
"""
Gets the contents of Uncrustify template files if they are specified
in the Uncrustify configuration file.
"""
self._file_template_contents = None
self._func_template_contents = None
# Allow no value to allow "set" statements in the config file which do
# not specify value assignment
parser = configparser.ConfigParser(allow_no_value=True)
with open(self._app_config_file, 'r') as cf:
parser.read_string("[dummy_section]\n" + cf.read())
try:
file_template_name = parser["dummy_section"]["cmt_insert_file_header"]
file_template_path = pathlib.Path(file_template_name)
if not file_template_path.is_file():
file_template_path = pathlib.Path(os.path.join(self._plugin_path, file_template_name))
self._file_template_contents = file_template_path.read_text()
except KeyError:
logging.warn("A file header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified file header template file was not found.")
try:
func_template_name = parser["dummy_section"]["cmt_insert_func_header"]
func_template_path = pathlib.Path(func_template_name)
if not func_template_path.is_file():
func_template_path = pathlib.Path(os.path.join(self._plugin_path, func_template_name))
self._func_template_contents = func_template_path.read_text()
except KeyError:
logging.warn("A function header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified function header template file was not found.")
def _initialize_app_info(self) -> None:
"""
Initialize Uncrustify application information.
This function will determine the application path and version.
"""
# Verify Uncrustify is specified in the environment.
if UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY not in os.environ:
raise UncrustifyAppEnvVarNotFoundException(
f"Uncrustify environment variable {UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY} is not present.")
self._app_path = shutil.which('uncrustify', path=os.environ[UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY])
if self._app_path is None:
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_path)
self._app_path = os.path.normcase(os.path.normpath(self._app_path))
if not os.path.isfile(self._app_path):
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_path)
# Verify Uncrustify is present at the expected path.
return_buffer = StringIO()
ret = RunCmd(self._app_path, "--version", outstream=return_buffer)
if (ret != 0):
raise UncrustifyAppVersionErrorException(
f"Error occurred executing --version: {ret}.")
# Log Uncrustify version information.
self._app_version = return_buffer.getvalue().strip()
self._tc.LogStdOut(f"Uncrustify version: {self._app_version}")
version_aggregator.GetVersionAggregator().ReportVersion(
"Uncrustify", self._app_version, version_aggregator.VersionTypes.INFO)
def _initialize_config_file_info(self) -> None:
"""
Initialize Uncrustify configuration file info.
The config file path is relative to the package root.
"""
self._app_config_file = UncrustifyCheck.DEFAULT_CONFIG_FILE_PATH
if "ConfigFilePath" in self._package_config:
self._app_config_file = self._package_config["ConfigFilePath"].strip()
self._app_config_file = os.path.normpath(
os.path.join(self._abs_package_path, self._app_config_file))
if not os.path.isfile(self._app_config_file):
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_config_file)
def _initialize_environment_info(self, package_rel_path: str, edk2_path: Edk2Path, package_config: Dict[str, List[str]], tc: JunitReportTestCase) -> None:
"""
Initializes plugin environment information.
"""
self._abs_package_path = edk2_path.GetAbsolutePathOnThisSytemFromEdk2RelativePath(
package_rel_path)
self._abs_workspace_path = edk2_path.WorkspacePath
self._package_config = package_config
self._package_name = os.path.basename(
os.path.normpath(package_rel_path))
self._plugin_name = self.__class__.__name__
self._plugin_path = os.path.dirname(os.path.realpath(__file__))
self._rel_package_path = package_rel_path
self._tc = tc
def _initialize_file_to_format_info(self) -> None:
"""
Forms the list of source files for Uncrustify to process.
"""
# Create a list of all the package relative file paths in the package to run against Uncrustify.
rel_file_paths_to_format = list(
UncrustifyCheck.STANDARD_PLUGIN_DEFINED_PATHS)
# Allow the ci.yaml to remove any of the pre-defined standard paths
if "IgnoreStandardPaths" in self._package_config:
for a in self._package_config["IgnoreStandardPaths"]:
if a.strip() in rel_file_paths_to_format:
self._tc.LogStdOut(
f"Ignoring standard path due to ci.yaml ignore: {a}")
rel_file_paths_to_format.remove(a.strip())
else:
raise UncrustifyInvalidIgnoreStandardPathsException(f"Invalid IgnoreStandardPaths value: {a}")
# Allow the ci.yaml to specify additional include paths for this package
if "AdditionalIncludePaths" in self._package_config:
rel_file_paths_to_format.extend(
self._package_config["AdditionalIncludePaths"])
self._abs_file_paths_to_format = []
for path in rel_file_paths_to_format:
self._abs_file_paths_to_format.extend(
[str(path.resolve()) for path in pathlib.Path(self._abs_package_path).rglob(path)])
if not "SkipGitExclusions" in self._package_config or not self._package_config["SkipGitExclusions"]:
# Remove files ignored by git
logging.info(
f"{self._package_name} file count before git ignore file exclusion: {len(self._abs_file_paths_to_format)}")
ignored_paths = self._get_git_ignored_paths()
self._abs_file_paths_to_format = list(
set(self._abs_file_paths_to_format).difference(ignored_paths))
logging.info(
f"{self._package_name} file count after git ignore file exclusion: {len(self._abs_file_paths_to_format)}")
# Remove files in submodules
logging.info(
f"{self._package_name} file count before submodule exclusion: {len(self._abs_file_paths_to_format)}")
submodule_paths = tuple(self._get_git_submodule_paths())
for path in submodule_paths:
logging.info(f" submodule path: {path}")
self._abs_file_paths_to_format = [
f for f in self._abs_file_paths_to_format if not f.startswith(submodule_paths)]
logging.info(
f"{self._package_name} file count after submodule exclusion: {len(self._abs_file_paths_to_format)}")
# Sort the files for more consistent results
self._abs_file_paths_to_format.sort()
def _initialize_test_case_output_options(self) -> None:
"""
Initializes options that influence test case output.
"""
self._audit_only_mode = False
self._output_file_diffs = False
if "AuditOnly" in self._package_config and self._package_config["AuditOnly"]:
self._audit_only_mode = True
if "OutputFileDiffs" in self._package_config and self._package_config["OutputFileDiffs"]:
self._output_file_diffs = True
def _log_uncrustify_app_info(self) -> None:
"""
Logs Uncrustify application information.
"""
self._tc.LogStdOut(f"Found Uncrustify at {self._app_path}")
self._tc.LogStdOut(f"Uncrustify version: {self._app_version}")
self._tc.LogStdOut('\n')
logging.info(f"Found Uncrustify at {self._app_path}")
logging.info(f"Uncrustify version: {self._app_version}")
logging.info('\n')
def _process_uncrustify_results(self) -> None:
"""
Process the results from Uncrustify.
Determines whether formatting errors are present and logs failures.
"""
formatted_files = [str(path.resolve()) for path in pathlib.Path(
self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')]
self._formatted_file_error_count = len(formatted_files)
if self._formatted_file_error_count > 0:
self._tc.LogStdError("Files with formatting errors:\n")
if self._output_file_diffs:
logging.info("Calculating file diffs. This might take a while...")
for formatted_file in formatted_files:
pre_formatted_file = formatted_file[:-
len(UncrustifyCheck.FORMATTED_FILE_EXTENSION)]
logging.error(pre_formatted_file)
if (self._output_file_diffs or
self._file_template_contents is not None or
self._func_template_contents is not None):
self._tc.LogStdError(
f"Formatting errors in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
with open(formatted_file) as ff:
formatted_file_text = ff.read()
if (self._file_template_contents is not None and
self._file_template_contents in formatted_file_text):
self._tc.LogStdError(f"File header is missing in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
if (self._func_template_contents is not None and
self._func_template_contents in formatted_file_text):
self._tc.LogStdError(f"A function header is missing in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
if self._output_file_diffs:
with open(pre_formatted_file) as pf:
pre_formatted_file_text = pf.read()
for line in difflib.unified_diff(pre_formatted_file_text.split('\n'), formatted_file_text.split('\n'), fromfile=pre_formatted_file, tofile=formatted_file, n=3):
self._tc.LogStdError(line)
self._tc.LogStdError('\n')
else:
self._tc.LogStdError(pre_formatted_file)
def _remove_tree(self, dir_path: str, ignore_errors: bool = False) -> None:
"""
Helper for removing a directory. Over time there have been
many private implementations of this due to reliability issues in the
shutil implementations. To consolidate on a single function this helper is added.
On error try to change file attributes. Also add retry logic.
This function is temporarily borrowed from edk2toollib.utility_functions
since the version used in edk2 is not recent enough to include the
function.
This function should be replaced by "RemoveTree" when it is available.
Args:
- dir_path: Path to directory to remove.
- ignore_errors: Whether to ignore errors during removal
"""
def _remove_readonly(func, path, _):
"""
Private function to attempt to change permissions on file/folder being deleted.
"""
os.chmod(path, os.stat.S_IWRITE)
func(path)
for _ in range(3): # retry up to 3 times
try:
shutil.rmtree(dir_path, ignore_errors=ignore_errors, onerror=_remove_readonly)
except OSError as err:
logging.warning(f"Failed to fully remove {dir_path}: {err}")
else:
break
else:
raise RuntimeError(f"Failed to remove {dir_path}")
def _run_uncrustify(self) -> None:
"""
Runs Uncrustify for this instance of plugin execution.
"""
logging.info("Executing Uncrustify. This might take a while...")
start_time = timeit.default_timer()
self._execute_uncrustify()
end_time = timeit.default_timer() - start_time
execution_summary = f"Uncrustify executed against {len(self._abs_file_paths_to_format)} files in {self._package_name} in {end_time:.2f} seconds.\n"
self._tc.LogStdOut(execution_summary)
logging.info(execution_summary)
if self._app_exit_code != 0 and self._app_exit_code != 1:
raise UncrustifyAppExecutionException(
f"Error {str(self._app_exit_code)} returned from Uncrustify:\n\n{str(self._app_output)}")

View File

@@ -1,9 +0,0 @@
/** @file
Brief description of the file's purpose.
Detailed description of the file's contents and other useful
information for a person viewing the file for the first time.
<<Copyright>>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/

View File

@@ -1,15 +0,0 @@
/**
Brief description of this function's purpose.
Follow it immediately with the detailed description.
@param[in] Arg1 Description of Arg1.
@param[in] Arg2 Description of Arg2 This is complicated and requires
multiple lines to describe.
@param[out] Arg3 Description of Arg3.
@param[in, out] Arg4 Description of Arg4.
@retval VAL_ONE Description of what VAL_ONE signifies.
@retval OTHER This is the only other return value. If there were other
return values, they would be listed.
**/

View File

@@ -1,462 +0,0 @@
## @file
# Uncrustify Configuration File for EDK II C Code
#
# Coding Standard: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
#
# This configuration file is meant to be a "best attempt" to align with the
# definitions in the EDK II C Coding Standards Specification.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
# Force UTF-8 encoding (no UTF-16)
enable_digraphs = false
utf8_byte = false
utf8_force = true
# Code width / line splitting
#code_width =120 # TODO: This causes non-deterministic behaviour in some cases when code wraps
ls_code_width =false
ls_for_split_full =true
ls_func_split_full =true
pos_comma =trail
# 5.1.7 All files must end with CRLF
newlines = crlf
# 5.1.2 Do not use tab characters
cmt_convert_tab_to_spaces = true # Whether to convert all tabs to spaces in comments. If false, tabs in
# comments are left alone, unless used for indenting.
indent_columns = 2 # Number of spaces for indentation
indent_with_tabs = 0 # Do not use TAB characters
string_replace_tab_chars = true # Replace TAB with SPACE
# Note: This will break .robot files but is needed for edk2 style
# 5.2.1.1 There shall be only one statement on a line (statement ends with ;)
nl_multi_line_cond = true # Add a newline between ')' and '{' if the ')' is on a different line than
# the if/for/etc.
nl_after_semicolon = true # Whether to add a newline after semicolons, except in 'for' statements.
# 5.2.1.3 An open brace '{' goes on the same line as the closing parenthesis ')' of simple predicate expressions
mod_full_brace_do = add # Add or remove braces on a single-line 'do' statement.
mod_full_brace_for = add
mod_full_brace_function = add # Add or remove braces on a single-line function definition.
mod_full_brace_if = add # Add or remove braces on a single-line 'if' statement. Braces will not be
# removed if the braced statement contains an 'else'.
mod_full_brace_if_chain = false
mod_full_brace_while = add
# 5.2.1.4 A close brace '}' always goes at the beginning of the last line of the body
eat_blanks_after_open_brace = true
eat_blanks_before_close_brace = true # Whether to remove blank lines before '}'.
# 5.2.2.2 Always put space before and after binary operators.
sp_assign = add # Add or remove space around assignment operator '=', '+=', etc.
sp_assign_default = add
sp_bool = add # Add or remove space around boolean operators '&&' and '||'.
sp_compare = add # Add or remove space around compare operator '<', '>', '==', etc.
# 5.2.2.3 Do not put space between unary operators and their object
sp_addr = remove # A or remove space after the '&' (address-of) unary operator.
sp_incdec = remove # Add or remove space between '++' and '--' the word to which it is being
# applied, as in '(--x)' or 'y++;'.
sp_inv = remove # Add or remove space after the '~' (invert) unary operator.
sp_not = remove # Add or remove space after the '!' (not) unary operator.
sp_sign = remove # Add or remove space after '+' or '-', as in 'x = -5' or 'y = +7'.
# 5.2.2.4 Subsequent lines of multi-line function calls should line up two spaces from the beginning of the function
# name
nl_func_call_args_multi_line = true # Whether to add a newline after each ',' in a function call if '(' and ')'
# are in different lines.
nl_func_call_args_multi_line_ignore_closures = false
# - Indent each argument 2 spaces from the start of the function name. If a
# function is called through a structure or union member, of type
# pointer-to-function, then indent each argument 2 spaces from the start of the
# member name.
indent_func_call_edk2_style = true # Use EDK2 indentation style for function calls (**CUSTOM SETTING**)
indent_paren_after_func_call = true # Whether to indent the open parenthesis of a function call, if the
# parenthesis is on its own line.
# - Align the close parenthesis with the start of the last argument
indent_paren_close = 0 # How to indent a close parenthesis after a newline.
# (0: Body, 1: Openparenthesis, 2: Brace level)
# 5.2.2.5 Always put space after commas or semicolons that separate items
sp_after_comma = force # Add or remove space after ',', i.e. 'a,b' vs. 'a, b'.
sp_before_comma = remove # Add or remove space before ','.
# 5.2.2.6 Always put space before an open parenthesis
sp_after_sparen = add # Add or remove space after ')' of control statements.
sp_attribute_paren = add # Add or remove space between '__attribute__' and '('.
sp_before_sparen = force # Add or remove space before '(' of control statements
# ('if', 'for', 'switch', 'while', etc.).
sp_defined_paren = force # Add or remove space between 'defined' and '(' in '#if defined (FOO)'.
sp_func_call_paren = force # Add or remove space between function name and '(' on function calls.
sp_func_call_paren_empty = force # Add or remove space between function name and '()' on function calls
# without parameters. If set to ignore (the default), sp_func_call_paren is
# used.
sp_func_def_paren = add # Add or remove space between alias name and '(' of a non-pointer function
# type typedef.
sp_func_proto_paren = add # Add or remove space between function name and '()' on function declaration
sp_sizeof_paren = force # Add or remove space between 'sizeof' and '('.
sp_type_func = add # Add or remove space between return type and function name. A minimum of 1
# is forced except for pointer return types.
# Not specified, but also good style to remove spaces inside parentheses (Optional)
sp_cparen_oparen = remove # Add or remove space between back-to-back parentheses, i.e. ')(' vs. ') ('.
sp_inside_fparen = remove # Add or remove space inside function '(' and ')'.
sp_inside_fparens = remove # Add or remove space inside empty function '()'.
sp_inside_paren = remove # Add or remove space inside '(' and ')'.
sp_inside_paren_cast = remove # Add or remove spaces inside cast parentheses. '(int)x'
sp_inside_square = remove # Add or remove space inside a non-empty '[' and ']'.
sp_paren_paren = remove # Add or remove space between nested parentheses, i.e. '((' vs. ') )'.
sp_square_fparen = remove # Add or remove space between ']' and '(' when part of a function call.
# 5.2.2.7 Put a space before an open brace if it is not on its own line
sp_do_brace_open = force # Add or remove space between 'do' and '{'.
sp_paren_brace = force # Add or remove space between ')' and '{'.
sp_sparen_brace = force # Add or remove space between ')' and '{' of of control statements.
# 5.2.2.8 Do not put spaces around structure member and pointer operators
sp_after_byref = remove # Add or remove space after reference sign '&', if followed by a word.
sp_before_byref = add # Add or remove space before a reference sign '&'.
sp_deref = remove # Add or remove space after the '*' (dereference) unary operator. This does
# not affect the spacing after a '*' that is part of a type.
sp_member = remove # Add or remove space around the '.' or '->' operators.
# 5.2.2.9 Do not put spaces before open brackets of array subscripts
sp_before_square = remove # Add or remove space before '[' (except '[]').
sp_before_squares = remove # Add or remove space before '[]'.
sp_before_vardef_square = remove # Add or remove space before '[' for a variable definition.
# 5.2.2.10 Use extra parentheses rather than depending on in-depth knowledge of the order of precedence of C
mod_full_paren_if_bool = true # Whether to fully parenthesize Boolean expressions in 'while' and 'if'
# statement, as in 'if (a && b > c)' => 'if (a && (b > c))'.
# 5.2.2.11 Align a continuation line with the part of the line that it continues.
use_indent_continue_only_once = true
# Additional '{}' bracing rules (Optional)
# NOTE - The style guide specifies two different styles for braces,
# so these are ignored for now to allow developers some flexibility.
nl_after_brace_close = true # Whether to add a newline after '}'. Does not apply if followed by a
# necessary ';'.
nl_brace_else = remove # Add or remove newline between '}' and 'else'.
nl_brace_while = remove # Add or remove newline between '}' and 'while' of 'do' statement.
nl_do_brace = remove # Add or remove newline between 'do' and '{'.
nl_else_brace = remove # Add or remove newline between 'else' and '{'.
nl_else_if = remove # Add or remove newline between 'else' and 'if'.
nl_elseif_brace = remove # Add or remove newline between 'else if' and '{'.
nl_enum_brace = remove # Add or remove newline between 'enum' and '{'.
nl_fcall_brace = remove # Add or remove newline between a function call's ')' and '{',
# as in 'list_for_each(item, &list) { }'.
nl_for_brace = remove # Add or remove newline between 'for' and '{'.
nl_if_brace = remove # Add or remove newline between 'if' and '{'.
nl_struct_brace = remove # Add or remove newline between 'struct and '{'.
nl_switch_brace = remove # Add or remove newline between 'switch' and '{'.
nl_union_brace = remove # Add or remove newline between 'union' and '{'.
nl_while_brace = remove # Add or remove newline between 'while' and '{'.
# Additional whitespace rules (Optional)
sp_after_ptr_star = remove # Add or remove space after pointer star '*', if followed by a word.
# Useful when paired with align_var_def_star_style==2
sp_after_ptr_star_func = remove # Add or remove space after a pointer star '*', if followed by a function
# prototype or function definition.
sp_after_semi = remove # Add or remove space after ';', except when followed by a comment.
sp_before_case_colon = remove # Add or remove space before case ':'.
sp_before_ptr_star = add # Add or remove space before pointer star '*'.
sp_before_ptr_star_func = add # Add or remove space before a pointer star '*', if followed by a function
# prototype or function definition.
sp_before_semi = remove # Add or remove space before ';'
sp_before_semi_for = remove # Add or remove space before ';' in non-empty 'for' statements.
sp_before_semi_for_empty = add # Add or remove space before a semicolon of an empty part of a for statement
sp_between_ptr_star = remove # Add or remove space between pointer stars '*'. (ie, 'VOID **')
sp_brace_close_while = force # Add or remove space between '}' and 'while'.
sp_after_cast = remove
sp_after_type = add
sp_balance_nested_parens = false
sp_before_nl_cont = add
sp_before_square_asm_block = ignore
sp_before_unnamed_byref = add
sp_brace_brace = ignore
sp_brace_else = force
sp_brace_typedef = add
sp_case_label = force
sp_cmt_cpp_doxygen = true
sp_cond_colon = add
sp_cond_question = add
sp_cpp_cast_paren = force
sp_else_brace = force
sp_endif_cmt = force
sp_enum_assign = add
sp_inside_braces = force
sp_inside_braces_empty = force
sp_inside_braces_enum = force
sp_inside_braces_struct = force
sp_pp_concat = add
sp_pp_stringify = add
sp_return_paren = add
sp_special_semi = force
sp_while_paren_open = force
# Additional Indentation Rules
indent_access_spec = 1
indent_access_spec_body = false
indent_align_assign = true
indent_align_string = true
indent_bool_paren = true
indent_brace_parent = false
indent_braces = false
indent_braces_no_class = false
indent_braces_no_func = true
indent_braces_no_struct = false
indent_class = false
indent_class_colon = false
indent_cmt_with_tabs = false # Whether to indent comments that are not at a brace level with tabs on
# a tabstop. Requires indent_with_tabs=2. If false, will use spaces.
indent_col1_comment = true
indent_col1_multi_string_literal= true
indent_comma_paren = true
indent_else_if = true
indent_extern = false
indent_first_bool_expr = true
indent_func_def_param_paren_pos_threshold = 0
indent_func_param_double = false
indent_func_proto_param = true
indent_ignore_asm_block = true
indent_label = 1
indent_member = 2
indent_namespace = false
indent_param = 2
indent_paren_nl = false
indent_paren_open_brace = false
indent_preserve_sql = false
indent_relative_single_line_comments = false
indent_sing_line_comments = 0
indent_single_newlines = false
indent_square_nl = false
indent_switch_case = 2
indent_template_param = true
indent_var_def_blk = 0
indent_var_def_cont = false
# Tidy-up rules (Optional)
mod_move_case_break = true # Whether to move a 'break' that appears after a fully braced 'case'
# before the close brace, as in 'case X: { ... } break;' =>
# 'case X: { ... break; }'.
mod_pawn_semicolon = false
mod_remove_empty_return = false # Whether to remove a void 'return;' that appears as the last statement
# in a function.
mod_remove_extra_semicolon = true
mod_sort_import = false
mod_sort_include = false
mod_sort_using = false
nl_after_case = false # Whether to add a newline after a 'case' statement.
nl_end_of_file = force # Add or remove newline at the end of the file.
nl_end_of_file_min = 1 # The minimum number of newlines at the end of the file
nl_max = 2 # The maximum number of consecutive newlines (3 = 2 blank lines).
nl_start_of_file = remove # Add or remove newlines at the start of the file.
# Code alignment rules (Optional)
align_asm_colon = false
align_assign_span = 1 # The span for aligning on '=' in assignments.
align_assign_thresh = 0
align_edk2_style = true # Whether to apply edk2-specific alignment formatting
align_enum_equ_span = 1 # The span for aligning on '=' in enums.
align_func_params = true # Whether to align variable definitions in prototypes and functions.
align_func_params_gap = 2
align_func_params_span = 2 # The span for aligning parameter definitions in function on parameter name.
align_func_params_thresh = 0
align_func_proto_span = 0
align_keep_tabs = false
align_left_shift = false
align_mix_var_proto = false
align_nl_cont = false
align_oc_decl_colon = false
align_on_operator = false
align_on_tabstop = false
align_pp_define_gap = 2
align_pp_define_span = 1
align_right_cmt_at_col = 0 # Align trailing comment at or beyond column N; 'pulls in' comments as
# a bonus side effect (0=ignore)
align_right_cmt_gap = 0 # If a trailing comment is more than this number of columns away from the
# text it follows,
# it will qualify for being aligned. This has to be > 0 to do anything.
align_right_cmt_mix = false # If aligning comments, mix with comments after '}' and #endif with less
# than 3 spaces before the comment
align_right_cmt_same_level = true # Whether to only align trailing comments that are at the same brace level.
align_right_cmt_span = 2 # The span for aligning comments that end lines.
align_same_func_call_params = false
align_single_line_brace = true
align_single_line_func = true
align_struct_init_span = 1 # The span for aligning struct initializer values.
align_typedef_amp_style = 1
align_typedef_func = 1 # How to align typedef'd functions with other typedefs.
# (0: No align, 1: Align open paranthesis, 2: Align function type name)
align_typedef_gap = 2
align_typedef_span = 1 # The span for aligning single-line typedefs.
align_typedef_star_style = 1
align_var_def_amp_style = 1
align_var_def_attribute = true
align_var_def_colon = true # Whether to align the colon in struct bit fields.
align_var_def_gap = 2 # The gap (minimum spacing for aligned items) for variable definitions.
align_var_def_inline = false
align_var_def_span = 1 # The span (lines needed to align) for aligning variable definitions.
align_var_def_star_style = 1 # How to consider (or treat) the '*' in the alignment of variable
# definitions.
# 0: Part of the type 'void * foo;' (default)
# 1: Part of the variable 'void *foo;'
# 2: Dangling 'void *foo;'
# (Note - should also set sp_after_ptr_star=remove)
align_var_struct_gap = 4
align_var_struct_span = 8 # The span for aligning struct/union member definitions.
align_var_struct_thresh = 0
align_with_tabs = false
# Comment formatting
cmt_align_doxygen_javadoc_tags = true # Whether to align doxygen javadoc-style tags ('@param', '@return', etc.)
# TODO: Eats '[' in '[in]'
cmt_c_group = false
cmt_c_nl_end = true # Whether to add a newline before the closing '*/' of the combined c-comment.
cmt_c_nl_start = true
cmt_cpp_group = false
cmt_cpp_nl_end = true
cmt_cpp_nl_start = true
cmt_cpp_to_c = false
cmt_indent_multi = false # Whether to apply changes to multi-line comments, including cmt_width,
# keyword substitution and leading chars.
cmt_insert_before_preproc = false
#cmt_insert_file_header = default_file_header.txt
#cmt_insert_func_header = default_function_header.txt
cmt_multi_check_last = false
cmt_multi_first_len_minimum = 2
cmt_reflow_mode = 1 # How to reflow comments.
# (0:No reflow, 1:No touching at all, 2: Full reflow)
cmt_sp_after_star_cont = 0 # The number of spaces to insert after the star on subsequent comment lines.
cmt_sp_before_star_cont = 0 # The number of spaces to insert at the start of subsequent comment lines.
cmt_star_cont = false # Whether to put a star on subsequent comment lines.
cmt_width = 120 # Try to wrap comments at N columns.
sp_cmt_cpp_start = add # Add or remove space after the opening of a C++ comment, as in
# '// <here> A'. NOTE: Breaks indentation within comments.
# Function definitions / declarations
indent_func_call_param = false # Whether to indent continued function call parameters one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_class_param = false # Whether to indent continued function call declaration one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_ctor_var_param = false # Whether to indent continued class variable constructors one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_def_param = true # Whether to indent continued function definition parameters one indent
# level, rather than aligning parameters under the open parenthesis.
nl_fdef_brace = add # Add or remove newline between function signature and '{'.
nl_func_call_end_multi_line = true # Whether to add a newline before ')' in a function call if '(' and ')' are
# in different lines.
nl_func_call_paren = remove # Add or remove newline between a function name and the opening '(' in the
# call.
nl_func_call_start_multi_line = true # Whether to add a newline after '(' in a function call if '(' and ')' are
# in different lines.
nl_func_decl_args = force # Add or remove newline after each ',' in a function declaration.
nl_func_decl_empty = add # Add or remove newline between '()' in a function declaration.
nl_func_def_args = force # Add or remove newline after each ',' in a function definition.
nl_func_def_empty = add # Add or remove newline between '()' in a function definition.
nl_func_def_paren = remove # Add or remove newline between a function name and the opening '('
# in the definition.
nl_func_paren = remove # Add or remove newline between a function name and the opening '(' in
# the declaration.
nl_func_type_name = add # Add or remove newline between return type and function name in a function
# definition.
sp_fparen_brace = force # Add or remove space between ')' and '{' of function.
use_indent_func_call_param = true # indent_func_call_param will be used
# Additional Newline Rules
nl_after_brace_open = true # Whether to add a newline after '{'. This also adds a newline
# before the matching '}'.
nl_after_brace_open_cmt = true # Whether to add a newline between the open brace and a
# trailing single-line comment.
# Requires nl_after_brace_open = true.
nl_after_do = add # Add or remove blank line after 'do/while' statement.
nl_after_for = add # Add or remove blank line after 'for' statement.
nl_after_func_body = 2 # The number of newlines after '}' of a multi-line function body
nl_after_func_body_one_liner = 2
nl_after_func_proto = 2
nl_after_func_proto_group = 2
nl_after_if = add
nl_after_multiline_comment = false
nl_after_return = false
nl_after_struct = 2
nl_after_switch = add
nl_after_vbrace_close = true
nl_after_vbrace_open = true
nl_after_vbrace_open_empty = true
nl_after_while = add
nl_assign_leave_one_liners = true
nl_before_block_comment = 2
nl_before_case = false
nl_before_do = ignore
nl_before_for = ignore
nl_before_if = ignore
nl_before_switch = ignore
nl_before_while = ignore
nl_before_whole_file_ifdef = 2
nl_brace_brace = force
nl_brace_struct_var = remove
nl_case_colon_brace = add
nl_class_leave_one_liners = false
nl_collapse_empty_body = false
nl_comment_func_def = 1
nl_create_for_one_liner = false
nl_create_if_one_liner = false
nl_create_while_one_liner = false
nl_define_macro = false
nl_ds_struct_enum_close_brace = true
nl_ds_struct_enum_cmt = false
nl_enum_leave_one_liners = false
nl_func_decl_end = add
nl_func_decl_start = add
nl_func_def_end = add
nl_func_def_start = add
nl_func_leave_one_liners = false
nl_func_proto_type_name = add
nl_func_var_def_blk = 1
nl_getset_leave_one_liners = false
nl_if_leave_one_liners = false
nl_multi_line_define = false
nl_squeeze_ifdef = false
nl_var_def_blk_end = 0
nl_var_def_blk_start = 0
# Preprocessor Rules
pp_define_at_level = true
pp_if_indent_code = false
pp_indent_func_def = false
pp_indent_extern = false
pp_ignore_define_body = true # Workaround: Turn off processing for #define body
# (current rules do not work for some defines)
pp_indent = add
pp_indent_at_level = true
pp_indent_count = 2
pp_indent_if = 2
pp_indent_region = 2
pp_region_indent_code = false
pp_space = remove
#
# The tokens below are assigned specific types so they are always recognized properly.
#
# Explicitly define EDK II qualifiers
set QUALIFIER CONST
set QUALIFIER EFIAPI
set QUALIFIER IN
set QUALIFIER OPTIONAL
set QUALIFIER OUT
# Explicitly define EDK II types
set TYPE EFI_STATUS
set TYPE VOID

View File

@@ -1,16 +0,0 @@
## @file
# Downloads the Uncrustify application from a Project Mu NuGet package.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"id": "uncrustify-ci-1",
"scope": "cibuild",
"type": "nuget",
"name": "mu-uncrustify-release",
"source": "https://pkgs.dev.azure.com/projectmu/Uncrustify/_packaging/mu_uncrustify/nuget/v3/index.json",
"version": "73.0.3",
"flags": ["set_shell_var", "host_specific"],
"var_name": "UNCRUSTIFY_CI_PATH"
}

View File

@@ -1,11 +0,0 @@
## @file
# CiBuildPlugin used to check coding standard compliance of EDK II style C source code
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"scope": "cibuild",
"name": "Uncrustify Coding Standard Test",
"module": "UncrustifyCheck"
}

View File

@@ -2,32 +2,31 @@
## Basic Status
| Package | Windows VS2019 (IA32/X64)| Ubuntu GCC (IA32/X64/ARM/AARCH64) | Known Issues |
| :---- | :----- | :---- | :--- |
| ArmPkg | | :heavy_check_mark: |
| ArmPlatformPkg | | :heavy_check_mark: |
| ArmVirtPkg | SEE PACKAGE README | SEE PACKAGE README |
| CryptoPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| DynamicTablesPkg | | :heavy_check_mark: |
| EmbeddedPkg |
| EmulatorPkg | SEE PACKAGE README | SEE PACKAGE README | Spell checking in audit mode
| FatPkg | :heavy_check_mark: | :heavy_check_mark: |
| FmpDevicePkg | :heavy_check_mark: | :heavy_check_mark: |
| IntelFsp2Pkg |
| IntelFsp2WrapperPkg |
| MdeModulePkg | :heavy_check_mark: | :heavy_check_mark: | DxeIpl dependency on ArmPkg, Depends on StandaloneMmPkg, Spell checking in audit mode
| MdePkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| NetworkPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| OvmfPkg | SEE PACKAGE README | SEE PACKAGE README | Spell checking in audit mode
| PcAtChipsetPkg | :heavy_check_mark: | :heavy_check_mark: |
| SecurityPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| ShellPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 3 modules are not being built by DSC
| SignedCapsulePkg |
| SourceLevelDebugPkg |
| StandaloneMmPkg | :heavy_check_mark: | :heavy_check_mark: |
| UefiCpuPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 2 binary modules not being built by DSC
| UefiPayloadPkg |
| UnitTestFrameworkPkg | :heavy_check_mark: | :heavy_check_mark: |
| Package | Windows VS2019 (IA32/X64)| Ubuntu GCC (IA32/X64/ARM/AARCH64) | Known Issues |
| :---- | :----- | :---- | :--- |
| ArmPkg |
| ArmPlatformPkg |
| ArmVirtPkg |
| CryptoPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| DynamicTablesPkg |
| EmbeddedPkg |
| EmulatorPkg |
| FatPkg | :heavy_check_mark: | :heavy_check_mark: |
| FmpDevicePkg | :heavy_check_mark: | :heavy_check_mark: |
| IntelFsp2Pkg |
| IntelFsp2WrapperPkg |
| MdeModulePkg | :heavy_check_mark: | :heavy_check_mark: | DxeIpl dependency on ArmPkg, Depends on StandaloneMmPkg, Spell checking in audit mode
| MdePkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| NetworkPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| OvmfPkg |
| PcAtChipsetPkg | :heavy_check_mark: | :heavy_check_mark: |
| SecurityPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode
| ShellPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 3 modules are not being built by DSC
| SignedCapsulePkg |
| SourceLevelDebugPkg |
| StandaloneMmPkg |
| UefiCpuPkg | :heavy_check_mark: | :heavy_check_mark: | Spell checking in audit mode, 2 binary modules not being built by DSC
| UefiPayloadPkg |
For more detailed status look at the test results of the latest CI run on the
repo readme.
@@ -78,7 +77,7 @@ per package configuration which comes from this file.
## Running CI locally
The EDKII Tools environment (and by extension the ci) is designed to support
easily and consistently running locally and in a cloud ci environment. To do
easily and consistantly running locally and in a cloud ci environment. To do
that a few steps should be followed. Details of EDKII Tools can be found in the
[docs folder here](https://github.com/tianocore/edk2-pytool-extensions/tree/master/docs)
@@ -89,7 +88,7 @@ that a few steps should be followed. Details of EDKII Tools can be found in the
* VS 2017 or VS 2019
* Windows SDK (for rc)
* Windows WDK (for capsules)
* Ubuntu 18.04 or Fedora
* Ubuntu 16.04
* GCC5
* Easy to add more but this is the current state
2. Python 3.7.x or newer on path
@@ -138,31 +137,11 @@ location makes more sense for the community.
### Module Inclusion Test - DscCompleteCheck
This scans all INF files from a package and confirms they are
listed in the package level DSC file. The test considers it an error if any INF
does not appear in the `Components` section of the package-level DSC (indicating
that it would not be built if the package were built). This is critical because
much of the CI infrastructure assumes that all modules will be listed in the DSC
and compiled.
This test will ignore INFs in the following cases:
1. When `MODULE_TYPE` = `HOST_APPLICATION`
2. When a Library instance **only** supports the `HOST_APPLICATION` environment
### Host Module Inclusion Test - HostUnitTestDscCompleteCheck
This test scans all INF files from a package for those related to host
based unit tests and confirms they are listed in the unit test DSC file for the package.
The test considers it an error if any INF meeting the requirements does not appear
in the `Components` section of the unit test DSC. This is critical because
much of the CI infrastructure assumes that modules will be listed in the DSC
and compiled.
This test will only require INFs in the following cases:
1. When `MODULE_TYPE` = `HOST_APPLICATION`
2. When a Library instance explicitly supports the `HOST_APPLICATION` environment
This test scans all available modules (via INF files) and compares them to the
package-level DSC file for the package each module is contained within. The test
considers it an error if any module does not appear in the `Components` section
of at least one package-level DSC (indicating that it would not be built if the
package were built).
### Code Compilation Test - CompilerPlugin
@@ -171,46 +150,6 @@ all package-level DSCs were built, the Code Compilation Test simply runs through
and builds every package-level DSC on every toolchain and for every architecture
that is supported. Any module that fails to build is considered an error.
### Host Unit Test Compilation and Run Test - HostUnitTestCompilerPlugin
A test that compiles the dsc for host based unit test apps.
On Windows this will also enable a build plugin to execute that will run the unit tests and verify the results.
These tools will be invoked on any CI
pass that includes the NOOPT target. In order for these tools to do their job,
the package and tests must be configured in a particular way...
#### Including Host-Based Tests in the Package YAML
For example, looking at the `MdeModulePkg.ci.yaml` config file, there are two
config options that control HostBased test behavior:
```json
## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
"HostUnitTestCompilerPlugin": {
"DscPath": "Test/MdeModulePkgHostTest.dsc"
},
```
This option tell the test builder to run. The test builder needs to know which
modules in this package are host-based tests, so that DSC path is provided.
#### Configuring the HostBased DSC
The HostBased DSC for `MdeModulePkg` is located at
`MdeModulePkg/Test/MdeModulePkgHostTest.dsc`.
To add automated host-based unit test building to a new package, create a
similar DSC. The new DSC should make sure to have the `NOOPT` BUILD_TARGET
and should include the line:
```
!include UnitTestFrameworkPkg/UnitTestFrameworkPkgHost.dsc.inc
```
All of the modules that are included in the `Components` section of this
DSC should be of type HOST_APPLICATION.
### GUID Uniqueness Test - GuidCheck
This test works on the collection of all packages rather than an individual
@@ -254,20 +193,6 @@ Install
More cspell info: https://github.com/streetsidesoftware/cspell
### License Checking - LicenseCheck
Scans all new added files in a package to make sure code is contributed under
BSD-2-Clause-Patent.
### Ecc tool - EccCheck
Run the Ecc tool on the package. The Ecc tool is available in the BaseTools
package. It checks that the code complies to the EDKII coding standard.
### Coding Standard Compliance - UncrustifyCheck
Runs the Uncrustify application to check for coding standard compliance issues.
## PyTool Scopes
Scopes are how the PyTool ext_dep, path_env, and plugins are activated. Meaning
@@ -282,8 +207,6 @@ few standard scopes.
| global-nix | edk2_invocable++ | Running on Linux based OS |
| edk2-build | | This indicates that an invocable is building EDK2 based UEFI code |
| cibuild | set in .pytool/CISettings.py | Suggested target for edk2 continuous integration builds. Tools used for CiBuilds can use this scope. Example: asl compiler |
| host-based-test | set in .pytool/CISettings.py | Turns on the host based tests and plugin |
| host-test-win | set in .pytool/CISettings.py | Enables the host based test runner for Windows |
## Future investments
@@ -293,6 +216,8 @@ few standard scopes.
* Visual Studio AARCH64 and ARM support
* BaseTools C tools CI/PR and binary release process
* BaseTools Python tools CI/PR process
* Host based unit testing
* Extensible private/closed source platform reporting
* Platform builds, validation
* UEFI SCTs
* Other automation

View File

@@ -1,243 +0,0 @@
## @file
# CI configuration for ArmPkg
#
# Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
## options defined .pytool/Plugin/LicenseCheck
"LicenseCheck": {
"IgnoreFiles": []
},
"EccCheck": {
## Exception sample looks like below:
## "ExceptionList": [
## "<ErrorID>", "<KeyWord>"
## ]
"ExceptionList": [
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
"Library/ArmSoftFloatLib/berkeley-softfloat-3",
"Library/ArmSoftFloatLib/ArmSoftFloatLib.c",
"Library/CompilerIntrinsicsLib",
"Universal/Smbios/SmbiosMiscDxe"
]
},
## options defined .pytool/Plugin/CompilerPlugin
"CompilerPlugin": {
"DscPath": "ArmPkg.dsc"
},
## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
"HostUnitTestCompilerPlugin": {
"DscPath": "" # Don't support this test
},
## options defined .pytool/Plugin/CharEncodingCheck
"CharEncodingCheck": {
"IgnoreFiles": []
},
## options defined .pytool/Plugin/DependencyCheck
"DependencyCheck": {
"AcceptableDependencies": [
"ArmPlatformPkg/ArmPlatformPkg.dec",
"ArmPkg/ArmPkg.dec",
"EmbeddedPkg/EmbeddedPkg.dec",
"MdeModulePkg/MdeModulePkg.dec",
"MdePkg/MdePkg.dec",
"ShellPkg/ShellPkg.dec"
],
# For host based unit tests
"AcceptableDependencies-HOST_APPLICATION":[
"UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
],
# For UEFI shell based apps
"AcceptableDependencies-UEFI_APPLICATION":[],
"IgnoreInf": []
},
## options defined .pytool/Plugin/DscCompleteCheck
"DscCompleteCheck": {
"IgnoreInf": [],
"DscPath": "ArmPkg.dsc"
},
## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
"HostUnitTestDscCompleteCheck": {
"IgnoreInf": [""],
"DscPath": "" # Don't support this test
},
## options defined .pytool/Plugin/GuidCheck
"GuidCheck": {
"IgnoreGuidName": [],
"IgnoreGuidValue": [],
"IgnoreFoldersAndFiles": [],
"IgnoreDuplicates": [],
},
## options defined .pytool/Plugin/LibraryClassCheck
"LibraryClassCheck": {
"IgnoreHeaderFile": []
},
## options defined .pytool/Plugin/SpellCheck
"SpellCheck": {
"AuditOnly": False,
"IgnoreFiles": [
"Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
], # use gitignore syntax to ignore errors
# in matching files
"ExtendWords": [
"api's",
"ackintid",
"actlr",
"aeabi",
"asedis",
"ashldi",
"ashrdi",
"baddr",
"ccidx",
"ccsidr",
"clidr",
"clrex",
"clzsi",
"cnthctl",
"cortexa",
"cpacr",
"cpuactlr",
"csselr",
"ctzsi",
"cygdrive",
"cygpaths",
"datas",
"dcmpeq",
"dcmpge",
"dcmpgt",
"dcmple",
"dcmplt",
"ddisable",
"divdi",
"divsi",
"dmdepkg",
"dpref",
"drsub",
"fcmpeq",
"fcmpge",
"fcmpgt",
"fcmple",
"fcmplt",
"ffreestanding",
"frsub",
"hisilicon",
"iccabpr",
"iccbpr",
"icciar",
"iccicr",
"icciidr",
"iccpir",
"iccpmr",
"iccrpr",
"icdabr",
"icdicer",
"icdicfr",
"icdicpr",
"icdictr",
"icdiidr",
"icdiser",
"icdisr",
"icdppisr",
"icdsgir",
"icdspr",
"icenabler",
"intid",
"ipriority",
"irouter",
"isenabler",
"istatus",
"itargets",
"lable",
"ldivmod",
"ldmdb",
"ldmia",
"ldrbt",
"ldrex",
"ldrexb",
"ldrexd",
"ldrexh",
"ldrhbt",
"ldrht",
"ldrsb",
"ldrsbt",
"ldrsh",
"lshrdi",
"moddi",
"modsi",
"mpcore",
"mpidr",
"muldi",
"mullu",
"nonshareable",
"nsacr",
"nsasedis",
"nuvia",
"oldit",
"pcten",
"plpis",
"procno",
"readc",
"revsh",
"rfedb",
"sctlr",
"smccc",
"smlabb",
"smlabt",
"smlad",
"smladx",
"smlatb",
"smlatt",
"smlawb",
"smlawt",
"smlsd",
"smlsdx",
"smmla",
"smmlar",
"smmls",
"smmlsr",
"sourcery",
"srsdb",
"ssacr",
"stmdb",
"stmia",
"strbt",
"strexb",
"strexd",
"strexh",
"strht",
"switchu",
"tpidrurw",
"ttbcr",
"typer",
"ucmpdi",
"udivdi",
"udivmoddi",
"udivsi",
"uefi's",
"uldiv",
"umoddi",
"umodsi",
"usada",
"vlpis",
"writec"
], # words to extend to the dictionary for this package
"IgnoreStandardPaths": [ # Standard Plugin defined paths that
"*.asm", "*.s" # should be ignore
],
"AdditionalIncludePaths": [] # Additional paths to spell check
# (wildcards supported)
}
}

View File

@@ -2,8 +2,7 @@
# ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -28,68 +27,15 @@
Include # Root include for the package
[LibraryClasses.common]
## @libraryclass Convert Arm instructions to a human readable format.
#
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
## @libraryclass Provides an interface to Arm generic counters.
#
ArmGenericTimerCounterLib|Include/Library/ArmGenericTimerCounterLib.h
## @libraryclass Provides an interface to initialize a
# Generic Interrupt Controller (GIC).
#
ArmGicArchLib|Include/Library/ArmGicArchLib.h
## @libraryclass Provides a Generic Interrupt Controller (GIC)
# configuration interface.
#
ArmGicLib|Include/Library/ArmGicLib.h
## @libraryclass Provides a HyperVisor Call (HVC) interface.
#
ArmHvcLib|Include/Library/ArmHvcLib.h
## @libraryclass Provides an interface to Arm registers.
#
ArmLib|Include/Library/ArmLib.h
## @libraryclass Provides a Mmu interface.
#
ArmMmuLib|Include/Library/ArmMmuLib.h
## @libraryclass Provides a Mailbox Transport Layer (MTL) interface
# for the System Control and Management Interface (SCMI).
#
ArmMtlLib|Include/Library/ArmMtlLib.h
## @libraryclass Provides a System Monitor Call (SMC) interface.
#
ArmSmcLib|Include/Library/ArmSmcLib.h
## @libraryclass Provides a SuperVisor Call (SVC) interface.
#
ArmSvcLib|Include/Library/ArmSvcLib.h
## @libraryclass Provides a default exception handler.
#
SemihostLib|Include/Library/Semihosting.h
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
## @libraryclass Provides an interface to query miscellaneous OEM
# information.
#
OemMiscLib|Include/Library/OemMiscLib.h
## @libraryclass Provides an OpTee interface.
#
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
ArmGicArchLib|Include/Library/ArmGicArchLib.h
ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
ArmSvcLib|Include/Library/ArmSvcLib.h
OpteeLib|Include/Library/OpteeLib.h
## @libraryclass Provides a semihosting interface.
#
SemihostLib|Include/Library/SemihostLib.h
## @libraryclass Provides an interface for a StandaloneMm Mmu.
#
StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
[Guids.common]
@@ -138,13 +84,6 @@
# hardware coherency (i.e., no virtualization or cache coherent DMA)
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043
[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM]
## Used to select method for requesting services from S-EL1.<BR><BR>
# TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.<BR>
# FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<BR>
# @Prompt Enable FF-A support.
gArmTokenSpaceGuid.PcdFfaEnable|FALSE|BOOLEAN|0x0000005B
[PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
@@ -176,20 +115,6 @@
# The Primary Core is ClusterId[0] & CoreId[0]
gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
#
# SMBIOS PCDs
#
gArmTokenSpaceGuid.PcdSystemProductName|L""|VOID*|0x30000053
gArmTokenSpaceGuid.PcdSystemVersion|L""|VOID*|0x30000054
gArmTokenSpaceGuid.PcdBaseBoardManufacturer|L""|VOID*|0x30000055
gArmTokenSpaceGuid.PcdBaseBoardProductName|L""|VOID*|0x30000056
gArmTokenSpaceGuid.PcdBaseBoardVersion|L""|VOID*|0x30000057
gArmTokenSpaceGuid.PcdProcessorManufacturer|L""|VOID*|0x30000071
gArmTokenSpaceGuid.PcdProcessorVersion|L""|VOID*|0x30000072
gArmTokenSpaceGuid.PcdProcessorSerialNumber|L""|VOID*|0x30000073
gArmTokenSpaceGuid.PcdProcessorAssetTag|L""|VOID*|0x30000074
gArmTokenSpaceGuid.PcdProcessorPartNumber|L""|VOID*|0x30000075
#
# ARM L2x0 PCDs
#
@@ -290,9 +215,6 @@
gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045
gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046
gArmTokenSpaceGuid.PcdSystemBiosRelease|0xFFFF|UINT16|0x30000058
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0xFFFF|UINT16|0x30000059
[PcdsFixedAtBuild.common, PcdsDynamic.common]
#
# ARM Architectural Timer
@@ -338,9 +260,9 @@
# UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space
# UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space
#
# gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;
# gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;
# gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;
# PcdPciIoTranslation = IoCpuBase - PcdPciIoBase;
# PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base;
# PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base;
#
# because (a) the target address space (ie. the cpu-physical space) is
# 64-bit, and (b) the translation values are meant as offsets for *modular*
@@ -357,11 +279,11 @@
# UINT64 TranslatedMmio64Address; // output parameter
#
# TranslatedIoAddress = UntranslatedIoAddress +
# gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation;
# PcdPciIoTranslation;
# TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address +
# gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation;
# PcdPciMmio32Translation;
# TranslatedMmio64Address = UntranslatedMmio64Address +
# gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation;
# PcdPciMmio64Translation;
#
# The modular arithmetic performed in UINT64 ensures that the translation
# works correctly regardless of the relation between IoCpuBase and
@@ -370,20 +292,16 @@
#
gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050
gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051
gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052
gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053
gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054
gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055
gArmTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x00000056
gArmTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x00000057
gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000058
#
# Inclusive range of allowed PCI buses.
#
gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x00000059
gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x0000005A
[PcdsDynamicEx]
#
# This dynamic PCD hold the GUID of a firmware FFS which contains
# the LinuxBoot payload.
#
gArmTokenSpaceGuid.PcdLinuxBootFileGuid|{0x0}|VOID*|0x0000005C

View File

@@ -2,10 +2,8 @@
# ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
# Copyright (c) Microsoft Corporation.<BR>
# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -30,25 +28,17 @@
RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
*_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
[PcdsFixedAtBuild]
gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
!include MdePkg/MdeLibs.dsc.inc
[LibraryClasses.common]
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
@@ -56,7 +46,6 @@
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
@@ -91,8 +80,6 @@
ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
OemMiscLib|ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
[LibraryClasses.common.PEIM]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -146,23 +133,12 @@
ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
ArmPkg/Library/ArmLib/ArmBaseLib.inf
ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
ArmPkg/Library/LinuxBootBootManagerLib/LinuxBootBootManagerLib.inf
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
[Components.AARCH64]
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
[Components.AARCH64, Components.ARM]
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf

View File

@@ -12,23 +12,21 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Protocol/Cpu.h>
STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
EFI_STATUS
EFIAPI
ArmCrashDumpDxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
ASSERT_EFI_ERROR (Status);
ASSERT_EFI_ERROR(Status);
return mCpu->RegisterInterruptHandler (
mCpu,
EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
&DefaultExceptionHandler
);
return mCpu->RegisterInterruptHandler (mCpu,
EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
&DefaultExceptionHandler);
}

View File

@@ -11,8 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
VOID
EFIAPI
IrqInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
);
VOID
@@ -26,13 +26,14 @@ ExitBootServicesEvent (
EFI_HANDLE gHardwareInterruptHandle = NULL;
// Notifications
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
// Maximum Number of Interrupts
UINTN mGicNumInterrupts = 0;
UINTN mGicNumInterrupts = 0;
HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
/**
Calculate GICD_ICFGRn base address and corresponding bit
field Int_config[1] of the GIC distributor register.
@@ -46,21 +47,21 @@ HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
**/
EFI_STATUS
GicGetDistributorIcfgBaseAndBit (
IN HARDWARE_INTERRUPT_SOURCE Source,
OUT UINTN *RegAddress,
OUT UINTN *Config1Bit
IN HARDWARE_INTERRUPT_SOURCE Source,
OUT UINTN *RegAddress,
OUT UINTN *Config1Bit
)
{
UINTN RegIndex;
UINTN Field;
UINTN RegIndex;
UINTN Field;
if (Source >= mGicNumInterrupts) {
ASSERT (Source < mGicNumInterrupts);
ASSERT(Source < mGicNumInterrupts);
return EFI_UNSUPPORTED;
}
RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
*RegAddress = PcdGet64 (PcdGicDistributorBase)
+ ARM_GIC_ICDICFR
+ (ARM_GIC_ICDICFR_BYTES * RegIndex);
@@ -70,6 +71,8 @@ GicGetDistributorIcfgBaseAndBit (
return EFI_SUCCESS;
}
/**
Register Handler for the specified interrupt source.
@@ -84,13 +87,13 @@ GicGetDistributorIcfgBaseAndBit (
EFI_STATUS
EFIAPI
RegisterInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN HARDWARE_INTERRUPT_HANDLER Handler
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN HARDWARE_INTERRUPT_HANDLER Handler
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -105,25 +108,25 @@ RegisterInterruptSource (
gRegisteredInterruptHandlers[Source] = Handler;
// If the interrupt handler is unregistered then disable the interrupt
if (NULL == Handler) {
if (NULL == Handler){
return This->DisableInterruptSource (This, Source);
} else {
return This->EnableInterruptSource (This, Source);
}
}
STATIC VOID *mCpuArchProtocolNotifyEventRegistration;
STATIC VOID *mCpuArchProtocolNotifyEventRegistration;
STATIC
VOID
EFIAPI
CpuArchEventProtocolNotify (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_CPU_ARCH_PROTOCOL *Cpu;
EFI_STATUS Status;
EFI_CPU_ARCH_PROTOCOL *Cpu;
EFI_STATUS Status;
// Get the CPU protocol that this driver requires.
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
@@ -134,28 +137,17 @@ CpuArchEventProtocolNotify (
// Unregister the default exception handler.
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
return;
}
// Register to receive interrupts
Status = Cpu->RegisterInterruptHandler (
Cpu,
ARM_ARCH_EXCEPTION_IRQ,
Context
);
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
Context);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
}
gBS->CloseEvent (Event);
@@ -165,13 +157,13 @@ EFI_STATUS
InstallAndRegisterInterruptService (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
)
{
EFI_STATUS Status;
CONST UINTN RihArraySize =
(sizeof (HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
EFI_STATUS Status;
CONST UINTN RihArraySize =
(sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
// Initialize the array for the Interrupt Handlers
gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
@@ -199,8 +191,7 @@ InstallAndRegisterInterruptService (
TPL_CALLBACK,
CpuArchEventProtocolNotify,
InterruptHandler,
&mCpuArchProtocolNotifyEventRegistration
);
&mCpuArchProtocolNotifyEventRegistration);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (

View File

@@ -32,12 +32,12 @@ Abstract:
**/
EFI_STATUS
InterruptDxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
ARM_GIC_ARCH_REVISION Revision;
EFI_STATUS Status;
ARM_GIC_ARCH_REVISION Revision;
Revision = ArmGicGetSupportedArchRevision ();

View File

@@ -6,8 +6,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
--*/
#ifndef ARM_GIC_DXE_H_
#define ARM_GIC_DXE_H_
#ifndef __ARM_GIC_DXE_H__
#define __ARM_GIC_DXE_H__
#include <Library/ArmGicLib.h>
#include <Library/ArmLib.h>
@@ -21,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/HardwareInterrupt.h>
#include <Protocol/HardwareInterrupt2.h>
extern UINTN mGicNumInterrupts;
extern UINTN mGicNumInterrupts;
extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
// Common API
@@ -29,32 +29,33 @@ EFI_STATUS
InstallAndRegisterInterruptService (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
);
EFI_STATUS
EFIAPI
RegisterInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN HARDWARE_INTERRUPT_HANDLER Handler
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN HARDWARE_INTERRUPT_HANDLER Handler
);
// GicV2 API
EFI_STATUS
GicV2DxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
// GicV3 API
EFI_STATUS
GicV3DxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
);
// Shared code
/**
@@ -70,9 +71,9 @@ GicV3DxeInitialize (
**/
EFI_STATUS
GicGetDistributorIcfgBaseAndBit (
IN HARDWARE_INTERRUPT_SOURCE Source,
OUT UINTN *RegAddress,
OUT UINTN *Config1Bit
IN HARDWARE_INTERRUPT_SOURCE Source,
OUT UINTN *RegAddress,
OUT UINTN *Config1Bit
);
#endif // ARM_GIC_DXE_H_
#endif

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.
* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -24,14 +24,11 @@
+ ARM_GICR_SGI_VLPI_FRAME_SIZE \
+ ARM_GICR_SGI_RESERVED_FRAME_SIZE)
#define ISENABLER_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + 4 * (offset))
#define ISENABLER_ADDRESS(base,offset) ((base) + \
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * offset))
#define ICENABLER_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
#define IPRIORITY_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset))
#define ICENABLER_ADDRESS(base,offset) ((base) + \
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * offset))
/**
*
@@ -57,15 +54,15 @@ SourceIsSpi (
STATIC
UINTN
GicGetCpuRedistributorBase (
IN UINTN GicRedistributorBase,
IN ARM_GIC_ARCH_REVISION Revision
IN UINTN GicRedistributorBase,
IN ARM_GIC_ARCH_REVISION Revision
)
{
UINTN MpId;
UINTN CpuAffinity;
UINTN Affinity;
UINTN GicCpuRedistributorBase;
UINT64 TypeRegister;
UINTN MpId;
UINTN CpuAffinity;
UINTN Affinity;
UINTN GicCpuRedistributorBase;
UINT64 TypeRegister;
MpId = ArmReadMpidr ();
// Define CPU affinity as:
@@ -83,7 +80,7 @@ GicGetCpuRedistributorBase (
do {
TypeRegister = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER);
Affinity = ARM_GICR_TYPER_GET_AFFINITY (TypeRegister);
Affinity = ARM_GICR_TYPER_GET_AFFINITY (TypeRegister);
if (Affinity == CpuAffinity) {
return GicCpuRedistributorBase;
}
@@ -107,7 +104,7 @@ GicGetCpuRedistributorBase (
UINTN
EFIAPI
ArmGicGetInterfaceIdentification (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
)
{
// Read the GIC Identification Register
@@ -117,26 +114,19 @@ ArmGicGetInterfaceIdentification (
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
)
{
UINTN ItLines;
ItLines = MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F;
//
// Interrupt ID 1020-1023 are reserved.
//
return (ItLines == 0x1f) ? 1020 : 32 * (ItLines + 1);
return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
}
VOID
EFIAPI
ArmGicSendSgiTo (
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
)
{
MmioWrite32 (
@@ -162,12 +152,12 @@ ArmGicSendSgiTo (
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
)
{
UINTN Value;
ARM_GIC_ARCH_REVISION Revision;
UINTN Value;
ARM_GIC_ARCH_REVISION Revision;
Revision = ArmGicGetSupportedArchRevision ();
if (Revision == ARM_GIC_ARCH_REVISION_2) {
@@ -193,11 +183,11 @@ ArmGicAcknowledgeInterrupt (
VOID
EFIAPI
ArmGicEndOfInterrupt (
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
)
{
ARM_GIC_ARCH_REVISION Revision;
ARM_GIC_ARCH_REVISION Revision;
Revision = ArmGicGetSupportedArchRevision ();
if (Revision == ARM_GIC_ARCH_REVISION_2) {
@@ -209,73 +199,27 @@ ArmGicEndOfInterrupt (
}
}
VOID
EFIAPI
ArmGicSetInterruptPriority (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source,
IN UINTN Priority
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate register offset and bit position
RegOffset = Source / 4;
RegShift = (Source % 4) * 8;
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source))
{
MmioAndThenOr32 (
GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
Priority << RegShift
);
} else {
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
GicRedistributorBase,
Revision
);
if (GicCpuRedistributorBase == 0) {
return;
}
MmioAndThenOr32 (
IPRIORITY_ADDRESS (GicCpuRedistributorBase, RegOffset),
~(0xff << RegShift),
Priority << RegShift
);
}
}
VOID
EFIAPI
ArmGicEnableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source))
{
SourceIsSpi (Source)) {
// Write set-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
@@ -293,7 +237,7 @@ ArmGicEnableInterrupt (
// Write set-enable register
MmioWrite32 (
ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
1 << RegShift
);
}
@@ -302,25 +246,24 @@ ArmGicEnableInterrupt (
VOID
EFIAPI
ArmGicDisableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source))
{
SourceIsSpi (Source)) {
// Write clear-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
@@ -328,16 +271,16 @@ ArmGicDisableInterrupt (
);
} else {
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
GicRedistributorBase,
Revision
);
GicRedistributorBase,
Revision
);
if (GicCpuRedistributorBase == 0) {
return;
}
// Write clear-enable register
MmioWrite32 (
ICENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
ICENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
1 << RegShift
);
}
@@ -346,30 +289,29 @@ ArmGicDisableInterrupt (
BOOLEAN
EFIAPI
ArmGicIsInterruptEnabled (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 Interrupts;
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 Interrupts;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegShift = Source % 32;
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source))
{
SourceIsSpi (Source)) {
Interrupts = ((MmioRead32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
)
& (1 << RegShift)) != 0);
& (1 << RegShift)) != 0);
} else {
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
GicRedistributorBase,
@@ -381,7 +323,7 @@ ArmGicIsInterruptEnabled (
// Read set-enable register
Interrupts = MmioRead32 (
ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset)
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset)
);
}
@@ -391,7 +333,7 @@ ArmGicIsInterruptEnabled (
VOID
EFIAPI
ArmGicDisableDistributor (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
)
{
// Disable Gic Distributor
@@ -401,10 +343,10 @@ ArmGicDisableDistributor (
VOID
EFIAPI
ArmGicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;
ARM_GIC_ARCH_REVISION Revision;
Revision = ArmGicGetSupportedArchRevision ();
if (Revision == ARM_GIC_ARCH_REVISION_2) {
@@ -419,10 +361,10 @@ ArmGicEnableInterruptInterface (
VOID
EFIAPI
ArmGicDisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;
ARM_GIC_ARCH_REVISION Revision;
Revision = ArmGicGetSupportedArchRevision ();
if (Revision == ARM_GIC_ARCH_REVISION_2) {

View File

@@ -13,10 +13,10 @@
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
)
{
ARM_GIC_ARCH_REVISION Revision;
ARM_GIC_ARCH_REVISION Revision;
/*
* Enable GIC distributor in Non-Secure world.

View File

@@ -0,0 +1,58 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Base.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
/*
* This function configures the interrupts set by the mask to be secure.
*
*/
VOID
EFIAPI
ArmGicSetSecureInterrupts (
IN UINTN GicDistributorBase,
IN UINTN* GicSecureInterruptMask,
IN UINTN GicSecureInterruptMaskSize
)
{
UINTN Index;
UINT32 InterruptStatus;
// We must not have more interrupts defined by the mask than the number of available interrupts
ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
// Set all the interrupts defined by the mask as Secure
for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
}
}
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
)
{
// Turn on the GIC distributor
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
}
VOID
EFIAPI
ArmGicSetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
)
{
ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
}

View File

@@ -22,11 +22,11 @@ Abstract:
#define ARM_GIC_DEFAULT_PRIORITY 0x80
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;
STATIC UINT32 mGicInterruptInterfaceBase;
STATIC UINT32 mGicDistributorBase;
STATIC UINT32 mGicInterruptInterfaceBase;
STATIC UINT32 mGicDistributorBase;
/**
Enable interrupt source Source.
@@ -42,12 +42,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV2EnableInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -70,12 +70,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV2DisableInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -99,13 +99,13 @@ STATIC
EFI_STATUS
EFIAPI
GicV2GetInterruptSourceState (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN BOOLEAN *InterruptState
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN BOOLEAN *InterruptState
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -121,7 +121,7 @@ GicV2GetInterruptSourceState (
@param This Instance pointer for this protocol
@param Source Hardware source of the interrupt
@retval EFI_SUCCESS Source interrupt ended successfully.
@retval EFI_SUCCESS Source interrupt EOI'ed.
@retval EFI_UNSUPPORTED Source interrupt is not supported
**/
@@ -129,12 +129,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV2EndOfInterrupt (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -158,8 +158,8 @@ STATIC
VOID
EFIAPI
GicV2IrqInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
UINT32 GicInterrupt;
@@ -185,7 +185,7 @@ GicV2IrqInterruptHandler (
}
// The protocol instance produced by this driver
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
RegisterInterruptSource,
GicV2EnableInterruptSource,
GicV2DisableInterruptSource,
@@ -208,28 +208,28 @@ EFI_STATUS
EFIAPI
GicV2GetTriggerType (
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN HARDWARE_INTERRUPT_SOURCE Source,
OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
)
{
UINTN RegAddress;
UINTN Config1Bit;
EFI_STATUS Status;
UINTN RegAddress;
UINTN Config1Bit;
EFI_STATUS Status;
Status = GicGetDistributorIcfgBaseAndBit (
Source,
&RegAddress,
&Config1Bit
);
Source,
&RegAddress,
&Config1Bit
);
if (EFI_ERROR (Status)) {
return Status;
}
if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
} else {
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
}
return EFI_SUCCESS;
@@ -254,22 +254,18 @@ GicV2SetTriggerType (
IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
)
{
UINTN RegAddress;
UINTN Config1Bit;
UINT32 Value;
EFI_STATUS Status;
BOOLEAN SourceEnabled;
UINTN RegAddress;
UINTN Config1Bit;
UINT32 Value;
EFI_STATUS Status;
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
Status = GicGetDistributorIcfgBaseAndBit (
@@ -283,7 +279,7 @@ GicV2SetTriggerType (
}
Status = GicV2GetInterruptSourceState (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source,
&SourceEnabled
);
@@ -300,7 +296,7 @@ GicV2SetTriggerType (
// otherwise GIC behavior is UNPREDICTABLE.
if (SourceEnabled) {
GicV2DisableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source
);
}
@@ -314,7 +310,7 @@ GicV2SetTriggerType (
// Restore interrupt state
if (SourceEnabled) {
GicV2EnableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source
);
}
@@ -322,7 +318,7 @@ GicV2SetTriggerType (
return EFI_SUCCESS;
}
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {
(HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
(HARDWARE_INTERRUPT2_ENABLE)GicV2EnableInterruptSource,
(HARDWARE_INTERRUPT2_DISABLE)GicV2DisableInterruptSource,
@@ -349,8 +345,8 @@ GicV2ExitBootServicesEvent (
IN VOID *Context
)
{
UINTN Index;
UINT32 GicInterrupt;
UINTN Index;
UINT32 GicInterrupt;
// Disable all the interrupts
for (Index = 0; Index < mGicNumInterrupts; Index++) {
@@ -386,30 +382,30 @@ GicV2ExitBootServicesEvent (
**/
EFI_STATUS
GicV2DxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
UINTN RegShift;
UINT32 CpuTarget;
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
UINTN RegShift;
UINT32 CpuTarget;
// Make sure the Interrupt Controller Protocol is not already installed in
// the system.
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
// Set Priority
RegOffset = Index / 4;
RegShift = (Index % 4) * 8;
RegShift = (Index % 4) * 8;
MmioAndThenOr32 (
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),

View File

@@ -12,7 +12,7 @@
UINTN
EFIAPI
ArmGicV2AcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
// Read the Interrupt Acknowledge Register
@@ -22,8 +22,8 @@ ArmGicV2AcknowledgeInterrupt (
VOID
EFIAPI
ArmGicV2EndOfInterrupt (
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
)
{
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);

View File

@@ -10,10 +10,11 @@
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
)
{
/*
@@ -26,7 +27,7 @@ ArmGicV2EnableInterruptInterface (
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
)
{
// Disable Gic Interface

View File

@@ -12,11 +12,11 @@
#define ARM_GIC_DEFAULT_PRIORITY 0x80
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol;
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol;
STATIC UINTN mGicDistributorBase;
STATIC UINTN mGicRedistributorsBase;
STATIC UINTN mGicDistributorBase;
STATIC UINTN mGicRedistributorsBase;
/**
Enable interrupt source Source.
@@ -32,12 +32,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV3EnableInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -60,12 +60,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV3DisableInterruptSource (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -89,13 +89,13 @@ STATIC
EFI_STATUS
EFIAPI
GicV3GetInterruptSourceState (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN BOOLEAN *InterruptState
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source,
IN BOOLEAN *InterruptState
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -115,7 +115,7 @@ GicV3GetInterruptSourceState (
@param This Instance pointer for this protocol
@param Source Hardware source of the interrupt
@retval EFI_SUCCESS Source interrupt ended successfully.
@retval EFI_SUCCESS Source interrupt EOI'ed.
@retval EFI_DEVICE_ERROR Hardware could not be programmed.
**/
@@ -123,12 +123,12 @@ STATIC
EFI_STATUS
EFIAPI
GicV3EndOfInterrupt (
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
IN HARDWARE_INTERRUPT_SOURCE Source
)
{
if (Source >= mGicNumInterrupts) {
ASSERT (FALSE);
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
@@ -152,8 +152,8 @@ STATIC
VOID
EFIAPI
GicV3IrqInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
UINT32 GicInterrupt;
@@ -179,7 +179,7 @@ GicV3IrqInterruptHandler (
}
// The protocol instance produced by this driver
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
RegisterInterruptSource,
GicV3EnableInterruptSource,
GicV3DisableInterruptSource,
@@ -206,9 +206,9 @@ GicV3GetTriggerType (
OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
)
{
UINTN RegAddress;
UINTN Config1Bit;
EFI_STATUS Status;
UINTN RegAddress;
UINTN Config1Bit;
EFI_STATUS Status;
Status = GicGetDistributorIcfgBaseAndBit (
Source,
@@ -221,9 +221,9 @@ GicV3GetTriggerType (
}
if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
} else {
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
}
return EFI_SUCCESS;
@@ -248,22 +248,18 @@ GicV3SetTriggerType (
IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
)
{
UINTN RegAddress;
UINTN Config1Bit;
UINT32 Value;
EFI_STATUS Status;
BOOLEAN SourceEnabled;
UINTN RegAddress;
UINTN Config1Bit;
UINT32 Value;
EFI_STATUS Status;
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
Status = GicGetDistributorIcfgBaseAndBit (
@@ -277,7 +273,7 @@ GicV3SetTriggerType (
}
Status = GicV3GetInterruptSourceState (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source,
&SourceEnabled
);
@@ -294,7 +290,7 @@ GicV3SetTriggerType (
// otherwise GIC behavior is UNPREDICTABLE.
if (SourceEnabled) {
GicV3DisableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source
);
}
@@ -307,7 +303,7 @@ GicV3SetTriggerType (
// Restore interrupt state
if (SourceEnabled) {
GicV3EnableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
Source
);
}
@@ -315,7 +311,7 @@ GicV3SetTriggerType (
return EFI_SUCCESS;
}
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol = {
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol = {
(HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
(HARDWARE_INTERRUPT2_ENABLE)GicV3EnableInterruptSource,
(HARDWARE_INTERRUPT2_DISABLE)GicV3DisableInterruptSource,
@@ -341,13 +337,17 @@ GicV3ExitBootServicesEvent (
IN VOID *Context
)
{
UINTN Index;
UINTN Index;
// Acknowledge all pending interrupts
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
}
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, Index);
}
// Disable Gic Interface
ArmGicV3DisableInterruptInterface ();
@@ -368,14 +368,16 @@ GicV3ExitBootServicesEvent (
**/
EFI_STATUS
GicV3DxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINTN Index;
UINT64 CpuTarget;
UINT64 MpId;
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
UINTN RegShift;
UINT64 CpuTarget;
UINT64 MpId;
// Make sure the Interrupt Controller Protocol is not already installed in
// the system.
@@ -395,11 +397,12 @@ GicV3DxeInitialize (
GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
// Set Priority
ArmGicSetInterruptPriority (
mGicDistributorBase,
mGicRedistributorsBase,
Index,
ARM_GIC_DEFAULT_PRIORITY
RegOffset = Index / 4;
RegShift = (Index % 4) * 8;
MmioAndThenOr32 (
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
ARM_GIC_DEFAULT_PRIORITY << RegShift
);
}
@@ -428,14 +431,14 @@ GicV3DxeInitialize (
}
}
} else {
MpId = ArmReadMpidr ();
MpId = ArmReadMpidr ();
CpuTarget = MpId &
(ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
(ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
if ((MmioRead32 (
mGicDistributorBase + ARM_GIC_ICDDCR
) & ARM_GIC_ICDDCR_DS) != 0)
{
) & ARM_GIC_ICDDCR_DS) != 0) {
// If the Disable Security (DS) control bit is set, we are dealing with a
// GIC that has only one security state. In this case, let's assume we are
// executing in non-secure state (which is appropriate for DXE modules)

View File

@@ -18,7 +18,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
#define MAX_IO_PORT_ADDRESS 0xFFFF
#define MAX_IO_PORT_ADDRESS 0xFFFF
//
// Handle for the CPU I/O 2 Protocol
@@ -28,7 +28,7 @@ STATIC EFI_HANDLE mHandle = NULL;
//
// Lookup table for increment values based on transfer widths
//
STATIC CONST UINT8 mInStride[] = {
STATIC CONST UINT8 mInStride[] = {
1, // EfiCpuIoWidthUint8
2, // EfiCpuIoWidthUint16
4, // EfiCpuIoWidthUint32
@@ -46,7 +46,7 @@ STATIC CONST UINT8 mInStride[] = {
//
// Lookup table for increment values based on transfer widths
//
STATIC CONST UINT8 mOutStride[] = {
STATIC CONST UINT8 mOutStride[] = {
1, // EfiCpuIoWidthUint8
2, // EfiCpuIoWidthUint16
4, // EfiCpuIoWidthUint32
@@ -117,14 +117,14 @@ CpuIoCheckParameter (
// For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) {
if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
Count = 1;
}
//
// Check to see if Width is in the valid range for I/O Port operations
//
Width = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
return EFI_INVALID_PARAMETER;
}
@@ -161,7 +161,6 @@ CpuIoCheckParameter (
if (MaxCount < (Count - 1)) {
return EFI_UNSUPPORTED;
}
if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
return EFI_UNSUPPORTED;
}
@@ -241,9 +240,9 @@ CpuMemoryServiceRead (
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = MmioRead8 ((UINTN)Address);
@@ -255,7 +254,6 @@ CpuMemoryServiceRead (
*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
}
}
return EFI_SUCCESS;
}
@@ -323,9 +321,9 @@ CpuMemoryServiceWrite (
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
MmioWrite8 ((UINTN)Address, *Uint8Buffer);
@@ -337,7 +335,6 @@ CpuMemoryServiceWrite (
MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
}
}
return EFI_SUCCESS;
}
@@ -407,9 +404,9 @@ CpuIoServiceRead (
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
@@ -493,9 +490,9 @@ CpuIoServiceWrite (
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
@@ -513,7 +510,7 @@ CpuIoServiceWrite (
//
// CPU I/O 2 Protocol instance
//
STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
{
CpuMemoryServiceRead,
CpuMemoryServiceWrite
@@ -524,6 +521,7 @@ STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
}
};
/**
The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
@@ -541,13 +539,12 @@ ArmPciCpuIo2Initialize (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
&gEfiCpuIo2ProtocolGuid,
&mCpuIo2,
&gEfiCpuIo2ProtocolGuid, &mCpuIo2,
NULL
);
ASSERT_EFI_ERROR (Status);

View File

@@ -38,7 +38,7 @@
UefiBootServicesTableLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation
gArmTokenSpaceGuid.PcdPciIoTranslation
[Protocols]
gEfiCpuIo2ProtocolGuid ## PRODUCES

View File

@@ -14,7 +14,7 @@
// Return values of BASE_DISCOVER_LIST_PROTOCOLS command.
typedef struct {
UINT32 NumProtocols;
UINT32 NumProtocols;
// Array of four protocols in each element
// Total elements = 1 + (NumProtocols-1)/4
@@ -22,7 +22,7 @@ typedef struct {
// NOTE: Since EDK2 does not allow flexible array member [] we declare
// here array of 1 element length. However below is used as a variable
// length array.
UINT8 Protocols[1];
UINT8 Protocols[1];
} BASE_DISCOVER_LIST;
/** Initialize Base protocol and install protocol on a given handle.
@@ -34,7 +34,7 @@ typedef struct {
**/
EFI_STATUS
ScmiBaseProtocolInit (
IN OUT EFI_HANDLE *Handle
IN OUT EFI_HANDLE* Handle
);
#endif /* ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_ */

View File

@@ -16,56 +16,57 @@
// Clock rate in two 32bit words.
typedef struct {
UINT32 Low;
UINT32 High;
UINT32 Low;
UINT32 High;
} CLOCK_RATE_DWORD;
// Format of the returned rate array. Linear or Non-linear,.RatesFlag Bit[12]
#define RATE_FORMAT_SHIFT 12
#define RATE_FORMAT_MASK 0x0001
#define RATE_FORMAT(RatesFlags) ((RatesFlags >> RATE_FORMAT_SHIFT) \
#define RATE_FORMAT_SHIFT 12
#define RATE_FORMAT_MASK 0x0001
#define RATE_FORMAT(RatesFlags) ((RatesFlags >> RATE_FORMAT_SHIFT) \
& RATE_FORMAT_MASK)
// Number of remaining rates after a call to the SCP, RatesFlag Bits[31:16]
#define NUM_REMAIN_RATES_SHIFT 16
#define NUM_REMAIN_RATES_SHIFT 16
#define NUM_REMAIN_RATES(RatesFlags) ((RatesFlags >> NUM_REMAIN_RATES_SHIFT))
// Number of rates that are returned by a call.to the SCP, RatesFlag Bits[11:0]
#define NUM_RATES_MASK 0x0FFF
#define NUM_RATES(RatesFlags) (RatesFlags & NUM_RATES_MASK)
#define NUM_RATES_MASK 0x0FFF
#define NUM_RATES(RatesFlags) (RatesFlags & NUM_RATES_MASK)
// Return values for the CLOCK_DESCRIBER_RATE command.
typedef struct {
UINT32 NumRatesFlags;
UINT32 NumRatesFlags;
// NOTE: Since EDK2 does not allow flexible array member [] we declare
// here array of 1 element length. However below is used as a variable
// length array.
CLOCK_RATE_DWORD Rates[1];
CLOCK_RATE_DWORD Rates[1];
} CLOCK_DESCRIBE_RATES;
#define CLOCK_SET_DEFAULT_FLAGS 0
#define CLOCK_SET_DEFAULT_FLAGS 0
// Message parameters for CLOCK_RATE_SET command.
typedef struct {
UINT32 Flags;
UINT32 ClockId;
CLOCK_RATE_DWORD Rate;
UINT32 Flags;
UINT32 ClockId;
CLOCK_RATE_DWORD Rate;
} CLOCK_RATE_SET_ATTRIBUTES;
// Message parameters for CLOCK_CONFIG_SET command.
typedef struct {
UINT32 ClockId;
UINT32 Attributes;
UINT32 ClockId;
UINT32 Attributes;
} CLOCK_CONFIG_SET_ATTRIBUTES;
// if ClockAttr Bit[0] is set then clock device is enabled.
#define CLOCK_ENABLE_MASK 0x1
#define CLOCK_ENABLE_MASK 0x1
#define CLOCK_ENABLED(ClockAttr) ((ClockAttr & CLOCK_ENABLE_MASK) == 1)
typedef struct {
UINT32 Attributes;
UINT8 ClockName[SCMI_MAX_STR_LEN];
UINT32 Attributes;
UINT8 ClockName[SCMI_MAX_STR_LEN];
} CLOCK_ATTRIBUTES;
#pragma pack()
@@ -78,7 +79,7 @@ typedef struct {
**/
EFI_STATUS
ScmiClockProtocolInit (
IN EFI_HANDLE *Handle
IN EFI_HANDLE *Handle
);
#endif /* ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_ */

View File

@@ -1,6 +1,6 @@
#/** @file
#
# Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) 2017-2018, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -18,16 +18,11 @@
ENTRY_POINT = ArmScmiDxeEntryPoint
[Sources.common]
ArmScmiBaseProtocolPrivate.h
ArmScmiClockProtocolPrivate.h
ArmScmiPerformanceProtocolPrivate.h
ScmiBaseProtocol.c
Scmi.c
ScmiBaseProtocol.c
ScmiClockProtocol.c
ScmiDxe.c
ScmiDxe.h
ScmiPerformanceProtocol.c
ScmiPrivate.h
[Packages]
ArmPkg/ArmPkg.dec

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -15,23 +15,23 @@
#include <Protocol/ArmScmiPerformanceProtocol.h>
// Number of performance levels returned by a call to the SCP, Lvls Bits[11:0]
#define NUM_PERF_LEVELS_MASK 0x0FFF
#define NUM_PERF_LEVELS(Lvls) (Lvls & NUM_PERF_LEVELS_MASK)
#define NUM_PERF_LEVELS_MASK 0x0FFF
#define NUM_PERF_LEVELS(Lvls) (Lvls & NUM_PERF_LEVELS_MASK)
// Number of performance levels remaining after a call to the SCP, Lvls Bits[31:16]
#define NUM_REMAIN_PERF_LEVELS_SHIFT 16
#define NUM_REMAIN_PERF_LEVELS(Lvls) (Lvls >> NUM_REMAIN_PERF_LEVELS_SHIFT)
#define NUM_REMAIN_PERF_LEVELS(Lvls) (Lvls >> NUM_REMAIN_PERF_LEVELS_SHIFT)
/** Return values for ScmiMessageIdPerformanceDescribeLevels command.
/** Return values for SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS command.
SCMI Spec section 4.5.2.5
**/
typedef struct {
UINT32 NumLevels;
UINT32 NumLevels;
// NOTE: Since EDK2 does not allow flexible array member [] we declare
// here array of 1 element length. However below is used as a variable
// length array.
SCMI_PERFORMANCE_LEVEL PerfLevel[1]; // Offset to array of performance levels
SCMI_PERFORMANCE_LEVEL PerfLevel[1]; // Offset to array of performance levels
} PERF_DESCRIBE_LEVELS;
/** Initialize performance management protocol and install on a given Handle.
@@ -43,7 +43,7 @@ typedef struct {
**/
EFI_STATUS
ScmiPerformanceProtocolInit (
IN EFI_HANDLE *Handle
IN EFI_HANDLE* Handle
);
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_ */

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -29,7 +29,7 @@
**/
EFI_STATUS
ScmiCommandGetPayload (
OUT UINT32 **Payload
OUT UINT32** Payload
)
{
EFI_STATUS Status;
@@ -76,7 +76,7 @@ EFI_STATUS
ScmiCommandExecute (
IN SCMI_COMMAND *Command,
IN OUT UINT32 *PayloadLength,
OUT UINT32 **ReturnValues OPTIONAL
OUT UINT32 **ReturnValues OPTIONAL
)
{
EFI_STATUS Status;
@@ -95,7 +95,7 @@ ScmiCommandExecute (
// Fill in message header.
MessageHeader = SCMI_MESSAGE_HEADER (
Command->MessageId,
ScmiMessageTypeCommand,
SCMI_MESSAGE_TYPE_COMMAND,
Command->ProtocolId
);
@@ -121,12 +121,10 @@ ScmiCommandExecute (
return EFI_DEVICE_ERROR;
}
Response = (SCMI_MESSAGE_RESPONSE *)MtlGetChannelPayload (Channel);
Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);
if (Response->Status != ScmiSuccess) {
DEBUG ((
DEBUG_ERROR,
"SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
if (Response->Status != SCMI_SUCCESS) {
DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
Command->ProtocolId,
Command->MessageId,
Response->Status
@@ -163,9 +161,8 @@ ScmiProtocolDiscoveryCommon (
)
{
SCMI_COMMAND Command;
UINT32 PayloadLength;
UINT32 PayloadLength = 0;
PayloadLength = 0;
Command.ProtocolId = ProtocolId;
Command.MessageId = MessageId;
@@ -192,13 +189,13 @@ ScmiGetProtocolVersion (
OUT UINT32 *Version
)
{
EFI_STATUS Status;
UINT32 *ProtocolVersion;
EFI_STATUS Status;
UINT32 *ProtocolVersion;
Status = ScmiProtocolDiscoveryCommon (
ProtocolId,
ScmiMessageIdProtocolVersion,
(UINT32 **)&ProtocolVersion
SCMI_MESSAGE_ID_PROTOCOL_VERSION,
(UINT32**)&ProtocolVersion
);
if (EFI_ERROR (Status)) {
return Status;
@@ -226,7 +223,7 @@ ScmiGetProtocolAttributes (
{
return ScmiProtocolDiscoveryCommon (
ProtocolId,
ScmiMessageIdProtocolAttributes,
SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES,
ReturnValues
);
}
@@ -248,7 +245,7 @@ ScmiGetProtocolMessageAttributes (
{
return ScmiProtocolDiscoveryCommon (
ProtocolId,
ScmiMessageIdProtocolMessageAttributes,
SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES,
ReturnValues
);
}

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -34,7 +34,7 @@ BaseGetVersion (
OUT UINT32 *Version
)
{
return ScmiGetProtocolVersion (ScmiProtocolIdBase, Version);
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_BASE, Version);
}
/** Return total number of SCMI protocols supported by the SCP firmware.
@@ -57,7 +57,7 @@ BaseGetTotalProtocols (
EFI_STATUS Status;
UINT32 *ReturnValues;
Status = ScmiGetProtocolAttributes (ScmiProtocolIdBase, &ReturnValues);
Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_BASE, &ReturnValues);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -69,9 +69,9 @@ BaseGetTotalProtocols (
/** Common function which returns vendor details.
@param[in] MessageId ScmiMessageIdBaseDiscoverVendor
@param[in] MessageId SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR
OR
ScmiMessageIdBaseDiscoverSubVendor
SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR
@param[out] VendorIdentifier ASCII name of the vendor/subvendor.
@@ -91,7 +91,7 @@ BaseDiscoverVendorDetails (
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Cmd.ProtocolId = ScmiProtocolIdBase;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
Cmd.MessageId = MessageId;
PayloadLength = 0;
@@ -106,9 +106,9 @@ BaseDiscoverVendorDetails (
}
AsciiStrCpyS (
(CHAR8 *)VendorIdentifier,
(CHAR8*)VendorIdentifier,
SCMI_MAX_STR_LEN,
(CONST CHAR8 *)ReturnValues
(CONST CHAR8*)ReturnValues
);
return EFI_SUCCESS;
@@ -133,7 +133,7 @@ BaseDiscoverVendor (
)
{
return BaseDiscoverVendorDetails (
ScmiMessageIdBaseDiscoverVendor,
SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR,
VendorIdentifier
);
}
@@ -156,7 +156,7 @@ BaseDiscoverSubVendor (
)
{
return BaseDiscoverVendorDetails (
ScmiMessageIdBaseDiscoverSubVendor,
SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR,
VendorIdentifier
);
}
@@ -183,8 +183,8 @@ BaseDiscoverImplVersion (
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Cmd.ProtocolId = ScmiProtocolIdBase;
Cmd.MessageId = ScmiMessageIdBaseDiscoverImplementationVersion;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION;
PayloadLength = 0;
@@ -250,12 +250,13 @@ BaseDiscoverListProtocols (
return EFI_BUFFER_TOO_SMALL;
}
Cmd.ProtocolId = ScmiProtocolIdBase;
Cmd.MessageId = ScmiMessageIdBaseDiscoverListProtocols;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS;
Skip = 0;
while (Skip < TotalProtocols) {
*MessageParams = Skip;
// Note PayloadLength is a IN/OUT parameter.
@@ -264,7 +265,7 @@ BaseDiscoverListProtocols (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&DiscoverList
(UINT32**)&DiscoverList
);
if (EFI_ERROR (Status)) {
return Status;
@@ -281,7 +282,7 @@ BaseDiscoverListProtocols (
}
// Instance of the SCMI Base protocol.
STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
BaseGetVersion,
BaseGetTotalProtocols,
BaseDiscoverVendor,
@@ -299,7 +300,7 @@ STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
**/
EFI_STATUS
ScmiBaseProtocolInit (
IN OUT EFI_HANDLE *Handle
IN OUT EFI_HANDLE* Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -28,11 +28,11 @@
STATIC
UINT64
ConvertTo64Bit (
IN UINT32 Low,
IN UINT32 High
IN UINT32 Low,
IN UINT32 High
)
{
return (Low | ((UINT64)High << 32));
return (Low | ((UINT64)High << 32));
}
/** Return version of the clock management protocol supported by SCP firmware.
@@ -52,7 +52,7 @@ ClockGetVersion (
OUT UINT32 *Version
)
{
return ScmiGetProtocolVersion (ScmiProtocolIdClock, Version);
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_CLOCK, Version);
}
/** Return total number of clock devices supported by the clock management
@@ -74,9 +74,9 @@ ClockGetTotalClocks (
)
{
EFI_STATUS Status;
UINT32 *ReturnValues;
UINT32 *ReturnValues;
Status = ScmiGetProtocolAttributes (ScmiProtocolIdClock, &ReturnValues);
Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_CLOCK, &ReturnValues);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -108,12 +108,12 @@ ClockGetClockAttributes (
OUT CHAR8 *ClockAsciiName
)
{
EFI_STATUS Status;
EFI_STATUS Status;
UINT32 *MessageParams;
CLOCK_ATTRIBUTES *ClockAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
UINT32 *MessageParams;
CLOCK_ATTRIBUTES *ClockAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload (&MessageParams);
if (EFI_ERROR (Status)) {
@@ -122,27 +122,26 @@ ClockGetClockAttributes (
*MessageParams = ClockId;
Cmd.ProtocolId = ScmiProtocolIdClock;
Cmd.MessageId = ScmiMessageIdClockAttributes;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES;
PayloadLength = sizeof (ClockId);
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&ClockAttributes
(UINT32**)&ClockAttributes
);
if (EFI_ERROR (Status)) {
return Status;
}
// TRUE if bit 0 of ClockAttributes->Attributes is set.
// TRUE if bit 0 of ClockAttributes->Attributes is set.
*Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
AsciiStrCpyS (
ClockAsciiName,
SCMI_MAX_STR_LEN,
(CONST CHAR8 *)ClockAttributes->ClockName
(CONST CHAR8*)ClockAttributes->ClockName
);
return EFI_SUCCESS;
@@ -153,10 +152,10 @@ ClockGetClockAttributes (
@param[in] This A pointer to SCMI_CLOCK_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[out] Format ScmiClockRateFormatDiscrete: Clock device
@param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
supports range of clock rates which are non-linear.
ScmiClockRateFormatLinear: Clock device supports
SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
range of linear clock rates from Min to Max in steps.
@param[out] TotalRates Total number of rates.
@@ -175,51 +174,50 @@ STATIC
EFI_STATUS
ClockDescribeRates (
IN SCMI_CLOCK_PROTOCOL *This,
IN UINT32 ClockId,
IN UINT32 ClockId,
OUT SCMI_CLOCK_RATE_FORMAT *Format,
OUT UINT32 *TotalRates,
IN OUT UINT32 *RateArraySize,
OUT SCMI_CLOCK_RATE *RateArray
)
{
EFI_STATUS Status;
EFI_STATUS Status;
UINT32 PayloadLength;
SCMI_COMMAND Cmd;
UINT32 *MessageParams;
CLOCK_DESCRIBE_RATES *DescribeRates;
CLOCK_RATE_DWORD *Rate;
UINT32 PayloadLength;
SCMI_COMMAND Cmd;
UINT32 *MessageParams;
CLOCK_DESCRIBE_RATES *DescribeRates;
CLOCK_RATE_DWORD *Rate;
UINT32 RequiredArraySize;
UINT32 RateIndex;
UINT32 RateNo;
UINT32 RateOffset;
UINT32 RequiredArraySize = 0;
UINT32 RateIndex = 0;
UINT32 RateNo;
UINT32 RateOffset;
*TotalRates = 0;
RequiredArraySize = 0;
RateIndex = 0;
*TotalRates = 0;
Status = ScmiCommandGetPayload (&MessageParams);
if (EFI_ERROR (Status)) {
return Status;
}
Cmd.ProtocolId = ScmiProtocolIdClock;
Cmd.MessageId = ScmiMessageIdClockDescribeRates;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES;
*MessageParams++ = ClockId;
*MessageParams++ = ClockId;
do {
*MessageParams = RateIndex;
// Set Payload length, note PayloadLength is a IN/OUT parameter.
PayloadLength = sizeof (ClockId) + sizeof (RateIndex);
PayloadLength = sizeof (ClockId) + sizeof (RateIndex);
// Execute and wait for response on a SCMI channel.
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&DescribeRates
(UINT32**)&DescribeRates
);
if (EFI_ERROR (Status)) {
return Status;
@@ -236,11 +234,11 @@ ClockDescribeRates (
*TotalRates = NUM_RATES (DescribeRates->NumRatesFlags)
+ NUM_REMAIN_RATES (DescribeRates->NumRatesFlags);
if (*Format == ScmiClockRateFormatDiscrete) {
RequiredArraySize = (*TotalRates) * sizeof (UINT64);
if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
RequiredArraySize = (*TotalRates) * sizeof (UINT64);
} else {
// We need to return triplet of 64 bit value for each rate
RequiredArraySize = (*TotalRates) * 3 * sizeof (UINT64);
// We need to return triplet of 64 bit value for each rate
RequiredArraySize = (*TotalRates) * 3 * sizeof (UINT64);
}
if (RequiredArraySize > (*RateArraySize)) {
@@ -251,30 +249,26 @@ ClockDescribeRates (
RateOffset = 0;
if (*Format == ScmiClockRateFormatDiscrete) {
if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
Rate = &DescribeRates->Rates[RateOffset++];
// Non-linear discrete rates.
RateArray[RateIndex++].DiscreteRate.Rate =
ConvertTo64Bit (Rate->Low, Rate->High);
RateArray[RateIndex++].Rate = ConvertTo64Bit (Rate->Low, Rate->High);
}
} else {
for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
// Linear clock rates from minimum to maximum in steps
// Minimum clock rate.
Rate = &DescribeRates->Rates[RateOffset++];
RateArray[RateIndex].ContinuousRate.Min =
ConvertTo64Bit (Rate->Low, Rate->High);
Rate = &DescribeRates->Rates[RateOffset++];
RateArray[RateIndex].Min = ConvertTo64Bit (Rate->Low, Rate->High);
Rate = &DescribeRates->Rates[RateOffset++];
// Maximum clock rate.
RateArray[RateIndex].ContinuousRate.Max =
ConvertTo64Bit (Rate->Low, Rate->High);
RateArray[RateIndex].Max = ConvertTo64Bit (Rate->Low, Rate->High);
Rate = &DescribeRates->Rates[RateOffset++];
// Step.
RateArray[RateIndex++].ContinuousRate.Step =
ConvertTo64Bit (Rate->Low, Rate->High);
RateArray[RateIndex++].Step = ConvertTo64Bit (Rate->Low, Rate->High);
}
}
} while (NUM_REMAIN_RATES (DescribeRates->NumRatesFlags) != 0);
@@ -304,13 +298,13 @@ ClockRateGet (
OUT UINT64 *Rate
)
{
EFI_STATUS Status;
EFI_STATUS Status;
UINT32 *MessageParams;
CLOCK_RATE_DWORD *ClockRate;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload (&MessageParams);
if (EFI_ERROR (Status)) {
@@ -318,10 +312,10 @@ ClockRateGet (
}
// Fill arguments for clock protocol command.
*MessageParams = ClockId;
*MessageParams = ClockId;
Cmd.ProtocolId = ScmiProtocolIdClock;
Cmd.MessageId = ScmiMessageIdClockRateGet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_GET;
PayloadLength = sizeof (ClockId);
@@ -329,7 +323,7 @@ ClockRateGet (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&ClockRate
(UINT32**)&ClockRate
);
if (EFI_ERROR (Status)) {
return Status;
@@ -358,24 +352,24 @@ ClockRateSet (
IN UINT64 Rate
)
{
EFI_STATUS Status;
CLOCK_RATE_SET_ATTRIBUTES *ClockRateSetAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
EFI_STATUS Status;
CLOCK_RATE_SET_ATTRIBUTES *ClockRateSetAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload ((UINT32 **)&ClockRateSetAttributes);
Status = ScmiCommandGetPayload ((UINT32**)&ClockRateSetAttributes);
if (EFI_ERROR (Status)) {
return Status;
}
// Fill arguments for clock protocol command.
ClockRateSetAttributes->ClockId = ClockId;
ClockRateSetAttributes->Flags = CLOCK_SET_DEFAULT_FLAGS;
ClockRateSetAttributes->Rate.Low = (UINT32)Rate;
ClockRateSetAttributes->Rate.High = (UINT32)(Rate >> 32);
ClockRateSetAttributes->ClockId = ClockId;
ClockRateSetAttributes->Flags = CLOCK_SET_DEFAULT_FLAGS;
ClockRateSetAttributes->Rate.Low = (UINT32)Rate;
ClockRateSetAttributes->Rate.High = (UINT32)(Rate >> 32);
Cmd.ProtocolId = ScmiProtocolIdClock;
Cmd.MessageId = ScmiMessageIdClockRateSet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_SET;
PayloadLength = sizeof (CLOCK_RATE_SET_ATTRIBUTES);
@@ -402,17 +396,17 @@ ClockRateSet (
STATIC
EFI_STATUS
ClockEnable (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN BOOLEAN Enable
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN BOOLEAN Enable
)
{
EFI_STATUS Status;
CLOCK_CONFIG_SET_ATTRIBUTES *ClockConfigSetAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
EFI_STATUS Status;
CLOCK_CONFIG_SET_ATTRIBUTES *ClockConfigSetAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload ((UINT32 **)&ClockConfigSetAttributes);
Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -421,8 +415,8 @@ ClockEnable (
ClockConfigSetAttributes->ClockId = ClockId;
ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;
Cmd.ProtocolId = ScmiProtocolIdClock;
Cmd.MessageId = ScmiMessageIdClockConfigSet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;
PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);
@@ -437,17 +431,17 @@ ClockEnable (
}
// Instance of the SCMI clock management protocol.
STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
ClockGetVersion,
ClockGetTotalClocks,
ClockGetClockAttributes,
ClockDescribeRates,
ClockRateGet,
ClockRateSet
};
};
// Instance of the SCMI clock management protocol.
STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
(SCMI_CLOCK2_GET_VERSION)ClockGetVersion,
(SCMI_CLOCK2_GET_TOTAL_CLOCKS)ClockGetTotalClocks,
(SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)ClockGetClockAttributes,
@@ -456,7 +450,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
(SCMI_CLOCK2_RATE_SET)ClockRateSet,
SCMI_CLOCK2_PROTOCOL_VERSION,
ClockEnable
};
};
/** Initialize clock management protocol and install protocol on a given handle.
@@ -466,7 +460,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
**/
EFI_STATUS
ScmiClockProtocolInit (
IN EFI_HANDLE *Handle
IN EFI_HANDLE* Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@@ -1,12 +1,12 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
- Arm System Control and Management Interface - Platform Design Document
(https://developer.arm.com/documentation/den0056/)
System Control and Management Interface V1.0
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#include <Base.h>
@@ -23,10 +23,10 @@
#include "ScmiDxe.h"
#include "ScmiPrivate.h"
STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
{ ScmiProtocolIdBase, ScmiBaseProtocolInit },
{ ScmiProtocolIdPerformance, ScmiPerformanceProtocolInit },
{ ScmiProtocolIdClock, ScmiClockProtocolInit }
STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
{ SCMI_PROTOCOL_ID_BASE, ScmiBaseProtocolInit },
{ SCMI_PROTOCOL_ID_PERFORMANCE, ScmiPerformanceProtocolInit },
{ SCMI_PROTOCOL_ID_CLOCK, ScmiClockProtocolInit }
};
/** ARM SCMI driver entry point function.
@@ -47,8 +47,8 @@ STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
EFI_STATUS
EFIAPI
ArmScmiDxeEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@@ -61,7 +61,7 @@ ArmScmiDxeEntryPoint (
UINT32 SupportedListSize;
// Every SCMI implementation must implement the base protocol.
ASSERT (Protocols[0].Id == ScmiProtocolIdBase);
ASSERT (Protocols[0].Id == SCMI_PROTOCOL_ID_BASE);
Status = ScmiBaseProtocolInit (&ImageHandle);
if (EFI_ERROR (Status)) {
@@ -72,7 +72,7 @@ ArmScmiDxeEntryPoint (
Status = gBS->LocateProtocol (
&gArmScmiBaseProtocolGuid,
NULL,
(VOID **)&BaseProtocol
(VOID**)&BaseProtocol
);
if (EFI_ERROR (Status)) {
ASSERT (FALSE);
@@ -86,10 +86,7 @@ ArmScmiDxeEntryPoint (
return Status;
}
// Accept any version between SCMI v1.0 and SCMI v2.0
if ((Version < BASE_PROTOCOL_VERSION_V1) ||
(Version > BASE_PROTOCOL_VERSION_V2))
{
if (Version != BASE_PROTOCOL_VERSION) {
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@@ -97,7 +94,7 @@ ArmScmiDxeEntryPoint (
// Apart from Base protocol, SCMI may implement various other protocols,
// query total protocols implemented by the SCP firmware.
NumProtocols = 0;
Status = BaseProtocol->GetTotalProtocols (BaseProtocol, &NumProtocols);
Status = BaseProtocol->GetTotalProtocols (BaseProtocol, &NumProtocols);
if (EFI_ERROR (Status)) {
ASSERT (FALSE);
return Status;
@@ -110,7 +107,7 @@ ArmScmiDxeEntryPoint (
Status = gBS->AllocatePool (
EfiBootServicesData,
SupportedListSize,
(VOID **)&SupportedList
(VOID**)&SupportedList
);
if (EFI_ERROR (Status)) {
ASSERT (FALSE);
@@ -131,8 +128,7 @@ ArmScmiDxeEntryPoint (
// Install supported protocol on ImageHandle.
for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
ProtocolIndex++)
{
ProtocolIndex++) {
for (Index = 0; Index < NumProtocols; Index++) {
if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
@@ -140,7 +136,6 @@ ArmScmiDxeEntryPoint (
ASSERT_EFI_ERROR (Status);
return Status;
}
break;
}
}

View File

@@ -8,13 +8,12 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_DXE_H_
#define SCMI_DXE_H_
#include "ScmiPrivate.h"
#define MAX_VENDOR_LEN SCMI_MAX_STR_LEN
#define MAX_VENDOR_LEN SCMI_MAX_STR_LEN
/** Pointer to protocol initialization function.
@@ -30,8 +29,8 @@ EFI_STATUS
);
typedef struct {
SCMI_PROTOCOL_ID Id; // Protocol Id.
SCMI_PROTOCOL_INIT_FXN InitFn; // Protocol init function.
SCMI_PROTOCOL_ID Id; // Protocol Id.
SCMI_PROTOCOL_INIT_FXN InitFn; // Protocol init function.
} SCMI_PROTOCOL_ENTRY;
#endif /* SCMI_DXE_H_ */

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -35,7 +35,7 @@ PerformanceGetVersion (
OUT UINT32 *Version
)
{
return ScmiGetProtocolVersion (ScmiProtocolIdPerformance, Version);
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_PERFORMANCE, Version);
}
/** Return protocol attributes of the performance management protocol.
@@ -51,15 +51,15 @@ PerformanceGetVersion (
STATIC
EFI_STATUS
PerformanceGetAttributes (
IN SCMI_PERFORMANCE_PROTOCOL *This,
OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
IN SCMI_PERFORMANCE_PROTOCOL *This,
OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
)
{
EFI_STATUS Status;
UINT32 *ReturnValues;
UINT32* ReturnValues;
Status = ScmiGetProtocolAttributes (
ScmiProtocolIdPerformance,
SCMI_PROTOCOL_ID_PERFORMANCE,
&ReturnValues
);
if (EFI_ERROR (Status)) {
@@ -90,7 +90,7 @@ STATIC
EFI_STATUS
PerformanceDomainAttributes (
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN UINT32 DomainId,
OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
)
{
@@ -107,8 +107,8 @@ PerformanceDomainAttributes (
*MessageParams = DomainId;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceDomainAttributes;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES;
PayloadLength = sizeof (DomainId);
@@ -160,29 +160,30 @@ PerformanceDescribeLevels (
EFI_STATUS Status;
UINT32 PayloadLength;
SCMI_COMMAND Cmd;
UINT32 *MessageParams;
UINT32* MessageParams;
UINT32 LevelIndex;
UINT32 RequiredSize;
UINT32 LevelNo;
UINT32 ReturnNumLevels;
UINT32 ReturnRemainNumLevels;
PERF_DESCRIBE_LEVELS *Levels;
PERF_DESCRIBE_LEVELS *Levels;
Status = ScmiCommandGetPayload (&MessageParams);
if (EFI_ERROR (Status)) {
return Status;
}
LevelIndex = 0;
LevelIndex = 0;
RequiredSize = 0;
*MessageParams++ = DomainId;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceDescribeLevels;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS;
do {
*MessageParams = LevelIndex;
// Note, PayloadLength is an IN/OUT parameter.
@@ -191,13 +192,13 @@ PerformanceDescribeLevels (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&Levels
(UINT32**)&Levels
);
if (EFI_ERROR (Status)) {
return Status;
}
ReturnNumLevels = NUM_PERF_LEVELS (Levels->NumLevels);
ReturnNumLevels = NUM_PERF_LEVELS (Levels->NumLevels);
ReturnRemainNumLevels = NUM_REMAIN_PERF_LEVELS (Levels->NumLevels);
if (RequiredSize == 0) {
@@ -212,12 +213,13 @@ PerformanceDescribeLevels (
}
for (LevelNo = 0; LevelNo < ReturnNumLevels; LevelNo++) {
CopyMem (
&LevelArray[LevelIndex++],
&Levels->PerfLevel[LevelNo],
sizeof (SCMI_PERFORMANCE_LEVEL)
);
CopyMem (
&LevelArray[LevelIndex++],
&Levels->PerfLevel[LevelNo],
sizeof (SCMI_PERFORMANCE_LEVEL)
);
}
} while (ReturnRemainNumLevels != 0);
*LevelArraySize = RequiredSize;
@@ -237,9 +239,9 @@ PerformanceDescribeLevels (
**/
EFI_STATUS
PerformanceLimitsSet (
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN SCMI_PERFORMANCE_LIMITS *Limits
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN SCMI_PERFORMANCE_LIMITS *Limits
)
{
EFI_STATUS Status;
@@ -256,8 +258,8 @@ PerformanceLimitsSet (
*MessageParams++ = Limits->RangeMax;
*MessageParams = Limits->RangeMin;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceLimitsSet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET;
PayloadLength = sizeof (DomainId) + sizeof (SCMI_PERFORMANCE_LIMITS);
@@ -283,9 +285,9 @@ PerformanceLimitsSet (
**/
EFI_STATUS
PerformanceLimitsGet (
SCMI_PERFORMANCE_PROTOCOL *This,
UINT32 DomainId,
SCMI_PERFORMANCE_LIMITS *Limits
SCMI_PERFORMANCE_PROTOCOL *This,
UINT32 DomainId,
SCMI_PERFORMANCE_LIMITS *Limits
)
{
EFI_STATUS Status;
@@ -302,15 +304,15 @@ PerformanceLimitsGet (
*MessageParams = DomainId;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceLimitsGet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET;
PayloadLength = sizeof (DomainId);
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32 **)&ReturnValues
(UINT32**)&ReturnValues
);
if (EFI_ERROR (Status)) {
return Status;
@@ -334,9 +336,9 @@ PerformanceLimitsGet (
**/
EFI_STATUS
PerformanceLevelSet (
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN UINT32 Level
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN UINT32 Level
)
{
EFI_STATUS Status;
@@ -352,8 +354,8 @@ PerformanceLevelSet (
*MessageParams++ = DomainId;
*MessageParams = Level;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceLevelSet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET;
PayloadLength = sizeof (DomainId) + sizeof (Level);
@@ -379,9 +381,9 @@ PerformanceLevelSet (
**/
EFI_STATUS
PerformanceLevelGet (
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
OUT UINT32 *Level
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
OUT UINT32 *Level
)
{
EFI_STATUS Status;
@@ -397,8 +399,8 @@ PerformanceLevelGet (
*MessageParams = DomainId;
Cmd.ProtocolId = ScmiProtocolIdPerformance;
Cmd.MessageId = ScmiMessageIdPerformanceLevelGet;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET;
PayloadLength = sizeof (DomainId);
@@ -417,7 +419,7 @@ PerformanceLevelGet (
}
// Instance of the SCMI performance management protocol.
STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
PerformanceGetVersion,
PerformanceGetAttributes,
PerformanceDomainAttributes,
@@ -437,7 +439,7 @@ STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
**/
EFI_STATUS
ScmiPerformanceProtocolInit (
IN EFI_HANDLE *Handle
IN EFI_HANDLE* Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -8,66 +8,65 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_PRIVATE_H_
#define SCMI_PRIVATE_H_
// SCMI protocol IDs.
typedef enum {
ScmiProtocolIdBase = 0x10,
ScmiProtocolIdPowerDomain = 0x11,
ScmiProtocolIdSystemPower = 0x12,
ScmiProtocolIdPerformance = 0x13,
ScmiProtocolIdClock = 0x14,
ScmiProtocolIdSensor = 0x15
SCMI_PROTOCOL_ID_BASE = 0x10,
SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
SCMI_PROTOCOL_ID_SYSTEM_POWER = 0x12,
SCMI_PROTOCOL_ID_PERFORMANCE = 0x13,
SCMI_PROTOCOL_ID_CLOCK = 0x14,
SCMI_PROTOCOL_ID_SENSOR = 0x15
} SCMI_PROTOCOL_ID;
// SCMI message types.
typedef enum {
ScmiMessageTypeCommand = 0,
ScmiMessageTypeDelayedResponse = 2, // Skipping 1 is deliberate.
ScmiMessageTypeNotification = 3
SCMI_MESSAGE_TYPE_COMMAND = 0,
SCMI_MESSAGE_TYPE_DELAYED_RESPONSE = 2, // Skipping 1 is deliberate.
SCMI_MESSAGE_TYPE_NOTIFICATION = 3
} SCMI_MESSAGE_TYPE;
// SCMI response error codes.
typedef enum {
ScmiSuccess = 0,
ScmiNotSupported = -1,
ScmiInvalidParameters = -2,
ScmiDenied = -3,
ScmiNotFound = -4,
ScmiOutOfRange = -5,
ScmiBusy = -6,
ScmiCommsError = -7,
ScmiGenericError = -8,
ScmiHardwareError = -9,
ScmiProtocolError = -10
SCMI_SUCCESS = 0,
SCMI_NOT_SUPPORTED = -1,
SCMI_INVALID_PARAMETERS = -2,
SCMI_DENIED = -3,
SCMI_NOT_FOUND = -4,
SCMI_OUT_OF_RANGE = -5,
SCMI_BUSY = -6,
SCMI_COMMS_ERROR = -7,
SCMI_GENERIC_ERROR = -8,
SCMI_HARDWARE_ERROR = -9,
SCMI_PROTOCOL_ERROR = -10
} SCMI_STATUS;
// SCMI message IDs common to all protocols.
typedef enum {
ScmiMessageIdProtocolVersion = 0x0,
ScmiMessageIdProtocolAttributes = 0x1,
ScmiMessageIdProtocolMessageAttributes = 0x2
SCMI_MESSAGE_ID_PROTOCOL_VERSION = 0x0,
SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES = 0x1,
SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2
} SCMI_MESSAGE_ID;
// Not defined in SCMI specification but will help to identify a message.
typedef struct {
SCMI_PROTOCOL_ID ProtocolId;
UINT32 MessageId;
SCMI_PROTOCOL_ID ProtocolId;
UINT32 MessageId;
} SCMI_COMMAND;
#pragma pack(1)
// Response to a SCMI command.
typedef struct {
INT32 Status;
UINT32 ReturnValues[];
INT32 Status;
UINT32 ReturnValues[];
} SCMI_MESSAGE_RESPONSE;
// Message header. MsgId[7:0], MsgType[9:8], ProtocolId[17:10]
#define MESSAGE_TYPE_SHIFT 8
#define PROTOCOL_ID_SHIFT 10
#define MESSAGE_TYPE_SHIFT 8
#define PROTOCOL_ID_SHIFT 10
#define SCMI_MESSAGE_HEADER(MsgId, MsgType, ProtocolId) ( \
MsgType << MESSAGE_TYPE_SHIFT | \
ProtocolId << PROTOCOL_ID_SHIFT | \
@@ -75,7 +74,7 @@ typedef struct {
)
// SCMI message header.
typedef struct {
UINT32 MessageHeader;
UINT32 MessageHeader;
} SCMI_MESSAGE_HEADER;
#pragma pack()
@@ -90,7 +89,7 @@ typedef struct {
**/
EFI_STATUS
ScmiCommandGetPayload (
OUT UINT32 **Payload
OUT UINT32** Payload
);
/** Execute a SCMI command and receive a response.
@@ -116,7 +115,7 @@ EFI_STATUS
ScmiCommandExecute (
IN SCMI_COMMAND *Command,
IN OUT UINT32 *PayloadLength,
OUT UINT32 **ReturnValues OPTIONAL
OUT UINT32 **ReturnValues OPTIONAL
);
/** Return protocol version from SCP for a given protocol ID.

View File

@@ -2,7 +2,7 @@
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -13,120 +13,56 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h>
#include "CpuDxe.h"
#define INVALID_ENTRY ((UINT32)~0)
#define MIN_T0SZ 16
#define BITS_PER_LEVEL 9
STATIC
VOID
GetRootTranslationTableInfo (
IN UINTN T0SZ,
OUT UINTN *RootTableLevel,
OUT UINTN *RootTableEntryCount
)
{
*RootTableLevel = (T0SZ - MIN_T0SZ) / BITS_PER_LEVEL;
*RootTableEntryCount = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
}
STATIC
UINT64
PageAttributeToGcdAttribute (
IN UINT64 PageAttributes
)
{
UINT64 GcdAttributes;
switch (PageAttributes & TT_ATTR_INDX_MASK) {
case TT_ATTR_INDX_DEVICE_MEMORY:
GcdAttributes = EFI_MEMORY_UC;
break;
case TT_ATTR_INDX_MEMORY_NON_CACHEABLE:
GcdAttributes = EFI_MEMORY_WC;
break;
case TT_ATTR_INDX_MEMORY_WRITE_THROUGH:
GcdAttributes = EFI_MEMORY_WT;
break;
case TT_ATTR_INDX_MEMORY_WRITE_BACK:
GcdAttributes = EFI_MEMORY_WB;
break;
default:
DEBUG ((
DEBUG_ERROR,
"PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
PageAttributes
));
ASSERT (0);
// The Global Coherency Domain (GCD) value is defined as a bit set.
// Returning 0 means no attribute has been set.
GcdAttributes = 0;
}
// Determine protection attributes
if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO))
{
// Read only cases map to write-protect
GcdAttributes |= EFI_MEMORY_RO;
}
// Process eXecute Never attribute
if ((PageAttributes & (TT_PXN_MASK | TT_UXN_MASK)) != 0) {
GcdAttributes |= EFI_MEMORY_XP;
}
return GcdAttributes;
}
#define TT_ATTR_INDX_INVALID ((UINT32)~0)
STATIC
UINT64
GetFirstPageAttribute (
IN UINT64 *FirstLevelTableAddress,
IN UINTN TableLevel
IN UINTN TableLevel
)
{
UINT64 FirstEntry;
UINT64 FirstEntry;
// Get the first entry of the table
FirstEntry = *FirstLevelTableAddress;
if ((TableLevel != 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY)) {
if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
// Only valid for Levels 0, 1 and 2
// Get the attribute of the subsequent table
return GetFirstPageAttribute ((UINT64 *)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
} else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
return FirstEntry & TT_ATTR_INDX_MASK;
} else {
return INVALID_ENTRY;
return TT_ATTR_INDX_INVALID;
}
}
STATIC
UINT64
GetNextEntryAttribute (
IN UINT64 *TableAddress,
IN UINT64 *TableAddress,
IN UINTN EntryCount,
IN UINTN TableLevel,
IN UINT64 BaseAddress,
IN OUT UINT32 *PrevEntryAttribute,
IN OUT UINT64 *StartGcdRegion
IN OUT UINT32 *PrevEntryAttribute,
IN OUT UINT64 *StartGcdRegion
)
{
UINTN Index;
UINT64 Entry;
UINT32 EntryAttribute;
UINT32 EntryType;
EFI_STATUS Status;
UINTN NumberOfDescriptors;
UINTN Index;
UINT64 Entry;
UINT32 EntryAttribute;
UINT32 EntryType;
EFI_STATUS Status;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
// Get the memory space map from GCD
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// We cannot get more than 3-level page table
@@ -135,28 +71,24 @@ GetNextEntryAttribute (
// While the top level table might not contain TT_ENTRY_COUNT entries;
// the subsequent ones should be filled up
for (Index = 0; Index < EntryCount; Index++) {
Entry = TableAddress[Index];
EntryType = Entry & TT_TYPE_MASK;
Entry = TableAddress[Index];
EntryType = Entry & TT_TYPE_MASK;
EntryAttribute = Entry & TT_ATTR_INDX_MASK;
// If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
if (*PrevEntryAttribute != INVALID_ENTRY) {
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {
if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
}
// Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
*PrevEntryAttribute = EntryAttribute;
} else {
continue;
@@ -166,53 +98,46 @@ GetNextEntryAttribute (
ASSERT (TableLevel < 3);
// Increase the level number and scan the sub-level table
GetNextEntryAttribute (
(UINT64 *)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT,
TableLevel + 1,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))),
PrevEntryAttribute,
StartGcdRegion
);
GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT, TableLevel + 1,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
PrevEntryAttribute, StartGcdRegion);
} else {
if (*PrevEntryAttribute != INVALID_ENTRY) {
if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
// Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
*PrevEntryAttribute = INVALID_ENTRY;
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
*PrevEntryAttribute = TT_ATTR_INDX_INVALID;
}
}
}
FreePool (MemorySpaceMap);
return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL (TableLevel));
return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
}
EFI_STATUS
SyncCacheConfig (
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
)
{
EFI_STATUS Status;
UINT32 PageAttribute;
UINT64 *FirstLevelTableAddress;
UINTN TableLevel;
UINTN TableCount;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
UINTN Tcr;
UINTN T0SZ;
UINT64 BaseAddressGcdRegion;
UINT64 EndAddressGcdRegion;
EFI_STATUS Status;
UINT32 PageAttribute = 0;
UINT64 *FirstLevelTableAddress;
UINTN TableLevel;
UINTN TableCount;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
UINTN Tcr;
UINTN T0SZ;
UINT64 BaseAddressGcdRegion;
UINT64 EndAddressGcdRegion;
// This code assumes MMU is enabled and filed with section translations
ASSERT (ArmMmuEnabled ());
@@ -221,7 +146,7 @@ SyncCacheConfig (
// Get the memory space map from GCD
//
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
@@ -231,7 +156,7 @@ SyncCacheConfig (
// with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
// Obtain page table base
FirstLevelTableAddress = (UINT64 *)(ArmGetTTBR0BaseAddress ());
FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
// Get Translation Control Register value
Tcr = ArmGetTCR ();
@@ -246,24 +171,17 @@ SyncCacheConfig (
// We scan from the start of the memory map (ie: at the address 0x0)
BaseAddressGcdRegion = 0x0;
EndAddressGcdRegion = GetNextEntryAttribute (
FirstLevelTableAddress,
TableCount,
TableLevel,
BaseAddressGcdRegion,
&PageAttribute,
&BaseAddressGcdRegion
);
EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
TableCount, TableLevel,
BaseAddressGcdRegion,
&PageAttribute, &BaseAddressGcdRegion);
// Update GCD with the last region if valid
if (PageAttribute != INVALID_ENTRY) {
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion,
PageAttributeToGcdAttribute (PageAttribute)
);
if (PageAttribute != TT_ATTR_INDX_INVALID) {
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion,
PageAttributeToGcdAttribute (PageAttribute));
}
FreePool (MemorySpaceMap);
@@ -273,43 +191,42 @@ SyncCacheConfig (
UINT64
EfiAttributeToArmAttribute (
IN UINT64 EfiAttributes
IN UINT64 EfiAttributes
)
{
UINT64 ArmAttributes;
UINT64 ArmAttributes;
switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
case EFI_MEMORY_UC:
if (ArmReadCurrentEL () == AARCH64_EL2) {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
} else {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
break;
case EFI_MEMORY_WC:
ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
break;
case EFI_MEMORY_WT:
ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
break;
case EFI_MEMORY_WB:
ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
break;
default:
ArmAttributes = TT_ATTR_INDX_MASK;
case EFI_MEMORY_UC:
if (ArmReadCurrentEL () == AARCH64_EL2) {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
} else {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
break;
case EFI_MEMORY_WC:
ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
break;
case EFI_MEMORY_WT:
ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
break;
case EFI_MEMORY_WB:
ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
break;
default:
ArmAttributes = TT_ATTR_INDX_MASK;
}
// Set the access flag to match the block attributes
ArmAttributes |= TT_AF;
// Determine protection attributes
if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
ArmAttributes |= TT_AP_NO_RO;
if (EfiAttributes & EFI_MEMORY_RO) {
ArmAttributes |= TT_AP_RO_RO;
}
// Process eXecute Never attribute
if ((EfiAttributes & EFI_MEMORY_XP) != 0) {
if (EfiAttributes & EFI_MEMORY_XP) {
ArmAttributes |= TT_PXN_MASK;
}
@@ -320,19 +237,19 @@ EfiAttributeToArmAttribute (
// And then the function will identify the size of the region that has the same page table attribute.
EFI_STATUS
GetMemoryRegionRec (
IN UINT64 *TranslationTable,
IN UINTN TableLevel,
IN UINT64 *LastBlockEntry,
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN UINT64 *TranslationTable,
IN UINTN TableLevel,
IN UINT64 *LastBlockEntry,
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
)
{
EFI_STATUS Status;
UINT64 *NextTranslationTable;
UINT64 *BlockEntry;
UINT64 BlockEntryType;
UINT64 EntryType;
EFI_STATUS Status;
UINT64 *NextTranslationTable;
UINT64 *BlockEntry;
UINT64 BlockEntryType;
UINT64 EntryType;
if (TableLevel != 3) {
BlockEntryType = TT_TYPE_BLOCK_ENTRY;
@@ -341,25 +258,22 @@ GetMemoryRegionRec (
}
// Find the block entry linked to the Base Address
BlockEntry = (UINT64 *)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
EntryType = *BlockEntry & TT_TYPE_MASK;
BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
EntryType = *BlockEntry & TT_TYPE_MASK;
if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
NextTranslationTable = (UINT64 *)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
// The entry is a page table, so we go to the next level
Status = GetMemoryRegionRec (
NextTranslationTable, // Address of the next level page table
TableLevel + 1, // Next Page Table level
(UINTN *)TT_LAST_BLOCK_ADDRESS (NextTranslationTable, TT_ENTRY_COUNT),
BaseAddress,
RegionLength,
RegionAttributes
);
NextTranslationTable, // Address of the next level page table
TableLevel + 1, // Next Page Table level
(UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
BaseAddress, RegionLength, RegionAttributes);
// In case of 'Success', it means the end of the block region has been found into the upper
// level translation table
if (!EFI_ERROR (Status)) {
if (!EFI_ERROR(Status)) {
return EFI_SUCCESS;
}
@@ -368,7 +282,7 @@ GetMemoryRegionRec (
} else if (EntryType == BlockEntryType) {
// We have found the BlockEntry attached to the address. We save its start address (the start
// address might be before the 'BaseAddress') and attributes
*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL (TableLevel) - 1);
*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
*RegionLength = 0;
*RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
} else {
@@ -378,12 +292,11 @@ GetMemoryRegionRec (
while (BlockEntry <= LastBlockEntry) {
if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL (TableLevel);
*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
} else {
// In case we have found the end of the region we return success
return EFI_SUCCESS;
}
BlockEntry++;
}
@@ -395,13 +308,13 @@ GetMemoryRegionRec (
EFI_STATUS
GetMemoryRegion (
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
)
{
EFI_STATUS Status;
UINT64 *TranslationTable;
UINT64 *TranslationTable;
UINTN TableLevel;
UINTN EntryCount;
UINTN T0SZ;
@@ -414,14 +327,9 @@ GetMemoryRegion (
// Get the Table info from T0SZ
GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
Status = GetMemoryRegionRec (
TranslationTable,
TableLevel,
(UINTN *)TT_LAST_BLOCK_ADDRESS (TranslationTable, EntryCount),
BaseAddress,
RegionLength,
RegionAttributes
);
Status = GetMemoryRegionRec (TranslationTable, TableLevel,
(UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
BaseAddress, RegionLength, RegionAttributes);
// If the region continues up to the end of the root table then GetMemoryRegionRec()
// will return EFI_NOT_FOUND

View File

@@ -2,7 +2,7 @@
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2013-2021, Arm Limited. All rights reserved.<BR>
Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -22,7 +22,7 @@ SectionToGcdAttributes (
*GcdAttributes = 0;
// determine cacheability attributes
switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
*GcdAttributes |= EFI_MEMORY_UC;
break;
@@ -49,9 +49,9 @@ SectionToGcdAttributes (
}
// determine protection attributes
switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
//*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
break;
case TT_DESCRIPTOR_SECTION_AP_RW_NO:
@@ -86,7 +86,7 @@ PageToGcdAttributes (
*GcdAttributes = 0;
// determine cacheability attributes
switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
*GcdAttributes |= EFI_MEMORY_UC;
break;
@@ -113,9 +113,9 @@ PageToGcdAttributes (
}
// determine protection attributes
switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
//*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
break;
case TT_DESCRIPTOR_PAGE_AP_RW_NO:
@@ -143,43 +143,43 @@ PageToGcdAttributes (
EFI_STATUS
SyncCacheConfigPage (
IN UINT32 SectionIndex,
IN UINT32 FirstLevelDescriptor,
IN UINTN NumberOfDescriptors,
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,
IN OUT UINT64 *NextRegionLength,
IN OUT UINT32 *NextSectionAttributes
IN UINT32 SectionIndex,
IN UINT32 FirstLevelDescriptor,
IN UINTN NumberOfDescriptors,
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,
IN OUT UINT64 *NextRegionLength,
IN OUT UINT32 *NextSectionAttributes
)
{
EFI_STATUS Status;
UINT32 i;
volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
UINT32 NextPageAttributes;
UINT32 PageAttributes;
UINT32 BaseAddress;
UINT64 GcdAttributes;
EFI_STATUS Status;
UINT32 i;
volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
UINT32 NextPageAttributes = 0;
UINT32 PageAttributes = 0;
UINT32 BaseAddress;
UINT64 GcdAttributes;
// Get the Base Address from FirstLevelDescriptor;
BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
// Convert SectionAttributes into PageAttributes
NextPageAttributes =
TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |
TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);
TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |
TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);
// obtain page table base
SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
// extract attributes (cacheability and permissions)
PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
if (NextPageAttributes == 0) {
// start on a new region
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
NextPageAttributes = PageAttributes;
} else if (PageAttributes != NextPageAttributes) {
// Convert Section Attributes into GCD Attributes
@@ -190,8 +190,8 @@ SyncCacheConfigPage (
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
// start on a new region
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
NextPageAttributes = PageAttributes;
}
} else if (NextPageAttributes != 0) {
@@ -202,37 +202,37 @@ SyncCacheConfigPage (
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
*NextRegionLength = 0;
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
NextPageAttributes = 0;
}
*NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
}
// Convert back PageAttributes into SectionAttributes
*NextSectionAttributes =
TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);
TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);
return EFI_SUCCESS;
}
EFI_STATUS
SyncCacheConfig (
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
)
{
EFI_STATUS Status;
UINT32 i;
EFI_PHYSICAL_ADDRESS NextRegionBase;
UINT64 NextRegionLength;
UINT32 NextSectionAttributes;
UINT32 SectionAttributes;
UINT64 GcdAttributes;
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
EFI_STATUS Status;
UINT32 i;
EFI_PHYSICAL_ADDRESS NextRegionBase;
UINT64 NextRegionLength;
UINT32 NextSectionAttributes = 0;
UINT32 SectionAttributes = 0;
UINT64 GcdAttributes;
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
@@ -243,9 +243,10 @@ SyncCacheConfig (
// Get the memory space map from GCD
//
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
@@ -260,15 +261,15 @@ SyncCacheConfig (
// iterate through each 1MB descriptor
NextRegionBase = NextRegionLength = 0;
for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
// extract attributes (cacheability and permissions)
SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
if (NextSectionAttributes == 0) {
// start on a new region
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = SectionAttributes;
} else if (SectionAttributes != NextSectionAttributes) {
// Convert Section Attributes into GCD Attributes
@@ -279,27 +280,21 @@ SyncCacheConfig (
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
// start on a new region
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = SectionAttributes;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
// In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
// bits that are actually part of the pagetable address. We clear it out to zero so that
// the SyncCacheConfigPage will use the page attributes instead of trying to convert the
// section attributes into page attributes
NextSectionAttributes = 0;
Status = SyncCacheConfigPage (
i,
FirstLevelTable[i],
NumberOfDescriptors,
MemorySpaceMap,
&NextRegionBase,
&NextRegionLength,
&NextSectionAttributes
);
Status = SyncCacheConfigPage (
i,FirstLevelTable[i],
NumberOfDescriptors, MemorySpaceMap,
&NextRegionBase,&NextRegionLength,&NextSectionAttributes);
ASSERT_EFI_ERROR (Status);
} else {
// We do not support yet 16MB sections
@@ -314,11 +309,10 @@ SyncCacheConfig (
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = 0;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
}
} // section entry loop
@@ -339,10 +333,10 @@ SyncCacheConfig (
UINT64
EfiAttributeToArmAttribute (
IN UINT64 EfiAttributes
IN UINT64 EfiAttributes
)
{
UINT64 ArmAttributes;
UINT64 ArmAttributes;
switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
case EFI_MEMORY_UC:
@@ -351,7 +345,7 @@ EfiAttributeToArmAttribute (
break;
case EFI_MEMORY_WC:
// Map to normal non-cacheable
// Map to normal non-cachable
ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
break;
@@ -372,14 +366,14 @@ EfiAttributeToArmAttribute (
}
// Determine protection attributes
if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
if (EfiAttributes & EFI_MEMORY_RO) {
ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
} else {
ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
}
// Determine eXecute Never attribute
if ((EfiAttributes & EFI_MEMORY_XP) != 0) {
if (EfiAttributes & EFI_MEMORY_XP) {
ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
}
@@ -388,15 +382,15 @@ EfiAttributeToArmAttribute (
EFI_STATUS
GetMemoryRegionPage (
IN UINT32 *PageTable,
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN UINT32 *PageTable,
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
)
{
UINT32 PageAttributes;
UINT32 TableIndex;
UINT32 PageDescriptor;
UINT32 PageAttributes;
UINT32 TableIndex;
UINT32 PageDescriptor;
// Convert the section attributes into page attributes
PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);
@@ -406,7 +400,7 @@ GetMemoryRegionPage (
ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
// Go through the page table to find the end of the section
for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
// Get the section at the given index
PageDescriptor = PageTable[TableIndex];
@@ -422,7 +416,7 @@ GetMemoryRegionPage (
}
} else {
// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
ASSERT (0);
ASSERT(0);
return EFI_SUCCESS;
}
}
@@ -432,9 +426,9 @@ GetMemoryRegionPage (
EFI_STATUS
GetMemoryRegion (
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
)
{
EFI_STATUS Status;
@@ -442,8 +436,8 @@ GetMemoryRegion (
UINT32 PageAttributes;
UINT32 PageTableIndex;
UINT32 SectionDescriptor;
ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINT32 *PageTable;
ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINT32 *PageTable;
// Initialize the arguments
*RegionLength = 0;
@@ -465,32 +459,32 @@ GetMemoryRegion (
if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
{
*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
*RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;
} else {
// Otherwise, we round it to the page boundary
*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
// Get the attribute at the page table level (Level 2)
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
// Calculate index into first level translation table for start of modification
PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
*RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
}
for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
// Get the section at the given index
SectionDescriptor = FirstLevelTable[TableIndex];
// If the entry is a level-2 page table then we scan it to find the end of the region
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
// Extract the page table location from the descriptor
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
// Scan the page table to find the end of the region.
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
@@ -500,8 +494,7 @@ GetMemoryRegion (
break;
}
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
{
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
// If the attributes of the section differ from the one targeted then we exit the loop
break;

View File

@@ -11,7 +11,7 @@
#include <Guid/IdleLoopEvent.h>
BOOLEAN mIsFlushingGCD;
BOOLEAN mIsFlushingGCD;
/**
This function flushes the range of addresses from Start to Start+Length
@@ -43,12 +43,13 @@ BOOLEAN mIsFlushingGCD;
EFI_STATUS
EFIAPI
CpuFlushCpuDataCache (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS Start,
IN UINT64 Length,
IN EFI_CPU_FLUSH_TYPE FlushType
)
{
switch (FlushType) {
case EfiCpuFlushTypeWriteBack:
WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
@@ -66,6 +67,7 @@ CpuFlushCpuDataCache (
return EFI_SUCCESS;
}
/**
This function enables interrupt processing by the processor.
@@ -78,7 +80,7 @@ CpuFlushCpuDataCache (
EFI_STATUS
EFIAPI
CpuEnableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
)
{
ArmEnableInterrupts ();
@@ -86,6 +88,7 @@ CpuEnableInterrupt (
return EFI_SUCCESS;
}
/**
This function disables interrupt processing by the processor.
@@ -98,7 +101,7 @@ CpuEnableInterrupt (
EFI_STATUS
EFIAPI
CpuDisableInterrupt (
IN EFI_CPU_ARCH_PROTOCOL *This
IN EFI_CPU_ARCH_PROTOCOL *This
)
{
ArmDisableInterrupts ();
@@ -106,6 +109,7 @@ CpuDisableInterrupt (
return EFI_SUCCESS;
}
/**
This function retrieves the processor's current interrupt state a returns it in
State. If interrupts are currently enabled, then TRUE is returned. If interrupts
@@ -122,18 +126,19 @@ CpuDisableInterrupt (
EFI_STATUS
EFIAPI
CpuGetInterruptState (
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
IN EFI_CPU_ARCH_PROTOCOL *This,
OUT BOOLEAN *State
)
{
if (State == NULL) {
return EFI_INVALID_PARAMETER;
}
*State = ArmGetInterruptState ();
*State = ArmGetInterruptState();
return EFI_SUCCESS;
}
/**
This function generates an INIT on the processor. If this function succeeds, then the
processor will be reset, and control will not be returned to the caller. If InitType is
@@ -153,8 +158,8 @@ CpuGetInterruptState (
EFI_STATUS
EFIAPI
CpuInit (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_CPU_INIT_TYPE InitType
)
{
return EFI_UNSUPPORTED;
@@ -163,9 +168,9 @@ CpuInit (
EFI_STATUS
EFIAPI
CpuRegisterInterruptHandler (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
)
{
return RegisterInterruptHandler (InterruptType, InterruptHandler);
@@ -174,10 +179,10 @@ CpuRegisterInterruptHandler (
EFI_STATUS
EFIAPI
CpuGetTimerValue (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
IN EFI_CPU_ARCH_PROTOCOL *This,
IN UINT32 TimerIndex,
OUT UINT64 *TimerValue,
OUT UINT64 *TimerPeriod OPTIONAL
)
{
return EFI_UNSUPPORTED;
@@ -194,8 +199,8 @@ CpuGetTimerValue (
VOID
EFIAPI
IdleLoopEventCallback (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
CpuSleep ();
@@ -204,8 +209,8 @@ IdleLoopEventCallback (
//
// Globals used to initialize the protocol
//
EFI_HANDLE mCpuHandle = NULL;
EFI_CPU_ARCH_PROTOCOL mCpu = {
EFI_HANDLE mCpuHandle = NULL;
EFI_CPU_ARCH_PROTOCOL mCpu = {
CpuFlushCpuDataCache,
CpuEnableInterrupt,
CpuDisableInterrupt,
@@ -221,7 +226,7 @@ EFI_CPU_ARCH_PROTOCOL mCpu = {
STATIC
VOID
InitializeDma (
IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol
IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol
)
{
CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
@@ -229,23 +234,22 @@ InitializeDma (
EFI_STATUS
CpuDxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_EVENT IdleLoopEvent;
EFI_EVENT IdleLoopEvent;
InitializeExceptions (&mCpu);
InitializeDma (&mCpu);
Status = gBS->InstallMultipleProtocolInterfaces (
&mCpuHandle,
&gEfiCpuArchProtocolGuid,
&mCpu,
NULL
);
&mCpuHandle,
&gEfiCpuArchProtocolGuid, &mCpu,
NULL
);
//
// Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
@@ -258,8 +262,8 @@ CpuDxeInitialize (
// If the platform is a MPCore system then install the Configuration Table describing the
// secondary core states
if (ArmIsMpCore ()) {
PublishArmProcessorTable ();
if (ArmIsMpCore()) {
PublishArmProcessorTable();
}
//

View File

@@ -7,8 +7,8 @@
**/
#ifndef CPU_DXE_H_
#define CPU_DXE_H_
#ifndef __CPU_DXE_ARM_EXCEPTION_H__
#define __CPU_DXE_ARM_EXCEPTION_H__
#include <Uefi.h>
@@ -31,7 +31,7 @@
#include <Protocol/DebugSupport.h>
#include <Protocol/LoadedImage.h>
extern BOOLEAN mIsFlushingGCD;
extern BOOLEAN mIsFlushingGCD;
/**
This function registers and enables the handler specified by InterruptHandler for a processor
@@ -55,10 +55,11 @@ extern BOOLEAN mIsFlushingGCD;
**/
EFI_STATUS
RegisterInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
/**
This function registers and enables the handler specified by InterruptHandler for a processor
interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
@@ -81,27 +82,28 @@ RegisterInterruptHandler (
**/
EFI_STATUS
RegisterDebuggerInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
);
EFI_STATUS
InitializeExceptions (
IN EFI_CPU_ARCH_PROTOCOL *Cpu
IN EFI_CPU_ARCH_PROTOCOL *Cpu
);
EFI_STATUS
SyncCacheConfig (
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
);
/**
@@ -115,30 +117,37 @@ SyncCacheConfig (
**/
VOID
EFIAPI
PublishArmProcessorTable (
PublishArmProcessorTable(
VOID
);
// The ARM Attributes might be defined on 64-bit (case of the long format description table)
UINT64
EfiAttributeToArmAttribute (
IN UINT64 EfiAttributes
IN UINT64 EfiAttributes
);
EFI_STATUS
GetMemoryRegion (
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
);
VOID
GetRootTranslationTableInfo (
IN UINTN T0SZ,
OUT UINTN *TableLevel,
OUT UINTN *TableEntryCount
);
EFI_STATUS
SetGcdMemorySpaceAttributes (
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
);
#endif // CPU_DXE_H_
#endif // __CPU_DXE_ARM_EXCEPTION_H__

View File

@@ -29,36 +29,33 @@
**/
EFI_STATUS
SearchGcdMemorySpaces (
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
OUT UINTN *StartIndex,
OUT UINTN *EndIndex
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
OUT UINTN *StartIndex,
OUT UINTN *EndIndex
)
{
UINTN Index;
UINTN Index;
*StartIndex = 0;
*EndIndex = 0;
for (Index = 0; Index < NumberOfDescriptors; Index++) {
if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
*StartIndex = Index;
}
if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
*EndIndex = Index;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
/**
Sets the attributes for a specified range in Gcd Memory Space Map.
@@ -77,11 +74,11 @@ SearchGcdMemorySpaces (
**/
EFI_STATUS
SetGcdMemorySpaceAttributes (
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
IN UINTN NumberOfDescriptors,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
)
{
EFI_STATUS Status;
@@ -91,21 +88,14 @@ SetGcdMemorySpaceAttributes (
EFI_PHYSICAL_ADDRESS RegionStart;
UINT64 RegionLength;
DEBUG ((
DEBUG_GCD,
"SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress,
BaseAddress + Length,
Attributes
));
DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress, BaseAddress + Length, Attributes));
// We do not support a smaller granularity than 4KB on ARM Architecture
if ((Length & EFI_PAGE_MASK) != 0) {
DEBUG ((
DEBUG_WARN,
"Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
Length
));
DEBUG ((DEBUG_WARN,
"Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
Length));
}
//
@@ -130,7 +120,6 @@ SetGcdMemorySpaceAttributes (
if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
continue;
}
//
// Calculate the start and end address of the overlapping range
//
@@ -139,13 +128,11 @@ SetGcdMemorySpaceAttributes (
} else {
RegionStart = MemorySpaceMap[Index].BaseAddress;
}
if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
RegionLength = BaseAddress + Length - RegionStart;
} else {
RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
}
//
// Set memory attributes according to MTRR attribute and the original attribute of descriptor
//
@@ -183,10 +170,10 @@ SetGcdMemorySpaceAttributes (
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 EfiAttributes
IN EFI_CPU_ARCH_PROTOCOL *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 EfiAttributes
)
{
EFI_STATUS Status;
@@ -210,7 +197,7 @@ CpuSetMemoryAttributes (
// Get the region starting from 'BaseAddress' and its 'Attribute'
RegionBaseAddress = BaseAddress;
Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes);
Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes);
// Data & Instruction Caches are flushed when we set new memory attributes.
// So, we only set the attributes if the new region is different.

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -14,7 +14,7 @@
#include <Guid/ArmMpCoreInfo.h>
ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
{
EFI_ARM_PROCESSOR_TABLE_SIGNATURE,
0,
@@ -26,13 +26,13 @@ ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
{ 0 },
0
}, // ARM Processor table header
}, //ARM Processor table header
0, // Number of entries in ARM processor Table
NULL // ARM Processor Table
};
/** Publish ARM Processor Data table in UEFI SYSTEM Table.
* @param HobStart Pointer to the beginning of the HOB List from PEI.
* @param: HobStart Pointer to the beginning of the HOB List from PEI.
*
* Description : This function iterates through HOB list and finds ARM processor Table Entry HOB.
* If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory
@@ -45,48 +45,47 @@ PublishArmProcessorTable (
VOID
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = GetHobList ();
// Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
for ( ; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
// Check for Correct HOB type
if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
// Check for correct GUID type
if (CompareGuid (&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
ARM_PROCESSOR_TABLE *ArmProcessorTable;
EFI_STATUS Status;
if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
ARM_PROCESSOR_TABLE *ArmProcessorTable;
EFI_STATUS Status;
// Allocate Runtime memory for ARM processor table
ArmProcessorTable = (ARM_PROCESSOR_TABLE *)AllocateRuntimePool (sizeof (ARM_PROCESSOR_TABLE));
ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
// Check if the memory allocation is successful or not
ASSERT (NULL != ArmProcessorTable);
ASSERT(NULL != ArmProcessorTable);
// Set ARM processor table to default values
CopyMem (ArmProcessorTable, &mArmProcessorTableTemplate, sizeof (ARM_PROCESSOR_TABLE));
CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
// Fill in Length fields of ARM processor table
ArmProcessorTable->Header.Length = sizeof (ARM_PROCESSOR_TABLE);
ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE (Hob);
ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
// Fill in Identifier(ARM processor table GUID)
ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
// Set Number of ARM core entries in the Table
ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE (Hob)/sizeof (ARM_CORE_INFO);
ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
// Allocate runtime memory for ARM processor Table entries
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO *)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof (ARM_CORE_INFO)
);
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
// Check if the memory allocation is successful or not
ASSERT (NULL != ArmProcessorTable->ArmCpus);
ASSERT(NULL != ArmProcessorTable->ArmCpus);
// Copy ARM Processor Table data from HOB list to newly allocated memory
CopyMem (ArmProcessorTable->ArmCpus, GET_GUID_HOB_DATA (Hob), ArmProcessorTable->Header.DataLen);
CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
// Install the ARM Processor table into EFI system configuration table
Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);

View File

@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -13,23 +13,22 @@
EFI_STATUS
InitializeExceptions (
IN EFI_CPU_ARCH_PROTOCOL *Cpu
)
{
EFI_STATUS Status;
EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
BOOLEAN IrqEnabled;
BOOLEAN FiqEnabled;
IN EFI_CPU_ARCH_PROTOCOL *Cpu
) {
EFI_STATUS Status;
EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
BOOLEAN IrqEnabled;
BOOLEAN FiqEnabled;
VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if ((Status == EFI_SUCCESS) && (VectorInfoList != NULL)) {
Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
VectorInfo = VectorInfoList;
}
// initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
InitializeCpuExceptionHandlers (VectorInfo);
InitializeCpuExceptionHandlers(VectorInfo);
Status = EFI_SUCCESS;
@@ -64,7 +63,7 @@ InitializeExceptions (
//
DEBUG_CODE (
ArmEnableAsynchronousAbort ();
);
);
return Status;
}
@@ -90,11 +89,10 @@ previously installed.
**/
EFI_STATUS
RegisterInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
)
{
RegisterInterruptHandler(
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
) {
// pass down to CpuExceptionHandlerLib
return (EFI_STATUS)RegisterCpuInterruptHandler (InterruptType, InterruptHandler);
return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
}

View File

@@ -16,6 +16,8 @@ Abstract:
**/
//
// The package level header files this module uses
//
@@ -56,10 +58,10 @@ InitializeCpuPeim (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
// Enable program flow prediction, if supported.
ArmEnableBranchPrediction ();
@@ -68,12 +70,12 @@ InitializeCpuPeim (
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID **)&ArmMpCoreInfoPpi);
if (!EFI_ERROR (Status)) {
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
if (!EFI_ERROR(Status)) {
// Build the MP Core Info Table
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
// Build MPCore Info HOB
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
}

View File

@@ -5,21 +5,20 @@
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef GENERIC_WATCHDOG_H_
#define GENERIC_WATCHDOG_H_
#ifndef __GENERIC_WATCHDOG_H__
#define __GENERIC_WATCHDOG_H__
// Refresh Frame:
#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000)
// Control Frame:
#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
// Values of bit 0 of the Control/Status Register
#define GENERIC_WDOG_ENABLED 1
#define GENERIC_WDOG_DISABLED 0
#define GENERIC_WDOG_ENABLED 1
#define GENERIC_WDOG_DISABLED 0
#endif // GENERIC_WATCHDOG_H_
#endif // __GENERIC_WATCHDOG_H__

View File

@@ -25,18 +25,18 @@
/* The number of 100ns periods (the unit of time passed to these functions)
in a second */
#define TIME_UNITS_PER_SECOND 10000000
#define TIME_UNITS_PER_SECOND 10000000
// Tick frequency of the generic timer basis of the generic watchdog.
STATIC UINTN mTimerFrequencyHz = 0;
STATIC UINTN mTimerFrequencyHz = 0;
/* In cases where the compare register was set manually, information about
how long the watchdog was asked to wait cannot be retrieved from hardware.
It is therefore stored here. 0 means the timer is not running. */
STATIC UINT64 mNumTimerTicks = 0;
STATIC UINT64 mNumTimerTicks = 0;
STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
STATIC
VOID
@@ -97,12 +97,12 @@ STATIC
VOID
EFIAPI
WatchdogInterruptHandler (
IN HARDWARE_INTERRUPT_SOURCE Source,
IN EFI_SYSTEM_CONTEXT SystemContext
IN HARDWARE_INTERRUPT_SOURCE Source,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
STATIC CONST CHAR16 ResetString[] = L"The generic watchdog timer ran out.";
UINT64 TimerPeriod;
STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
UINT64 TimerPeriod;
WatchdogDisable ();
@@ -119,12 +119,8 @@ WatchdogInterruptHandler (
mWatchdogNotify (TimerPeriod + 1);
}
gRT->ResetSystem (
EfiResetCold,
EFI_TIMEOUT,
StrSize (ResetString),
(CHAR16 *)ResetString
);
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
(CHAR16 *)ResetString);
// If we got here then the reset didn't work
ASSERT (FALSE);
@@ -158,15 +154,15 @@ STATIC
EFI_STATUS
EFIAPI
WatchdogRegisterHandler (
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
return EFI_INVALID_PARAMETER;
}
if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
return EFI_ALREADY_STARTED;
}
@@ -192,11 +188,11 @@ STATIC
EFI_STATUS
EFIAPI
WatchdogSetTimerPeriod (
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
UINTN SystemCount;
UINTN SystemCount;
// if TimerPeriod is 0, this is a request to stop the watchdog.
if (TimerPeriod == 0) {
@@ -248,8 +244,8 @@ STATIC
EFI_STATUS
EFIAPI
WatchdogGetTimerPeriod (
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
if (TimerPeriod == NULL) {
@@ -293,29 +289,26 @@ WatchdogGetTimerPeriod (
Retrieves the period of the timer interrupt in 100ns units.
**/
STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
WatchdogRegisterHandler,
WatchdogSetTimerPeriod,
WatchdogGetTimerPeriod
};
STATIC EFI_EVENT mEfiExitBootServicesEvent;
STATIC EFI_EVENT mEfiExitBootServicesEvent;
EFI_STATUS
EFIAPI
GenericWatchdogEntry (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_HANDLE Handle;
EFI_STATUS Status;
EFI_HANDLE Handle;
Status = gBS->LocateProtocol (
&gHardwareInterrupt2ProtocolGuid,
NULL,
(VOID **)&mInterruptProtocol
);
Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
(VOID **)&mInterruptProtocol);
ASSERT_EFI_ERROR (Status);
/* Make sure the Watchdog Timer Architectural Protocol has not been installed
@@ -327,44 +320,33 @@ GenericWatchdogEntry (
ASSERT (mTimerFrequencyHz != 0);
// Install interrupt handler
Status = mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
WatchdogInterruptHandler
);
WatchdogInterruptHandler);
if (EFI_ERROR (Status)) {
return Status;
}
Status = mInterruptProtocol->SetTriggerType (
mInterruptProtocol,
Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING
);
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid,
&mWatchdogTimer,
NULL
);
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
NULL);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_NOTIFY,
WatchdogExitBootServicesEvent,
NULL,
&mEfiExitBootServicesEvent
);
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
WatchdogExitBootServicesEvent, NULL,
&mEfiExitBootServicesEvent);
ASSERT_EFI_ERROR (Status);
mNumTimerTicks = 0;
@@ -374,10 +356,8 @@ GenericWatchdogEntry (
UnregisterHandler:
// Unregister the handler
mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
NULL
);
NULL);
return Status;
}

View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2013-2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) 2013-2017, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,7 +13,6 @@
ENTRY_POINT = GenericWatchdogEntry
[Sources.common]
GenericWatchdog.h
GenericWatchdogDxe.c
[Packages]

View File

@@ -1,22 +1,22 @@
/** @file
Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef MM_COMMUNICATE_H_
#define MM_COMMUNICATE_H_
#if !defined _MM_COMMUNICATE_H_
#define _MM_COMMUNICATE_H_
#define MM_MAJOR_VER_MASK 0xEFFF0000
#define MM_MINOR_VER_MASK 0x0000FFFF
#define MM_MAJOR_VER_SHIFT 16
#define MM_MAJOR_VER_MASK 0xEFFF0000
#define MM_MINOR_VER_MASK 0x0000FFFF
#define MM_MAJOR_VER_SHIFT 16
#define MM_MAJOR_VER(x) (((x) & MM_MAJOR_VER_MASK) >> MM_MAJOR_VER_SHIFT)
#define MM_MINOR_VER(x) ((x) & MM_MINOR_VER_MASK)
#define MM_MAJOR_VER(x) (((x) & MM_MAJOR_VER_MASK) >> MM_MAJOR_VER_SHIFT)
#define MM_MINOR_VER(x) ((x) & MM_MINOR_VER_MASK)
#define MM_CALLER_MAJOR_VER 0x1UL
#define MM_CALLER_MINOR_VER 0x0
#define MM_CALLER_MAJOR_VER 0x1UL
#define MM_CALLER_MINOR_VER 0x0
#endif /* MM_COMMUNICATE_H_ */
#endif /* _MM_COMMUNICATE_H_ */

View File

@@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -16,7 +16,7 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Protocol/MmCommunication2.h>
#include <Protocol/MmCommunication.h>
#include <IndustryStandard/ArmStdSmc.h>
@@ -39,48 +39,47 @@ STATIC EFI_HANDLE mMmCommunicateHandle;
/**
Communicates with a registered handler.
This function provides a service to send and receive messages from a registered UEFI service.
This function provides an interface to send and receive messages to the
Standalone MM environment on behalf of UEFI services. This function is part
of the MM Communication Protocol that may be called in physical mode prior to
SetVirtualAddressMap() and in virtual mode after SetVirtualAddressMap().
@param[in] This The EFI_MM_COMMUNICATION_PROTOCOL instance.
@param[in, out] CommBufferPhysical Physical address of the MM communication buffer
@param[in, out] CommBufferVirtual Virtual address of the MM communication buffer
@param[in, out] CommSize The size of the data buffer being passed in. On input,
when not omitted, the buffer should cover EFI_MM_COMMUNICATE_HEADER
and the value of MessageLength field. On exit, the size
of data being returned. Zero if the handler does not
wish to reply with any data. This parameter is optional
and may be NULL.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER CommBufferPhysical or CommBufferVirtual was NULL, or
integer value pointed by CommSize does not cover
EFI_MM_COMMUNICATE_HEADER and the value of MessageLength
field.
@retval EFI_BAD_BUFFER_SIZE The buffer is too large for the MM implementation.
If this error is returned, the MessageLength field
in the CommBuffer header or the integer pointed by
CommSize, are updated to reflect the maximum payload
size the implementation can accommodate.
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter or CommSize parameter,
if not omitted, are in address range that cannot be
accessed by the MM environment.
@param[in] This The EFI_MM_COMMUNICATION_PROTOCOL
instance.
@param[in, out] CommBuffer A pointer to the buffer to convey
into MMRAM.
@param[in, out] CommSize The size of the data buffer being
passed in. This is optional.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER The CommBuffer was NULL.
@retval EFI_BAD_BUFFER_SIZE The buffer size is incorrect for the MM
implementation. If this error is
returned, the MessageLength field in
the CommBuffer header or the integer
pointed by CommSize are updated to reflect
the maximum payload size the
implementation can accommodate.
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter
or CommSize parameter, if not omitted,
are in address range that cannot be
accessed by the MM environment
**/
STATIC
EFI_STATUS
EFIAPI
MmCommunication2Communicate (
IN CONST EFI_MM_COMMUNICATION2_PROTOCOL *This,
IN OUT VOID *CommBufferPhysical,
IN OUT VOID *CommBufferVirtual,
IN OUT UINTN *CommSize OPTIONAL
MmCommunicationCommunicate (
IN CONST EFI_MM_COMMUNICATION_PROTOCOL *This,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommSize OPTIONAL
)
{
EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
ARM_SMC_ARGS CommunicateSmcArgs;
EFI_STATUS Status;
UINTN BufferSize;
EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
ARM_SMC_ARGS CommunicateSmcArgs;
EFI_STATUS Status;
UINTN BufferSize;
Status = EFI_ACCESS_DENIED;
Status = EFI_ACCESS_DENIED;
BufferSize = 0;
ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
@@ -88,12 +87,11 @@ MmCommunication2Communicate (
//
// Check parameters
//
if ((CommBufferVirtual == NULL) || (CommBufferPhysical == NULL)) {
if (CommBuffer == NULL) {
return EFI_INVALID_PARAMETER;
}
Status = EFI_SUCCESS;
CommunicateHeader = CommBufferVirtual;
CommunicateHeader = CommBuffer;
// CommBuffer is a mandatory parameter. Hence, Rely on
// MessageLength + Header to ascertain the
// total size of the communication payload rather than
@@ -102,41 +100,33 @@ MmCommunication2Communicate (
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
// If CommSize is not omitted, perform size inspection before proceeding.
if (CommSize != NULL) {
// If the length of the CommBuffer is 0 then return the expected length.
if (CommSize) {
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) ||
(*CommSize > mNsCommBuffMemRegion.Length))
{
(*CommSize > mNsCommBuffMemRegion.Length)) {
*CommSize = mNsCommBuffMemRegion.Length;
Status = EFI_BAD_BUFFER_SIZE;
return EFI_BAD_BUFFER_SIZE;
}
//
// CommSize should cover at least MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
// CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
//
if (*CommSize < BufferSize) {
Status = EFI_INVALID_PARAMETER;
if (*CommSize != BufferSize) {
return EFI_INVALID_PARAMETER;
}
}
//
// If the message length is 0 or greater than what can be tolerated by the MM
// If the buffer size is 0 or greater than what can be tolerated by the MM
// environment then return the expected size.
//
if ((CommunicateHeader->MessageLength == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length))
{
if ((BufferSize == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length)) {
CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
sizeof (CommunicateHeader->HeaderGuid) -
sizeof (CommunicateHeader->MessageLength);
Status = EFI_BAD_BUFFER_SIZE;
}
// MessageLength or CommSize check has failed, return here.
if (EFI_ERROR (Status)) {
return Status;
return EFI_BAD_BUFFER_SIZE;
}
// SMC Function ID
@@ -146,7 +136,7 @@ MmCommunication2Communicate (
CommunicateSmcArgs.Arg1 = 0;
// Copy Communication Payload
CopyMem ((VOID *)mNsCommBuffMemRegion.VirtualBase, CommBufferVirtual, BufferSize);
CopyMem ((VOID *)mNsCommBuffMemRegion.VirtualBase, CommBuffer, BufferSize);
// comm_buffer_address (64-bit physical address)
CommunicateSmcArgs.Arg2 = (UINTN)mNsCommBuffMemRegion.PhysicalBase;
@@ -158,41 +148,41 @@ MmCommunication2Communicate (
ArmCallSmc (&CommunicateSmcArgs);
switch (CommunicateSmcArgs.Arg0) {
case ARM_SMC_MM_RET_SUCCESS:
ZeroMem (CommBufferVirtual, BufferSize);
// On successful return, the size of data being returned is inferred from
// MessageLength + Header.
CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)mNsCommBuffMemRegion.VirtualBase;
BufferSize = CommunicateHeader->MessageLength +
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
case ARM_SMC_MM_RET_SUCCESS:
ZeroMem (CommBuffer, BufferSize);
// On successful return, the size of data being returned is inferred from
// MessageLength + Header.
CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)mNsCommBuffMemRegion.VirtualBase;
BufferSize = CommunicateHeader->MessageLength +
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
CopyMem (
CommBufferVirtual,
(VOID *)mNsCommBuffMemRegion.VirtualBase,
BufferSize
);
Status = EFI_SUCCESS;
break;
CopyMem (
CommBuffer,
(VOID *)mNsCommBuffMemRegion.VirtualBase,
BufferSize
);
Status = EFI_SUCCESS;
break;
case ARM_SMC_MM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SMC_MM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SMC_MM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SMC_MM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SMC_MM_RET_NO_MEMORY:
// Unexpected error since the CommSize was checked for zero length
// prior to issuing the SMC
Status = EFI_OUT_OF_RESOURCES;
ASSERT (0);
break;
case ARM_SMC_MM_RET_NO_MEMORY:
// Unexpected error since the CommSize was checked for zero length
// prior to issuing the SMC
Status = EFI_OUT_OF_RESOURCES;
ASSERT (0);
break;
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
}
return Status;
@@ -201,8 +191,8 @@ MmCommunication2Communicate (
//
// MM Communication Protocol instance
//
STATIC EFI_MM_COMMUNICATION2_PROTOCOL mMmCommunication2 = {
MmCommunication2Communicate
EFI_MM_COMMUNICATION_PROTOCOL mMmCommunication = {
MmCommunicationCommunicate
};
/**
@@ -224,7 +214,7 @@ VOID
EFIAPI
NotifySetVirtualAddressMap (
IN EFI_EVENT Event,
IN VOID *Context
IN VOID *Context
)
{
EFI_STATUS Status;
@@ -234,23 +224,19 @@ NotifySetVirtualAddressMap (
(VOID **)&mNsCommBuffMemRegion.VirtualBase
);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n",
Status
));
DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n", Status));
}
}
STATIC
EFI_STATUS
GetMmCompatibility (
)
GetMmCompatibility ()
{
EFI_STATUS Status;
UINT32 MmVersion;
ARM_SMC_ARGS MmVersionArgs;
EFI_STATUS Status;
UINT32 MmVersion;
ARM_SMC_ARGS MmVersionArgs;
// MM_VERSION uses SMC32 calling conventions
MmVersionArgs.Arg0 = ARM_SMC_ID_MM_VERSION_AARCH32;
@@ -259,38 +245,27 @@ GetMmCompatibility (
MmVersion = MmVersionArgs.Arg0;
if ((MM_MAJOR_VER (MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER (MmVersion) >= MM_CALLER_MINOR_VER))
{
DEBUG ((
DEBUG_INFO,
"MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion)
));
if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
Status = EFI_SUCCESS;
} else {
DEBUG ((
DEBUG_ERROR,
"Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion),
MM_CALLER_MAJOR_VER,
MM_CALLER_MINOR_VER
));
DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
Status = EFI_UNSUPPORTED;
}
return Status;
}
STATIC EFI_GUID *CONST mGuidedEventGuid[] = {
STATIC EFI_GUID* CONST mGuidedEventGuid[] = {
&gEfiEndOfDxeEventGroupGuid,
&gEfiEventExitBootServicesGuid,
&gEfiEventReadyToBootGuid,
};
STATIC EFI_EVENT mGuidedEvent[ARRAY_SIZE (mGuidedEventGuid)];
STATIC EFI_EVENT mGuidedEvent[ARRAY_SIZE (mGuidedEventGuid)];
/**
Event notification that is fired when GUIDed Event Group is signaled.
@@ -307,18 +282,18 @@ MmGuidedEventNotify (
IN VOID *Context
)
{
EFI_MM_COMMUNICATE_HEADER Header;
UINTN Size;
EFI_MM_COMMUNICATE_HEADER Header;
UINTN Size;
//
// Use Guid to initialize EFI_SMM_COMMUNICATE_HEADER structure
//
CopyGuid (&Header.HeaderGuid, Context);
Header.MessageLength = 1;
Header.Data[0] = 0;
Header.Data[0] = 0;
Size = sizeof (Header);
MmCommunication2Communicate (&mMmCommunication2, &Header, &Header, &Size);
MmCommunicationCommunicate (&mMmCommunication, &Header, &Size);
}
/**
@@ -337,24 +312,24 @@ MmGuidedEventNotify (
**/
EFI_STATUS
EFIAPI
MmCommunication2Initialize (
IN EFI_HANDLE ImageHandle,
MmCommunicationInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
UINTN Index;
EFI_STATUS Status;
UINTN Index;
// Check if we can make the MM call
Status = GetMmCompatibility ();
if (EFI_ERROR (Status)) {
if (EFI_ERROR(Status)) {
goto ReturnErrorStatus;
}
mNsCommBuffMemRegion.PhysicalBase = PcdGet64 (PcdMmBufferBase);
// During boot , Virtual and Physical are same
mNsCommBuffMemRegion.VirtualBase = mNsCommBuffMemRegion.PhysicalBase;
mNsCommBuffMemRegion.Length = PcdGet64 (PcdMmBufferSize);
mNsCommBuffMemRegion.Length = PcdGet64 (PcdMmBufferSize);
ASSERT (mNsCommBuffMemRegion.PhysicalBase != 0);
@@ -369,11 +344,8 @@ MmCommunication2Initialize (
EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"
));
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"));
goto ReturnErrorStatus;
}
@@ -383,27 +355,21 @@ MmCommunication2Initialize (
EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"
));
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"));
goto CleanAddedMemorySpace;
}
// Install the communication protocol
Status = gBS->InstallProtocolInterface (
&mMmCommunicateHandle,
&gEfiMmCommunication2ProtocolGuid,
&gEfiMmCommunicationProtocolGuid,
EFI_NATIVE_INTERFACE,
&mMmCommunication2
&mMmCommunication
);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"
));
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"));
goto CleanAddedMemorySpace;
}
@@ -420,31 +386,16 @@ MmCommunication2Initialize (
ASSERT_EFI_ERROR (Status);
for (Index = 0; Index < ARRAY_SIZE (mGuidedEventGuid); Index++) {
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
MmGuidedEventNotify,
mGuidedEventGuid[Index],
mGuidedEventGuid[Index],
&mGuidedEvent[Index]
);
Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
MmGuidedEventNotify, mGuidedEventGuid[Index],
mGuidedEventGuid[Index], &mGuidedEvent[Index]);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
while (Index-- > 0) {
gBS->CloseEvent (mGuidedEvent[Index]);
}
goto UninstallProtocol;
}
}
return EFI_SUCCESS;
UninstallProtocol:
gBS->UninstallProtocolInterface (
mMmCommunicateHandle,
&gEfiMmCommunication2ProtocolGuid,
&mMmCommunication2
&gEfiMmCommunicationProtocolGuid,
&mMmCommunication
);
CleanAddedMemorySpace:

View File

@@ -2,7 +2,7 @@
#
# DXE MM Communicate driver
#
# Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,7 +14,7 @@
FILE_GUID = 09EE81D3-F15E-43F4-85B4-CB9873DA5D6B
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = MmCommunication2Initialize
ENTRY_POINT = MmCommunicationInitialize
#
# The following is for reference only and not required by
@@ -24,7 +24,6 @@
#
[Sources.AARCH64]
MmCommunicate.h
MmCommunication.c
[Packages]
@@ -41,7 +40,7 @@
UefiDriverEntryPoint
[Protocols]
gEfiMmCommunication2ProtocolGuid ## PRODUCES
gEfiMmCommunicationProtocolGuid ## PRODUCES
[Guids]
gEfiEndOfDxeEventGroupGuid

View File

@@ -1,12 +1,13 @@
/** @file
Timer Architecture Protocol driver of the ARM flavor
Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiDxe.h>
#include <Library/ArmLib.h>
@@ -23,18 +24,18 @@
#include <Protocol/HardwareInterrupt.h>
// The notification function to call on every timer interrupt.
EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
// The current period of the timer interrupt
UINT64 mTimerPeriod = 0;
UINT64 mTimerPeriod = 0;
// The latest Timer Tick calculated for mTimerPeriod
UINT64 mTimerTicks = 0;
UINT64 mTimerTicks = 0;
// Number of elapsed period since the last Timer interrupt
UINT64 mElapsedPeriod = 1;
UINT64 mElapsedPeriod = 1;
// Cached copy of the Hardware Interrupt protocol instance
EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
/**
This function registers the handler NotifyFunction so it is called every time
@@ -132,9 +133,9 @@ TimerDriverSetTimerPeriod (
IN UINT64 TimerPeriod
)
{
UINT64 CounterValue;
UINT64 TimerTicks;
EFI_TPL OriginalTPL;
UINT64 CounterValue;
UINT64 TimerTicks;
EFI_TPL OriginalTPL;
// Always disable the timer
ArmGenericTimerDisableTimer ();
@@ -165,7 +166,7 @@ TimerDriverSetTimerPeriod (
ArmGenericTimerEnableTimer ();
} else {
// Save the new timer period
mTimerPeriod = TimerPeriod;
mTimerPeriod = TimerPeriod;
// Reset the elapsed period
mElapsedPeriod = 1;
}
@@ -191,8 +192,8 @@ TimerDriverSetTimerPeriod (
EFI_STATUS
EFIAPI
TimerDriverGetTimerPeriod (
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
IN EFI_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
if (TimerPeriod == NULL) {
@@ -261,7 +262,7 @@ TimerDriverGenerateSoftInterrupt (
a period of time.
**/
EFI_TIMER_ARCH_PROTOCOL gTimer = {
EFI_TIMER_ARCH_PROTOCOL gTimer = {
TimerDriverRegisterHandler,
TimerDriverSetTimerPeriod,
TimerDriverGetTimerPeriod,
@@ -284,13 +285,13 @@ EFI_TIMER_ARCH_PROTOCOL gTimer = {
VOID
EFIAPI
TimerInterruptHandler (
IN HARDWARE_INTERRUPT_SOURCE Source,
IN EFI_SYSTEM_CONTEXT SystemContext
IN HARDWARE_INTERRUPT_SOURCE Source,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
EFI_TPL OriginalTPL;
UINT64 CurrentValue;
UINT64 CompareValue;
EFI_TPL OriginalTPL;
UINT64 CurrentValue;
UINT64 CompareValue;
//
// DXE core uses this callback for the EFI timer tick. The DXE core uses locks
@@ -304,8 +305,9 @@ TimerInterruptHandler (
gInterrupt->EndOfInterrupt (gInterrupt, Source);
// Check if the timer interrupt is active
if ((ArmGenericTimerGetTimerCtrlReg ()) & ARM_ARCH_TIMER_ISTATUS) {
if (mTimerNotifyFunction != 0) {
if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
if (mTimerNotifyFunction) {
mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
}
@@ -336,6 +338,7 @@ TimerInterruptHandler (
gBS->RestoreTPL (OriginalTPL);
}
/**
Initialize the state information for the Timer Architectural Protocol and
the Timer Debug support protocol that allows the debugger to break into a
@@ -352,11 +355,11 @@ TimerInterruptHandler (
EFI_STATUS
EFIAPI
TimerInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_HANDLE Handle;
EFI_HANDLE Handle = NULL;
EFI_STATUS Status;
UINTN TimerCtrlReg;
UINT32 TimerHypIntrNum;
@@ -371,7 +374,7 @@ TimerInitialize (
ASSERT_EFI_ERROR (Status);
// Disable the timer
TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg ();
TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg ();
TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;
TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg);
@@ -402,18 +405,16 @@ TimerInitialize (
ASSERT_EFI_ERROR (Status);
// Set up default timer
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32 (PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
ASSERT_EFI_ERROR (Status);
Handle = NULL;
// Install the Timer Architectural Protocol onto a new handle
Status = gBS->InstallMultipleProtocolInterfaces (
Status = gBS->InstallMultipleProtocolInterfaces(
&Handle,
&gEfiTimerArchProtocolGuid,
&gTimer,
&gEfiTimerArchProtocolGuid, &gTimer,
NULL
);
ASSERT_EFI_ERROR (Status);
ASSERT_EFI_ERROR(Status);
// Everything is ready, unmask and enable timer interrupts
TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;

View File

@@ -2,7 +2,7 @@
Support a Semi Host file system over a debuggers JTAG
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -27,16 +27,16 @@
#include "SemihostFs.h"
#define DEFAULT_SEMIHOST_FS_LABEL L"SemihostFs"
#define DEFAULT_SEMIHOST_FS_LABEL L"SemihostFs"
STATIC CHAR16 *mSemihostFsLabel;
STATIC CHAR16 *mSemihostFsLabel;
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gSemihostFs = {
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gSemihostFs = {
EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION,
VolumeOpen
};
EFI_FILE gSemihostFsFile = {
EFI_FILE gSemihostFsFile = {
EFI_FILE_PROTOCOL_REVISION,
FileOpen,
FileClose,
@@ -51,50 +51,47 @@ EFI_FILE gSemihostFsFile = {
};
//
// Device path for semi-hosting. It contains our auto-generated Caller ID GUID.
// Device path for semi-hosting. It contains our autogened Caller ID GUID.
//
typedef struct {
VENDOR_DEVICE_PATH Guid;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH Guid;
EFI_DEVICE_PATH_PROTOCOL End;
} SEMIHOST_DEVICE_PATH;
SEMIHOST_DEVICE_PATH gDevicePath = {
SEMIHOST_DEVICE_PATH gDevicePath = {
{
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 }
},
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
EFI_CALLER_ID_GUID
},
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
}
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
};
typedef struct {
LIST_ENTRY Link;
UINT64 Signature;
EFI_FILE File;
CHAR8 *FileName;
UINT64 OpenMode;
UINT32 Position;
UINTN SemihostHandle;
BOOLEAN IsRoot;
EFI_FILE_INFO Info;
LIST_ENTRY Link;
UINT64 Signature;
EFI_FILE File;
CHAR8 *FileName;
UINT64 OpenMode;
UINT32 Position;
UINTN SemihostHandle;
BOOLEAN IsRoot;
EFI_FILE_INFO Info;
} SEMIHOST_FCB;
#define SEMIHOST_FCB_SIGNATURE SIGNATURE_32( 'S', 'H', 'F', 'C' )
#define SEMIHOST_FCB_FROM_THIS(a) CR(a, SEMIHOST_FCB, File, SEMIHOST_FCB_SIGNATURE)
#define SEMIHOST_FCB_FROM_LINK(a) CR(a, SEMIHOST_FCB, Link, SEMIHOST_FCB_SIGNATURE);
#define SEMIHOST_FCB_SIGNATURE SIGNATURE_32( 'S', 'H', 'F', 'C' )
#define SEMIHOST_FCB_FROM_THIS(a) CR(a, SEMIHOST_FCB, File, SEMIHOST_FCB_SIGNATURE)
#define SEMIHOST_FCB_FROM_LINK(a) CR(a, SEMIHOST_FCB, Link, SEMIHOST_FCB_SIGNATURE);
EFI_HANDLE gInstallHandle = NULL;
LIST_ENTRY gFileList = INITIALIZE_LIST_HEAD_VARIABLE (gFileList);
LIST_ENTRY gFileList = INITIALIZE_LIST_HEAD_VARIABLE (gFileList);
SEMIHOST_FCB *
AllocateFCB (
VOID
)
{
SEMIHOST_FCB *Fcb;
SEMIHOST_FCB *Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB));
if (Fcb != NULL) {
CopyMem (&Fcb->File, &gSemihostFsFile, sizeof (gSemihostFsFile));
Fcb->Signature = SEMIHOST_FCB_SIGNATURE;
@@ -105,7 +102,7 @@ AllocateFCB (
VOID
FreeFCB (
IN SEMIHOST_FCB *Fcb
IN SEMIHOST_FCB *Fcb
)
{
// Remove Fcb from gFileList.
@@ -117,13 +114,15 @@ FreeFCB (
FreePool (Fcb);
}
EFI_STATUS
VolumeOpen (
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
OUT EFI_FILE **Root
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
OUT EFI_FILE **Root
)
{
SEMIHOST_FCB *RootFcb;
SEMIHOST_FCB *RootFcb = NULL;
if (Root == NULL) {
return EFI_INVALID_PARAMETER;
@@ -134,7 +133,7 @@ VolumeOpen (
return EFI_OUT_OF_RESOURCES;
}
RootFcb->IsRoot = TRUE;
RootFcb->IsRoot = TRUE;
RootFcb->Info.Attribute = EFI_FILE_READ_ONLY | EFI_FILE_DIRECTORY;
InsertTailList (&gFileList, &RootFcb->Link);
@@ -191,33 +190,29 @@ FileOpen (
return EFI_INVALID_PARAMETER;
}
if ((OpenMode != EFI_FILE_MODE_READ) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)))
{
if ( (OpenMode != EFI_FILE_MODE_READ) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
return EFI_INVALID_PARAMETER;
}
if (((OpenMode & EFI_FILE_MODE_CREATE) != 0) &&
((Attributes & EFI_FILE_DIRECTORY) != 0))
{
if ((OpenMode & EFI_FILE_MODE_CREATE) &&
(Attributes & EFI_FILE_DIRECTORY) ) {
return EFI_WRITE_PROTECTED;
}
Length = StrLen (FileName) + 1;
Length = StrLen (FileName) + 1;
AsciiFileName = AllocatePool (Length);
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
// Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
(AsciiStrCmp (AsciiFileName, "/") == 0) ||
(AsciiStrCmp (AsciiFileName, "") == 0) ||
(AsciiStrCmp (AsciiFileName, ".") == 0))
{
(AsciiStrCmp (AsciiFileName, ".") == 0) ) {
FreePool (AsciiFileName);
return (VolumeOpen (&gSemihostFs, NewHandle));
}
@@ -236,11 +231,10 @@ FileOpen (
} else {
SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
}
Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
if (RETURN_ERROR (Return)) {
if ((OpenMode & EFI_FILE_MODE_CREATE) != 0) {
if (OpenMode & EFI_FILE_MODE_CREATE) {
//
// In the create if does not exist case, if the opening in update
// mode failed, create it and open it in update mode. The update
@@ -283,8 +277,7 @@ FileOpen (
FileFcb->Info.FileSize = Length;
FileFcb->Info.PhysicalSize = Length;
FileFcb->Info.Attribute = ((OpenMode & EFI_FILE_MODE_CREATE) != 0) ?
Attributes : 0;
FileFcb->Info.Attribute = (OpenMode & EFI_FILE_MODE_CREATE) ? Attributes : 0;
InsertTailList (&gFileList, &FileFcb->Link);
@@ -313,7 +306,7 @@ STATIC
EFI_STATUS
TruncateFile (
IN CHAR8 *FileName,
IN UINTN Size
IN UINTN Size
)
{
EFI_STATUS Status;
@@ -343,7 +336,7 @@ TruncateFile (
goto Error;
}
Read = 0;
Read = 0;
Remaining = Size;
while (Remaining > 0) {
ToRead = Remaining;
@@ -351,12 +344,11 @@ TruncateFile (
if (RETURN_ERROR (Return)) {
goto Error;
}
Remaining -= ToRead;
Read += ToRead;
}
Return = SemihostFileClose (FileHandle);
Return = SemihostFileClose (FileHandle);
FileHandle = 0;
if (RETURN_ERROR (Return)) {
goto Error;
@@ -385,12 +377,12 @@ Error:
if (FileHandle != 0) {
SemihostFileClose (FileHandle);
}
if (Buffer != NULL) {
FreePool (Buffer);
}
return (Status);
}
/**
@@ -408,13 +400,13 @@ FileClose (
IN EFI_FILE *This
)
{
SEMIHOST_FCB *Fcb;
SEMIHOST_FCB *Fcb;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS (This);
Fcb = SEMIHOST_FCB_FROM_THIS(This);
if (!Fcb->IsRoot) {
SemihostFileClose (Fcb->SemihostHandle);
@@ -426,7 +418,6 @@ FileClose (
if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
}
FreePool (Fcb->FileName);
}
@@ -448,7 +439,7 @@ FileClose (
**/
EFI_STATUS
FileDelete (
IN EFI_FILE *This
IN EFI_FILE *This
)
{
SEMIHOST_FCB *Fcb;
@@ -478,7 +469,6 @@ FileDelete (
if (RETURN_ERROR (Return)) {
return EFI_WARN_DELETE_FAILURE;
}
return EFI_SUCCESS;
} else {
return EFI_WARN_DELETE_FAILURE;
@@ -574,15 +564,14 @@ ExtendFile (
}
Remaining = Size;
SetMem (WriteBuffer, 0, sizeof (WriteBuffer));
SetMem (WriteBuffer, 0, sizeof(WriteBuffer));
while (Remaining > 0) {
WriteNb = MIN (Remaining, sizeof (WriteBuffer));
WriteNb = MIN (Remaining, sizeof(WriteBuffer));
WriteSize = WriteNb;
Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Remaining -= WriteNb;
}
@@ -608,9 +597,9 @@ ExtendFile (
**/
EFI_STATUS
FileWrite (
IN EFI_FILE *This,
IN OUT UINTN *BufferSize,
IN VOID *Buffer
IN EFI_FILE *This,
IN OUT UINTN *BufferSize,
IN VOID *Buffer
)
{
SEMIHOST_FCB *Fcb;
@@ -626,9 +615,8 @@ FileWrite (
Fcb = SEMIHOST_FCB_FROM_THIS (This);
// We cannot write a read-only file
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
return EFI_ACCESS_DENIED;
}
@@ -642,12 +630,11 @@ FileWrite (
if (EFI_ERROR (Status)) {
return Status;
}
Fcb->Info.FileSize = Fcb->Position;
}
WriteSize = *BufferSize;
Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, Buffer);
Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, Buffer);
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
@@ -661,7 +648,6 @@ FileWrite (
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Fcb->Info.PhysicalSize = Length;
return EFI_SUCCESS;
@@ -680,17 +666,17 @@ FileWrite (
**/
EFI_STATUS
FileGetPosition (
IN EFI_FILE *This,
OUT UINT64 *Position
IN EFI_FILE *This,
OUT UINT64 *Position
)
{
SEMIHOST_FCB *Fcb;
SEMIHOST_FCB *Fcb;
if ((This == NULL) || (Position == NULL)) {
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS (This);
Fcb = SEMIHOST_FCB_FROM_THIS(This);
*Position = Fcb->Position;
@@ -713,8 +699,8 @@ FileGetPosition (
**/
EFI_STATUS
FileSetPosition (
IN EFI_FILE *This,
IN UINT64 Position
IN EFI_FILE *This,
IN UINT64 Position
)
{
SEMIHOST_FCB *Fcb;
@@ -730,7 +716,8 @@ FileSetPosition (
if (Position != 0) {
return EFI_UNSUPPORTED;
}
} else {
}
else {
//
// UEFI Spec section 12.5:
// "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
@@ -739,7 +726,6 @@ FileSetPosition (
if (Position == 0xFFFFFFFFFFFFFFFF) {
Position = Fcb->Info.FileSize;
}
Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
@@ -772,14 +758,13 @@ GetFileInfo (
OUT VOID *Buffer
)
{
EFI_FILE_INFO *Info;
UINTN NameSize;
UINTN ResultSize;
UINTN Index;
EFI_FILE_INFO *Info = NULL;
UINTN NameSize = 0;
UINTN ResultSize;
UINTN Index;
if (Fcb->IsRoot) {
NameSize = 0;
ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof (CHAR16);
if (Fcb->IsRoot == TRUE) {
ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
} else {
NameSize = AsciiStrLen (Fcb->FileName) + 1;
ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16);
@@ -798,8 +783,8 @@ GetFileInfo (
// Fill in the structure
Info->Size = ResultSize;
if (Fcb->IsRoot) {
Info->FileName[0] = L'\0';
if (Fcb->IsRoot == TRUE) {
Info->FileName[0] = L'\0';
} else {
for (Index = 0; Index < NameSize; Index++) {
Info->FileName[Index] = Fcb->FileName[Index];
@@ -830,9 +815,9 @@ GetFileInfo (
STATIC
EFI_STATUS
GetFilesystemInfo (
IN SEMIHOST_FCB *Fcb,
IN OUT UINTN *BufferSize,
OUT VOID *Buffer
IN SEMIHOST_FCB *Fcb,
IN OUT UINTN *BufferSize,
OUT VOID *Buffer
)
{
EFI_FILE_SYSTEM_INFO *Info;
@@ -894,19 +879,18 @@ FileGetInfo (
OUT VOID *Buffer
)
{
SEMIHOST_FCB *Fcb;
EFI_STATUS Status;
UINTN ResultSize;
SEMIHOST_FCB *Fcb;
EFI_STATUS Status;
UINTN ResultSize;
if ((This == NULL) ||
(InformationType == NULL) ||
(BufferSize == NULL) ||
((Buffer == NULL) && (*BufferSize > 0)))
{
((Buffer == NULL) && (*BufferSize > 0)) ) {
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS (This);
Fcb = SEMIHOST_FCB_FROM_THIS(This);
if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
Status = GetFilesystemInfo (Fcb, BufferSize, Buffer);
@@ -976,12 +960,11 @@ SetFileInfo (
return EFI_ACCESS_DENIED;
}
Length = StrLen (Info->FileName) + 1;
Length = StrLen (Info->FileName) + 1;
AsciiFileName = AllocatePool (Length);
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
@@ -999,8 +982,7 @@ SetFileInfo (
// description.
//
if ((Fcb->OpenMode == EFI_FILE_MODE_READ) ||
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY))
{
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) {
if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
Status = EFI_ACCESS_DENIED;
goto Error;
@@ -1021,7 +1003,6 @@ SetFileInfo (
if (EFI_ERROR (Status)) {
goto Error;
}
//
// The read/write position from the host file system point of view
// is at the end of the file. If the position from this module
@@ -1032,14 +1013,12 @@ SetFileInfo (
FileSetPosition (&Fcb->File, Fcb->Position);
}
}
Fcb->Info.FileSize = FileSize;
Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
if (RETURN_ERROR (Return)) {
goto Error;
}
Fcb->Info.PhysicalSize = Length;
}
@@ -1066,7 +1045,6 @@ SetFileInfo (
if (RETURN_ERROR (Return)) {
goto Error;
}
FreePool (Fcb->FileName);
Fcb->FileName = AsciiFileName;
AsciiFileName = NULL;
@@ -1138,24 +1116,19 @@ FileSetInfo (
if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
return EFI_INVALID_PARAMETER;
}
if (BufferSize < Info->Size) {
return EFI_BAD_BUFFER_SIZE;
}
return SetFileInfo (Fcb, Info);
} else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
SystemInfo = Buffer;
if (SystemInfo->Size <
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel)))
{
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
return EFI_INVALID_PARAMETER;
}
if (BufferSize < SystemInfo->Size) {
return EFI_BAD_BUFFER_SIZE;
}
Buffer = SystemInfo->VolumeLabel;
if (StrSize (Buffer) > 0) {
@@ -1179,19 +1152,18 @@ FileSetInfo (
EFI_STATUS
FileFlush (
IN EFI_FILE *File
IN EFI_FILE *File
)
{
SEMIHOST_FCB *Fcb;
SEMIHOST_FCB *Fcb;
Fcb = SEMIHOST_FCB_FROM_THIS (File);
Fcb = SEMIHOST_FCB_FROM_THIS(File);
if (Fcb->IsRoot) {
return EFI_SUCCESS;
} else {
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
return EFI_ACCESS_DENIED;
} else {
return EFI_SUCCESS;
@@ -1201,11 +1173,11 @@ FileFlush (
EFI_STATUS
SemihostFsEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = EFI_NOT_FOUND;
@@ -1217,14 +1189,12 @@ SemihostFsEntryPoint (
Status = gBS->InstallMultipleProtocolInterfaces (
&gInstallHandle,
&gEfiSimpleFileSystemProtocolGuid,
&gSemihostFs,
&gEfiDevicePathProtocolGuid,
&gDevicePath,
&gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
&gEfiDevicePathProtocolGuid, &gDevicePath,
NULL
);
if (EFI_ERROR (Status)) {
if (EFI_ERROR(Status)) {
FreePool (mSemihostFsLabel);
}
}

View File

@@ -7,13 +7,13 @@
**/
#ifndef SEMIHOST_FS_H_
#define SEMIHOST_FS_H_
#ifndef __SEMIHOST_FS_H__
#define __SEMIHOST_FS_H__
EFI_STATUS
VolumeOpen (
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
OUT EFI_FILE **Root
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
OUT EFI_FILE **Root
);
/**
@@ -79,7 +79,7 @@ FileClose (
**/
EFI_STATUS
FileDelete (
IN EFI_FILE *This
IN EFI_FILE *This
);
/**
@@ -127,9 +127,9 @@ FileRead (
**/
EFI_STATUS
FileWrite (
IN EFI_FILE *This,
IN OUT UINTN *BufferSize,
IN VOID *Buffer
IN EFI_FILE *This,
IN OUT UINTN *BufferSize,
IN VOID *Buffer
);
/**
@@ -145,8 +145,8 @@ FileWrite (
**/
EFI_STATUS
FileGetPosition (
IN EFI_FILE *File,
OUT UINT64 *Position
IN EFI_FILE *File,
OUT UINT64 *Position
);
/**
@@ -164,8 +164,8 @@ FileGetPosition (
**/
EFI_STATUS
FileSetPosition (
IN EFI_FILE *File,
IN UINT64 Position
IN EFI_FILE *File,
IN UINT64 Position
);
/**
@@ -239,7 +239,8 @@ FileSetInfo (
EFI_STATUS
FileFlush (
IN EFI_FILE *File
IN EFI_FILE *File
);
#endif // SEMIHOST_FS_H_
#endif // __SEMIHOST_FS_H__

View File

@@ -9,8 +9,9 @@
**/
#ifndef ASM_MACRO_IO_LIB_H_
#define ASM_MACRO_IO_LIB_H_
#ifndef __MACRO_IO_LIB_H__
#define __MACRO_IO_LIB_H__
#define _ASM_FUNC(Name, Section) \
.global Name ; \
@@ -19,7 +20,7 @@
.p2align 2 ; \
Name:
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
#define MOV32(Reg, Val) \
movw Reg, #(Val) & 0xffff ; \
@@ -35,4 +36,4 @@
movt Reg, #:upper16:(Sym) - (. + 12) ; \
ldr Reg, [pc, Reg]
#endif // ASM_MACRO_IO_LIB_H_
#endif

View File

@@ -9,8 +9,9 @@
**/
#ifndef ASM_MACRO_IO_LIBV8_H_
#define ASM_MACRO_IO_LIBV8_H_
#ifndef __MACRO_IO_LIBV8_H__
#define __MACRO_IO_LIBV8_H__
// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
// This only selects between EL1 and EL2, else we die.
@@ -23,6 +24,7 @@
cbnz SAFE_XREG, 1f ;\
b . ;// We should never get here
// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
// This only selects between EL1 and EL2 and EL3, else we die.
// Provide the Macro with a safe temp xreg to use.
@@ -40,7 +42,7 @@
.type Name, %function ; \
Name:
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
#define MOV32(Reg, Val) \
movz Reg, (Val) >> 16, lsl #16 ; \
@@ -52,4 +54,4 @@
movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
movk Reg, (Val) & 0xffff
#endif // ASM_MACRO_IO_LIBV8_H_
#endif // __MACRO_IO_LIBV8_H__

View File

@@ -1,120 +1,116 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2011 - 2017, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef AARCH64_H_
#define AARCH64_H_
#ifndef __AARCH64_H__
#define __AARCH64_H__
#include <Chipset/AArch64Mmu.h>
// ARM Interrupt ID in Exception Table
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
// CPACR - Coprocessor Access Control Register definitions
#define CPACR_TTA_EN (1UL << 28)
#define CPACR_FPEN_EL1 (1UL << 20)
#define CPACR_FPEN_FULL (3UL << 20)
#define CPACR_CP_FULL_ACCESS 0x300000
#define CPACR_TTA_EN (1UL << 28)
#define CPACR_FPEN_EL1 (1UL << 20)
#define CPACR_FPEN_FULL (3UL << 20)
#define CPACR_CP_FULL_ACCESS 0x300000
// Coprocessor Trap Register (CPTR)
#define AARCH64_CPTR_TFP (1 << 10)
#define AARCH64_CPTR_TFP (1 << 10)
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)
#define SCR_IRQ (1 << 1)
#define SCR_FIQ (1 << 2)
#define SCR_EA (1 << 3)
#define SCR_FW (1 << 4)
#define SCR_AW (1 << 5)
#define SCR_NS (1 << 0)
#define SCR_IRQ (1 << 1)
#define SCR_FIQ (1 << 2)
#define SCR_EA (1 << 3)
#define SCR_FW (1 << 4)
#define SCR_AW (1 << 5)
// MIDR - Main ID Register definitions
#define ARM_CPU_TYPE_SHIFT 4
#define ARM_CPU_TYPE_MASK 0xFFF
#define ARM_CPU_TYPE_AEMV8 0xD0F
#define ARM_CPU_TYPE_A53 0xD03
#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A72 0xD08
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A7 0xC07
#define ARM_CPU_TYPE_A5 0xC05
#define ARM_CPU_TYPE_SHIFT 4
#define ARM_CPU_TYPE_MASK 0xFFF
#define ARM_CPU_TYPE_AEMv8 0xD0F
#define ARM_CPU_TYPE_A53 0xD03
#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A72 0xD08
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A7 0xC07
#define ARM_CPU_TYPE_A5 0xC05
#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
// Hypervisor Configuration Register
#define ARM_HCR_FMO BIT3
#define ARM_HCR_IMO BIT4
#define ARM_HCR_AMO BIT5
#define ARM_HCR_TSC BIT19
#define ARM_HCR_TGE BIT27
#define ARM_HCR_FMO BIT3
#define ARM_HCR_IMO BIT4
#define ARM_HCR_AMO BIT5
#define ARM_HCR_TSC BIT19
#define ARM_HCR_TGE BIT27
// Exception Syndrome Register
#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr))
#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr))
#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr))
#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr))
#define AARCH64_ESR_EC_SMC32 (0x13 << 26)
#define AARCH64_ESR_EC_SMC64 (0x17 << 26)
#define AARCH64_ESR_EC_SMC32 (0x13 << 26)
#define AARCH64_ESR_EC_SMC64 (0x17 << 26)
// AArch64 Exception Level
#define AARCH64_EL3 0xC
#define AARCH64_EL2 0x8
#define AARCH64_EL1 0x4
#define AARCH64_EL3 0xC
#define AARCH64_EL2 0x8
#define AARCH64_EL1 0x4
// Saved Program Status Register definitions
#define SPSR_A BIT8
#define SPSR_I BIT7
#define SPSR_F BIT6
#define SPSR_A BIT8
#define SPSR_I BIT7
#define SPSR_F BIT6
#define SPSR_AARCH32 BIT4
#define SPSR_AARCH32 BIT4
#define SPSR_AARCH32_MODE_USER 0x0
#define SPSR_AARCH32_MODE_FIQ 0x1
#define SPSR_AARCH32_MODE_IRQ 0x2
#define SPSR_AARCH32_MODE_SVC 0x3
#define SPSR_AARCH32_MODE_ABORT 0x7
#define SPSR_AARCH32_MODE_UNDEF 0xB
#define SPSR_AARCH32_MODE_SYS 0xF
#define SPSR_AARCH32_MODE_USER 0x0
#define SPSR_AARCH32_MODE_FIQ 0x1
#define SPSR_AARCH32_MODE_IRQ 0x2
#define SPSR_AARCH32_MODE_SVC 0x3
#define SPSR_AARCH32_MODE_ABORT 0x7
#define SPSR_AARCH32_MODE_UNDEF 0xB
#define SPSR_AARCH32_MODE_SYS 0xF
// Counter-timer Hypervisor Control register definitions
#define CNTHCTL_EL2_EL1PCTEN BIT0
#define CNTHCTL_EL2_EL1PCEN BIT1
#define CNTHCTL_EL2_EL1PCTEN BIT0
#define CNTHCTL_EL2_EL1PCEN BIT1
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
// Vector table offset definitions
#define ARM_VECTOR_CUR_SP0_SYNC 0x000
#define ARM_VECTOR_CUR_SP0_IRQ 0x080
#define ARM_VECTOR_CUR_SP0_FIQ 0x100
#define ARM_VECTOR_CUR_SP0_SERR 0x180
#define ARM_VECTOR_CUR_SP0_SYNC 0x000
#define ARM_VECTOR_CUR_SP0_IRQ 0x080
#define ARM_VECTOR_CUR_SP0_FIQ 0x100
#define ARM_VECTOR_CUR_SP0_SERR 0x180
#define ARM_VECTOR_CUR_SPX_SYNC 0x200
#define ARM_VECTOR_CUR_SPX_IRQ 0x280
#define ARM_VECTOR_CUR_SPX_FIQ 0x300
#define ARM_VECTOR_CUR_SPX_SERR 0x380
#define ARM_VECTOR_CUR_SPx_SYNC 0x200
#define ARM_VECTOR_CUR_SPx_IRQ 0x280
#define ARM_VECTOR_CUR_SPx_FIQ 0x300
#define ARM_VECTOR_CUR_SPx_SERR 0x380
#define ARM_VECTOR_LOW_A64_SYNC 0x400
#define ARM_VECTOR_LOW_A64_IRQ 0x480
#define ARM_VECTOR_LOW_A64_FIQ 0x500
#define ARM_VECTOR_LOW_A64_SERR 0x580
#define ARM_VECTOR_LOW_A64_SYNC 0x400
#define ARM_VECTOR_LOW_A64_IRQ 0x480
#define ARM_VECTOR_LOW_A64_FIQ 0x500
#define ARM_VECTOR_LOW_A64_SERR 0x580
#define ARM_VECTOR_LOW_A32_SYNC 0x600
#define ARM_VECTOR_LOW_A32_IRQ 0x680
#define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
// build for ARMv8.0, we need to define the register here.
#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
#define ARM_VECTOR_LOW_A32_SYNC 0x600
#define ARM_VECTOR_LOW_A32_IRQ 0x680
#define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
#define VECTOR_BASE(tbl) \
.section .text.##tbl##,"ax"; \
@@ -151,7 +147,7 @@ ArmReadTpidrurw (
VOID
EFIAPI
ArmWriteTpidrurw (
UINTN Value
UINTN Value
);
UINTN
@@ -163,7 +159,7 @@ ArmGetTCR (
VOID
EFIAPI
ArmSetTCR (
UINTN Value
UINTN Value
);
UINTN
@@ -175,7 +171,7 @@ ArmGetMAIR (
VOID
EFIAPI
ArmSetMAIR (
UINTN Value
UINTN Value
);
VOID
@@ -210,7 +206,7 @@ ArmDisableAllExceptions (
VOID
ArmWriteHcr (
IN UINTN Hcr
IN UINTN Hcr
);
UINTN
@@ -223,9 +219,14 @@ ArmReadCurrentEL (
VOID
);
UINT64
PageAttributeToGcdAttribute (
IN UINT64 PageAttributes
);
UINTN
ArmWriteCptr (
IN UINT64 Cptr
IN UINT64 Cptr
);
UINT32
@@ -235,7 +236,7 @@ ArmReadCntHctl (
VOID
ArmWriteCntHctl (
IN UINT32 CntHctl
IN UINT32 CntHctl
);
#endif // AARCH64_H_
#endif // __AARCH64_H__

View File

@@ -1,23 +1,23 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef AARCH64_MMU_H_
#define AARCH64_MMU_H_
#ifndef __AARCH64_MMU_H_
#define __AARCH64_MMU_H_
//
// Memory Attribute Indirection register Definitions
//
#define MAIR_ATTR_DEVICE_MEMORY 0x0ULL
#define MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE 0x44ULL
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL
#define MAIR_ATTR_DEVICE_MEMORY 0x0ULL
#define MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE 0x44ULL
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL
#define MAIR_ATTR(n, value) ((value) << (((n) >> 2)*8))
#define MAIR_ATTR(n,value) ((value) << (((n) >> 2)*8))
//
// Long-descriptor Translation Table format
@@ -27,7 +27,7 @@
// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
#define TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel) (12 + ((3 - (TableLevel)) * 9))
#define TT_BLOCK_ENTRY_SIZE_AT_LEVEL(Level) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(Level))
#define TT_BLOCK_ENTRY_SIZE_AT_LEVEL(Level) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(Level))
// Get the associated entry in the given Translation Table
#define TT_GET_ENTRY_FOR_ADDRESS(TranslationTable, Level, Address) \
@@ -35,161 +35,164 @@
// Return the smallest address granularity from the table level.
// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0
#define TT_ADDRESS_AT_LEVEL(TableLevel) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel))
#define TT_ADDRESS_AT_LEVEL(TableLevel) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel))
#define TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount) \
((UINT64*)((EFI_PHYSICAL_ADDRESS)(TranslationTable) + (((EntryCount) - 1) * sizeof(UINT64))))
// There are 512 entries per table when 4K Granularity
#define TT_ENTRY_COUNT 512
#define TT_ALIGNMENT_BLOCK_ENTRY BIT12
#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12
#define TT_ENTRY_COUNT 512
#define TT_ALIGNMENT_BLOCK_ENTRY BIT12
#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12
#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12)
#define TT_TYPE_MASK 0x3
#define TT_TYPE_TABLE_ENTRY 0x3
#define TT_TYPE_BLOCK_ENTRY 0x1
#define TT_TYPE_BLOCK_ENTRY_LEVEL3 0x3
#define TT_TYPE_MASK 0x3
#define TT_TYPE_TABLE_ENTRY 0x3
#define TT_TYPE_BLOCK_ENTRY 0x1
#define TT_TYPE_BLOCK_ENTRY_LEVEL3 0x3
#define TT_ATTR_INDX_MASK (0x7 << 2)
#define TT_ATTR_INDX_DEVICE_MEMORY (0x0 << 2)
#define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2)
#define TT_ATTR_INDX_MEMORY_WRITE_THROUGH (0x2 << 2)
#define TT_ATTR_INDX_MEMORY_WRITE_BACK (0x3 << 2)
#define TT_ATTR_INDX_MASK (0x7 << 2)
#define TT_ATTR_INDX_DEVICE_MEMORY (0x0 << 2)
#define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2)
#define TT_ATTR_INDX_MEMORY_WRITE_THROUGH (0x2 << 2)
#define TT_ATTR_INDX_MEMORY_WRITE_BACK (0x3 << 2)
#define TT_AP_MASK (0x3UL << 6)
#define TT_AP_NO_RW (0x0UL << 6)
#define TT_AP_RW_RW (0x1UL << 6)
#define TT_AP_NO_RO (0x2UL << 6)
#define TT_AP_RO_RO (0x3UL << 6)
#define TT_AP_MASK (0x3UL << 6)
#define TT_AP_NO_RW (0x0UL << 6)
#define TT_AP_RW_RW (0x1UL << 6)
#define TT_AP_NO_RO (0x2UL << 6)
#define TT_AP_RO_RO (0x3UL << 6)
#define TT_NS BIT5
#define TT_AF BIT10
#define TT_NS BIT5
#define TT_AF BIT10
#define TT_SH_NON_SHAREABLE (0x0 << 8)
#define TT_SH_OUTER_SHAREABLE (0x2 << 8)
#define TT_SH_INNER_SHAREABLE (0x3 << 8)
#define TT_SH_MASK (0x3 << 8)
#define TT_SH_NON_SHAREABLE (0x0 << 8)
#define TT_SH_OUTER_SHAREABLE (0x2 << 8)
#define TT_SH_INNER_SHAREABLE (0x3 << 8)
#define TT_SH_MASK (0x3 << 8)
#define TT_PXN_MASK BIT53
#define TT_UXN_MASK BIT54 // EL1&0
#define TT_XN_MASK BIT54 // EL2 / EL3
#define TT_PXN_MASK BIT53
#define TT_UXN_MASK BIT54 // EL1&0
#define TT_XN_MASK BIT54 // EL2 / EL3
#define TT_ATTRIBUTES_MASK ((0xFFFULL << 52) | (0x3FFULL << 2))
#define TT_ATTRIBUTES_MASK ((0xFFFULL << 52) | (0x3FFULL << 2))
#define TT_TABLE_PXN BIT59
#define TT_TABLE_UXN BIT60 // EL1&0
#define TT_TABLE_XN BIT60 // EL2 / EL3
#define TT_TABLE_NS BIT63
#define TT_TABLE_PXN BIT59
#define TT_TABLE_UXN BIT60 // EL1&0
#define TT_TABLE_XN BIT60 // EL2 / EL3
#define TT_TABLE_NS BIT63
#define TT_TABLE_AP_MASK (BIT62 | BIT61)
#define TT_TABLE_AP_NO_PERMISSION (0x0ULL << 61)
#define TT_TABLE_AP_EL0_NO_ACCESS (0x1ULL << 61)
#define TT_TABLE_AP_NO_WRITE_ACCESS (0x2ULL << 61)
#define TT_TABLE_AP_MASK (BIT62 | BIT61)
#define TT_TABLE_AP_NO_PERMISSION (0x0ULL << 61)
#define TT_TABLE_AP_EL0_NO_ACCESS (0x1ULL << 61)
#define TT_TABLE_AP_NO_WRITE_ACCESS (0x2ULL << 61)
//
// Translation Control Register
//
#define TCR_T0SZ_MASK 0x3FUL
#define TCR_T0SZ_MASK 0x3FUL
#define TCR_PS_4GB (0UL << 16)
#define TCR_PS_64GB (1UL << 16)
#define TCR_PS_1TB (2UL << 16)
#define TCR_PS_4TB (3UL << 16)
#define TCR_PS_16TB (4UL << 16)
#define TCR_PS_256TB (5UL << 16)
#define TCR_PS_4GB (0UL << 16)
#define TCR_PS_64GB (1UL << 16)
#define TCR_PS_1TB (2UL << 16)
#define TCR_PS_4TB (3UL << 16)
#define TCR_PS_16TB (4UL << 16)
#define TCR_PS_256TB (5UL << 16)
#define TCR_TG0_4KB (0UL << 14)
#define TCR_TG1_4KB (2UL << 30)
#define TCR_TG0_4KB (0UL << 14)
#define TCR_TG1_4KB (2UL << 30)
#define TCR_IPS_4GB (0ULL << 32)
#define TCR_IPS_64GB (1ULL << 32)
#define TCR_IPS_1TB (2ULL << 32)
#define TCR_IPS_4TB (3ULL << 32)
#define TCR_IPS_16TB (4ULL << 32)
#define TCR_IPS_256TB (5ULL << 32)
#define TCR_IPS_4GB (0ULL << 32)
#define TCR_IPS_64GB (1ULL << 32)
#define TCR_IPS_1TB (2ULL << 32)
#define TCR_IPS_4TB (3ULL << 32)
#define TCR_IPS_16TB (4ULL << 32)
#define TCR_IPS_256TB (5ULL << 32)
#define TCR_EPD1 (1UL << 23)
#define TCR_EPD1 (1UL << 23)
#define TTBR_ASID_FIELD (48)
#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD)
#define TTBR_BADDR_MASK (0xFFFFFFFFFFFF ) // The width of this field depends on the values in TxSZ. Addr occupies bottom 48bits
#define TTBR_ASID_FIELD (48)
#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD)
#define TTBR_BADDR_MASK (0xFFFFFFFFFFFF ) // The width of this field depends on the values in TxSZ. Addr occupies bottom 48bits
#define TCR_EL1_T0SZ_FIELD (0)
#define TCR_EL1_EPD0_FIELD (7)
#define TCR_EL1_IRGN0_FIELD (8)
#define TCR_EL1_ORGN0_FIELD (10)
#define TCR_EL1_SH0_FIELD (12)
#define TCR_EL1_TG0_FIELD (14)
#define TCR_EL1_T1SZ_FIELD (16)
#define TCR_EL1_A1_FIELD (22)
#define TCR_EL1_EPD1_FIELD (23)
#define TCR_EL1_IRGN1_FIELD (24)
#define TCR_EL1_ORGN1_FIELD (26)
#define TCR_EL1_SH1_FIELD (28)
#define TCR_EL1_TG1_FIELD (30)
#define TCR_EL1_IPS_FIELD (32)
#define TCR_EL1_AS_FIELD (36)
#define TCR_EL1_TBI0_FIELD (37)
#define TCR_EL1_TBI1_FIELD (38)
#define TCR_EL1_T0SZ_MASK (0x1FUL << TCR_EL1_T0SZ_FIELD)
#define TCR_EL1_EPD0_MASK (0x01UL << TCR_EL1_EPD0_FIELD)
#define TCR_EL1_IRGN0_MASK (0x03UL << TCR_EL1_IRGN0_FIELD)
#define TCR_EL1_ORGN0_MASK (0x03UL << TCR_EL1_ORGN0_FIELD)
#define TCR_EL1_SH0_MASK (0x03UL << TCR_EL1_SH0_FIELD)
#define TCR_EL1_TG0_MASK (0x01UL << TCR_EL1_TG0_FIELD)
#define TCR_EL1_T1SZ_MASK (0x1FUL << TCR_EL1_T1SZ_FIELD)
#define TCR_EL1_A1_MASK (0x01UL << TCR_EL1_A1_FIELD)
#define TCR_EL1_EPD1_MASK (0x01UL << TCR_EL1_EPD1_FIELD)
#define TCR_EL1_IRGN1_MASK (0x03UL << TCR_EL1_IRGN1_FIELD)
#define TCR_EL1_ORGN1_MASK (0x03UL << TCR_EL1_ORGN1_FIELD)
#define TCR_EL1_SH1_MASK (0x03UL << TCR_EL1_SH1_FIELD)
#define TCR_EL1_TG1_MASK (0x01UL << TCR_EL1_TG1_FIELD)
#define TCR_EL1_IPS_MASK (0x07UL << TCR_EL1_IPS_FIELD)
#define TCR_EL1_AS_MASK (0x01UL << TCR_EL1_AS_FIELD)
#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
#define TCR_EL1_T0SZ_FIELD (0)
#define TCR_EL1_EPD0_FIELD (7)
#define TCR_EL1_IRGN0_FIELD (8)
#define TCR_EL1_ORGN0_FIELD (10)
#define TCR_EL1_SH0_FIELD (12)
#define TCR_EL1_TG0_FIELD (14)
#define TCR_EL1_T1SZ_FIELD (16)
#define TCR_EL1_A1_FIELD (22)
#define TCR_EL1_EPD1_FIELD (23)
#define TCR_EL1_IRGN1_FIELD (24)
#define TCR_EL1_ORGN1_FIELD (26)
#define TCR_EL1_SH1_FIELD (28)
#define TCR_EL1_TG1_FIELD (30)
#define TCR_EL1_IPS_FIELD (32)
#define TCR_EL1_AS_FIELD (36)
#define TCR_EL1_TBI0_FIELD (37)
#define TCR_EL1_TBI1_FIELD (38)
#define TCR_EL1_T0SZ_MASK (0x1FUL << TCR_EL1_T0SZ_FIELD)
#define TCR_EL1_EPD0_MASK (0x01UL << TCR_EL1_EPD0_FIELD)
#define TCR_EL1_IRGN0_MASK (0x03UL << TCR_EL1_IRGN0_FIELD)
#define TCR_EL1_ORGN0_MASK (0x03UL << TCR_EL1_ORGN0_FIELD)
#define TCR_EL1_SH0_MASK (0x03UL << TCR_EL1_SH0_FIELD)
#define TCR_EL1_TG0_MASK (0x01UL << TCR_EL1_TG0_FIELD)
#define TCR_EL1_T1SZ_MASK (0x1FUL << TCR_EL1_T1SZ_FIELD)
#define TCR_EL1_A1_MASK (0x01UL << TCR_EL1_A1_FIELD)
#define TCR_EL1_EPD1_MASK (0x01UL << TCR_EL1_EPD1_FIELD)
#define TCR_EL1_IRGN1_MASK (0x03UL << TCR_EL1_IRGN1_FIELD)
#define TCR_EL1_ORGN1_MASK (0x03UL << TCR_EL1_ORGN1_FIELD)
#define TCR_EL1_SH1_MASK (0x03UL << TCR_EL1_SH1_FIELD)
#define TCR_EL1_TG1_MASK (0x01UL << TCR_EL1_TG1_FIELD)
#define TCR_EL1_IPS_MASK (0x07UL << TCR_EL1_IPS_FIELD)
#define TCR_EL1_AS_MASK (0x01UL << TCR_EL1_AS_FIELD)
#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
#define TCR_EL23_T0SZ_FIELD (0)
#define TCR_EL23_IRGN0_FIELD (8)
#define TCR_EL23_ORGN0_FIELD (10)
#define TCR_EL23_SH0_FIELD (12)
#define TCR_EL23_TG0_FIELD (14)
#define TCR_EL23_PS_FIELD (16)
#define TCR_EL23_T0SZ_MASK (0x1FUL << TCR_EL23_T0SZ_FIELD)
#define TCR_EL23_IRGN0_MASK (0x03UL << TCR_EL23_IRGN0_FIELD)
#define TCR_EL23_ORGN0_MASK (0x03UL << TCR_EL23_ORGN0_FIELD)
#define TCR_EL23_SH0_MASK (0x03UL << TCR_EL23_SH0_FIELD)
#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_NO_ALLOC (0x3UL << 10)
#define TCR_EL23_T0SZ_FIELD (0)
#define TCR_EL23_IRGN0_FIELD (8)
#define TCR_EL23_ORGN0_FIELD (10)
#define TCR_EL23_SH0_FIELD (12)
#define TCR_EL23_TG0_FIELD (14)
#define TCR_EL23_PS_FIELD (16)
#define TCR_EL23_T0SZ_MASK (0x1FUL << TCR_EL23_T0SZ_FIELD)
#define TCR_EL23_IRGN0_MASK (0x03UL << TCR_EL23_IRGN0_FIELD)
#define TCR_EL23_ORGN0_MASK (0x03UL << TCR_EL23_ORGN0_FIELD)
#define TCR_EL23_SH0_MASK (0x03UL << TCR_EL23_SH0_FIELD)
#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
#define TCR_RGN_INNER_NON_CACHEABLE (0x0UL << 8)
#define TCR_RGN_INNER_WRITE_BACK_ALLOC (0x1UL << 8)
#define TCR_RGN_INNER_WRITE_THROUGH (0x2UL << 8)
#define TCR_RGN_INNER_WRITE_BACK_NO_ALLOC (0x3UL << 8)
#define TCR_SH_NON_SHAREABLE (0x0UL << 12)
#define TCR_SH_OUTER_SHAREABLE (0x2UL << 12)
#define TCR_SH_INNER_SHAREABLE (0x3UL << 12)
#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_NO_ALLOC (0x3UL << 10)
#define TCR_PASZ_32BITS_4GB (0x0UL)
#define TCR_PASZ_36BITS_64GB (0x1UL)
#define TCR_PASZ_40BITS_1TB (0x2UL)
#define TCR_PASZ_42BITS_4TB (0x3UL)
#define TCR_PASZ_44BITS_16TB (0x4UL)
#define TCR_PASZ_48BITS_256TB (0x5UL)
#define TCR_RGN_INNER_NON_CACHEABLE (0x0UL << 8)
#define TCR_RGN_INNER_WRITE_BACK_ALLOC (0x1UL << 8)
#define TCR_RGN_INNER_WRITE_THROUGH (0x2UL << 8)
#define TCR_RGN_INNER_WRITE_BACK_NO_ALLOC (0x3UL << 8)
#define TCR_SH_NON_SHAREABLE (0x0UL << 12)
#define TCR_SH_OUTER_SHAREABLE (0x2UL << 12)
#define TCR_SH_INNER_SHAREABLE (0x3UL << 12)
#define TCR_PASZ_32BITS_4GB (0x0UL)
#define TCR_PASZ_36BITS_64GB (0x1UL)
#define TCR_PASZ_40BITS_1TB (0x2UL)
#define TCR_PASZ_42BITS_4TB (0x3UL)
#define TCR_PASZ_44BITS_16TB (0x4UL)
#define TCR_PASZ_48BITS_256TB (0x5UL)
// The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit
// Virtual address range for 512GB of virtual space sets T*SZ to 25
#define INPUT_ADDRESS_SIZE_TO_TXSZ(a) (64 - a)
#define INPUT_ADDRESS_SIZE_TO_TxSZ(a) (64 - a)
// Uses LPAE Page Table format
#endif // AARCH64_MMU_H_
#endif // __AARCH64_MMU_H_

View File

@@ -1,18 +1,18 @@
/** @file
Copyright (c) 2012 - 2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2012-2014, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_CORTEX_A5X_H_
#define ARM_CORTEX_A5X_H_
#ifndef __ARM_CORTEX_A5x_H__
#define __ARM_CORTEX_A5x_H__
//
// Cortex A5x feature bit definitions
//
#define A5X_FEATURE_SMP (1 << 6)
#define A5X_FEATURE_SMP (1 << 6)
//
// Helper functions to access CPU Extended Control Register
@@ -26,19 +26,19 @@ ArmReadCpuExCr (
VOID
EFIAPI
ArmWriteCpuExCr (
IN UINT64 Val
IN UINT64 Val
);
VOID
EFIAPI
ArmSetCpuExCrBit (
IN UINT64 Bits
IN UINT64 Bits
);
VOID
EFIAPI
ArmUnsetCpuExCrBit (
IN UINT64 Bits
IN UINT64 Bits
);
#endif // ARM_CORTEX_A5X_H_
#endif

View File

@@ -6,8 +6,8 @@
**/
#ifndef ARM_CORTEX_A9_H_
#define ARM_CORTEX_A9_H_
#ifndef __ARM_CORTEX_A9_H__
#define __ARM_CORTEX_A9_H__
#include <Chipset/ArmV7.h>
@@ -26,27 +26,28 @@
//
// Cortex A9 Watchdog
//
#define ARM_A9_WATCHDOG_REGION 0x600
#define ARM_A9_WATCHDOG_REGION 0x600
#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
#define ARM_A9_WATCHDOG_ENABLE 1
#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
#define ARM_A9_WATCHDOG_ENABLE 1
//
// SCU register offsets & masks
//
#define A9_SCU_CONTROL_OFFSET 0x0
#define A9_SCU_CONFIG_OFFSET 0x4
#define A9_SCU_INVALL_OFFSET 0xC
#define A9_SCU_FILT_START_OFFSET 0x40
#define A9_SCU_FILT_END_OFFSET 0x44
#define A9_SCU_SACR_OFFSET 0x50
#define A9_SCU_SSACR_OFFSET 0x54
#define A9_SCU_CONTROL_OFFSET 0x0
#define A9_SCU_CONFIG_OFFSET 0x4
#define A9_SCU_INVALL_OFFSET 0xC
#define A9_SCU_FILT_START_OFFSET 0x40
#define A9_SCU_FILT_END_OFFSET 0x44
#define A9_SCU_SACR_OFFSET 0x50
#define A9_SCU_SSACR_OFFSET 0x54
UINTN
EFIAPI
@@ -54,4 +55,5 @@ ArmGetScuBaseAddress (
VOID
);
#endif // ARM_CORTEX_A9_H_
#endif

View File

@@ -1,31 +1,31 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2011-2015, ARM Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_V7_H_
#define ARM_V7_H_
#ifndef __ARM_V7_H__
#define __ARM_V7_H__
#include <Chipset/ArmV7Mmu.h>
// ARM Interrupt ID in Exception Table
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
// ID_PFR1 - ARM Processor Feature Register 1 definitions
#define ARM_PFR1_SEC (0xFUL << 4)
#define ARM_PFR1_TIMER (0xFUL << 16)
#define ARM_PFR1_GIC (0xFUL << 28)
#define ARM_PFR1_SEC (0xFUL << 4)
#define ARM_PFR1_TIMER (0xFUL << 16)
#define ARM_PFR1_GIC (0xFUL << 28)
// Domain Access Control Register
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
// CPSR - Coprocessor Status Register definitions
#define CPSR_MODE_USER 0x10
@@ -41,47 +41,48 @@
#define CPSR_IRQ (1 << 7)
#define CPSR_FIQ (1 << 6)
// CPACR - Coprocessor Access Control Register definitions
#define CPACR_CP_DENIED(cp) 0x00
#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)
#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)
#define CPACR_ASEDIS (1 << 31)
#define CPACR_D32DIS (1 << 30)
#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF
#define CPACR_CP_DENIED(cp) 0x00
#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)
#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF)
#define CPACR_ASEDIS (1 << 31)
#define CPACR_D32DIS (1 << 30)
#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF
// NSACR - Non-Secure Access Control Register definitions
#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)
#define NSACR_NSD32DIS (1 << 14)
#define NSACR_NSASEDIS (1 << 15)
#define NSACR_PLE (1 << 16)
#define NSACR_TL (1 << 17)
#define NSACR_NS_SMP (1 << 18)
#define NSACR_RFR (1 << 19)
#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF)
#define NSACR_NSD32DIS (1 << 14)
#define NSACR_NSASEDIS (1 << 15)
#define NSACR_PLE (1 << 16)
#define NSACR_TL (1 << 17)
#define NSACR_NS_SMP (1 << 18)
#define NSACR_RFR (1 << 19)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)
#define SCR_IRQ (1 << 1)
#define SCR_FIQ (1 << 2)
#define SCR_EA (1 << 3)
#define SCR_FW (1 << 4)
#define SCR_AW (1 << 5)
#define SCR_NS (1 << 0)
#define SCR_IRQ (1 << 1)
#define SCR_FIQ (1 << 2)
#define SCR_EA (1 << 3)
#define SCR_FW (1 << 4)
#define SCR_AW (1 << 5)
// MIDR - Main ID Register definitions
#define ARM_CPU_TYPE_SHIFT 4
#define ARM_CPU_TYPE_MASK 0xFFF
#define ARM_CPU_TYPE_AEMV8 0xD0F
#define ARM_CPU_TYPE_A53 0xD03
#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A12 0xC0D
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A7 0xC07
#define ARM_CPU_TYPE_A5 0xC05
#define ARM_CPU_TYPE_SHIFT 4
#define ARM_CPU_TYPE_MASK 0xFFF
#define ARM_CPU_TYPE_AEMv8 0xD0F
#define ARM_CPU_TYPE_A53 0xD03
#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A12 0xC0D
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A7 0xC07
#define ARM_CPU_TYPE_A5 0xC05
#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
VOID
EFIAPI
@@ -104,7 +105,7 @@ ArmReadTpidrurw (
VOID
EFIAPI
ArmWriteTpidrurw (
UINTN Value
UINTN Value
);
UINT32
@@ -116,7 +117,7 @@ ArmReadNsacr (
VOID
EFIAPI
ArmWriteNsacr (
IN UINT32 Nsacr
IN UINT32 Nsacr
);
#endif // ARM_V7_H_
#endif // __ARM_V7_H__

View File

@@ -6,185 +6,186 @@
*
**/
#ifndef ARMV7_MMU_H_
#define ARMV7_MMU_H_
#ifndef __ARMV7_MMU_H_
#define __ARMV7_MMU_H_
#define TTBR_NOT_OUTER_SHAREABLE BIT5
#define TTBR_RGN_OUTER_NON_CACHEABLE 0
#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3
#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4
#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)
#define TTBR_SHAREABLE BIT1
#define TTBR_NON_SHAREABLE 0
#define TTBR_INNER_CACHEABLE BIT0
#define TTBR_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)
#define TTBR_NOT_OUTER_SHAREABLE BIT5
#define TTBR_RGN_OUTER_NON_CACHEABLE 0
#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3
#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4
#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4)
#define TTBR_SHAREABLE BIT1
#define TTBR_NON_SHAREABLE 0
#define TTBR_INNER_CACHEABLE BIT0
#define TTBR_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_NON_CACHEABLE 0
#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6
#define TTBR_RGN_INNER_WRITE_THROUGH BIT0
#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6)
#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
#define TRANSLATION_TABLE_SECTION_COUNT 4096
#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
#define TRANSLATION_TABLE_PAGE_COUNT 256
#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
#define TRANSLATION_TABLE_SECTION_COUNT 4096
#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
#define TRANSLATION_TABLE_PAGE_COUNT 256
#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
// Translation table descriptor types
#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)
#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)
#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0)
#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0)
#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0))
#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
// Translation table descriptor types
#define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0)
#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0)
// Section descriptor definitions
#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)
#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000)
#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)
#define TT_DESCRIPTOR_SECTION_NS (1UL << 19)
#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19)
#define TT_DESCRIPTOR_SECTION_NS (1UL << 19)
#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)
#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)
#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)
#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17)
#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17)
#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17)
#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)
#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)
#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)
#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11)
#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11)
#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11)
#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)
#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)
#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)
#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16)
#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16)
#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16)
#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)
#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)
#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)
#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10)
#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10)
#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10)
#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10))
#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10))
#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4))
#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4))
#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)
#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)
#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15)
#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4)
#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0)
#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15)
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3)
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000)
#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000)
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3)
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2))
#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2))
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc, IsLargePage) ((IsLargePage)?\
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \
((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \
((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK))
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc, IsLargePage) (IsLargePage? \
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
(((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \
(((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc, IsLargePage) (IsLargePage? \
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
(((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \
(((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))
#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \
TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK)
#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK)
#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)
#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)
#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5)
#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5)
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)
#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000)
#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00)
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)
#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000)
#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000)
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12
#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
TT_DESCRIPTOR_SECTION_S_SHARED | \
TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
TT_DESCRIPTOR_SECTION_AP_RW_RW | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
TT_DESCRIPTOR_SECTION_S_SHARED | \
TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
TT_DESCRIPTOR_SECTION_AP_RW_RW | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
@@ -192,7 +193,7 @@
TT_DESCRIPTOR_SECTION_AP_RW_RW | \
TT_DESCRIPTOR_SECTION_XN_MASK | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \
TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
@@ -200,33 +201,33 @@
TT_DESCRIPTOR_SECTION_AP_RW_RW | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)
#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_XN_MASK | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)
#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)
// First Level Descriptors
typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR;
typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR;
// Second Level Descriptors
typedef UINT32 ARM_PAGE_TABLE_ENTRY;
typedef UINT32 ARM_PAGE_TABLE_ENTRY;
UINT32
ConvertSectionAttributesToPageAttributes (
@@ -234,4 +235,4 @@ ConvertSectionAttributesToPageAttributes (
IN BOOLEAN IsLargePage
);
#endif // ARMV7_MMU_H_
#endif

View File

@@ -6,53 +6,55 @@
*
**/
#ifndef ARM_MP_CORE_INFO_GUID_H_
#define ARM_MP_CORE_INFO_GUID_H_
#ifndef __ARM_MP_CORE_INFO_GUID_H_
#define __ARM_MP_CORE_INFO_GUID_H_
#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
#define SCU_CONFIG_REG_OFFSET 0x04
#define MPIDR_U_BIT_MASK 0x40000000
#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
#define SCU_CONFIG_REG_OFFSET 0x04
#define MPIDR_U_BIT_MASK 0x40000000
typedef struct {
UINT64 Mpidr;
UINT32 ClusterId;
UINT32 CoreId;
// MP Core Mailbox
EFI_PHYSICAL_ADDRESS MailboxSetAddress;
EFI_PHYSICAL_ADDRESS MailboxGetAddress;
EFI_PHYSICAL_ADDRESS MailboxClearAddress;
UINT64 MailboxClearValue;
EFI_PHYSICAL_ADDRESS MailboxSetAddress;
EFI_PHYSICAL_ADDRESS MailboxGetAddress;
EFI_PHYSICAL_ADDRESS MailboxClearAddress;
UINT64 MailboxClearValue;
} ARM_CORE_INFO;
typedef struct {
UINT64 Signature;
UINT32 Length;
UINT32 Revision;
UINT64 OemId;
UINT64 OemTableId;
UINTN OemRevision;
UINTN CreatorId;
UINTN CreatorRevision;
EFI_GUID Identifier;
UINTN DataLen;
typedef struct{
UINT64 Signature;
UINT32 Length;
UINT32 Revision;
UINT64 OemId;
UINT64 OemTableId;
UINTN OemRevision;
UINTN CreatorId;
UINTN CreatorRevision;
EFI_GUID Identifier;
UINTN DataLen;
} ARM_PROCESSOR_TABLE_HEADER;
typedef struct {
ARM_PROCESSOR_TABLE_HEADER Header;
UINTN NumberOfEntries;
ARM_CORE_INFO *ArmCpus;
ARM_PROCESSOR_TABLE_HEADER Header;
UINTN NumberOfEntries;
ARM_CORE_INFO *ArmCpus;
} ARM_PROCESSOR_TABLE;
#define ARM_MP_CORE_INFO_GUID \
{ 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000// 1.0
#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
extern EFI_GUID gArmMpCoreInfoGuid;
extern EFI_GUID gArmMpCoreInfoGuid;
#endif /* ARM_MP_CORE_INFO_GUID_H_ */
#endif /* MPCOREINFO_H_ */

View File

@@ -1,111 +0,0 @@
/** @file
Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_CACHE_H_
#define ARM_CACHE_H_
#include <Uefi/UefiBaseType.h>
// The ARM Architecture Reference Manual for ARMv8-A defines up
// to 7 levels of cache, L1 through L7.
#define MAX_ARM_CACHE_LEVEL 7
/// Defines the structure of the CSSELR (Cache Size Selection) register
typedef union {
struct {
UINT32 InD : 1; ///< Instruction not Data bit
UINT32 Level : 3; ///< Cache level (zero based)
UINT32 TnD : 1; ///< Allocation not Data bit
UINT32 Reserved : 27; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CSSELR_DATA;
/// The cache type values for the InD field of the CSSELR register
typedef enum {
/// Select the data or unified cache
CsselrCacheTypeDataOrUnified = 0,
/// Select the instruction cache
CsselrCacheTypeInstruction,
CsselrCacheTypeMax
} CSSELR_CACHE_TYPE;
/// Defines the structure of the CCSIDR (Current Cache Size ID) register
typedef union {
struct {
UINT64 LineSize : 3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity : 10; ///< Associativity - 1
UINT64 NumSets : 15; ///< Number of sets in the cache -1
UINT64 Unknown : 4; ///< Reserved, UNKNOWN
UINT64 Reserved : 32; ///< Reserved, RES0
} BitsNonCcidx; ///< Bitfield definition of the register when FEAT_CCIDX is not supported.
struct {
UINT64 LineSize : 3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity : 21; ///< Associativity - 1
UINT64 Reserved1 : 8; ///< Reserved, RES0
UINT64 NumSets : 24; ///< Number of sets in the cache -1
UINT64 Reserved2 : 8; ///< Reserved, RES0
} BitsCcidxAA64; ///< Bitfield definition of the register when FEAT_IDX is supported.
struct {
UINT64 LineSize : 3;
UINT64 Associativity : 21;
UINT64 Reserved : 8;
UINT64 Unallocated : 32;
} BitsCcidxAA32;
UINT64 Data; ///< The entire 64-bit value
} CCSIDR_DATA;
/// Defines the structure of the AARCH32 CCSIDR2 register.
typedef union {
struct {
UINT32 NumSets : 24; ///< Number of sets in the cache - 1
UINT32 Reserved : 8; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CCSIDR2_DATA;
/** Defines the structure of the CLIDR (Cache Level ID) register.
*
* The lower 32 bits are the same for both AARCH32 and AARCH64
* so we can use the same structure for both.
**/
typedef union {
struct {
UINT32 Ctype1 : 3; ///< Level 1 cache type
UINT32 Ctype2 : 3; ///< Level 2 cache type
UINT32 Ctype3 : 3; ///< Level 3 cache type
UINT32 Ctype4 : 3; ///< Level 4 cache type
UINT32 Ctype5 : 3; ///< Level 5 cache type
UINT32 Ctype6 : 3; ///< Level 6 cache type
UINT32 Ctype7 : 3; ///< Level 7 cache type
UINT32 LoUIS : 3; ///< Level of Unification Inner Shareable
UINT32 LoC : 3; ///< Level of Coherency
UINT32 LoUU : 3; ///< Level of Unification Uniprocessor
UINT32 Icb : 3; ///< Inner Cache Boundary
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CLIDR_DATA;
/// The cache types reported in the CLIDR register.
typedef enum {
/// No cache is present
ClidrCacheTypeNone = 0,
/// There is only an instruction cache
ClidrCacheTypeInstructionOnly,
/// There is only a data cache
ClidrCacheTypeDataOnly,
/// There are separate data and instruction caches
ClidrCacheTypeSeparate,
/// There is a unified cache
ClidrCacheTypeUnified,
ClidrCacheTypeMax
} CLIDR_CACHE_TYPE;
#define CLIDR_GET_CACHE_TYPE(x, level) ((x >> (3 * (level))) & 0b111)
#endif /* ARM_CACHE_H_ */

View File

@@ -1,56 +0,0 @@
/** @file
Header file for FF-A ABI's that will be used for
communication between S-EL0 and the Secure Partition
Manager(SPM)
Copyright (c) 2020, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- FF-A Version 1.0
**/
#ifndef ARM_FFA_SVC_H_
#define ARM_FFA_SVC_H_
#define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 0x8400006F
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x84000070
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070
/* Generic IDs when using AArch32 or AArch64 execution state */
#ifdef MDE_CPU_AARCH64
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64
#endif
#ifdef MDE_CPU_ARM
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32
#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32
#endif
#define SPM_MAJOR_VERSION_FFA 1
#define SPM_MINOR_VERSION_FFA 0
#define ARM_FFA_SPM_RET_SUCCESS 0
#define ARM_FFA_SPM_RET_NOT_SUPPORTED -1
#define ARM_FFA_SPM_RET_INVALID_PARAMETERS -2
#define ARM_FFA_SPM_RET_NO_MEMORY -3
#define ARM_FFA_SPM_RET_BUSY -4
#define ARM_FFA_SPM_RET_INTERRUPTED -5
#define ARM_FFA_SPM_RET_DENIED -6
#define ARM_FFA_SPM_RET_RETRY -7
#define ARM_FFA_SPM_RET_ABORTED -8
// For now, the destination id to be used in the FF-A calls
// is being hard-coded. Subsequently, support will be added
// to get the endpoint id's dynamically
// This is the endpoint id used by the optee os's implementation
// of the spmc.
// https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/stmm_sp.c#L66
#define ARM_FFA_DESTINATION_ENDPOINT_ID 3
#endif // ARM_FFA_SVC_H_

View File

@@ -6,57 +6,39 @@
*
**/
#ifndef ARM_MM_SVC_H_
#define ARM_MM_SVC_H_
#ifndef __ARM_MM_SVC_H__
#define __ARM_MM_SVC_H__
/*
* SVC IDs to allow the MM secure partition to initialise itself, handle
* delegated events and request the Secure partition manager to perform
* privileged operations on its behalf.
*/
#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065
#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
/* Generic IDs when using AArch32 or AArch64 execution state */
#ifdef MDE_CPU_AARCH64
#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64
#endif
#ifdef MDE_CPU_ARM
#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32
#endif
#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
#define SET_MEM_ATTR_DATA_PERM_MASK 0x3
#define SET_MEM_ATTR_DATA_PERM_SHIFT 0
#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0
#define SET_MEM_ATTR_DATA_PERM_RW 1
#define SET_MEM_ATTR_DATA_PERM_RO 3
#define SET_MEM_ATTR_DATA_PERM_SHIFT 0
#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0
#define SET_MEM_ATTR_DATA_PERM_RW 1
#define SET_MEM_ATTR_DATA_PERM_RO 3
#define SET_MEM_ATTR_CODE_PERM_MASK 0x1
#define SET_MEM_ATTR_CODE_PERM_SHIFT 2
#define SET_MEM_ATTR_CODE_PERM_X 0
#define SET_MEM_ATTR_CODE_PERM_XN 1
#define SET_MEM_ATTR_CODE_PERM_SHIFT 2
#define SET_MEM_ATTR_CODE_PERM_X 0
#define SET_MEM_ATTR_CODE_PERM_XN 1
#define SET_MEM_ATTR_MAKE_PERM_REQUEST(d_perm, c_perm) \
((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \
(( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))
/* MM SVC Return error codes */
#define ARM_SVC_SPM_RET_SUCCESS 0
#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1
#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
#define ARM_SVC_SPM_RET_DENIED -3
#define ARM_SVC_SPM_RET_NO_MEMORY -5
#define ARM_SVC_SPM_RET_SUCCESS 0
#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1
#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
#define ARM_SVC_SPM_RET_DENIED -3
#define ARM_SVC_SPM_RET_NO_MEMORY -5
#define SPM_MAJOR_VERSION 0
#define SPM_MINOR_VERSION 1
#endif // ARM_MM_SVC_H_
#endif

View File

@@ -1,80 +1,56 @@
/** @file
*
* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
* @par Revision Reference:
* - SMC Calling Convention version 1.2
* (https://developer.arm.com/documentation/den0028/c/?lang=en)
**/
#ifndef ARM_STD_SMC_H_
#define ARM_STD_SMC_H_
#ifndef __ARM_STD_SMC_H__
#define __ARM_STD_SMC_H__
/*
* SMC function IDs for Standard Service queries
*/
#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
#define ARM_SMC_ID_STD_UID 0x8400ff01
#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
#define ARM_SMC_ID_STD_UID 0x8400ff01
/* 0x8400ff02 is reserved */
#define ARM_SMC_ID_STD_REVISION 0x8400ff03
#define ARM_SMC_ID_STD_REVISION 0x8400ff03
/*
* The 'Standard Service Call UID' is supposed to return the Standard
* Service UUID. This is a 128-bit value.
*/
#define ARM_SMC_STD_UUID0 0x108d905b
#define ARM_SMC_STD_UUID1 0x47e8f863
#define ARM_SMC_STD_UUID2 0xfbc02dae
#define ARM_SMC_STD_UUID3 0xe2f64156
#define ARM_SMC_STD_UUID0 0x108d905b
#define ARM_SMC_STD_UUID1 0x47e8f863
#define ARM_SMC_STD_UUID2 0xfbc02dae
#define ARM_SMC_STD_UUID3 0xe2f64156
/*
* ARM Standard Service Calls revision numbers
* The current revision is: 0.1
*/
#define ARM_SMC_STD_REVISION_MAJOR 0x0
#define ARM_SMC_STD_REVISION_MINOR 0x1
#define ARM_SMC_STD_REVISION_MAJOR 0x0
#define ARM_SMC_STD_REVISION_MINOR 0x1
/*
* Management Mode (MM) calls cover a subset of the Standard Service Call range.
* The list below is not exhaustive.
*/
#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
// Request service from secure standalone MM environment
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
/* Generic ID when using AArch32 or AArch64 execution state */
#ifdef MDE_CPU_AARCH64
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64
#endif
#ifdef MDE_CPU_ARM
#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32
#endif
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
/* MM return error codes */
#define ARM_SMC_MM_RET_SUCCESS 0
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
// ARM Architecture Calls
#define SMCCC_VERSION 0x80000000
#define SMCCC_ARCH_FEATURES 0x80000001
#define SMCCC_ARCH_SOC_ID 0x80000002
#define SMCCC_ARCH_WORKAROUND_1 0x80008000
#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
#define SMC_ARCH_CALL_SUCCESS 0
#define SMC_ARCH_CALL_NOT_SUPPORTED -1
#define SMC_ARCH_CALL_NOT_REQUIRED -2
#define SMC_ARCH_CALL_INVALID_PARAMETER -3
#define ARM_SMC_MM_RET_SUCCESS 0
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
#define ARM_SMC_MM_RET_DENIED -3
#define ARM_SMC_MM_RET_NO_MEMORY -4
/*
* Power State Coordination Interface (PSCI) calls cover a subset of the
@@ -101,15 +77,15 @@
((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
/* PSCI return error codes */
#define ARM_SMC_PSCI_RET_SUCCESS 0
#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
#define ARM_SMC_PSCI_RET_DENIED -3
#define ARM_SMC_PSCI_RET_ALREADY_ON -4
#define ARM_SMC_PSCI_RET_ON_PENDING -5
#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
#define ARM_SMC_PSCI_RET_DISABLED -8
#define ARM_SMC_PSCI_RET_SUCCESS 0
#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
#define ARM_SMC_PSCI_RET_DENIED -3
#define ARM_SMC_PSCI_RET_ALREADY_ON -4
#define ARM_SMC_PSCI_RET_ON_PENDING -5
#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
#define ARM_SMC_PSCI_RET_DISABLED -8
#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
@@ -120,10 +96,10 @@
#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
@@ -132,9 +108,9 @@
/*
* SMC function IDs for Trusted OS Service queries
*/
#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
#define ARM_SMC_ID_TOS_UID 0xbf00ff01
#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
#define ARM_SMC_ID_TOS_UID 0xbf00ff01
/* 0xbf00ff02 is reserved */
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
#endif // ARM_STD_SMC_H_
#endif

View File

@@ -6,8 +6,8 @@
**/
#ifndef ARM_DISASSEMBLER_LIB_H_
#define ARM_DISASSEMBLER_LIB_H_
#ifndef __ARM_DISASSEBLER_LIB_H__
#define __ARM_DISASSEBLER_LIB_H__
/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
@@ -26,12 +26,12 @@
**/
VOID
DisassembleInstruction (
IN UINT8 **OpCodePtr,
IN BOOLEAN Thumb,
IN BOOLEAN Extended,
IN OUT UINT32 *ItBlock,
OUT CHAR8 *Buf,
OUT UINTN Size
IN UINT8 **OpCodePtr,
IN BOOLEAN Thumb,
IN BOOLEAN Extended,
IN OUT UINT32 *ItBlock,
OUT CHAR8 *Buf,
OUT UINTN Size
);
#endif // ARM_DISASSEMBLER_LIB_H_
#endif

View File

@@ -7,8 +7,8 @@
**/
#ifndef ARM_GENERIC_TIMER_COUNTER_LIB_H_
#define ARM_GENERIC_TIMER_COUNTER_LIB_H_
#ifndef __ARM_GENERIC_TIMER_COUNTER_LIB_H__
#define __ARM_GENERIC_TIMER_COUNTER_LIB_H__
VOID
EFIAPI
@@ -43,7 +43,7 @@ ArmGenericTimerGetTimerFreq (
VOID
EFIAPI
ArmGenericTimerSetTimerVal (
IN UINTN Value
IN UINTN Value
);
UINTN
@@ -67,7 +67,7 @@ ArmGenericTimerGetTimerCtrlReg (
VOID
EFIAPI
ArmGenericTimerSetTimerCtrlReg (
UINTN Value
UINTN Value
);
UINT64
@@ -79,7 +79,7 @@ ArmGenericTimerGetCompareVal (
VOID
EFIAPI
ArmGenericTimerSetCompareVal (
IN UINT64 Value
IN UINT64 Value
);
#endif // ARM_GENERIC_TIMER_COUNTER_LIB_H_
#endif

View File

@@ -6,8 +6,8 @@
*
**/
#ifndef ARM_GIC_ARCH_LIB_H_
#define ARM_GIC_ARCH_LIB_H_
#ifndef __ARM_GIC_ARCH_LIB_H__
#define __ARM_GIC_ARCH_LIB_H__
//
// GIC definitions
@@ -17,10 +17,11 @@ typedef enum {
ARM_GIC_ARCH_REVISION_3
} ARM_GIC_ARCH_REVISION;
ARM_GIC_ARCH_REVISION
EFIAPI
ArmGicGetSupportedArchRevision (
VOID
);
#endif // ARM_GIC_ARCH_LIB_H_
#endif

View File

@@ -1,47 +1,47 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef ARMGIC_H_
#define ARMGIC_H_
#ifndef __ARMGIC_H
#define __ARMGIC_H
#include <Library/ArmGicArchLib.h>
// GIC Distributor
#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register
#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register
#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register
#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register
#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register
#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register
// Each reg base below repeats for Number of interrupts / 4 (see GIC spec)
#define ARM_GIC_ICDISR 0x080 // Interrupt Security Registers
#define ARM_GIC_ICDISER 0x100 // Interrupt Set-Enable Registers
#define ARM_GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers
#define ARM_GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers
#define ARM_GIC_ICDICPR 0x280 // Interrupt Clear-Pending Registers
#define ARM_GIC_ICDABR 0x300 // Active Bit Registers
#define ARM_GIC_ICDISR 0x080 // Interrupt Security Registers
#define ARM_GIC_ICDISER 0x100 // Interrupt Set-Enable Registers
#define ARM_GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers
#define ARM_GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers
#define ARM_GIC_ICDICPR 0x280 // Interrupt Clear-Pending Registers
#define ARM_GIC_ICDABR 0x300 // Active Bit Registers
// Each reg base below repeats for Number of interrupts / 4
#define ARM_GIC_ICDIPR 0x400 // Interrupt Priority Registers
#define ARM_GIC_ICDIPR 0x400 // Interrupt Priority Registers
// Each reg base below repeats for Number of interrupts
#define ARM_GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers
#define ARM_GIC_ICDICFR 0xC00 // Interrupt Configuration Registers
#define ARM_GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers
#define ARM_GIC_ICDICFR 0xC00 // Interrupt Configuration Registers
#define ARM_GIC_ICDPPISR 0xD00 // PPI Status register
#define ARM_GIC_ICDPPISR 0xD00 // PPI Status register
// just one of these
#define ARM_GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register
#define ARM_GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register
// GICv3 specific registers
#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
// GICD_CTLR bits
#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
// GICD_ICDICFR bits
#define ARM_GIC_ICDICFR_WIDTH 32 // ICDICFR is a 32 bit register
@@ -52,124 +52,125 @@
#define ARM_GIC_ICDICFR_LEVEL_TRIGGERED 0x0 // Level triggered interrupt
#define ARM_GIC_ICDICFR_EDGE_TRIGGERED 0x1 // Edge triggered interrupt
// GIC Redistributor
#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_VLPI_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB
#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_VLPI_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB
// GIC Redistributor Control frame
#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
// GIC Redistributor TYPER bit assignments
#define ARM_GICR_TYPER_PLPIS (1 << 0) // Physical LPIs
#define ARM_GICR_TYPER_VLPIS (1 << 1) // Virtual LPIs
#define ARM_GICR_TYPER_DIRECTLPI (1 << 3) // Direct LPIs
#define ARM_GICR_TYPER_LAST (1 << 4) // Last Redistributor in series
#define ARM_GICR_TYPER_DPGS (1 << 5) // Disable Processor Group
#define ARM_GICR_TYPER_PLPIS (1 << 0) // Physical LPIs
#define ARM_GICR_TYPER_VLPIS (1 << 1) // Virtual LPIs
#define ARM_GICR_TYPER_DIRECTLPI (1 << 3) // Direct LPIs
#define ARM_GICR_TYPER_LAST (1 << 4) // Last Redistributor in series
#define ARM_GICR_TYPER_DPGS (1 << 5) // Disable Processor Group
// Selection Support
#define ARM_GICR_TYPER_PROCNO (0xFFFF << 8) // Processor Number
#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24) // Common LPI Affinity
#define ARM_GICR_TYPER_AFFINITY (0xFFFFFFFFULL << 32) // Redistributor Affinity
#define ARM_GICR_TYPER_PROCNO (0xFFFF << 8) // Processor Number
#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24) // Common LPI Affinity
#define ARM_GICR_TYPER_AFFINITY (0xFFFFFFFFULL << 32) // Redistributor Affinity
#define ARM_GICR_TYPER_GET_AFFINITY(TypeReg) (((TypeReg) & \
ARM_GICR_TYPER_AFFINITY) >> 32)
// GIC SGI & PPI Redistributor frame
#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
// GIC Cpu interface
#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register
#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
#define ARM_GIC_ICCBPR 0x08 // Binary Point Register
#define ARM_GIC_ICCIAR 0x0C // Interrupt Acknowledge Register
#define ARM_GIC_ICCEIOR 0x10 // End Of Interrupt Register
#define ARM_GIC_ICCRPR 0x14 // Running Priority Register
#define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register
#define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register
#define ARM_GIC_ICCIIDR 0xFC // Identification Register
#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register
#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
#define ARM_GIC_ICCBPR 0x08 // Binary Point Register
#define ARM_GIC_ICCIAR 0x0C // Interrupt Acknowledge Register
#define ARM_GIC_ICCEIOR 0x10 // End Of Interrupt Register
#define ARM_GIC_ICCRPR 0x14 // Running Priority Register
#define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register
#define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register
#define ARM_GIC_ICCIIDR 0xFC // Identification Register
#define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0
#define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1
#define ARM_GIC_ICDSGIR_FILTER_ITSELF 0x2
#define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0
#define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1
#define ARM_GIC_ICDSGIR_FILTER_ITSELF 0x2
// Bit-masks to configure the CPU Interface Control register
#define ARM_GIC_ICCICR_ENABLE_SECURE 0x01
#define ARM_GIC_ICCICR_ENABLE_NS 0x02
#define ARM_GIC_ICCICR_ACK_CTL 0x04
#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08
#define ARM_GIC_ICCICR_USE_SBPR 0x10
#define ARM_GIC_ICCICR_ENABLE_SECURE 0x01
#define ARM_GIC_ICCICR_ENABLE_NS 0x02
#define ARM_GIC_ICCICR_ACK_CTL 0x04
#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08
#define ARM_GIC_ICCICR_USE_SBPR 0x10
// Bit Mask for GICC_IIDR
#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF)
#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF)
#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF)
#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF)
#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF)
#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF)
#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF)
#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF)
// Bit Mask for
#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
UINTN
EFIAPI
ArmGicGetInterfaceIdentification (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
);
// GIC Secure interfaces
VOID
EFIAPI
ArmGicSetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicSetSecureInterrupts (
IN UINTN GicDistributorBase,
IN UINTN *GicSecureInterruptMask,
IN UINTN GicSecureInterruptMaskSize
IN UINTN GicDistributorBase,
IN UINTN* GicSecureInterruptMask,
IN UINTN GicSecureInterruptMaskSize
);
VOID
EFIAPI
ArmGicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicDisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
);
VOID
EFIAPI
ArmGicDisableDistributor (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
);
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
IN INTN GicDistributorBase
IN INTN GicDistributorBase
);
VOID
EFIAPI
ArmGicSendSgiTo (
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
);
/*
@@ -189,55 +190,46 @@ ArmGicSendSgiTo (
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
IN UINTN GicInterruptInterfaceBase,
OUT UINTN *InterruptId
);
VOID
EFIAPI
ArmGicEndOfInterrupt (
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
);
UINTN
EFIAPI
ArmGicSetPriorityMask (
IN INTN GicInterruptInterfaceBase,
IN INTN PriorityMask
);
VOID
EFIAPI
ArmGicSetInterruptPriority (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source,
IN UINTN Priority
IN INTN GicInterruptInterfaceBase,
IN INTN PriorityMask
);
VOID
EFIAPI
ArmGicEnableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
);
VOID
EFIAPI
ArmGicDisableInterrupt (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
);
BOOLEAN
EFIAPI
ArmGicIsInterruptEnabled (
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
IN UINTN GicDistributorBase,
IN UINTN GicRedistributorBase,
IN UINTN Source
);
// GIC revision 2 specific declarations
@@ -250,41 +242,41 @@ ArmGicIsInterruptEnabled (
VOID
EFIAPI
ArmGicV2SetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN INTN GicInterruptInterfaceBase
);
UINTN
EFIAPI
ArmGicV2AcknowledgeInterrupt (
IN UINTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2EndOfInterrupt (
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
IN UINTN GicInterruptInterfaceBase,
IN UINTN Source
);
// GIC revision 3 specific declarations
#define ICC_SRE_EL2_SRE (1 << 0)
#define ICC_SRE_EL2_SRE (1 << 0)
#define ARM_GICD_IROUTER_IRM BIT31
#define ARM_GICD_IROUTER_IRM BIT31
UINT32
EFIAPI
@@ -295,7 +287,7 @@ ArmGicV3GetControlSystemRegisterEnable (
VOID
EFIAPI
ArmGicV3SetControlSystemRegisterEnable (
IN UINT32 ControlSystemRegisterEnable
IN UINT32 ControlSystemRegisterEnable
);
VOID
@@ -319,17 +311,17 @@ ArmGicV3AcknowledgeInterrupt (
VOID
EFIAPI
ArmGicV3EndOfInterrupt (
IN UINTN Source
IN UINTN Source
);
VOID
ArmGicV3SetBinaryPointer (
IN UINTN BinaryPoint
IN UINTN BinaryPoint
);
VOID
ArmGicV3SetPriorityMask (
IN UINTN Priority
IN UINTN Priority
);
#endif // ARMGIC_H_
#endif

View File

@@ -6,22 +6,22 @@
*
**/
#ifndef ARM_HVC_LIB_H_
#define ARM_HVC_LIB_H_
#ifndef __ARM_HVC_LIB__
#define __ARM_HVC_LIB__
/**
* The size of the HVC arguments are different between AArch64 and AArch32.
* The native size is used for the arguments.
*/
typedef struct {
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
} ARM_HVC_ARGS;
/**
@@ -34,7 +34,7 @@ typedef struct {
**/
VOID
ArmCallHvc (
IN OUT ARM_HVC_ARGS *Args
IN OUT ARM_HVC_ARGS *Args
);
#endif // ARM_HVC_LIB_H_
#endif

View File

@@ -2,26 +2,25 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_LIB_H_
#define ARM_LIB_H_
#ifndef __ARM_LIB__
#define __ARM_LIB__
#include <Uefi/UefiBaseType.h>
#ifdef MDE_CPU_ARM
#include <Chipset/ArmV7.h>
#elif defined (MDE_CPU_AARCH64)
#elif defined(MDE_CPU_AARCH64)
#include <Chipset/AArch64.h>
#else
#error "Unknown chipset."
#error "Unknown chipset."
#endif
#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \
#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \
EFI_MEMORY_WT | EFI_MEMORY_WB | \
EFI_MEMORY_UCE)
@@ -50,21 +49,17 @@ typedef enum {
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE
} ARM_MEMORY_REGION_ATTRIBUTES;
#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)
#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)
typedef struct {
EFI_PHYSICAL_ADDRESS PhysicalBase;
EFI_VIRTUAL_ADDRESS VirtualBase;
UINT64 Length;
ARM_MEMORY_REGION_ATTRIBUTES Attributes;
EFI_PHYSICAL_ADDRESS PhysicalBase;
EFI_VIRTUAL_ADDRESS VirtualBase;
UINT64 Length;
ARM_MEMORY_REGION_ATTRIBUTES Attributes;
} ARM_MEMORY_REGION_DESCRIPTOR;
typedef VOID (*CACHE_OPERATION)(
VOID
);
typedef VOID (*LINE_OPERATION)(
UINTN
);
typedef VOID (*CACHE_OPERATION)(VOID);
typedef VOID (*LINE_OPERATION)(UINTN);
//
// ARM Processor Mode
@@ -84,70 +79,34 @@ typedef enum {
//
// ARM Cpu IDs
//
#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24)
#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24)
#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24)
#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24)
#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24)
#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24)
#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24)
#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24)
#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24)
#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24)
#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24)
#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24)
#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4)
#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4)
#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4)
//
// ARM MP Core IDs
//
#define ARM_CORE_AFF0 0xFF
#define ARM_CORE_AFF1 (0xFF << 8)
#define ARM_CORE_AFF2 (0xFF << 16)
#define ARM_CORE_AFF3 (0xFFULL << 32)
#define ARM_CORE_AFF0 0xFF
#define ARM_CORE_AFF1 (0xFF << 8)
#define ARM_CORE_AFF2 (0xFF << 16)
#define ARM_CORE_AFF3 (0xFFULL << 32)
#define ARM_CORE_MASK ARM_CORE_AFF0
#define ARM_CLUSTER_MASK ARM_CORE_AFF1
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8)
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define GET_MPIDR_AFF0(MpId) ((MpId) & ARM_CORE_AFF0)
#define GET_MPIDR_AFF1(MpId) (((MpId) & ARM_CORE_AFF1) >> 8)
#define GET_MPIDR_AFF2(MpId) (((MpId) & ARM_CORE_AFF2) >> 16)
#define GET_MPIDR_AFF3(MpId) (((MpId) & ARM_CORE_AFF3) >> 32)
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
/** Reads the CCSIDR register for the specified cache.
@param CSSELR The CSSELR cache selection register value.
@return The contents of the CCSIDR_EL1 register for the specified cache, when in AARCH64 mode.
Returns the contents of the CCSIDR register in AARCH32 mode.
**/
UINTN
ReadCCSIDR (
IN UINT32 CSSELR
);
/** Reads the CCSIDR2 for the specified cache.
@param CSSELR The CSSELR cache selection register value
@return The contents of the CCSIDR2 register for the specified cache.
**/
UINT32
ReadCCSIDR2 (
IN UINT32 CSSELR
);
/** Reads the Cache Level ID (CLIDR) register.
@return The contents of the CLIDR_EL1 register.
**/
UINT32
ReadCLIDR (
VOID
);
#define ARM_CORE_MASK ARM_CORE_AFF0
#define ARM_CLUSTER_MASK ARM_CORE_AFF1
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8)
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
UINTN
EFIAPI
@@ -173,6 +132,18 @@ ArmIsArchTimerImplemented (
VOID
);
UINTN
EFIAPI
ArmReadIdPfr0 (
VOID
);
UINTN
EFIAPI
ArmReadIdPfr1 (
VOID
);
UINTN
EFIAPI
ArmCacheInfo (
@@ -191,6 +162,7 @@ ArmInvalidateDataCache (
VOID
);
VOID
EFIAPI
ArmCleanInvalidateDataCache (
@@ -212,31 +184,49 @@ ArmInvalidateInstructionCache (
VOID
EFIAPI
ArmInvalidateDataCacheEntryByMVA (
IN UINTN Address
IN UINTN Address
);
VOID
EFIAPI
ArmCleanDataCacheEntryToPoUByMVA (
IN UINTN Address
IN UINTN Address
);
VOID
EFIAPI
ArmInvalidateInstructionCacheEntryToPoUByMVA (
IN UINTN Address
IN UINTN Address
);
VOID
EFIAPI
ArmCleanDataCacheEntryByMVA (
IN UINTN Address
);
IN UINTN Address
);
VOID
EFIAPI
ArmCleanInvalidateDataCacheEntryByMVA (
IN UINTN Address
IN UINTN Address
);
VOID
EFIAPI
ArmInvalidateDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
VOID
EFIAPI
ArmCleanDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
VOID
EFIAPI
ArmCleanInvalidateDataCacheEntryBySetWay (
IN UINTN SetWayFormat
);
VOID
@@ -359,8 +349,8 @@ ArmInvalidateTlb (
VOID
EFIAPI
ArmUpdateTranslationTableEntry (
IN VOID *TranslationTableEntry,
IN VOID *Mva
IN VOID *TranslationTableEntry,
IN VOID *Mva
);
VOID
@@ -378,7 +368,7 @@ ArmSetTTBR0 (
VOID
EFIAPI
ArmSetTTBCR (
IN UINT32 Bits
IN UINT32 Bits
);
VOID *
@@ -438,7 +428,7 @@ ArmInstructionSynchronizationBarrier (
VOID
EFIAPI
ArmWriteVBar (
IN UINTN VectorBase
IN UINTN VectorBase
);
UINTN
@@ -450,7 +440,7 @@ ArmReadVBar (
VOID
EFIAPI
ArmWriteAuxCr (
IN UINT32 Bit
IN UINT32 Bit
);
UINT32
@@ -462,13 +452,13 @@ ArmReadAuxCr (
VOID
EFIAPI
ArmSetAuxCrBit (
IN UINT32 Bits
IN UINT32 Bits
);
VOID
EFIAPI
ArmUnsetAuxCrBit (
IN UINT32 Bits
IN UINT32 Bits
);
VOID
@@ -511,7 +501,7 @@ ArmReadCpacr (
VOID
EFIAPI
ArmWriteCpacr (
IN UINT32 Access
IN UINT32 Access
);
VOID
@@ -541,7 +531,7 @@ ArmReadScr (
VOID
EFIAPI
ArmWriteScr (
IN UINT32 Value
IN UINT32 Value
);
UINT32
@@ -553,7 +543,7 @@ ArmReadMVBar (
VOID
EFIAPI
ArmWriteMVBar (
IN UINT32 VectorMonitorBase
IN UINT32 VectorMonitorBase
);
UINT32
@@ -565,7 +555,7 @@ ArmReadSctlr (
VOID
EFIAPI
ArmWriteSctlr (
IN UINT32 Value
IN UINT32 Value
);
UINTN
@@ -577,9 +567,10 @@ ArmReadHVBar (
VOID
EFIAPI
ArmWriteHVBar (
IN UINTN HypModeVectorBase
IN UINTN HypModeVectorBase
);
//
// Helper functions for accessing CPU ACTLR
//
@@ -593,28 +584,28 @@ ArmReadCpuActlr (
VOID
EFIAPI
ArmWriteCpuActlr (
IN UINTN Val
IN UINTN Val
);
VOID
EFIAPI
ArmSetCpuActlrBit (
IN UINTN Bits
IN UINTN Bits
);
VOID
EFIAPI
ArmUnsetCpuActlrBit (
IN UINTN Bits
IN UINTN Bits
);
//
// Accessors for the architected generic timer registers
//
#define ARM_ARCH_TIMER_ENABLE (1 << 0)
#define ARM_ARCH_TIMER_IMASK (1 << 1)
#define ARM_ARCH_TIMER_ISTATUS (1 << 2)
#define ARM_ARCH_TIMER_ENABLE (1 << 0)
#define ARM_ARCH_TIMER_IMASK (1 << 1)
#define ARM_ARCH_TIMER_ISTATUS (1 << 2)
UINTN
EFIAPI
@@ -625,7 +616,7 @@ ArmReadCntFrq (
VOID
EFIAPI
ArmWriteCntFrq (
UINTN FreqInHz
UINTN FreqInHz
);
UINT64
@@ -643,7 +634,7 @@ ArmReadCntkCtl (
VOID
EFIAPI
ArmWriteCntkCtl (
UINTN Val
UINTN Val
);
UINTN
@@ -655,7 +646,7 @@ ArmReadCntpTval (
VOID
EFIAPI
ArmWriteCntpTval (
UINTN Val
UINTN Val
);
UINTN
@@ -667,7 +658,7 @@ ArmReadCntpCtl (
VOID
EFIAPI
ArmWriteCntpCtl (
UINTN Val
UINTN Val
);
UINTN
@@ -679,7 +670,7 @@ ArmReadCntvTval (
VOID
EFIAPI
ArmWriteCntvTval (
UINTN Val
UINTN Val
);
UINTN
@@ -691,7 +682,7 @@ ArmReadCntvCtl (
VOID
EFIAPI
ArmWriteCntvCtl (
UINTN Val
UINTN Val
);
UINT64
@@ -709,7 +700,7 @@ ArmReadCntpCval (
VOID
EFIAPI
ArmWriteCntpCval (
UINT64 Val
UINT64 Val
);
UINT64
@@ -721,7 +712,7 @@ ArmReadCntvCval (
VOID
EFIAPI
ArmWriteCntvCval (
UINT64 Val
UINT64 Val
);
UINT64
@@ -733,7 +724,7 @@ ArmReadCntvOff (
VOID
EFIAPI
ArmWriteCntvOff (
UINT64 Val
UINT64 Val
);
UINTN
@@ -742,50 +733,4 @@ ArmGetPhysicalAddressBits (
VOID
);
///
/// ID Register Helper functions
///
/**
Check whether the CPU supports the GIC system register interface (any version)
@return Whether GIC System Register Interface is supported
**/
BOOLEAN
EFIAPI
ArmHasGicSystemRegisters (
VOID
);
/** Checks if CCIDX is implemented.
@retval TRUE CCIDX is implemented.
@retval FALSE CCIDX is not implemented.
**/
BOOLEAN
EFIAPI
ArmHasCcidx (
VOID
);
#ifdef MDE_CPU_ARM
///
/// AArch32-only ID Register Helper functions
///
/**
Check whether the CPU supports the Security extensions
@return Whether the Security extensions are implemented
**/
BOOLEAN
EFIAPI
ArmHasSecurityExtensions (
VOID
);
#endif // MDE_CPU_ARM
#endif // ARM_LIB_H_
#endif // __ARM_LIB__

View File

@@ -6,8 +6,8 @@
**/
#ifndef ARM_MMU_LIB_H_
#define ARM_MMU_LIB_H_
#ifndef __ARM_MMU_LIB__
#define __ARM_MMU_LIB__
#include <Uefi/UefiBaseType.h>
@@ -24,29 +24,29 @@ ArmConfigureMmu (
EFI_STATUS
EFIAPI
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
VOID
@@ -59,9 +59,9 @@ ArmReplaceLiveTranslationEntry (
EFI_STATUS
ArmSetMemoryAttributes (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
);
#endif // ARM_MMU_LIB_H_
#endif

View File

@@ -18,37 +18,37 @@
#pragma pack(1)
typedef struct {
UINT32 Reserved1;
UINT32 ChannelStatus;
UINT64 Reserved2;
UINT32 Flags;
UINT32 Length;
UINT32 MessageHeader;
UINT32 Reserved1;
UINT32 ChannelStatus;
UINT64 Reserved2;
UINT32 Flags;
UINT32 Length;
UINT32 MessageHeader;
// NOTE: Since EDK2 does not allow flexible array member [] we declare
// here array of 1 element length. However below is used as a variable
// length array.
UINT32 Payload[1]; // size less object gives offset to payload.
UINT32 Payload[1]; // size less object gives offset to payload.
} MTL_MAILBOX;
#pragma pack()
// Channel Type, Low-priority, and High-priority
typedef enum {
MTL_CHANNEL_TYPE_LOW = 0,
MTL_CHANNEL_TYPE_LOW = 0,
MTL_CHANNEL_TYPE_HIGH = 1
} MTL_CHANNEL_TYPE;
typedef struct {
UINT64 PhysicalAddress;
UINT32 ModifyMask;
UINT32 PreserveMask;
UINT64 PhysicalAddress;
UINT32 ModifyMask;
UINT32 PreserveMask;
} MTL_DOORBELL;
typedef struct {
MTL_CHANNEL_TYPE ChannelType;
MTL_MAILBOX *CONST MailBox;
MTL_DOORBELL DoorBell;
MTL_CHANNEL_TYPE ChannelType;
MTL_MAILBOX * CONST MailBox;
MTL_DOORBELL DoorBell;
} MTL_CHANNEL;
/** Wait until channel is free.
@@ -71,7 +71,7 @@ MtlWaitUntilChannelFree (
@retval UINT32* Pointer to the payload.
**/
UINT32 *
UINT32*
MtlGetChannelPayload (
IN MTL_CHANNEL *Channel
);
@@ -127,4 +127,5 @@ MtlReceiveMessage (
OUT UINT32 *PayloadLength
);
#endif /* ARM_MTL_LIB_H_ */
#endif /* ARM_MTL_LIB_H_ */

View File

@@ -1,28 +1,27 @@
/** @file
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef ARM_SMC_LIB_H_
#define ARM_SMC_LIB_H_
#ifndef __ARM_SMC_LIB__
#define __ARM_SMC_LIB__
/**
* The size of the SMC arguments are different between AArch64 and AArch32.
* The native size is used for the arguments.
*/
typedef struct {
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
} ARM_SMC_ARGS;
/**
@@ -35,79 +34,7 @@ typedef struct {
**/
VOID
ArmCallSmc (
IN OUT ARM_SMC_ARGS *Args
IN OUT ARM_SMC_ARGS *Args
);
/** Trigger an SMC call with 3 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Argument/result.
@return The SMC error code.
**/
UINTN
ArmCallSmc3 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
IN OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 2 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc2 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 1 argument.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc1 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 0 arguments.
@param Function The SMC function.
@param Arg1 Result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc0 (
IN UINTN Function,
OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
#endif // ARM_SMC_LIB_H_
#endif

View File

@@ -6,41 +6,35 @@
*
**/
#ifndef ARM_SVC_LIB_H_
#define ARM_SVC_LIB_H_
#ifndef __ARM_SVC_LIB__
#define __ARM_SVC_LIB__
/**
* The size of the SVC arguments are different between AArch64 and AArch32.
* The native size is used for the arguments.
*/
typedef struct {
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
UINTN Arg0;
UINTN Arg1;
UINTN Arg2;
UINTN Arg3;
UINTN Arg4;
UINTN Arg5;
UINTN Arg6;
UINTN Arg7;
} ARM_SVC_ARGS;
/**
Trigger an SVC call
SVC calls can take up to 8 arguments and return up to 8 return values.
Therefore, the 8 first fields in the ARM_SVC_ARGS structure are used
SVC calls can take up to 7 arguments and return up to 4 return values.
Therefore, the 4 first fields in the ARM_SVC_ARGS structure are used
for both input and output values.
@param[in, out] Args Arguments to be passed as part of the SVC call
The return values of the SVC call are also placed
in the same structure
@retval None
**/
VOID
ArmCallSvc (
IN OUT ARM_SVC_ARGS *Args
IN OUT ARM_SVC_ARGS *Args
);
#endif // ARM_SVC_LIB_H_
#endif

View File

@@ -6,8 +6,8 @@
**/
#ifndef DEFAULT_EXCEPTION_HANDLER_LIB_H_
#define DEFAULT_EXCEPTION_HANDLER_LIB_H_
#ifndef __DEFAULT_EXCEPTION_HANDLER_LIB_H__
#define __DEFAULT_EXCEPTION_HANDLER_LIB_H__
/**
This is the default action to take on an unexpected exception
@@ -18,8 +18,8 @@
**/
VOID
DefaultExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN OUT EFI_SYSTEM_CONTEXT SystemContext
IN EFI_EXCEPTION_TYPE ExceptionType,
IN OUT EFI_SYSTEM_CONTEXT SystemContext
);
#endif // DEFAULT_EXCEPTION_HANDLER_LIB_H_
#endif

View File

@@ -1,236 +0,0 @@
/** @file
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.
* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
* Copyright (c) 2015, Linaro Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef OEM_MISC_LIB_H_
#define OEM_MISC_LIB_H_
#include <Uefi.h>
#include <IndustryStandard/SmBios.h>
typedef enum {
CpuCacheL1 = 1,
CpuCacheL2,
CpuCacheL3,
CpuCacheL4,
CpuCacheL5,
CpuCacheL6,
CpuCacheL7,
CpuCacheLevelMax
} OEM_MISC_CPU_CACHE_LEVEL;
typedef struct {
UINT8 Voltage; ///< Processor voltage
UINT16 CurrentSpeed; ///< Current clock speed in MHz
UINT16 MaxSpeed; ///< Maximum clock speed in MHz
UINT16 ExternalClock; ///< External clock speed in MHz
UINT16 CoreCount; ///< Number of cores available
UINT16 CoresEnabled; ///< Number of cores enabled
UINT16 ThreadCount; ///< Number of threads per processor
} OEM_MISC_PROCESSOR_DATA;
typedef enum {
ProductNameType01,
SerialNumType01,
UuidType01,
SystemManufacturerType01,
VersionType01,
SkuNumberType01,
FamilyType01,
AssertTagType02,
SerialNumberType02,
BoardManufacturerType02,
ProductNameType02,
VersionType02,
SkuNumberType02,
ChassisLocationType02,
AssetTagType03,
SerialNumberType03,
VersionType03,
ChassisTypeType03,
ManufacturerType03,
SkuNumberType03,
ProcessorPartNumType04,
ProcessorSerialNumType04,
SmbiosHiiStringFieldMax
} OEM_MISC_SMBIOS_HII_STRING_FIELD;
/*
* The following are functions that the each platform needs to
* implement in its OemMiscLib library.
*/
/** Gets the CPU frequency of the specified processor.
@param ProcessorIndex Index of the processor to get the frequency for.
@return CPU frequency in Hz
**/
UINTN
EFIAPI
OemGetCpuFreq (
IN UINT8 ProcessorIndex
);
/** Gets information about the specified processor and stores it in
the structures provided.
@param ProcessorIndex Index of the processor to get the information for.
@param ProcessorStatus Processor status.
@param ProcessorCharacteristics Processor characteritics.
@param MiscProcessorData Miscellaneous processor information.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetProcessorInformation (
IN UINTN ProcessorIndex,
IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
IN OUT OEM_MISC_PROCESSOR_DATA *MiscProcessorData
);
/** Gets information about the cache at the specified cache level.
@param ProcessorIndex The processor to get information for.
@param CacheLevel The cache level to get information for.
@param DataCache Whether the cache is a data cache.
@param UnifiedCache Whether the cache is a unified cache.
@param SmbiosCacheTable The SMBIOS Type7 cache information structure.
@return TRUE on success, FALSE on failure.
**/
BOOLEAN
EFIAPI
OemGetCacheInformation (
IN UINT8 ProcessorIndex,
IN UINT8 CacheLevel,
IN BOOLEAN DataCache,
IN BOOLEAN UnifiedCache,
IN OUT SMBIOS_TABLE_TYPE7 *SmbiosCacheTable
);
/** Gets the maximum number of processors supported by the platform.
@return The maximum number of processors.
**/
UINT8
EFIAPI
OemGetMaxProcessors (
VOID
);
/** Gets the type of chassis for the system.
@retval The type of the chassis.
**/
MISC_CHASSIS_TYPE
EFIAPI
OemGetChassisType (
VOID
);
/** Returns whether the specified processor is present or not.
@param ProcessIndex The processor index to check.
@return TRUE is the processor is present, FALSE otherwise.
**/
BOOLEAN
EFIAPI
OemIsProcessorPresent (
IN UINTN ProcessorIndex
);
/** Updates the HII string for the specified field.
@param HiiHandle The HII handle.
@param TokenToUpdate The string to update.
@param Field The field to get information about.
**/
VOID
EFIAPI
OemUpdateSmbiosInfo (
IN EFI_HII_HANDLE HiiHandle,
IN EFI_STRING_ID TokenToUpdate,
IN OEM_MISC_SMBIOS_HII_STRING_FIELD Field
);
/** Fetches the Type 32 boot information status.
@return Boot status.
**/
MISC_BOOT_INFORMATION_STATUS_DATA_TYPE
EFIAPI
OemGetBootStatus (
VOID
);
/** Fetches the chassis status when it was last booted.
@return Chassis status.
**/
MISC_CHASSIS_STATE
EFIAPI
OemGetChassisBootupState (
VOID
);
/** Fetches the chassis power supply/supplies status when last booted.
@return Chassis power supply/supplies status.
**/
MISC_CHASSIS_STATE
EFIAPI
OemGetChassisPowerSupplyState (
VOID
);
/** Fetches the chassis thermal status when last booted.
@return Chassis thermal status.
**/
MISC_CHASSIS_STATE
EFIAPI
OemGetChassisThermalState (
VOID
);
/** Fetches the chassis security status when last booted.
@return Chassis security status.
**/
MISC_CHASSIS_SECURITY_STATE
EFIAPI
OemGetChassisSecurityStatus (
VOID
);
/** Fetches the chassis height in RMUs (Rack Mount Units).
@return The height of the chassis.
**/
UINT8
EFIAPI
OemGetChassisHeight (
VOID
);
/** Fetches the number of power cords.
@return The number of power cords.
**/
UINT8
EFIAPI
OemGetChassisNumPowerCords (
VOID
);
#endif // OEM_MISC_LIB_H_

View File

@@ -2,37 +2,36 @@
OP-TEE specific header file.
Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef OPTEE_LIB_H_
#define OPTEE_LIB_H_
#ifndef _OPTEE_H_
#define _OPTEE_H_
/*
* The 'Trusted OS Call UID' is supposed to return the following UUID for
* OP-TEE OS. This is a 128-bit value.
*/
#define OPTEE_OS_UID0 0x384fb3e0
#define OPTEE_OS_UID1 0xe7f811e3
#define OPTEE_OS_UID2 0xaf630002
#define OPTEE_OS_UID3 0xa5d5c51b
#define OPTEE_OS_UID0 0x384fb3e0
#define OPTEE_OS_UID1 0xe7f811e3
#define OPTEE_OS_UID2 0xaf630002
#define OPTEE_OS_UID3 0xa5d5c51b
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE 0x0
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT 0x1
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT 0x2
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT 0x3
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT 0x9
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT 0xa
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT 0xb
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE 0x0
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT 0x1
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT 0x2
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT 0x3
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT 0x9
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT 0xa
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT 0xb
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK 0xff
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK 0xff
#define OPTEE_SUCCESS 0x00000000
#define OPTEE_ORIGIN_COMMUNICATION 0x00000002
#define OPTEE_ERROR_COMMUNICATION 0xFFFF000E
#define OPTEE_SUCCESS 0x00000000
#define OPTEE_ORIGIN_COMMUNICATION 0x00000002
#define OPTEE_ERROR_COMMUNICATION 0xFFFF000E
typedef struct {
UINT64 BufferAddress;
@@ -46,45 +45,43 @@ typedef struct {
UINT64 C;
} OPTEE_MESSAGE_PARAM_VALUE;
typedef union {
OPTEE_MESSAGE_PARAM_MEMORY Memory;
OPTEE_MESSAGE_PARAM_VALUE Value;
} OPTEE_MESSAGE_PARAM_UNION;
typedef struct {
UINT64 Attribute;
OPTEE_MESSAGE_PARAM_UNION Union;
UINT64 Attribute;
union {
OPTEE_MESSAGE_PARAM_MEMORY Memory;
OPTEE_MESSAGE_PARAM_VALUE Value;
} Union;
} OPTEE_MESSAGE_PARAM;
#define OPTEE_MAX_CALL_PARAMS 4
#define OPTEE_MAX_CALL_PARAMS 4
typedef struct {
UINT32 Command;
UINT32 Function;
UINT32 Session;
UINT32 CancelId;
UINT32 Pad;
UINT32 Return;
UINT32 ReturnOrigin;
UINT32 NumParams;
UINT32 Command;
UINT32 Function;
UINT32 Session;
UINT32 CancelId;
UINT32 Pad;
UINT32 Return;
UINT32 ReturnOrigin;
UINT32 NumParams;
// NumParams tells the actual number of element in Params
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS];
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS];
} OPTEE_MESSAGE_ARG;
typedef struct {
EFI_GUID Uuid; // [in] GUID/UUID of the Trusted Application
UINT32 Session; // [out] Session id
UINT32 Return; // [out] Return value
UINT32 ReturnOrigin; // [out] Origin of the return value
EFI_GUID Uuid; // [in] GUID/UUID of the Trusted Application
UINT32 Session; // [out] Session id
UINT32 Return; // [out] Return value
UINT32 ReturnOrigin; // [out] Origin of the return value
} OPTEE_OPEN_SESSION_ARG;
typedef struct {
UINT32 Function; // [in] Trusted Application function, specific to the TA
UINT32 Session; // [in] Session id
UINT32 Return; // [out] Return value
UINT32 ReturnOrigin; // [out] Origin of the return value
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS]; // Params for function to be invoked
UINT32 Function; // [in] Trusted Application function, specific to the TA
UINT32 Session; // [in] Session id
UINT32 Return; // [out] Return value
UINT32 ReturnOrigin; // [out] Origin of the return value
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS]; // Params for function to be invoked
} OPTEE_INVOKE_FUNCTION_ARG;
BOOLEAN
@@ -102,19 +99,19 @@ OpteeInit (
EFI_STATUS
EFIAPI
OpteeOpenSession (
IN OUT OPTEE_OPEN_SESSION_ARG *OpenSessionArg
IN OUT OPTEE_OPEN_SESSION_ARG *OpenSessionArg
);
EFI_STATUS
EFIAPI
OpteeCloseSession (
IN UINT32 Session
IN UINT32 Session
);
EFI_STATUS
EFIAPI
OpteeInvokeFunction (
IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
);
#endif // OPTEE_LIB_H_
#endif

View File

@@ -7,8 +7,8 @@
**/
#ifndef SEMIHOSTING_LIB_H_
#define SEMIHOSTING_LIB_H_
#ifndef __SEMIHOSTING_H__
#define __SEMIHOSTING_H__
/*
*
@@ -17,12 +17,12 @@
*
*/
#define SEMIHOST_FILE_MODE_READ (0 << 2)
#define SEMIHOST_FILE_MODE_WRITE (1 << 2)
#define SEMIHOST_FILE_MODE_APPEND (2 << 2)
#define SEMIHOST_FILE_MODE_UPDATE (1 << 1)
#define SEMIHOST_FILE_MODE_BINARY (1 << 0)
#define SEMIHOST_FILE_MODE_ASCII (0 << 0)
#define SEMIHOST_FILE_MODE_READ (0 << 2)
#define SEMIHOST_FILE_MODE_WRITE (1 << 2)
#define SEMIHOST_FILE_MODE_APPEND (2 << 2)
#define SEMIHOST_FILE_MODE_UPDATE (1 << 1)
#define SEMIHOST_FILE_MODE_BINARY (1 << 0)
#define SEMIHOST_FILE_MODE_ASCII (0 << 0)
BOOLEAN
SemihostConnectionSupported (
@@ -31,9 +31,9 @@ SemihostConnectionSupported (
RETURN_STATUS
SemihostFileOpen (
IN CHAR8 *FileName,
IN UINT32 Mode,
OUT UINTN *FileHandle
IN CHAR8 *FileName,
IN UINT32 Mode,
OUT UINTN *FileHandle
);
RETURN_STATUS
@@ -81,7 +81,7 @@ SemihostFileLength (
**/
RETURN_STATUS
SemihostFileTmpName (
SemihostFileTmpName(
OUT VOID *Buffer,
IN UINT8 Identifier,
IN UINTN Length
@@ -89,7 +89,7 @@ SemihostFileTmpName (
RETURN_STATUS
SemihostFileRemove (
IN CHAR8 *FileName
IN CHAR8 *FileName
);
/**
@@ -104,7 +104,7 @@ SemihostFileRemove (
**/
RETURN_STATUS
SemihostFileRename (
SemihostFileRename(
IN CHAR8 *FileName,
IN CHAR8 *NewFileName
);
@@ -116,17 +116,17 @@ SemihostReadCharacter (
VOID
SemihostWriteCharacter (
IN CHAR8 Character
IN CHAR8 Character
);
VOID
SemihostWriteString (
IN CHAR8 *String
IN CHAR8 *String
);
UINT32
SemihostSystem (
IN CHAR8 *CommandLine
IN CHAR8 *CommandLine
);
#endif // SEMIHOSTING_LIB_H_
#endif // __SEMIHOSTING_H__

Some files were not shown because too many files have changed in this diff Show More