OvmfPkg/RiscVVirt: Fix issues in VarStore Blockmap config

The block size configuration of Blockmap does not match that in Qemu
VirtNorFlash, which causes variable data to be written into FtwWorkBlock
by mistake, resulting in data loss during reboot. Fix it and update
new checksum value.

Signed-off-by: Qingyu Shang <2931013282@sjtu.edu.cn>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>

.azurepipelines/templates/defaults.yml

@@ -9,4 +9,4 @@
 
 variables:
   default_python_version: ">=3.10.6"
-  default_linux_image: "ghcr.io/tianocore/containers/fedora-37-test:3b3eb8f"
+  default_linux_image: "ghcr.io/tianocore/containers/fedora-37-test:a0dd931"

.pytool/Plugin/CharEncodingCheck/CharEncodingCheck.py

@@ -93,9 +93,7 @@ class CharEncodingCheck(ICiBuildPlugin):
             files = [Edk2pathObj.GetAbsolutePathOnThisSystemFromEdk2RelativePath(x) for x in files]
             for a in files:
                 files_tested += 1
-                if(self.TestEncodingOk(a, enc)):
-                    logging.debug("File {0} Passed Encoding Check {1}".format(a, enc))
-                else:
+                if not self.TestEncodingOk(a, enc):
                     tc.LogStdError("Encoding Failure in {0}.  Not {1}".format(a, enc))
                     overall_status += 1
 

ArmPkg/ArmPkg.ci.yaml

@@ -239,5 +239,10 @@
         ],
         "AdditionalIncludePaths": [] # Additional paths to spell check
                                      # (wildcards supported)
+    },
+
+    # options defined in .pytool/Plugin/UncrustifyCheck
+    "UncrustifyCheck": {
+        "AuditOnly": True
     }
 }

ArmPkg/ArmPkg.dec

@@ -144,6 +144,11 @@
   # If PcdMonitorConduitHvc = TRUE, conduit = HVC
   gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047
 
+  # Whether to remap all unused memory NX before installing the CPU arch
+  # protocol driver. This is needed on platforms that map all DRAM with RWX
+  # attributes initially, and can be disabled otherwise.
+  gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx|TRUE|BOOLEAN|0x00000048
+
 [PcdsFeatureFlag.ARM]
   # Whether to map normal memory as non-shareable. FALSE is the safe choice, but
   # TRUE may be appropriate to fix performance problems if you don't care about

ArmPkg/ArmPkg.dsc

@@ -162,6 +162,8 @@
   ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
   ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
 
+  ArmPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf
+
 [Components.AARCH64]
   ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
   ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf

ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c

@@ -1,6 +1,6 @@
 /*++
 
-Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2013-2023, Arm Ltd. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -8,20 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "ArmGicDxe.h"
 
-VOID
-EFIAPI
-IrqInterruptHandler (
-  IN EFI_EXCEPTION_TYPE  InterruptType,
-  IN EFI_SYSTEM_CONTEXT  SystemContext
-  );
-
-VOID
-EFIAPI
-ExitBootServicesEvent (
-  IN EFI_EVENT  Event,
-  IN VOID       *Context
-  );
-
 // Making this global saves a few bytes in image size
 EFI_HANDLE  gHardwareInterruptHandle = NULL;
 
@@ -61,7 +47,7 @@ GicGetDistributorIcfgBaseAndBit (
 
   RegIndex    = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
   Field       = Source % ARM_GIC_ICDICFR_F_STRIDE;
-  *RegAddress = PcdGet64 (PcdGicDistributorBase)
+  *RegAddress = (UINTN)PcdGet64 (PcdGicDistributorBase)
                 + ARM_GIC_ICDICFR
                 + (ARM_GIC_ICDICFR_BYTES * RegIndex);
   *Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)

ArmPkg/Drivers/ArmGic/ArmGicLib.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -104,10 +104,17 @@ GicGetCpuRedistributorBase (
   return 0;
 }
 
-UINTN
+/**
+  Return the GIC CPU Interrupt Interface ID.
+
+  @param GicInterruptInterfaceBase  Base address of the GIC Interrupt Interface.
+
+  @retval CPU Interface Identification information.
+**/
+UINT32
 EFIAPI
 ArmGicGetInterfaceIdentification (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   )
 {
   // Read the GIC Identification Register
@@ -117,7 +124,7 @@ ArmGicGetInterfaceIdentification (
 UINTN
 EFIAPI
 ArmGicGetMaxNumInterrupts (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   )
 {
   UINTN  ItLines;
@@ -133,15 +140,17 @@ ArmGicGetMaxNumInterrupts (
 VOID
 EFIAPI
 ArmGicSendSgiTo (
-  IN  INTN  GicDistributorBase,
-  IN  INTN  TargetListFilter,
-  IN  INTN  CPUTargetList,
-  IN  INTN  SgiId
+  IN  UINTN  GicDistributorBase,
+  IN  UINT8  TargetListFilter,
+  IN  UINT8  CPUTargetList,
+  IN  UINT8  SgiId
   )
 {
   MmioWrite32 (
     GicDistributorBase + ARM_GIC_ICDSGIR,
-    ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId
+    ((TargetListFilter & 0x3) << 24) |
+    ((CPUTargetList & 0xFF) << 16)   |
+    (SgiId & 0xF)
     );
 }
 
@@ -167,19 +176,17 @@ ArmGicAcknowledgeInterrupt (
   )
 {
   UINTN                  Value;
+  UINTN                  IntId;
   ARM_GIC_ARCH_REVISION  Revision;
 
+  ASSERT (InterruptId != NULL);
   Revision = ArmGicGetSupportedArchRevision ();
   if (Revision == ARM_GIC_ARCH_REVISION_2) {
     Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
-    // InterruptId is required for the caller to know if a valid or spurious
-    // interrupt has been read
-    ASSERT (InterruptId != NULL);
-    if (InterruptId != NULL) {
-      *InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
-    }
+    IntId = Value & ARM_GIC_ICCIAR_ACKINTID;
   } else if (Revision == ARM_GIC_ARCH_REVISION_3) {
     Value = ArmGicV3AcknowledgeInterrupt ();
+    IntId = Value;
   } else {
     ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
     // Report Spurious interrupt which is what the above controllers would
@@ -187,6 +194,12 @@ ArmGicAcknowledgeInterrupt (
     Value = 1023;
   }
 
+  if (InterruptId != NULL) {
+    // InterruptId is required for the caller to know if a valid or spurious
+    // interrupt has been read
+    *InterruptId = IntId;
+  }
+
   return Value;
 }
 
@@ -219,13 +232,13 @@ ArmGicSetInterruptPriority (
   )
 {
   UINT32                 RegOffset;
-  UINTN                  RegShift;
+  UINT8                  RegShift;
   ARM_GIC_ARCH_REVISION  Revision;
   UINTN                  GicCpuRedistributorBase;
 
   // Calculate register offset and bit position
-  RegOffset = Source / 4;
-  RegShift  = (Source % 4) * 8;
+  RegOffset = (UINT32)(Source / 4);
+  RegShift  = (UINT8)((Source % 4) * 8);
 
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -263,13 +276,13 @@ ArmGicEnableInterrupt (
   )
 {
   UINT32                 RegOffset;
-  UINTN                  RegShift;
+  UINT8                  RegShift;
   ARM_GIC_ARCH_REVISION  Revision;
   UINTN                  GicCpuRedistributorBase;
 
   // Calculate enable register offset and bit position
-  RegOffset = Source / 32;
-  RegShift  = Source % 32;
+  RegOffset = (UINT32)(Source / 32);
+  RegShift  = (UINT8)(Source % 32);
 
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -308,13 +321,13 @@ ArmGicDisableInterrupt (
   )
 {
   UINT32                 RegOffset;
-  UINTN                  RegShift;
+  UINT8                  RegShift;
   ARM_GIC_ARCH_REVISION  Revision;
   UINTN                  GicCpuRedistributorBase;
 
   // Calculate enable register offset and bit position
-  RegOffset = Source / 32;
-  RegShift  = Source % 32;
+  RegOffset = (UINT32)(Source / 32);
+  RegShift  = (UINT8)(Source % 32);
 
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -352,14 +365,14 @@ ArmGicIsInterruptEnabled (
   )
 {
   UINT32                 RegOffset;
-  UINTN                  RegShift;
+  UINT8                  RegShift;
   ARM_GIC_ARCH_REVISION  Revision;
   UINTN                  GicCpuRedistributorBase;
   UINT32                 Interrupts;
 
   // Calculate enable register offset and bit position
-  RegOffset = Source / 32;
-  RegShift  = Source % 32;
+  RegOffset = (UINT32)(Source / 32);
+  RegShift  = (UINT8)(Source % 32);
 
   Revision = ArmGicGetSupportedArchRevision ();
   if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -390,7 +403,7 @@ ArmGicIsInterruptEnabled (
 VOID
 EFIAPI
 ArmGicDisableDistributor (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   )
 {
   // Disable Gic Distributor
@@ -400,7 +413,7 @@ ArmGicDisableDistributor (
 VOID
 EFIAPI
 ArmGicEnableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   )
 {
   ARM_GIC_ARCH_REVISION  Revision;
@@ -418,7 +431,7 @@ ArmGicEnableInterruptInterface (
 VOID
 EFIAPI
 ArmGicDisableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   )
 {
   ARM_GIC_ARCH_REVISION  Revision;

ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -13,10 +13,11 @@
 VOID
 EFIAPI
 ArmGicEnableDistributor (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   )
 {
   ARM_GIC_ARCH_REVISION  Revision;
+  UINT32                 GicDistributorCtl;
 
   /*
    * Enable GIC distributor in Non-Secure world.
@@ -26,7 +27,8 @@ ArmGicEnableDistributor (
   if (Revision == ARM_GIC_ARCH_REVISION_2) {
     MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
   } else {
-    if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
+    GicDistributorCtl = MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR);
+    if ((GicDistributorCtl & ARM_GIC_ICDDCR_ARE) != 0) {
       MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
     } else {
       MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c

@@ -2,7 +2,7 @@
 
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
-Portions copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
+Portions copyright (c) 2011-2023, Arm Ltd. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -25,8 +25,8 @@ Abstract:
 extern EFI_HARDWARE_INTERRUPT_PROTOCOL   gHardwareInterruptV2Protocol;
 extern EFI_HARDWARE_INTERRUPT2_PROTOCOL  gHardwareInterrupt2V2Protocol;
 
-STATIC UINT32  mGicInterruptInterfaceBase;
-STATIC UINT32  mGicDistributorBase;
+STATIC UINTN  mGicInterruptInterfaceBase;
+STATIC UINTN  mGicDistributorBase;
 
 /**
   Enable interrupt source Source.
@@ -162,7 +162,7 @@ GicV2IrqInterruptHandler (
   IN EFI_SYSTEM_CONTEXT  SystemContext
   )
 {
-  UINT32                      GicInterrupt;
+  UINTN                       GicInterrupt;
   HARDWARE_INTERRUPT_HANDLER  InterruptHandler;
 
   GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
@@ -179,7 +179,7 @@ GicV2IrqInterruptHandler (
     // Call the registered interrupt handler.
     InterruptHandler (GicInterrupt, SystemContext);
   } else {
-    DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
+    DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", (UINT32)GicInterrupt));
     GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
   }
 }
@@ -349,8 +349,8 @@ GicV2ExitBootServicesEvent (
   IN VOID       *Context
   )
 {
-  UINTN   Index;
-  UINT32  GicInterrupt;
+  UINTN  Index;
+  UINTN  GicInterrupt;
 
   // Disable all the interrupts
   for (Index = 0; Index < mGicNumInterrupts; Index++) {
@@ -393,23 +393,26 @@ GicV2DxeInitialize (
   EFI_STATUS  Status;
   UINTN       Index;
   UINT32      RegOffset;
-  UINTN       RegShift;
+  UINT8       RegShift;
   UINT32      CpuTarget;
 
   // Make sure the Interrupt Controller Protocol is not already installed in
   // the system.
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
 
-  mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
-  mGicDistributorBase        = PcdGet64 (PcdGicDistributorBase);
+  ASSERT (PcdGet64 (PcdGicInterruptInterfaceBase) <= MAX_UINTN);
+  ASSERT (PcdGet64 (PcdGicDistributorBase) <= MAX_UINTN);
+
+  mGicInterruptInterfaceBase = (UINTN)PcdGet64 (PcdGicInterruptInterfaceBase);
+  mGicDistributorBase        = (UINTN)PcdGet64 (PcdGicDistributorBase);
   mGicNumInterrupts          = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
 
   for (Index = 0; Index < mGicNumInterrupts; Index++) {
     GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
 
     // Set Priority
-    RegOffset = Index / 4;
-    RegShift  = (Index % 4) * 8;
+    RegOffset = (UINT32)(Index / 4);
+    RegShift  = (UINT8)((Index % 4) * 8);
     MmioAndThenOr32 (
       mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
       ~(0xff << RegShift),

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c

@@ -1,12 +1,13 @@
 /** @file
 *
-*  Copyright (c) 2013-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2013-2023, ARM Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
 **/
 
 #include <Library/ArmGicLib.h>
+#include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 
 UINTN
@@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt (
   IN UINTN   Source
   )
 {
-  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
+  ASSERT (Source <= MAX_UINT32);
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
 }

ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -13,7 +13,7 @@
 VOID
 EFIAPI
 ArmGicV2EnableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   )
 {
   /*
@@ -26,7 +26,7 @@ ArmGicV2EnableInterruptInterface (
 VOID
 EFIAPI
 ArmGicV2DisableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   )
 {
   // Disable Gic Interface

ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -156,7 +156,7 @@ GicV3IrqInterruptHandler (
   IN EFI_SYSTEM_CONTEXT  SystemContext
   )
 {
-  UINT32                      GicInterrupt;
+  UINTN                       GicInterrupt;
   HARDWARE_INTERRUPT_HANDLER  InterruptHandler;
 
   GicInterrupt = ArmGicV3AcknowledgeInterrupt ();
@@ -173,7 +173,7 @@ GicV3IrqInterruptHandler (
     // Call the registered interrupt handler.
     InterruptHandler (GicInterrupt, SystemContext);
   } else {
-    DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
+    DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", (UINT32)GicInterrupt));
     GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt);
   }
 }
@@ -381,7 +381,7 @@ GicV3DxeInitialize (
   // the system.
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
 
-  mGicDistributorBase    = PcdGet64 (PcdGicDistributorBase);
+  mGicDistributorBase    = (UINTN)PcdGet64 (PcdGicDistributorBase);
   mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
   mGicNumInterrupts      = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
 

ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c

@@ -18,6 +18,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define MIN_T0SZ        16
 #define BITS_PER_LEVEL  9
 
+/**
+  Parses T0SZ to determine the level and number of entries at the root
+  of the translation table.
+
+  @param T0SZ                 The T0SZ value to be parsed.
+  @param RootTableLevel       The level of the root table.
+  @param RootTableEntryCount  The number of entries in the root table.
+**/
 STATIC
 VOID
 GetRootTranslationTableInfo (
@@ -30,6 +38,13 @@ GetRootTranslationTableInfo (
   *RootTableEntryCount = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
 }
 
+/**
+  Converts ARM translation table attributes to GCD attributes.
+
+  @param PageAttributes The translation table attributes to be converted.
+
+  @retval The analogous GCD attributes.
+**/
 STATIC
 UINT64
 PageAttributeToGcdAttribute (
@@ -100,6 +115,14 @@ RegionAttributeToGcdAttribute (
   return PageAttributeToGcdAttribute (PageAttributes);
 }
 
+/**
+  Retrieves the attribute of the first page entry in the translation table.
+
+  @param[in] FirstLevelTableAddress   The base address of the translation table.
+  @param[in] TableLevel               The current level being traversed.
+
+  @retval The attributes of the first page entry found, or INVALID_ENTRY.
+**/
 STATIC
 UINT64
 GetFirstPageAttribute (
@@ -120,12 +143,25 @@ GetFirstPageAttribute (
   } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
              ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
   {
-    return FirstEntry & TT_ATTR_INDX_MASK;
+    return FirstEntry & TT_ATTRIBUTES_MASK;
   } else {
     return INVALID_ENTRY;
   }
 }
 
+/**
+  This function recursively traverses the translation table heirarchy to
+  synchronise the GCD with the translation table.
+
+  @param[in]        TableAddress        The address of the table being processed.
+  @param[in]        EntryCount          The number of entries in the current level of the table.
+  @param[in]        TableLevel          The current level of the memory table being processed.
+  @param[in]        BaseAddress         The starting address of the region.
+  @param[in, out]   PrevEntryAttribute  The attributes of the previous region.
+  @param[in, out]   StartGcdRegion      The start of the GCD region.
+
+  @retval The address at the end of the last region processed.
+**/
 STATIC
 UINT64
 GetNextEntryAttribute (
@@ -148,17 +184,19 @@ GetNextEntryAttribute (
   // Get the memory space map from GCD
   MemorySpaceMap = NULL;
   Status         = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
-  ASSERT_EFI_ERROR (Status);
 
-  // We cannot get more than 3-level page table
-  ASSERT (TableLevel <= 3);
+  if (EFI_ERROR (Status) || (TableLevel > 3)) {
+    ASSERT_EFI_ERROR (Status);
+    ASSERT (TableLevel <= 3);
+    return 0;
+  }
 
   // While the top level table might not contain TT_ENTRY_COUNT entries;
   // the subsequent ones should be filled up
   for (Index = 0; Index < EntryCount; Index++) {
     Entry          = TableAddress[Index];
     EntryType      = Entry & TT_TYPE_MASK;
-    EntryAttribute = Entry  & TT_ATTR_INDX_MASK;
+    EntryAttribute = Entry & TT_ATTRIBUTES_MASK;
 
     // If Entry is a Table Descriptor type entry then go through the sub-level table
     if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
@@ -218,6 +256,15 @@ GetNextEntryAttribute (
   return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL (TableLevel));
 }
 
+/**
+  Sync the GCD memory space attributes with the translation table.
+
+  @param[in]  CpuProtocol The CPU architectural protocol instance.
+
+  @retval EFI_SUCCESS The GCD memory space attributes are synced with
+                      the MMU page table.
+  @retval Others      The return value of GetMemorySpaceMap().
+**/
 EFI_STATUS
 SyncCacheConfig (
   IN  EFI_CPU_ARCH_PROTOCOL  *CpuProtocol
@@ -243,7 +290,11 @@ SyncCacheConfig (
   //
   MemorySpaceMap = NULL;
   Status         = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
-  ASSERT_EFI_ERROR (Status);
+
+  if (EFI_ERROR (Status)) {
+    ASSERT_EFI_ERROR (Status);
+    return Status;
+  }
 
   // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs
   // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a
@@ -277,7 +328,7 @@ SyncCacheConfig (
                            );
 
   // Update GCD with the last region if valid
-  if (PageAttribute != INVALID_ENTRY) {
+  if ((PageAttribute != INVALID_ENTRY) && (EndAddressGcdRegion > BaseAddressGcdRegion)) {
     SetGcdMemorySpaceAttributes (
       MemorySpaceMap,
       NumberOfDescriptors,
@@ -292,6 +343,13 @@ SyncCacheConfig (
   return EFI_SUCCESS;
 }
 
+/**
+  Convert EFI memory attributes to ARM translation table attributes.
+
+  @param[in]  EfiAttributes  EFI memory attributes.
+
+  @retval The analogous translation table attributes.
+**/
 UINT64
 EfiAttributeToArmAttribute (
   IN UINT64  EfiAttributes
@@ -339,8 +397,25 @@ EfiAttributeToArmAttribute (
   return ArmAttributes;
 }
 
-// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
-// And then the function will identify the size of the region that has the same page table attribute.
+/**
+  This function returns the attributes of the memory region containing the
+  specified address.
+
+  RegionLength and RegionAttributes are only valid if the result is EFI_SUCCESS.
+
+  @param[in]        TranslationTable  The translation table base address.
+  @param[in]        TableLevel        The level of the translation table.
+  @param[in]        LastBlockEntry    The last block address of the table level.
+  @param[in, out]   BaseAddress       The base address of the memory region.
+  @param[out]       RegionLength      The length of the memory region.
+  @param[out]       RegionAttributes  The attributes of the memory region.
+
+  @retval EFI_SUCCESS     The attributes of the memory region were
+                          returned successfully.
+  @retval EFI_NOT_FOUND   The memory region was not found.
+  @retval EFI_NO_MAPPING  The translation table entry associated with
+                          BaseAddress is invalid.
+**/
 EFI_STATUS
 GetMemoryRegionRec (
   IN     UINT64  *TranslationTable,
@@ -380,10 +455,10 @@ GetMemoryRegionRec (
                RegionAttributes
                );
 
-    // In case of 'Success', it means the end of the block region has been found into the upper
-    // level translation table
-    if (!EFI_ERROR (Status)) {
-      return EFI_SUCCESS;
+    // EFI_SUCCESS:     The end of the end of the region was found.
+    // EFI_NO_MAPPING:  The translation entry associated with BaseAddress is invalid.
+    if (Status != EFI_NOT_FOUND) {
+      return Status;
     }
 
     // Now we processed the table move to the next entry
@@ -395,12 +470,13 @@ GetMemoryRegionRec (
     *RegionLength     = 0;
     *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
   } else {
-    // We have an 'Invalid' entry
-    return EFI_UNSUPPORTED;
+    return EFI_NO_MAPPING;
   }
 
   while (BlockEntry <= LastBlockEntry) {
-    if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
+    if (((*BlockEntry & TT_TYPE_MASK) == BlockEntryType) &&
+        ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes))
+    {
       *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL (TableLevel);
     } else {
       // In case we have found the end of the region we return success
@@ -412,10 +488,29 @@ GetMemoryRegionRec (
 
   // If we have reached the end of the TranslationTable and we have not found the end of the region then
   // we return EFI_NOT_FOUND.
-  // The caller will continue to look for the memory region at its level
+  // The caller will continue to look for the memory region at its level.
   return EFI_NOT_FOUND;
 }
 
+/**
+  Retrieves a memory region from a given base address.
+
+  This function retrieves a memory region starting from a given base address.
+
+  @param[in, out] BaseAddress       The base address from which to retrieve
+                                    the memory region. On successful return, this is
+                                    updated to the end address of the retrieved region.
+  @param[out]     RegionLength      The length of the retrieved memory region.
+  @param[out]     RegionAttributes  The attributes of the retrieved memory region.
+
+  @retval EFI_STATUS              Returns EFI_SUCCESS if the memory region is
+                                  retrieved successfully, or the status of the
+                                  recursive call to GetMemoryRegionRec.
+  @retval EFI_NOT_FOUND           The memory region was not found.
+  @retval EFI_NO_MAPPING          The translation table entry associated with
+                                  BaseAddress is invalid.
+  @retval EFI_INVALID_PARAMETER   One of the input parameters was NULL.
+**/
 EFI_STATUS
 GetMemoryRegion (
   IN OUT UINTN  *BaseAddress,
@@ -429,10 +524,18 @@ GetMemoryRegion (
   UINTN       EntryCount;
   UINTN       T0SZ;
 
-  ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
+  if ((BaseAddress == NULL) || (RegionLength == NULL) || (RegionAttributes == NULL)) {
+    ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
+    return EFI_INVALID_PARAMETER;
+  }
 
   TranslationTable = ArmGetTTBR0BaseAddress ();
 
+  // Initialize the output parameters. These paramaters are only valid if the
+  // result is EFI_SUCCESS.
+  *RegionLength     = 0;
+  *RegionAttributes = 0;
+
   T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
   // Get the Table info from T0SZ
   GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
@@ -447,10 +550,10 @@ GetMemoryRegion (
              );
 
   // If the region continues up to the end of the root table then GetMemoryRegionRec()
-  // will return EFI_NOT_FOUND
-  if (Status == EFI_NOT_FOUND) {
+  // will return EFI_NOT_FOUND. Check if the region length was updated.
+  if ((Status == EFI_NOT_FOUND) && (*RegionLength > 0)) {
     return EFI_SUCCESS;
-  } else {
-    return Status;
   }
+
+  return Status;
 }

ArmPkg/Drivers/CpuDxe/Arm/Mmu.c

@@ -17,9 +17,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
   Convert a set of ARM short descriptor section attributes into a mask
   of EFI_MEMORY_xx constants.
 
-  @param  SectionAttributes   The set of page attributes.
-  @param  GcdAttributes       Pointer to the return value.
+  @param[in]    SectionAttributes   The set of page attributes.
+  @param[out]   GcdAttributes       Pointer to the return value.
 
+  @retval EFI_SUCCESS       The attributes were converted successfully.
+  @retval EFI_UNSUPPORTED   The section attributes did not have a
+                            GCD transation.
 **/
 STATIC
 EFI_STATUS
@@ -87,10 +90,11 @@ SectionToGcdAttributes (
   Convert an arch specific set of page attributes into a mask
   of EFI_MEMORY_xx constants.
 
-  @param  PageAttributes  The set of page attributes.
-
-  @retval The mask of EFI_MEMORY_xx constants.
+  @param[in] PageAttributes  The set of page attributes.
 
+  @retval EFI_SUCCESS       The attributes were converted successfully.
+  @retval EFI_UNSUPPORTED   The section attributes did not have a
+                            GCD transation.
 **/
 UINT64
 RegionAttributeToGcdAttribute (
@@ -107,9 +111,11 @@ RegionAttributeToGcdAttribute (
   Convert a set of ARM short descriptor page attributes into a mask
   of EFI_MEMORY_xx constants.
 
-  @param  PageAttributes      The set of page attributes.
-  @param  GcdAttributes       Pointer to the return value.
+  @param[in]    PageAttributes  The set of page attributes.
+  @param[out]   GcdAttributes   Pointer to the return value.
 
+  @retval EFI_SUCCESS       The attributes were converted successfully.
+  @retval EFI_UNSUPPORTED   The page attributes did not have a GCD transation.
 **/
 STATIC
 EFI_STATUS
@@ -173,6 +179,23 @@ PageToGcdAttributes (
   return EFI_SUCCESS;
 }
 
+/**
+  Synchronizes the GCD with the translation table for a specified page.
+
+  This function synchronizes cache configuration for a given page based on its section index
+  and the first level descriptor. It traverses the second level table entries of the page and
+  updates the GCD attributes accordingly for each entry.
+
+  @param[in]        SectionIndex            The index of the section where the page resides.
+  @param[in]        FirstLevelDescriptor    The first translation table level of the page.
+  @param[in]        NumberOfDescriptors     The number of descriptors in the GCD memory space map.
+  @param[in]        MemorySpaceMap          The GCD memory space descriptor.
+  @param[in, out]   NextRegionBase          The next region base address.
+  @param[in, out]   NextRegionLength        The next region length.
+  @param[in, out]   NextSectionAttributes   The next section attributes.
+
+  @retval EFI_STATUS Always return success
+**/
 EFI_STATUS
 SyncCacheConfigPage (
   IN     UINT32                           SectionIndex,
@@ -217,7 +240,10 @@ SyncCacheConfigPage (
       } else if (PageAttributes != NextPageAttributes) {
         // Convert Section Attributes into GCD Attributes
         Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
-        ASSERT_EFI_ERROR (Status);
+        if (EFI_ERROR (Status)) {
+          ASSERT_EFI_ERROR (Status);
+          GcdAttributes = 0;
+        }
 
         // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
@@ -230,7 +256,10 @@ SyncCacheConfigPage (
     } else if (NextPageAttributes != 0) {
       // Convert Page Attributes into GCD Attributes
       Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
-      ASSERT_EFI_ERROR (Status);
+      if (EFI_ERROR (Status)) {
+        ASSERT_EFI_ERROR (Status);
+        GcdAttributes = 0;
+      }
 
       // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
       SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
@@ -252,6 +281,14 @@ SyncCacheConfigPage (
   return EFI_SUCCESS;
 }
 
+/**
+  Sync the GCD memory space attributes with the translation table.
+
+  @param[in]  CpuProtocol  The CPU architectural protocol instance.
+
+  @retval EFI_SUCCESS   The GCD memory space attributes are synced with the MMU page table.
+  @retval Others        The return value of GetMemorySpaceMap().
+**/
 EFI_STATUS
 SyncCacheConfig (
   IN  EFI_CPU_ARCH_PROTOCOL  *CpuProtocol
@@ -278,7 +315,12 @@ SyncCacheConfig (
   //
   MemorySpaceMap = NULL;
   Status         = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
-  ASSERT_EFI_ERROR (Status);
+
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "SyncCacheConfig - GetMemorySpaceMap() failed! Status: %r\n", Status));
+    ASSERT_EFI_ERROR (Status);
+    return Status;
+  }
 
   // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs
   // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a
@@ -307,7 +349,12 @@ SyncCacheConfig (
       } else if (SectionAttributes != NextSectionAttributes) {
         // Convert Section Attributes into GCD Attributes
         Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
-        ASSERT_EFI_ERROR (Status);
+
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
+          ASSERT_EFI_ERROR (Status);
+          GcdAttributes = 0;
+        }
 
         // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -343,7 +390,11 @@ SyncCacheConfig (
       if (NextSectionAttributes != 0) {
         // Convert Section Attributes into GCD Attributes
         Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
-        ASSERT_EFI_ERROR (Status);
+        if (EFI_ERROR (Status)) {
+          DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
+          ASSERT_EFI_ERROR (Status);
+          GcdAttributes = 0;
+        }
 
         // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -360,7 +411,11 @@ SyncCacheConfig (
   if (NextSectionAttributes != 0) {
     // Convert Section Attributes into GCD Attributes
     Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
-    ASSERT_EFI_ERROR (Status);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
+      ASSERT_EFI_ERROR (Status);
+      GcdAttributes = 0;
+    }
 
     // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
     SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -371,6 +426,13 @@ SyncCacheConfig (
   return EFI_SUCCESS;
 }
 
+/**
+  Convert EFI memory attributes to ARM translation table attributes.
+
+  @param[in]  EfiAttributes  EFI memory attributes.
+
+  @retval The analogous translation table attributes.
+**/
 UINT64
 EfiAttributeToArmAttribute (
   IN UINT64  EfiAttributes
@@ -424,20 +486,39 @@ EfiAttributeToArmAttribute (
   return ArmAttributes;
 }
 
+/**
+  This function finds the end of a memory region in a translation table. A
+  memory region is defined as a contiguous set of pages with the same attributes.
+
+  @param[in]    PageTable         The translation table to traverse.
+  @param[in]    BaseAddress       The address from which to start the search
+  @param[in]    RegionAttributes  The attributes of the start of the region.
+  @param[out]   RegionLength      The length of the region found.
+
+  @retval EFI_SUCCESS       The region was found.
+  @retval EFI_NOT_FOUND     The end of the region was not found.
+  @retval EFI_NO_MAPPING    The region specified by BaseAddress is not mapped
+                            in the input translation table.
+  @retval EFI_UNSUPPORTED   Large pages are not supported.
+**/
+STATIC
 EFI_STATUS
 GetMemoryRegionPage (
   IN     UINT32  *PageTable,
-  IN OUT UINTN   *BaseAddress,
-  OUT    UINTN   *RegionLength,
-  OUT    UINTN   *RegionAttributes
+  IN     UINTN   *BaseAddress,
+  IN     UINTN   *RegionAttributes,
+  OUT    UINTN   *RegionLength
   )
 {
-  UINT32  PageAttributes;
-  UINT32  TableIndex;
-  UINT32  PageDescriptor;
+  UINT32      PageAttributes;
+  UINT32      TableIndex;
+  UINT32      PageDescriptor;
+  EFI_STATUS  Status;
 
   // Convert the section attributes into page attributes
   PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes);
+  Status         = EFI_NOT_FOUND;
+  *RegionLength  = 0;
 
   // Calculate index into first level translation table for start of modification
   TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK)  >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@@ -449,25 +530,44 @@ GetMemoryRegionPage (
     PageDescriptor = PageTable[TableIndex];
 
     if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
-      // Case: End of the boundary of the region
-      return EFI_SUCCESS;
+      Status = (*RegionLength > 0) ? EFI_SUCCESS : EFI_NO_MAPPING;
+      break;
     } else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
-      if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
-        *RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
-      } else {
-        // Case: End of the boundary of the region
-        return EFI_SUCCESS;
+      if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) != PageAttributes) {
+        Status = EFI_SUCCESS;
+        break;
       }
+
+      *RegionLength += TT_DESCRIPTOR_PAGE_SIZE;
     } else {
-      // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
+      // Large pages are unsupported.
+      Status = EFI_UNSUPPORTED;
       ASSERT (0);
-      return EFI_SUCCESS;
+      break;
     }
   }
 
-  return EFI_NOT_FOUND;
+  return Status;
 }
 
+/**
+  Get the memory region that contains the specified address. A memory region is defined
+  as a contiguous set of pages with the same attributes.
+
+  RegionLength and RegionAttributes are only valid if EFI_SUCCESS is returned.
+
+  @param[in, out]   BaseAddress       On input, the address to search for.
+                                      On output, the base address of the region found.
+  @param[out]       RegionLength      The length of the region found.
+  @param[out]       RegionAttributes  The attributes of the region found.
+
+  @retval   EFI_SUCCESS             Region found
+  @retval   EFI_NOT_FOUND           Region not found
+  @retval   EFI_UNSUPPORTED         Large pages are unsupported
+  @retval   EFI_NO_MAPPING          The page specified by BaseAddress is unmapped
+  @retval   EFI_INVALID_PARAMETER   The BaseAddress exceeds the addressable range of
+                                    the translation table.
+**/
 EFI_STATUS
 GetMemoryRegion (
   IN OUT UINTN  *BaseAddress,
@@ -482,6 +582,7 @@ GetMemoryRegion (
   UINT32                      SectionDescriptor;
   ARM_FIRST_LEVEL_DESCRIPTOR  *FirstLevelTable;
   UINT32                      *PageTable;
+  UINTN                       Length;
 
   // Initialize the arguments
   *RegionLength = 0;
@@ -491,7 +592,11 @@ GetMemoryRegion (
 
   // Calculate index into first level translation table for start of modification
   TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
-  ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
+
+  if (TableIndex >= TRANSLATION_TABLE_SECTION_COUNT) {
+    ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
+    return EFI_INVALID_PARAMETER;
+  }
 
   // Get the section at the given index
   SectionDescriptor = FirstLevelTable[TableIndex];
@@ -524,6 +629,8 @@ GetMemoryRegion (
                         TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
   }
 
+  Status = EFI_NOT_FOUND;
+
   for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
     // Get the section at the given index
     SectionDescriptor = FirstLevelTable[TableIndex];
@@ -532,15 +639,18 @@ GetMemoryRegion (
     if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
       // Extract the page table location from the descriptor
       PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
+      Length    = 0;
 
       // Scan the page table to find the end of the region.
-      Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
-      ASSERT (*RegionLength > 0);
+      Status         = GetMemoryRegionPage (PageTable, BaseAddress, RegionAttributes, &Length);
+      *RegionLength += Length;
 
-      // If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
-      if (Status == EFI_SUCCESS) {
-        break;
+      // Status == EFI_NOT_FOUND implies we have not reached the end of the region.
+      if ((Status == EFI_NOT_FOUND) && (Length > 0)) {
+        continue;
       }
+
+      break;
     } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
                ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
     {
@@ -556,5 +666,10 @@ GetMemoryRegion (
     }
   }
 
-  return EFI_SUCCESS;
+  // Check if the region length was updated.
+  if (*RegionLength > 0) {
+    Status = EFI_SUCCESS;
+  }
+
+  return Status;
 }

ArmPkg/Drivers/CpuDxe/CpuDxe.c

@@ -11,6 +11,8 @@
 
 #include <Guid/IdleLoopEvent.h>
 
+#include <Library/MemoryAllocationLib.h>
+
 BOOLEAN  mIsFlushingGCD;
 
 /**
@@ -227,6 +229,77 @@ InitializeDma (
   CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
 }
 
+/**
+  Map all EfiConventionalMemory regions in the memory map with NX
+  attributes so that allocating or freeing EfiBootServicesData regions
+  does not result in changes to memory permission attributes.
+
+**/
+STATIC
+VOID
+RemapUnusedMemoryNx (
+  VOID
+  )
+{
+  UINT64                 TestBit;
+  UINTN                  MemoryMapSize;
+  UINTN                  MapKey;
+  UINTN                  DescriptorSize;
+  UINT32                 DescriptorVersion;
+  EFI_MEMORY_DESCRIPTOR  *MemoryMap;
+  EFI_MEMORY_DESCRIPTOR  *MemoryMapEntry;
+  EFI_MEMORY_DESCRIPTOR  *MemoryMapEnd;
+  EFI_STATUS             Status;
+
+  TestBit = LShiftU64 (1, EfiBootServicesData);
+  if ((PcdGet64 (PcdDxeNxMemoryProtectionPolicy) & TestBit) == 0) {
+    return;
+  }
+
+  MemoryMapSize = 0;
+  MemoryMap     = NULL;
+
+  Status = gBS->GetMemoryMap (
+                  &MemoryMapSize,
+                  MemoryMap,
+                  &MapKey,
+                  &DescriptorSize,
+                  &DescriptorVersion
+                  );
+  ASSERT (Status == EFI_BUFFER_TOO_SMALL);
+  do {
+    MemoryMap = (EFI_MEMORY_DESCRIPTOR *)AllocatePool (MemoryMapSize);
+    ASSERT (MemoryMap != NULL);
+    Status = gBS->GetMemoryMap (
+                    &MemoryMapSize,
+                    MemoryMap,
+                    &MapKey,
+                    &DescriptorSize,
+                    &DescriptorVersion
+                    );
+    if (EFI_ERROR (Status)) {
+      FreePool (MemoryMap);
+    }
+  } while (Status == EFI_BUFFER_TOO_SMALL);
+
+  ASSERT_EFI_ERROR (Status);
+
+  MemoryMapEntry = MemoryMap;
+  MemoryMapEnd   = (EFI_MEMORY_DESCRIPTOR *)((UINT8 *)MemoryMap + MemoryMapSize);
+  while ((UINTN)MemoryMapEntry < (UINTN)MemoryMapEnd) {
+    if (MemoryMapEntry->Type == EfiConventionalMemory) {
+      ArmSetMemoryAttributes (
+        MemoryMapEntry->PhysicalStart,
+        EFI_PAGES_TO_SIZE (MemoryMapEntry->NumberOfPages),
+        EFI_MEMORY_XP,
+        EFI_MEMORY_XP
+        );
+    }
+
+    MemoryMapEntry = NEXT_MEMORY_DESCRIPTOR (MemoryMapEntry, DescriptorSize);
+  }
+}
+
 EFI_STATUS
 CpuDxeInitialize (
   IN EFI_HANDLE        ImageHandle,
@@ -240,6 +313,20 @@ CpuDxeInitialize (
 
   InitializeDma (&mCpu);
 
+  //
+  // Once we install the CPU arch protocol, the DXE core's memory
+  // protection routines will invoke them to manage the permissions of page
+  // allocations as they are created. Given that this includes pages
+  // allocated for page tables by this driver, we must ensure that unused
+  // memory is mapped with the same permissions as boot services data
+  // regions. Otherwise, we may end up with unbounded recursion, due to the
+  // fact that updating permissions on a newly allocated page table may trigger
+  // a block entry split, which triggers a page table allocation, etc etc
+  //
+  if (FeaturePcdGet (PcdRemapUnusedMemoryNx)) {
+    RemapUnusedMemoryNx ();
+  }
+
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &mCpuHandle,
                   &gEfiCpuArchProtocolGuid,

ArmPkg/Drivers/CpuDxe/CpuDxe.inf

@@ -48,6 +48,7 @@
   DefaultExceptionHandlerLib
   DxeServicesTableLib
   HobLib
+  MemoryAllocationLib
   PeCoffGetEntryPointLib
   UefiDriverEntryPoint
   UefiLib
@@ -64,9 +65,11 @@
 
 [Pcd.common]
   gArmTokenSpaceGuid.PcdVFPEnabled
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy
 
 [FeaturePcd.common]
   gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
+  gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx
 
 [Depex]
   gHardwareInterruptProtocolGuid OR gHardwareInterrupt2ProtocolGuid

ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c

@@ -217,7 +217,7 @@ CpuSetMemoryAttributes (
   if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) ||
       ((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
   {
-    return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
+    return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes, 0);
   } else {
     return EFI_SUCCESS;
   }

ArmPkg/Drivers/CpuDxe/MemoryAttribute.c

@@ -183,8 +183,6 @@ SetMemoryAttributes (
   IN  UINT64                         Attributes
   )
 {
-  EFI_STATUS  Status;
-
   DEBUG ((
     DEBUG_INFO,
     "%a: BaseAddress == 0x%lx, Length == 0x%lx, Attributes == 0x%lx\n",
@@ -204,28 +202,7 @@ SetMemoryAttributes (
     return EFI_UNSUPPORTED;
   }
 
-  if ((Attributes & EFI_MEMORY_RP) != 0) {
-    Status = ArmSetMemoryRegionNoAccess (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  if ((Attributes & EFI_MEMORY_RO) != 0) {
-    Status = ArmSetMemoryRegionReadOnly (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  if ((Attributes & EFI_MEMORY_XP) != 0) {
-    Status = ArmSetMemoryRegionNoExec (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  return EFI_SUCCESS;
+  return ArmSetMemoryAttributes (BaseAddress, Length, Attributes, Attributes);
 }
 
 /**
@@ -267,8 +244,6 @@ ClearMemoryAttributes (
   IN  UINT64                         Attributes
   )
 {
-  EFI_STATUS  Status;
-
   DEBUG ((
     DEBUG_INFO,
     "%a: BaseAddress == 0x%lx, Length == 0x%lx, Attributes == 0x%lx\n",
@@ -288,28 +263,7 @@ ClearMemoryAttributes (
     return EFI_UNSUPPORTED;
   }
 
-  if ((Attributes & EFI_MEMORY_RP) != 0) {
-    Status = ArmClearMemoryRegionNoAccess (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  if ((Attributes & EFI_MEMORY_RO) != 0) {
-    Status = ArmClearMemoryRegionReadOnly (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  if ((Attributes & EFI_MEMORY_XP) != 0) {
-    Status = ArmClearMemoryRegionNoExec (BaseAddress, Length);
-    if (EFI_ERROR (Status)) {
-      return EFI_UNSUPPORTED;
-    }
-  }
-
-  return EFI_SUCCESS;
+  return ArmSetMemoryAttributes (BaseAddress, Length, 0, Attributes);
 }
 
 EFI_MEMORY_ATTRIBUTE_PROTOCOL  mMemoryAttribute = {

ArmPkg/Drivers/CpuPei/CpuPei.c

@@ -3,6 +3,7 @@
 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
 Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
+Copyright (c) 2023, Google, LLC. All rights reserved.<BR>
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -24,6 +25,7 @@ Abstract:
 // The protocols, PPI and GUID definitions for this module
 //
 #include <Ppi/ArmMpCoreInfo.h>
+#include <Ppi/MemoryAttribute.h>
 
 //
 // The Library classes this module consumes
@@ -34,6 +36,77 @@ Abstract:
 #include <Library/PcdLib.h>
 #include <Library/HobLib.h>
 #include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
+
+/**
+  Set the requested memory permission attributes on a region of memory.
+
+  BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
+
+  Attributes must contain a combination of EFI_MEMORY_RP, EFI_MEMORY_RO and
+  EFI_MEMORY_XP, and specifies the attributes that must be set for the
+  region in question. Attributes that are omitted will be cleared from the
+  region only if they are set in AttributeMask.
+
+  AttributeMask must contain a combination of EFI_MEMORY_RP, EFI_MEMORY_RO and
+  EFI_MEMORY_XP, and specifies the attributes that the call will operate on.
+  AttributeMask must not be 0x0, and must contain at least the bits set in
+  Attributes.
+
+  @param[in]  This              The protocol instance pointer.
+  @param[in]  BaseAddress       The physical address that is the start address
+                                of a memory region.
+  @param[in]  Length            The size in bytes of the memory region.
+  @param[in]  Attributes        Memory attributes to set or clear.
+  @param[in]  AttributeMask     Mask of memory attributes to operate on.
+
+  @retval EFI_SUCCESS           The attributes were set for the memory region.
+  @retval EFI_INVALID_PARAMETER Length is zero.
+                                AttributeMask is zero.
+                                AttributeMask lacks bits set in Attributes.
+                                BaseAddress or Length is not suitably aligned.
+  @retval EFI_UNSUPPORTED       The processor does not support one or more
+                                bytes of the memory resource range specified
+                                by BaseAddress and Length.
+                                The bit mask of attributes is not supported for
+                                the memory resource range specified by
+                                BaseAddress and Length.
+  @retval EFI_OUT_OF_RESOURCES  Requested attributes cannot be applied due to
+                                lack of system resources.
+
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+SetMemoryPermissions (
+  IN  EDKII_MEMORY_ATTRIBUTE_PPI  *This,
+  IN  EFI_PHYSICAL_ADDRESS        BaseAddress,
+  IN  UINT64                      Length,
+  IN  UINT64                      Attributes,
+  IN  UINT64                      AttributeMask
+  )
+{
+  if ((Length == 0) ||
+      (AttributeMask == 0) ||
+      ((AttributeMask & (EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP)) == 0) ||
+      ((Attributes & ~AttributeMask) != 0) ||
+      (((BaseAddress | Length) & EFI_PAGE_MASK) != 0))
+  {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  return ArmSetMemoryAttributes (BaseAddress, Length, Attributes, AttributeMask);
+}
+
+STATIC CONST EDKII_MEMORY_ATTRIBUTE_PPI  mMemoryAttributePpi = {
+  SetMemoryPermissions
+};
+
+STATIC CONST EFI_PEI_PPI_DESCRIPTOR  mMemoryAttributePpiDesc = {
+  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+  &gEdkiiMemoryAttributePpiGuid,
+  (VOID *)&mMemoryAttributePpi
+};
 
 /*++
 
@@ -79,5 +152,8 @@ InitializeCpuPeim (
     }
   }
 
+  Status = PeiServicesInstallPpi (&mMemoryAttributePpiDesc);
+  ASSERT_EFI_ERROR (Status);
+
   return EFI_SUCCESS;
 }

ArmPkg/Drivers/CpuPei/CpuPei.inf

@@ -3,6 +3,7 @@
 #
 # This module provides platform specific function to detect boot mode.
 # Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2023, Google, LLC. All rights reserved.<BR>
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -28,6 +29,7 @@
   CpuPei.c
 
 [Packages]
+  MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   ArmPkg/ArmPkg.dec
@@ -37,9 +39,11 @@
   DebugLib
   HobLib
   ArmLib
+  ArmMmuLib
 
 [Ppis]
   gArmMpCoreInfoPpiGuid
+  gEdkiiMemoryAttributePpiGuid
 
 [Guids]
   gArmMpCoreInfoGuid

ArmPkg/Drivers/MmCommunicationPei/MmCommunicationPei.c

@@ -0,0 +1,221 @@
+/** @file -- MmCommunicationPei.c
+  Provides an interface to send MM request in PEI
+
+  Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>
+  Copyright (c) Microsoft Corporation.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <PiPei.h>
+#include <IndustryStandard/ArmStdSmc.h>
+
+#include <Protocol/MmCommunication.h>
+#include <Ppi/MmCommunication.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/ArmSmcLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
+
+/**
+  MmCommunicationPeim
+  Communicates with a registered handler.
+  This function provides a service to send and receive messages from a registered UEFI service during PEI.
+
+  @param[in]      This            The EFI_PEI_MM_COMMUNICATION_PPI instance.
+  @param[in, out] CommBuffer      Pointer to the data buffer
+  @param[in, out] CommSize        The size of the data buffer being passed in. On exit, the
+                                  size of data being returned. Zero if the handler does not
+                                  wish to reply with any data.
+
+  @retval EFI_SUCCESS             The message was successfully posted.
+  @retval EFI_INVALID_PARAMETER   CommBuffer or CommSize was NULL, or *CommSize does not
+                                  match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER).
+  @retval EFI_BAD_BUFFER_SIZE     The buffer is too large for the MM implementation.
+                                  If this error is returned, the MessageLength field
+                                  in the CommBuffer header or the integer pointed by
+                                  CommSize, are updated to reflect the maximum payload
+                                  size the implementation can accommodate.
+  @retval EFI_ACCESS_DENIED       The CommunicateBuffer parameter or CommSize parameter,
+                                  if not omitted, are in address range that cannot be
+                                  accessed by the MM environment.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+MmCommunicationPeim (
+  IN CONST EFI_PEI_MM_COMMUNICATION_PPI  *This,
+  IN OUT VOID                            *CommBuffer,
+  IN OUT UINTN                           *CommSize
+  )
+{
+  EFI_MM_COMMUNICATE_HEADER  *CommunicateHeader;
+  EFI_MM_COMMUNICATE_HEADER  *TempCommHeader;
+  ARM_SMC_ARGS               CommunicateSmcArgs;
+  EFI_STATUS                 Status;
+  UINTN                      BufferSize;
+
+  ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
+
+  // Check that our static buffer is looking good.
+  // We are using PcdMmBufferBase to transfer variable data.
+  // We are not using the full size of the buffer since there is a cost
+  // of copying data between Normal and Secure World.
+  if ((PcdGet64 (PcdMmBufferBase) == 0) || (PcdGet64 (PcdMmBufferSize) == 0)) {
+    ASSERT (PcdGet64 (PcdMmBufferSize) > 0);
+    ASSERT (PcdGet64 (PcdMmBufferBase) != 0);
+    return EFI_UNSUPPORTED;
+  }
+
+  //
+  // Check parameters
+  //
+  if ((CommBuffer == NULL) || (CommSize == NULL)) {
+    ASSERT (CommBuffer != NULL);
+    ASSERT (CommSize != NULL);
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // If the length of the CommBuffer is 0 then return the expected length.
+  // This case can be used by the consumer of this driver to find out the
+  // max size that can be used for allocating CommBuffer.
+  if ((*CommSize == 0) || (*CommSize > (UINTN)PcdGet64 (PcdMmBufferSize))) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a Invalid CommSize value 0x%llx!\n",
+      __func__,
+      *CommSize
+      ));
+    *CommSize = (UINTN)PcdGet64 (PcdMmBufferSize);
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // Given CommBuffer is not NULL here, we use it to test the legitimacy of CommSize.
+  TempCommHeader = (EFI_MM_COMMUNICATE_HEADER *)(UINTN)CommBuffer;
+
+  // CommBuffer is a mandatory parameter. Hence, Rely on
+  // MessageLength + Header to ascertain the
+  // total size of the communication payload rather than
+  // rely on optional CommSize parameter
+  BufferSize = TempCommHeader->MessageLength +
+               sizeof (TempCommHeader->HeaderGuid) +
+               sizeof (TempCommHeader->MessageLength);
+
+  //
+  // If CommSize is supplied it must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
+  //
+  if (*CommSize != BufferSize) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a Unexpected CommSize value, has: 0x%llx vs. expected: 0x%llx!\n",
+      __func__,
+      *CommSize,
+      BufferSize
+      ));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Now we know that the size is something we can handle, copy it over to the designated comm buffer.
+  CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)(UINTN)(PcdGet64 (PcdMmBufferBase));
+
+  CopyMem (CommunicateHeader, CommBuffer, *CommSize);
+
+  // SMC Function ID
+  CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
+
+  // Cookie
+  CommunicateSmcArgs.Arg1 = 0;
+
+  // comm_buffer_address (64-bit physical address)
+  CommunicateSmcArgs.Arg2 = (UINTN)CommunicateHeader;
+
+  // comm_size_address (not used, indicated by setting to zero)
+  CommunicateSmcArgs.Arg3 = 0;
+
+  // Call the Standalone MM environment.
+  ArmCallSmc (&CommunicateSmcArgs);
+
+  switch (CommunicateSmcArgs.Arg0) {
+    case ARM_SMC_MM_RET_SUCCESS:
+      // On successful return, the size of data being returned is inferred from
+      // MessageLength + Header.
+      BufferSize = CommunicateHeader->MessageLength +
+                   sizeof (CommunicateHeader->HeaderGuid) +
+                   sizeof (CommunicateHeader->MessageLength);
+      if (BufferSize > (UINTN)PcdGet64 (PcdMmBufferSize)) {
+        // Something bad has happened, we should have landed in ARM_SMC_MM_RET_NO_MEMORY
+        DEBUG ((
+          DEBUG_ERROR,
+          "%a Returned buffer exceeds communication buffer limit. Has: 0x%llx vs. max: 0x%llx!\n",
+          __func__,
+          BufferSize,
+          (UINTN)PcdGet64 (PcdMmBufferSize)
+          ));
+        Status = EFI_BAD_BUFFER_SIZE;
+        break;
+      }
+
+      CopyMem (CommBuffer, CommunicateHeader, BufferSize);
+      *CommSize = BufferSize;
+      Status    = EFI_SUCCESS;
+      break;
+
+    case ARM_SMC_MM_RET_INVALID_PARAMS:
+      Status = EFI_INVALID_PARAMETER;
+      break;
+
+    case ARM_SMC_MM_RET_DENIED:
+      Status = EFI_ACCESS_DENIED;
+      break;
+
+    case ARM_SMC_MM_RET_NO_MEMORY:
+      // Unexpected error since the CommSize was checked for zero length
+      // prior to issuing the SMC
+      Status = EFI_OUT_OF_RESOURCES;
+      ASSERT (0);
+      break;
+
+    default:
+      Status = EFI_ACCESS_DENIED;
+      ASSERT (0);
+      break;
+  }
+
+  return Status;
+}
+
+//
+// Module globals for the MM Communication PPI
+//
+STATIC CONST EFI_PEI_MM_COMMUNICATION_PPI  mPeiMmCommunication = {
+  MmCommunicationPeim
+};
+
+STATIC CONST EFI_PEI_PPI_DESCRIPTOR  mPeiMmCommunicationPpi = {
+  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+  &gEfiPeiMmCommunicationPpiGuid,
+  (VOID *)&mPeiMmCommunication
+};
+
+/**
+  Entry point of PEI MM Communication driver
+
+  @param  FileHandle   Handle of the file being invoked.
+                       Type EFI_PEI_FILE_HANDLE is defined in FfsFindNextFile().
+  @param  PeiServices  General purpose services available to every PEIM.
+
+  @retval EFI_SUCCESS  If the interface could be successfully installed
+  @retval Others       Returned from PeiServicesInstallPpi()
+**/
+EFI_STATUS
+EFIAPI
+MmCommunicationPeiInitialize (
+  IN       EFI_PEI_FILE_HANDLE  FileHandle,
+  IN CONST EFI_PEI_SERVICES     **PeiServices
+  )
+{
+  return PeiServicesInstallPpi (&mPeiMmCommunicationPpi);
+}

ArmPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf

@@ -0,0 +1,40 @@
+## @file -- MmCommunicationPei.inf
+#  PEI MM Communicate driver
+#
+#  Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.<BR>
+#  Copyright (c) Microsoft Corporation.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001B
+  BASE_NAME                      = MmCommunicationPei
+  FILE_GUID                      = 58FFB346-1B75-42C7-AD69-37C652423C1A
+  MODULE_TYPE                    = PEIM
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = MmCommunicationPeiInitialize
+
+[Sources]
+  MmCommunicationPei.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  ArmSmcLib
+  PeimEntryPoint
+  PeiServicesLib
+  HobLib
+
+[Pcd]
+  gArmTokenSpaceGuid.PcdMmBufferBase
+  gArmTokenSpaceGuid.PcdMmBufferSize
+
+[Ppis]
+  gEfiPeiMmCommunicationPpiGuid     ## PRODUCES
+
+[Depex]
+  TRUE

ArmPkg/Include/IndustryStandard/ArmStdSmc.h

@@ -244,4 +244,13 @@
 #define TRNG_STATUS_INVALID_PARAMETER  (INT32)(-2)
 #define TRNG_STATUS_NO_ENTROPY         (INT32)(-3)
 
+/*
+ *  SMC64 SiP Service Calls
+ */
+
+#define SMC_FASTCALL      0x80000000
+#define SMC64_FUNCTION    (SMC_FASTCALL     | 0x40000000)
+#define SMC_SIP_FUNCTION  (SMC64_FUNCTION   | 0x02000000)
+#define SMC_SIP_FUNCTION_ID(n)  (SMC_SIP_FUNCTION | (n))
+
 #endif // ARM_STD_SMC_H_

ArmPkg/Include/Library/ArmGicLib.h

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.<BR>
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -110,10 +110,10 @@
 // Bit Mask for
 #define ARM_GIC_ICCIAR_ACKINTID  0x3FF
 
-UINTN
+UINT32
 EFIAPI
 ArmGicGetInterfaceIdentification (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 // GIC Secure interfaces
@@ -121,8 +121,8 @@ VOID
 EFIAPI
 ArmGicSetupNonSecure (
   IN  UINTN  MpId,
-  IN  INTN   GicDistributorBase,
-  IN  INTN   GicInterruptInterfaceBase
+  IN  UINTN  GicDistributorBase,
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 VOID
@@ -136,40 +136,40 @@ ArmGicSetSecureInterrupts (
 VOID
 EFIAPI
 ArmGicEnableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 VOID
 EFIAPI
 ArmGicDisableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 VOID
 EFIAPI
 ArmGicEnableDistributor (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   );
 
 VOID
 EFIAPI
 ArmGicDisableDistributor (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   );
 
 UINTN
 EFIAPI
 ArmGicGetMaxNumInterrupts (
-  IN  INTN  GicDistributorBase
+  IN  UINTN  GicDistributorBase
   );
 
 VOID
 EFIAPI
 ArmGicSendSgiTo (
-  IN  INTN  GicDistributorBase,
-  IN  INTN  TargetListFilter,
-  IN  INTN  CPUTargetList,
-  IN  INTN  SgiId
+  IN  UINTN  GicDistributorBase,
+  IN  UINT8  TargetListFilter,
+  IN  UINT8  CPUTargetList,
+  IN  UINT8  SgiId
   );
 
 /*
@@ -203,8 +203,8 @@ ArmGicEndOfInterrupt (
 UINTN
 EFIAPI
 ArmGicSetPriorityMask (
-  IN  INTN  GicInterruptInterfaceBase,
-  IN  INTN  PriorityMask
+  IN  UINTN  GicInterruptInterfaceBase,
+  IN  INTN   PriorityMask
   );
 
 VOID
@@ -251,20 +251,20 @@ VOID
 EFIAPI
 ArmGicV2SetupNonSecure (
   IN  UINTN  MpId,
-  IN  INTN   GicDistributorBase,
-  IN  INTN   GicInterruptInterfaceBase
+  IN  UINTN  GicDistributorBase,
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 VOID
 EFIAPI
 ArmGicV2EnableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 VOID
 EFIAPI
 ArmGicV2DisableInterruptInterface (
-  IN  INTN  GicInterruptInterfaceBase
+  IN  UINTN  GicInterruptInterfaceBase
   );
 
 UINTN

ArmPkg/Include/Library/ArmMmuLib.h

@@ -21,68 +21,6 @@ ArmConfigureMmu (
   OUT UINTN                         *TranslationTableSize  OPTIONAL
   );
 
-/**
-  Convert a region of memory to read-protected, by clearing the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-EFIAPI
-ArmSetMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
-/**
-  Convert a region of memory to read-enabled, by setting the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-EFIAPI
-ArmClearMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
-EFI_STATUS
-EFIAPI
-ArmSetMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
-EFI_STATUS
-EFIAPI
-ArmClearMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
-EFI_STATUS
-EFIAPI
-ArmSetMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
-EFI_STATUS
-EFIAPI
-ArmClearMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  );
-
 VOID
 EFIAPI
 ArmReplaceLiveTranslationEntry (
@@ -92,11 +30,45 @@ ArmReplaceLiveTranslationEntry (
   IN  BOOLEAN  DisableMmu
   );
 
+/**
+  Set the requested memory permission attributes on a region of memory.
+
+  BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
+
+  If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
+  region is mapped according to this memory type, and additional memory
+  permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
+  discarding any permission attributes that are currently set for the region.
+  AttributeMask is ignored in this case, and must be set to 0x0.
+
+  If Attributes contains only a combination of memory permission attributes
+  (EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
+  memory type, even if it is not uniformly set across the region. In this case,
+  AttributesMask may be set to a mask of permission attributes, and memory
+  permissions omitted from this mask will not be updated for any page in the
+  region. All attributes appearing in Attributes must appear in AttributeMask
+  as well. (Attributes & ~AttributeMask must produce 0x0)
+
+  @param[in]  BaseAddress     The physical address that is the start address of
+                              a memory region.
+  @param[in]  Length          The size in bytes of the memory region.
+  @param[in]  Attributes      Mask of memory attributes to set.
+  @param[in]  AttributeMask   Mask of memory attributes to take into account.
+
+  @retval EFI_SUCCESS           The attributes were set for the memory region.
+  @retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
+                                Invalid combination of Attributes and
+                                AttributeMask.
+  @retval EFI_OUT_OF_RESOURCES  Requested attributes cannot be applied due to
+                                lack of system resources.
+
+**/
 EFI_STATUS
 ArmSetMemoryAttributes (
   IN EFI_PHYSICAL_ADDRESS  BaseAddress,
   IN UINT64                Length,
-  IN UINT64                Attributes
+  IN UINT64                Attributes,
+  IN UINT64                AttributeMask
   );
 
 #endif // ARM_MMU_LIB_H_

ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c

@@ -469,11 +469,45 @@ GcdAttributeToPageAttribute (
   return PageAttributes;
 }
 
+/**
+  Set the requested memory permission attributes on a region of memory.
+
+  BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
+
+  If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
+  region is mapped according to this memory type, and additional memory
+  permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
+  discarding any permission attributes that are currently set for the region.
+  AttributeMask is ignored in this case, and must be set to 0x0.
+
+  If Attributes contains only a combination of memory permission attributes
+  (EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
+  memory type, even if it is not uniformly set across the region. In this case,
+  AttributesMask may be set to a mask of permission attributes, and memory
+  permissions omitted from this mask will not be updated for any page in the
+  region. All attributes appearing in Attributes must appear in AttributeMask
+  as well. (Attributes & ~AttributeMask must produce 0x0)
+
+  @param[in]  BaseAddress     The physical address that is the start address of
+                              a memory region.
+  @param[in]  Length          The size in bytes of the memory region.
+  @param[in]  Attributes      Mask of memory attributes to set.
+  @param[in]  AttributeMask   Mask of memory attributes to take into account.
+
+  @retval EFI_SUCCESS           The attributes were set for the memory region.
+  @retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
+                                Invalid combination of Attributes and
+                                AttributeMask.
+  @retval EFI_OUT_OF_RESOURCES  Requested attributes cannot be applied due to
+                                lack of system resources.
+
+**/
 EFI_STATUS
 ArmSetMemoryAttributes (
   IN EFI_PHYSICAL_ADDRESS  BaseAddress,
   IN UINT64                Length,
-  IN UINT64                Attributes
+  IN UINT64                Attributes,
+  IN UINT64                AttributeMask
   )
 {
   UINT64  PageAttributes;
@@ -490,6 +524,22 @@ ArmSetMemoryAttributes (
     PageAttributes   &= TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK | TT_AF;
     PageAttributeMask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK |
                           TT_PXN_MASK | TT_XN_MASK | TT_AF);
+    if (AttributeMask != 0) {
+      if (((AttributeMask & ~(UINT64)(EFI_MEMORY_RP|EFI_MEMORY_RO|EFI_MEMORY_XP)) != 0) ||
+          ((Attributes & ~AttributeMask) != 0))
+      {
+        return EFI_INVALID_PARAMETER;
+      }
+
+      // Add attributes omitted from AttributeMask to the set of attributes to preserve
+      PageAttributeMask |= GcdAttributeToPageAttribute (~AttributeMask) &
+                           (TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK | TT_AF);
+    }
+  } else {
+    ASSERT (AttributeMask == 0);
+    if (AttributeMask != 0) {
+      return EFI_INVALID_PARAMETER;
+    }
   }
 
   return UpdateRegionMapping (
@@ -502,142 +552,6 @@ ArmSetMemoryAttributes (
            );
 }
 
-STATIC
-EFI_STATUS
-SetMemoryRegionAttribute (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length,
-  IN  UINT64                Attributes,
-  IN  UINT64                BlockEntryMask
-  )
-{
-  return UpdateRegionMapping (
-           BaseAddress,
-           Length,
-           Attributes,
-           BlockEntryMask,
-           ArmGetTTBR0BaseAddress (),
-           TRUE
-           );
-}
-
-EFI_STATUS
-ArmSetMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  UINT64  Val;
-
-  if (ArmReadCurrentEL () == AARCH64_EL1) {
-    Val = TT_PXN_MASK | TT_UXN_MASK;
-  } else {
-    Val = TT_XN_MASK;
-  }
-
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           Val,
-           ~TT_ADDRESS_MASK_BLOCK_ENTRY
-           );
-}
-
-EFI_STATUS
-ArmClearMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  UINT64  Mask;
-
-  // XN maps to UXN in the EL1&0 translation regime
-  Mask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_PXN_MASK | TT_XN_MASK);
-
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           0,
-           Mask
-           );
-}
-
-/**
-  Convert a region of memory to read-protected, by clearing the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-ArmSetMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           0,
-           ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AF)
-           );
-}
-
-/**
-  Convert a region of memory to read-enabled, by setting the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-ArmClearMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           TT_AF,
-           ~TT_ADDRESS_MASK_BLOCK_ENTRY
-           );
-}
-
-EFI_STATUS
-ArmSetMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           TT_AP_NO_RO,
-           ~TT_ADDRESS_MASK_BLOCK_ENTRY
-           );
-}
-
-EFI_STATUS
-ArmClearMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryRegionAttribute (
-           BaseAddress,
-           Length,
-           TT_AP_NO_RW,
-           ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)
-           );
-}
-
 EFI_STATUS
 EFIAPI
 ArmConfigureMmu (

ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c

@@ -10,6 +10,7 @@
 #include <Uefi.h>
 
 #include <Library/ArmLib.h>
+#include <Library/ArmMmuLib.h>
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
 #include <Library/DebugLib.h>
@@ -451,134 +452,95 @@ SetMemoryAttributes (
 }
 
 /**
-  Update the permission or memory type attributes on a range of memory.
+  Set the requested memory permission attributes on a region of memory.
 
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-  @param  Attributes            A mask of EFI_MEMORY_xx constants.
+  BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
 
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
+  If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
+  region is mapped according to this memory type, and additional memory
+  permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
+  discarding any permission attributes that are currently set for the region.
+  AttributeMask is ignored in this case, and must be set to 0x0.
+
+  If Attributes contains only a combination of memory permission attributes
+  (EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
+  memory type, even if it is not uniformly set across the region. In this case,
+  AttributesMask may be set to a mask of permission attributes, and memory
+  permissions omitted from this mask will not be updated for any page in the
+  region. All attributes appearing in Attributes must appear in AttributeMask
+  as well. (Attributes & ~AttributeMask must produce 0x0)
+
+  @param[in]  BaseAddress     The physical address that is the start address of
+                              a memory region.
+  @param[in]  Length          The size in bytes of the memory region.
+  @param[in]  Attributes      Mask of memory attributes to set.
+  @param[in]  AttributeMask   Mask of memory attributes to take into account.
+
+  @retval EFI_SUCCESS           The attributes were set for the memory region.
+  @retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
+                                Invalid combination of Attributes and
+                                AttributeMask.
+  @retval EFI_OUT_OF_RESOURCES  Requested attributes cannot be applied due to
+                                lack of system resources.
 
 **/
 EFI_STATUS
 ArmSetMemoryAttributes (
   IN EFI_PHYSICAL_ADDRESS  BaseAddress,
   IN UINT64                Length,
-  IN UINT64                Attributes
+  IN UINT64                Attributes,
+  IN UINT64                AttributeMask
   )
 {
+  UINT32  TtEntryMask;
+
+  if (((BaseAddress | Length) & EFI_PAGE_MASK) != 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if ((Attributes & EFI_MEMORY_CACHETYPE_MASK) == 0) {
+    //
+    // No memory type was set in Attributes, so we are going to update the
+    // permissions only.
+    //
+    if (AttributeMask != 0) {
+      if (((AttributeMask & ~(UINT64)(EFI_MEMORY_RP|EFI_MEMORY_RO|EFI_MEMORY_XP)) != 0) ||
+          ((Attributes & ~AttributeMask) != 0))
+      {
+        return EFI_INVALID_PARAMETER;
+      }
+    } else {
+      AttributeMask = EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP;
+    }
+
+    TtEntryMask = 0;
+    if ((AttributeMask & EFI_MEMORY_RP) != 0) {
+      TtEntryMask |= TT_DESCRIPTOR_SECTION_AF;
+    }
+
+    if ((AttributeMask & EFI_MEMORY_RO) != 0) {
+      TtEntryMask |= TT_DESCRIPTOR_SECTION_AP_MASK;
+    }
+
+    if ((AttributeMask & EFI_MEMORY_XP) != 0) {
+      TtEntryMask |= TT_DESCRIPTOR_SECTION_XN_MASK;
+    }
+  } else {
+    ASSERT (AttributeMask == 0);
+    if (AttributeMask != 0) {
+      return EFI_INVALID_PARAMETER;
+    }
+
+    TtEntryMask = TT_DESCRIPTOR_SECTION_TYPE_MASK |
+                  TT_DESCRIPTOR_SECTION_XN_MASK |
+                  TT_DESCRIPTOR_SECTION_AP_MASK |
+                  TT_DESCRIPTOR_SECTION_AF;
+  }
+
   return SetMemoryAttributes (
            BaseAddress,
            Length,
            Attributes,
-           TT_DESCRIPTOR_SECTION_TYPE_MASK |
-           TT_DESCRIPTOR_SECTION_XN_MASK |
-           TT_DESCRIPTOR_SECTION_AP_MASK |
-           TT_DESCRIPTOR_SECTION_AF
-           );
-}
-
-EFI_STATUS
-ArmSetMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           EFI_MEMORY_XP,
-           TT_DESCRIPTOR_SECTION_XN_MASK
-           );
-}
-
-EFI_STATUS
-ArmClearMemoryRegionNoExec (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           0,
-           TT_DESCRIPTOR_SECTION_XN_MASK
-           );
-}
-
-EFI_STATUS
-ArmSetMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           EFI_MEMORY_RO,
-           TT_DESCRIPTOR_SECTION_AP_MASK
-           );
-}
-
-EFI_STATUS
-ArmClearMemoryRegionReadOnly (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           0,
-           TT_DESCRIPTOR_SECTION_AP_MASK
-           );
-}
-
-/**
-  Convert a region of memory to read-protected, by clearing the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-ArmSetMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           EFI_MEMORY_RP,
-           TT_DESCRIPTOR_SECTION_AF
-           );
-}
-
-/**
-  Convert a region of memory to read-enabled, by setting the access flag.
-
-  @param  BaseAddress           The start of the region.
-  @param  Length                The size of the region.
-
-  @retval EFI_SUCCESS           The attributes were set successfully.
-  @retval EFI_OUT_OF_RESOURCES  The operation failed due to insufficient memory.
-
-**/
-EFI_STATUS
-ArmClearMemoryRegionNoAccess (
-  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
-  IN  UINT64                Length
-  )
-{
-  return SetMemoryAttributes (
-           BaseAddress,
-           Length,
-           0,
-           TT_DESCRIPTOR_SECTION_AF
+           TtEntryMask
            );
 }

ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c

@@ -22,6 +22,12 @@
 #include <Protocol/DebugSupport.h>
 #include <Protocol/LoadedImage.h>
 
+//
+// Maximum number of characters to print to serial (UINT8s) and to console if
+// available (as UINT16s)
+//
+#define MAX_PRINT_CHARS  100
+
 STATIC CHAR8  *gExceptionTypeString[] = {
   "Synchronous",
   "IRQ",
@@ -188,18 +194,14 @@ DefaultExceptionHandler (
   IN OUT EFI_SYSTEM_CONTEXT  SystemContext
   )
 {
-  CHAR8  Buffer[100];
-  UINTN  CharCount;
-  INT32  Offset;
+  CHAR8   Buffer[MAX_PRINT_CHARS];
+  CHAR16  UnicodeBuffer[MAX_PRINT_CHARS];
+  UINTN   CharCount;
+  INT32   Offset;
 
   if (mRecursiveException) {
     STATIC CHAR8 CONST  Message[] = "\nRecursive exception occurred while dumping the CPU state\n";
-
     SerialPortWrite ((UINT8 *)Message, sizeof Message - 1);
-    if (gST->ConOut != NULL) {
-      AsciiPrint (Message);
-    }
-
     CpuDeadLoop ();
   }
 
@@ -207,9 +209,10 @@ DefaultExceptionHandler (
 
   CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
   SerialPortWrite ((UINT8 *)Buffer, CharCount);
-  if (gST->ConOut != NULL) {
-    AsciiPrint (Buffer);
-  }
+
+  // Prepare a unicode buffer for ConOut, if applicable, in case the buffer
+  // gets reused.
+  UnicodeSPrintAsciiFormat (UnicodeBuffer, MAX_PRINT_CHARS, Buffer);
 
   DEBUG_CODE_BEGIN ();
   CHAR8   *Pdb, *PrevPdb;
@@ -330,6 +333,13 @@ DefaultExceptionHandler (
       ));
   }
 
+  // Attempt to print that we had a synchronous exception to ConOut.  We do
+  // this after the serial logging as ConOut's logging is more complex and we
+  // aren't guaranteed to succeed.
+  if (gST->ConOut != NULL) {
+    gST->ConOut->OutputString (gST->ConOut, UnicodeBuffer);
+  }
+
   ASSERT (FALSE);
   CpuDeadLoop ();
 }

ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c

@@ -23,6 +23,12 @@
 #include <Protocol/DebugSupport.h>
 #include <Library/DefaultExceptionHandlerLib.h>
 
+//
+// Maximum number of characters to print to serial (UINT8s) and to console if
+// available (as UINT16s)
+//
+#define MAX_PRINT_CHARS  100
+
 //
 // The number of elements in a CHAR8 array, including the terminating NUL, that
 // is meant to hold the string rendering of the CPSR.
@@ -198,7 +204,8 @@ DefaultExceptionHandler (
   IN OUT EFI_SYSTEM_CONTEXT  SystemContext
   )
 {
-  CHAR8    Buffer[100];
+  CHAR8    Buffer[MAX_PRINT_CHARS];
+  CHAR16   UnicodeBuffer[MAX_PRINT_CHARS];
   UINTN    CharCount;
   UINT32   DfsrStatus;
   UINT32   IfsrStatus;
@@ -216,9 +223,10 @@ DefaultExceptionHandler (
                 SystemContext.SystemContextArm->CPSR
                 );
   SerialPortWrite ((UINT8 *)Buffer, CharCount);
-  if (gST->ConOut != NULL) {
-    AsciiPrint (Buffer);
-  }
+
+  // Prepare a unicode buffer for ConOut, if applicable, as Buffer is used
+  // below.
+  UnicodeSPrintAsciiFormat (UnicodeBuffer, MAX_PRINT_CHARS, Buffer);
 
   DEBUG_CODE_BEGIN ();
   CHAR8   *Pdb;
@@ -289,6 +297,14 @@ DefaultExceptionHandler (
   }
 
   DEBUG ((DEBUG_ERROR, "\n"));
+
+  // Attempt to print that we had a synchronous exception to ConOut.  We do
+  // this after the serial logging as ConOut's logging is more complex and we
+  // aren't guaranteed to succeed.
+  if (gST->ConOut != NULL) {
+    gST->ConOut->OutputString (gST->ConOut, UnicodeBuffer);
+  }
+
   ASSERT (FALSE);
 
   CpuDeadLoop ();   // may return if executing under a debugger

ArmPkg/Library/OpteeLib/Optee.c

@@ -86,7 +86,12 @@ OpteeSharedMemoryRemap (
     return EFI_BUFFER_TOO_SMALL;
   }
 
-  Status = ArmSetMemoryAttributes (PhysicalAddress, Size, EFI_MEMORY_WB);
+  Status = ArmSetMemoryAttributes (
+             PhysicalAddress,
+             Size,
+             EFI_MEMORY_WB | EFI_MEMORY_XP,
+             0
+             );
   if (EFI_ERROR (Status)) {
     return Status;
   }

ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf

@@ -57,7 +57,6 @@
 
 [FixedPcd]
   gArmTokenSpaceGuid.PcdUefiShellDefaultBootEnable
-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
@@ -68,6 +67,7 @@
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
 
 [Guids]
   gBootDiscoveryPolicyMgrFormsetGuid

ArmVirtPkg/ArmVirtKvmTool.dsc

@@ -1,7 +1,7 @@
 #  @file
 #  Workspace file for KVMTool virtual platform.
 #
-#  Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -219,6 +219,10 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x40000
 
+  # Define PCD for emulating Runtime Variable storage when
+  # CFI flash is absent.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|FALSE
+
   ## RTC Register address in MMIO space.
   gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0
   gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0
@@ -307,7 +311,10 @@
   #
   # Platform Driver
   #
-  ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
+  ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf {
+    <LibraryClasses>
+    NULL|ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtoolLib.inf
+  }
   OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf
   EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf
   OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf

ArmVirtPkg/ArmVirtQemu.dsc

@@ -111,6 +111,7 @@
   ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
+  AcpiPlatformLib|OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf
   ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
 
 !if $(TPM2_ENABLE) == TRUE
@@ -448,6 +449,7 @@
   OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
   OvmfPkg/VirtioNetDxe/VirtioNet.inf
   OvmfPkg/VirtioRngDxe/VirtioRng.inf
+  OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
 
   #
   # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs

ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc

@@ -98,6 +98,7 @@ READ_LOCK_STATUS   = TRUE
   INF OvmfPkg/VirtioNetDxe/VirtioNet.inf
   INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
   INF OvmfPkg/VirtioRngDxe/VirtioRng.inf
+  INF OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
 
   INF ShellPkg/Application/Shell/Shell.inf
   INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf

ArmVirtPkg/ArmVirtQemuKernel.dsc

@@ -83,6 +83,7 @@
   TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
+  AcpiPlatformLib|OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf
   ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
 
 [LibraryClasses.common.UEFI_DRIVER]
@@ -353,6 +354,7 @@
   OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
   OvmfPkg/VirtioNetDxe/VirtioNet.inf
   OvmfPkg/VirtioRngDxe/VirtioRng.inf
+  OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
 
   #
   # FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs

ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.c

@@ -4,7 +4,7 @@
   - It decides if the firmware should expose ACPI or Device Tree-based
     hardware description to the operating system.
 
-  Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+  Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -75,6 +75,17 @@ KvmtoolPlatformDxeEntryPoint (
 {
   EFI_STATUS  Status;
 
+  if (PcdGetBool (PcdEmuVariableNvModeEnable)) {
+    // The driver implementing the variable service can now be dispatched.
+    Status = gBS->InstallProtocolInterface (
+                    &gImageHandle,
+                    &gEdkiiNvVarStoreFormattedGuid,
+                    EFI_NATIVE_INTERFACE,
+                    NULL
+                    );
+    ASSERT_EFI_ERROR (Status);
+  }
+
   Status = PlatformHasAcpiDt (ImageHandle);
   ASSERT_EFI_ERROR (Status);
 

ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf

@@ -3,7 +3,7 @@
 #  - It decides if the firmware should expose ACPI or Device Tree-based
 #    hardware description to the operating system.
 #
-#  Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -33,10 +33,12 @@
   UefiDriverEntryPoint
 
 [Guids]
+  gEdkiiNvVarStoreFormattedGuid   ## SOMETIMES_PRODUCES ## PROTOCOL
   gEdkiiPlatformHasAcpiGuid       ## SOMETIMES_PRODUCES ## PROTOCOL
   gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
 
 [Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
   gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
 
 [Depex]

ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtool.c

@@ -1,7 +1,7 @@
 /** @file
    An instance of the NorFlashPlatformLib for Kvmtool platform.
 
- Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved.<BR>
 
  SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -228,7 +228,7 @@ NorFlashPlatformLibConstructor (
   CONST CHAR8   *Label;
   UINT32        LabelLen;
 
-  if (mNorFlashDeviceCount != 0) {
+  if ((mNorFlashDeviceCount != 0) || PcdGetBool (PcdEmuVariableNvModeEnable)) {
     return EFI_SUCCESS;
   }
 
@@ -337,9 +337,39 @@ NorFlashPlatformLibConstructor (
     }
 
     if (mNorFlashDevices[UefiVarStoreIndex].DeviceBaseAddress != 0) {
-      return SetupVariableStore (&mNorFlashDevices[UefiVarStoreIndex]);
+      Status = SetupVariableStore (&mNorFlashDevices[UefiVarStoreIndex]);
+      if (EFI_ERROR (Status)) {
+        DEBUG ((
+          DEBUG_ERROR,
+          "ERROR: Failed to setup variable store, Status = %r\n",
+          Status
+          ));
+        ASSERT (0);
+      }
+    } else {
+      DEBUG ((
+        DEBUG_ERROR,
+        "ERROR: Invalid Flash device Base address\n"
+        ));
+      ASSERT (0);
+      Status = EFI_NOT_FOUND;
+    }
+  } else {
+    // No Flash device found fallback to Runtime Variable Emulation.
+    DEBUG ((
+      DEBUG_INFO,
+      "INFO: No Flash device found fallback to Runtime Variable Emulation.\n"
+      ));
+    Status = PcdSetBoolS (PcdEmuVariableNvModeEnable, TRUE);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "ERROR: Failed to set PcdEmuVariableNvModeEnable, Status = %r\n",
+        Status
+        ));
+      ASSERT (0);
     }
   }
 
-  return EFI_NOT_FOUND;
+  return Status;
 }

ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtoolLib.inf

@@ -1,7 +1,7 @@
 ## @file
 #  Nor Flash library for Kvmtool.
 #
-#  Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
+#  Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved.<BR>
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -39,6 +39,7 @@
   gArmTokenSpaceGuid.PcdFvBaseAddress
   gArmTokenSpaceGuid.PcdFvSize
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase

ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c

@@ -269,15 +269,16 @@ IsPciDisplay (
 }
 
 /**
-  This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
-  the VIRTIO_DEVICE_PROTOCOL level.
+  This function checks if a handle corresponds to the Virtio Device ID given
+  at the VIRTIO_DEVICE_PROTOCOL level.
 **/
 STATIC
 BOOLEAN
 EFIAPI
-IsVirtioRng (
+IsVirtio (
   IN EFI_HANDLE    Handle,
-  IN CONST CHAR16  *ReportText
+  IN CONST CHAR16  *ReportText,
+  IN UINT16        VirtIoDeviceId
   )
 {
   EFI_STATUS              Status;
@@ -293,20 +294,51 @@ IsVirtioRng (
   }
 
   return (BOOLEAN)(VirtIo->SubSystemDeviceId ==
-                   VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
+                   VirtIoDeviceId);
 }
 
 /**
   This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
-  the EFI_PCI_IO_PROTOCOL level.
+  the VIRTIO_DEVICE_PROTOCOL level.
 **/
 STATIC
 BOOLEAN
 EFIAPI
-IsVirtioPciRng (
+IsVirtioRng (
   IN EFI_HANDLE    Handle,
   IN CONST CHAR16  *ReportText
   )
+{
+  return IsVirtio (Handle, ReportText, VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
+}
+
+/**
+  This FILTER_FUNCTION checks if a handle corresponds to a Virtio serial device at
+  the VIRTIO_DEVICE_PROTOCOL level.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsVirtioSerial (
+  IN EFI_HANDLE    Handle,
+  IN CONST CHAR16  *ReportText
+  )
+{
+  return IsVirtio (Handle, ReportText, VIRTIO_SUBSYSTEM_CONSOLE);
+}
+
+/**
+  This function checks if a handle corresponds to the Virtio Device ID given
+  at the EFI_PCI_IO_PROTOCOL level.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsVirtioPci (
+  IN EFI_HANDLE    Handle,
+  IN CONST CHAR16  *ReportText,
+  IN UINT16        VirtIoDeviceId
+  )
 {
   EFI_STATUS           Status;
   EFI_PCI_IO_PROTOCOL  *PciIo;
@@ -371,11 +403,11 @@ IsVirtioPciRng (
   //
   // From DeviceId and RevisionId, determine whether the device is a
   // modern-only Virtio 1.0 device. In case of Virtio 1.0, DeviceId can
-  // immediately be restricted to VIRTIO_SUBSYSTEM_ENTROPY_SOURCE, and
+  // immediately be restricted to VirtIoDeviceId, and
   // SubsystemId will only play a sanity-check role. Otherwise, DeviceId can
   // only be sanity-checked, and SubsystemId will decide.
   //
-  if ((DeviceId == 0x1040 + VIRTIO_SUBSYSTEM_ENTROPY_SOURCE) &&
+  if ((DeviceId == 0x1040 + VirtIoDeviceId) &&
       (RevisionId >= 0x01))
   {
     Virtio10 = TRUE;
@@ -403,7 +435,7 @@ IsVirtioPciRng (
     return TRUE;
   }
 
-  if (!Virtio10 && (SubsystemId == VIRTIO_SUBSYSTEM_ENTROPY_SOURCE)) {
+  if (!Virtio10 && (SubsystemId == VirtIoDeviceId)) {
     return TRUE;
   }
 
@@ -414,6 +446,36 @@ PciError:
   return FALSE;
 }
 
+/**
+  This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
+  the EFI_PCI_IO_PROTOCOL level.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsVirtioPciRng (
+  IN EFI_HANDLE    Handle,
+  IN CONST CHAR16  *ReportText
+  )
+{
+  return IsVirtioPci (Handle, ReportText, VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
+}
+
+/**
+  This FILTER_FUNCTION checks if a handle corresponds to a Virtio serial device at
+  the EFI_PCI_IO_PROTOCOL level.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsVirtioPciSerial (
+  IN EFI_HANDLE    Handle,
+  IN CONST CHAR16  *ReportText
+  )
+{
+  return IsVirtioPci (Handle, ReportText, VIRTIO_SUBSYSTEM_CONSOLE);
+}
+
 /**
   This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
   the matching driver to produce all first-level child handles.
@@ -502,6 +564,142 @@ AddOutput (
     ));
 }
 
+/**
+  This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from
+  the handle, appends serial, uart and terminal nodes, finally updates
+  ConIn, ConOut and ErrOut.
+**/
+STATIC
+VOID
+EFIAPI
+SetupVirtioSerial (
+  IN EFI_HANDLE    Handle,
+  IN CONST CHAR16  *ReportText
+  )
+{
+  STATIC CONST ACPI_HID_DEVICE_PATH  SerialNode = {
+    {
+      ACPI_DEVICE_PATH,
+      ACPI_DP,
+      {
+        (UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
+        (UINT8)((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+      },
+    },
+    EISA_PNP_ID (0x0501),
+    0
+  };
+
+  STATIC CONST UART_DEVICE_PATH  UartNode = {
+    {
+      MESSAGING_DEVICE_PATH,
+      MSG_UART_DP,
+      {
+        (UINT8)(sizeof (UART_DEVICE_PATH)),
+        (UINT8)((sizeof (UART_DEVICE_PATH)) >> 8)
+      },
+    },
+    0,
+    115200,
+    8,
+    1,
+    1
+  };
+
+  STATIC CONST VENDOR_DEVICE_PATH  TerminalNode = {
+    {
+      MESSAGING_DEVICE_PATH,
+      MSG_VENDOR_DP,
+      {
+        (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+        (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+      },
+    },
+    DEVICE_PATH_MESSAGING_VT_UTF8
+  };
+
+  EFI_STATUS                Status;
+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath, *OldDevicePath;
+
+  DevicePath = DevicePathFromHandle (Handle);
+
+  if (DevicePath == NULL) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: %s: handle %p: device path not found\n",
+      __func__,
+      ReportText,
+      Handle
+      ));
+    return;
+  }
+
+  DevicePath = AppendDevicePathNode (
+                 DevicePath,
+                 &SerialNode.Header
+                 );
+
+  OldDevicePath = DevicePath;
+  DevicePath    = AppendDevicePathNode (
+                    DevicePath,
+                    &UartNode.Header
+                    );
+  FreePool (OldDevicePath);
+
+  OldDevicePath = DevicePath;
+  DevicePath    = AppendDevicePathNode (
+                    DevicePath,
+                    &TerminalNode.Header
+                    );
+  FreePool (OldDevicePath);
+
+  Status = EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: %s: adding to ConIn: %r\n",
+      __func__,
+      ReportText,
+      Status
+      ));
+    return;
+  }
+
+  Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((
+      DEBUG_ERROR,
+
+      "%a: %s: adding to ConOut: %r\n",
+      __func__,
+      ReportText,
+      Status
+      ));
+    return;
+  }
+
+  Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((
+      DEBUG_ERROR,
+      "%a: %s: adding to ErrOut: %r\n",
+      __func__,
+      ReportText,
+      Status
+      ));
+    return;
+  }
+
+  FreePool (DevicePath);
+
+  DEBUG ((
+    DEBUG_VERBOSE,
+    "%a: %s: added to ConIn, ConOut and ErrOut\n",
+    __func__,
+    ReportText
+    ));
+}
+
 STATIC
 VOID
 PlatformRegisterFvBootOption (
@@ -900,6 +1098,12 @@ PlatformBootManagerBeforeConsole (
   // instances on Virtio PCI RNG devices.
   //
   FilterAndProcess (&gEfiPciIoProtocolGuid, IsVirtioPciRng, Connect);
+
+  //
+  // Register Virtio serial devices as console.
+  //
+  FilterAndProcess (&gVirtioDeviceProtocolGuid, IsVirtioSerial, SetupVirtioSerial);
+  FilterAndProcess (&gEfiPciIoProtocolGuid, IsVirtioPciSerial, SetupVirtioSerial);
 }
 
 /**

ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c

@@ -115,7 +115,7 @@ ArmVirtGetMemoryMap (
   VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress);
   VirtualMemoryTable[2].VirtualBase  = VirtualMemoryTable[2].PhysicalBase;
   VirtualMemoryTable[2].Length       = FixedPcdGet32 (PcdFvSize);
-  VirtualMemoryTable[2].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+  VirtualMemoryTable[2].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO;
 
   // End of Table
   ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));

ArmVirtPkg/PrePi/PrePi.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2023, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -101,7 +101,7 @@ PrePiMain (
   ASSERT_EFI_ERROR (Status);
 
   // Load the DXE Core and transfer control to it
-  Status = LoadDxeCoreFromFv (NULL, 0);
+  Status = LoadDxeCoreFromFv (NULL, SIZE_128KB);
   ASSERT_EFI_ERROR (Status);
 }
 

BaseTools/Conf/tools_def.template

@@ -745,6 +745,7 @@ DEFINE GCC_LOONGARCH64_CC_FLAGS    = DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d -fno-asyn
 DEFINE GCC_ARM_CC_XIPFLAGS         = -mno-unaligned-access
 DEFINE GCC_AARCH64_CC_FLAGS        = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char  -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie -ffixed-x18
 DEFINE GCC_AARCH64_CC_XIPFLAGS     = -mstrict-align -mgeneral-regs-only
+DEFINE GCC_RISCV64_CC_XIPFLAGS     = -mstrict-align -mgeneral-regs-only
 DEFINE GCC_DLINK_FLAGS_COMMON      = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON     = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -858,7 +859,7 @@ DEFINE GCC5_RISCV_OPENSBI_TYPES                   = -DOPENSBI_EXTERNAL_SBI_TYPES
 
 DEFINE GCC5_RISCV64_ARCH                   = rv64gc
 DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC5_RISCV_ALL_DLINK_COMMON) -Wl,--entry,ReferenceAcpiTable -u ReferenceAcpiTable
-DEFINE GCC5_RISCV64_CC_FLAGS               = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
+DEFINE GCC5_RISCV64_CC_FLAGS               = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
 DEFINE GCC5_RISCV64_DLINK_FLAGS            = DEF(GCC5_RISCV_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
 DEFINE GCC5_RISCV64_DLINK2_FLAGS           = DEF(GCC5_RISCV_ALL_DLINK2_FLAGS)
 DEFINE GCC5_RISCV64_ASM_FLAGS              = DEF(GCC5_RISCV_ALL_ASM_FLAGS) -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
@@ -1921,15 +1922,15 @@ NOOPT_CLANGDWARF_IA32_DLINK2_FLAGS     = DEF(CLANGDWARF_IA32_DLINK2_FLAGS) -O0 -
 *_CLANGDWARF_X64_ASLPP_FLAGS          = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_X64_TARGET)
 *_CLANGDWARF_X64_VFRPP_FLAGS          = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_X64_TARGET)
 
-DEBUG_CLANGDWARF_X64_CC_FLAGS         = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -Oz -flto DEF(CLANGDWARF_X64_TARGET) -g
+DEBUG_CLANGDWARF_X64_CC_FLAGS         = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -Oz -flto DEF(CLANGDWARF_X64_TARGET) -g
 DEBUG_CLANGDWARF_X64_DLINK_FLAGS      = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -flto -Wl,-O3 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
 DEBUG_CLANGDWARF_X64_DLINK2_FLAGS     = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O3 -fuse-ld=lld
 
-RELEASE_CLANGDWARF_X64_CC_FLAGS       = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -Oz -flto DEF(CLANGDWARF_X64_TARGET)
+RELEASE_CLANGDWARF_X64_CC_FLAGS       = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -Oz -flto DEF(CLANGDWARF_X64_TARGET)
 RELEASE_CLANGDWARF_X64_DLINK_FLAGS    = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -flto -Wl,-O3 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
 RELEASE_CLANGDWARF_X64_DLINK2_FLAGS   = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O3 -fuse-ld=lld
 
-NOOPT_CLANGDWARF_X64_CC_FLAGS         = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -O0 DEF(CLANGDWARF_X64_TARGET) -g
+NOOPT_CLANGDWARF_X64_CC_FLAGS         = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -O0 DEF(CLANGDWARF_X64_TARGET) -g
 NOOPT_CLANGDWARF_X64_DLINK_FLAGS      = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -Wl,-O0 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
 NOOPT_CLANGDWARF_X64_DLINK2_FLAGS     = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O0 -fuse-ld=lld
 
@@ -2023,6 +2024,58 @@ DEFINE CLANGDWARF_AARCH64_DLINK_FLAGS  = DEF(CLANGDWARF_AARCH64_TARGET) DEF(GCC_
 RELEASE_CLANGDWARF_AARCH64_CC_FLAGS    = DEF(CLANGDWARF_AARCH64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
 RELEASE_CLANGDWARF_AARCH64_DLINK_FLAGS = DEF(CLANGDWARF_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wl,--no-pie,--no-relax
 
+##################
+# CLANGDWARF RISCV64 definitions
+##################
+DEFINE CLANGDWARF_RISCV64_TARGET    = -target riscv64-linux-gnu
+DEFINE CLANGDWARF_RISCV64_CC_COMMON = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
+DEFINE CLANGDWARF_RISCV64_CC_FLAGS  = DEF(CLANGDWARF_RISCV64_CC_COMMON) DEF(CLANGDWARF_RISCV64_TARGET) DEF(CLANGDWARF_WARNING_OVERRIDES)
+
+# This is similar to GCC flags but without -n
+DEFINE CLANGDWARF_RISCV64_ALL_DLINK_COMMON  = -nostdlib -Wl,-q,--gc-sections -z common-page-size=0x40
+DEFINE CLANGDWARF_RISCV64_ALL_DLINK_FLAGS   = DEF(CLANGDWARF_RISCV64_ALL_DLINK_COMMON) -Wl,--entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Wl,-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE CLANGDWARF_RISCV64_DLINK_FLAGS       = DEF(CLANGDWARF_RISCV64_TARGET) DEF(CLANGDWARF_RISCV64_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
+
+*_CLANGDWARF_RISCV64_PP_FLAGS       = DEF(GCC_PP_FLAGS)
+*_CLANGDWARF_RISCV64_ASLCC_FLAGS    = DEF(GCC_ASLCC_FLAGS)
+*_CLANGDWARF_RISCV64_APP_FLAGS      =
+*_CLANGDWARF_RISCV64_ASL_FLAGS      = DEF(IASL_FLAGS)
+*_CLANGDWARF_RISCV64_ASL_OUTFLAGS   = DEF(IASL_OUTFLAGS)
+*_CLANGDWARF_RISCV64_DTCPP_FLAGS    = DEF(GCC_DTCPP_FLAGS)
+*_CLANGDWARF_RISCV64_DEPS_FLAGS     = DEF(GCC_DEPS_FLAGS)
+
+*_CLANGDWARF_RISCV64_CC_PATH        = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_ASM_PATH       = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_PP_PATH        = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_VFRPP_PATH     = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_ASLCC_PATH     = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_ASLPP_PATH     = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_DLINK_PATH     = ENV(CLANGDWARF_BIN)clang
+*_CLANGDWARF_RISCV64_ASLDLINK_PATH  = ENV(CLANGDWARF_BIN)clang
+
+*_CLANGDWARF_RISCV64_SLINK_PATH     = ENV(CLANGDWARF_BIN)llvm-ar
+*_CLANGDWARF_RISCV64_RC_PATH        = ENV(CLANGDWARF_BIN)llvm-objcopy
+
+*_CLANGDWARF_RISCV64_ASLCC_FLAGS    = DEF(GCC_ASLCC_FLAGS) -fno-lto
+*_CLANGDWARF_RISCV64_ASLDLINK_FLAGS = DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS)
+*_CLANGDWARF_RISCV64_ASM_FLAGS      = DEF(GCC_ASM_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS) -Qunused-arguments -mabi=lp64 -mno-relax
+*_CLANGDWARF_RISCV64_DLINK_FLAGS    = DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV64_DLINK_FLAGS)
+*_CLANGDWARF_RISCV64_DLINK_XIPFLAGS = -z common-page-size=0x20
+*_CLANGDWARF_RISCV64_DLINK2_FLAGS   = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x240
+*_CLANGDWARF_RISCV64_PLATFORM_FLAGS =
+*_CLANGDWARF_RISCV64_PP_FLAGS       = DEF(GCC_PP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
+*_CLANGDWARF_RISCV64_RC_FLAGS       = DEF(GCC_RISCV64_RC_FLAGS)
+*_CLANGDWARF_RISCV64_VFRPP_FLAGS    = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
+*_CLANGDWARF_RISCV64_ASLPP_FLAGS    = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET)
+*_CLANGDWARF_RISCV64_CC_XIPFLAGS    = DEF(GCC_RISCV64_CC_XIPFLAGS)
+
+  DEBUG_CLANGDWARF_RISCV64_CC_FLAGS    = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
+  DEBUG_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=lld -Wl,--no-pie,--no-relax
+  NOOPT_CLANGDWARF_RISCV64_CC_FLAGS    = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -O0
+  NOOPT_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -fuse-ld=lld -Wl,--no-pie,--no-relax
+RELEASE_CLANGDWARF_RISCV64_CC_FLAGS    = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
+RELEASE_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld -Wl,--no-pie,--no-relax
+
 #
 #
 # XCODE5 support

BaseTools/Edk2ToolsBuild.py

@@ -133,8 +133,13 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
             shell_env.insert_path(self.OutputDir)
 
             # Actually build the tools.
+            output_stream = edk2_logging.create_output_stream()
             ret = RunCmd('nmake.exe', None,
                          workingdir=shell_env.get_shell_var("EDK_TOOLS_PATH"))
+            edk2_logging.remove_output_stream(output_stream)
+            problems = edk2_logging.scan_compiler_output(output_stream)
+            for level, problem in problems:
+                logging.log(level, problem)
             if ret != 0:
                 raise Exception("Failed to build.")
 
@@ -143,7 +148,13 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
 
         elif self.tool_chain_tag.lower().startswith("gcc"):
             cpu_count = self.GetCpuThreads()
+
+            output_stream = edk2_logging.create_output_stream()
             ret = RunCmd("make", f"-C .  -j {cpu_count}", workingdir=shell_env.get_shell_var("EDK_TOOLS_PATH"))
+            edk2_logging.remove_output_stream(output_stream)
+            problems = edk2_logging.scan_compiler_output(output_stream)
+            for level, problem in problems:
+                logging.log(level, problem)
             if ret != 0:
                 raise Exception("Failed to build.")
 

BaseTools/Scripts/BinToPcd.py

@@ -14,6 +14,9 @@ import sys
 import argparse
 import re
 import xdrlib
+import io
+import struct
+import math
 
 #
 # Globals for help information
@@ -46,16 +49,24 @@ if __name__ == '__main__':
             raise argparse.ArgumentTypeError (Message)
         return Argument
 
+    def XdrPackBuffer (buffer):
+        packed_bytes = io.BytesIO()
+        for unpacked_bytes in buffer:
+            n = len(unpacked_bytes)
+            packed_bytes.write(struct.pack('>L',n))
+            data = unpacked_bytes[:n]
+            n = math.ceil(n/4)*4
+            data = data + (n - len(data)) * b'\0'
+            packed_bytes.write(data)
+        return packed_bytes.getvalue()
+
     def ByteArray (Buffer, Xdr = False):
         if Xdr:
             #
             # If Xdr flag is set then encode data using the Variable-Length Opaque
             # Data format of RFC 4506 External Data Representation Standard (XDR).
             #
-            XdrEncoder = xdrlib.Packer ()
-            for Item in Buffer:
-                XdrEncoder.pack_bytes (Item)
-            Buffer = bytearray (XdrEncoder.get_buffer ())
+            Buffer = bytearray (XdrPackBuffer (Buffer))
         else:
             #
             # If Xdr flag is not set, then concatenate all the data

BaseTools/Scripts/ClangBase.lds

@@ -59,6 +59,16 @@ SECTIONS {
     KEEP (*(.hii))
   }
 
+  .got : {
+    *(.got)
+  }
+  ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
+
+  .got.plt (INFO) : {
+    *(.got.plt)
+  }
+  ASSERT(SIZEOF(.got.plt) == 0 || SIZEOF(.got.plt) == 0xc || SIZEOF(.got.plt) == 0x18, "Unexpected GOT/PLT entries detected!")
+
   /*
    * Retain the GNU build id but in a non-allocatable section so GenFw
    * does not copy it into the PE/COFF image.

BaseTools/Scripts/GccBase.lds

@@ -59,6 +59,16 @@ SECTIONS {
     KEEP (*(.hii))
   }
 
+  .got : {
+    *(.got)
+  }
+  ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
+
+  .got.plt (INFO) : {
+    *(.got.plt)
+  }
+  ASSERT(SIZEOF(.got.plt) == 0 || SIZEOF(.got.plt) == 0xc || SIZEOF(.got.plt) == 0x18, "Unexpected GOT/PLT entries detected!")
+
   /*
    * Retain the GNU build id but in a non-allocatable section so GenFw
    * does not copy it into the PE/COFF image.

BaseTools/Source/C/Common/BasePeCoff.c

@@ -169,32 +169,17 @@ PeCoffLoaderCheckImageType (
     ImageContext->Machine = TeHdr->Machine;
   }
 
-  if (ImageContext->Machine != EFI_IMAGE_MACHINE_IA32 && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_X64  && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_EBC  && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
-      ImageContext->Machine != EFI_IMAGE_MACHINE_LOONGARCH64) {
-    if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
-      //
-      // There are two types of ARM images. Pure ARM and ARM/Thumb.
-      // If we see the ARM say it is the ARM/Thumb so there is only
-      // a single machine type we need to check for ARM.
-      //
-      ImageContext->Machine = EFI_IMAGE_MACHINE_ARMT;
-      if (ImageContext->IsTeImage == FALSE) {
-        PeHdr->Pe32.FileHeader.Machine = ImageContext->Machine;
-      } else {
-        TeHdr->Machine = ImageContext->Machine;
-      }
-
-    } else {
-      //
-      // unsupported PeImage machine type
-      //
-      return RETURN_UNSUPPORTED;
-    }
+  if (ImageContext->Machine != IMAGE_FILE_MACHINE_I386 && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_X64  && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_ARMTHUMB_MIXED && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_EBC  && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_ARM64 && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_RISCV64 && \
+      ImageContext->Machine != IMAGE_FILE_MACHINE_LOONGARCH64) {
+    //
+    // unsupported PeImage machine type
+    //
+    return RETURN_UNSUPPORTED;
   }
 
   //
@@ -774,16 +759,16 @@ PeCoffLoaderRelocateImage (
 
       default:
         switch (MachineType) {
-        case EFI_IMAGE_MACHINE_IA32:
+        case IMAGE_FILE_MACHINE_I386:
           Status = PeCoffLoaderRelocateIa32Image (Reloc, Fixup, &FixupData, Adjust);
           break;
-        case EFI_IMAGE_MACHINE_ARMT:
+        case IMAGE_FILE_MACHINE_ARMTHUMB_MIXED:
           Status = PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupData, Adjust);
           break;
-        case EFI_IMAGE_MACHINE_RISCV64:
+        case IMAGE_FILE_MACHINE_RISCV64:
           Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, &FixupData, Adjust);
           break;
-        case EFI_IMAGE_MACHINE_LOONGARCH64:
+        case IMAGE_FILE_MACHINE_LOONGARCH64:
           Status = PeCoffLoaderRelocateLoongArch64Image (Reloc, Fixup, &FixupData, Adjust);
           break;
         default:
@@ -1270,14 +1255,14 @@ PeCoffLoaderGetPdbPointer (
     //       generate PE32+ image with PE32 Magic.
     //
     switch (Hdr.Pe32->FileHeader.Machine) {
-    case EFI_IMAGE_MACHINE_IA32:
-    case EFI_IMAGE_MACHINE_ARMT:
+    case IMAGE_FILE_MACHINE_I386:
+    case IMAGE_FILE_MACHINE_ARMTHUMB_MIXED:
       //
       // Assume PE32 image with IA32 Machine field.
       //
       Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
       break;
-    case EFI_IMAGE_MACHINE_X64:
+    case IMAGE_FILE_MACHINE_X64:
       //
       // Assume PE32+ image with X64 Machine field
       //

BaseTools/Source/C/Common/Decompress.c

@@ -15,6 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 //
 // Decompression algorithm begins here
 //
+#define UINT8_MAX 0xff
 #define BITBUFSIZ 32
 #define MAXMATCH  256
 #define THRESHOLD 3

BaseTools/Source/C/Common/WinNtInclude.h

@@ -1,66 +0,0 @@
-/** @file
-Include file for the WinNt Library
-
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __WIN_NT_INCLUDE_H__
-#define __WIN_NT_INCLUDE_H__
-
-#define GUID  _WINNT_DUP_GUID_____
-#define _LIST_ENTRY  _WINNT_DUP_LIST_ENTRY_FORWARD
-#define LIST_ENTRY   _WINNT_DUP_LIST_ENTRY
-
-#if (_MSC_VER < 1800)
-#define InterlockedIncrement _WINNT_DUP_InterlockedIncrement
-#define InterlockedDecrement _WINNT_DUP_InterlockedDecrement
-#define InterlockedCompareExchange64 _WINNT_DUP_InterlockedCompareExchange64
-#endif
-
-#undef UNALIGNED
-#undef CONST
-#undef VOID
-
-#ifndef __GNUC__
-#include "windows.h"
-
-//
-// Win32 include files do not compile clean with /W4, so we use the warning
-// pragma to suppress the warnings for Win32 only. This way our code can still
-// compile at /W4 (highest warning level) with /WX (warnings cause build
-// errors).
-//
-#pragma warning(disable : 4115)
-#pragma warning(disable : 4201)
-#pragma warning(disable : 4214)
-#pragma warning(disable : 4028)
-#pragma warning(disable : 4133)
-
-//
-// Set the warnings back on as the EFI code must be /W4.
-//
-#pragma warning(default : 4115)
-#pragma warning(default : 4201)
-#pragma warning(default : 4214)
-
-#endif
-
-#undef GUID
-#undef _LIST_ENTRY
-#undef LIST_ENTRY
-#undef InterlockedIncrement
-#undef InterlockedDecrement
-#undef InterlockedCompareExchange64
-#undef InterlockedCompareExchangePointer
-
-#define VOID void
-
-//
-// Prevent collisions with Windows API name macros that deal with Unicode/Not issues
-//
-#undef LoadImage
-#undef CreateEvent
-
-#endif

BaseTools/Source/C/EfiRom/EfiRom.h

@@ -16,8 +16,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <Common/UefiBaseTypes.h>
 #include <IndustryStandard/PeImage.h> // for PE32 structure definitions
 
-#include <IndustryStandard/pci22.h>  // for option ROM header structures
-#include <IndustryStandard/pci30.h>
+#include <IndustryStandard/Pci22.h>  // for option ROM header structures
+#include <IndustryStandard/Pci30.h>
 
 #include "Compress.h"
 #include "CommonLib.h"
@@ -108,11 +108,11 @@ typedef struct {
 // Machine Types
 //
 static STRING_LOOKUP  mMachineTypes[] = {
-  { EFI_IMAGE_MACHINE_IA32, "IA32" },
-  { EFI_IMAGE_MACHINE_X64, "X64" },
-  { EFI_IMAGE_MACHINE_EBC, "EBC" },
-  { EFI_IMAGE_MACHINE_ARMT, "ARM" },
-  { EFI_IMAGE_MACHINE_AARCH64, "AA64" },
+  { IMAGE_FILE_MACHINE_I386, "IA32" },
+  { IMAGE_FILE_MACHINE_X64, "X64" },
+  { IMAGE_FILE_MACHINE_EBC, "EBC" },
+  { IMAGE_FILE_MACHINE_ARMTHUMB_MIXED, "ARM" },
+  { IMAGE_FILE_MACHINE_ARM64, "AA64" },
   { 0, NULL }
 };
 

BaseTools/Source/C/GenFv/GenFvInternalLib.c

@@ -25,7 +25,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include <Guid/FfsSectionAlignmentPadding.h>
 
-#include "WinNtInclude.h"
 #include "GenFvInternalLib.h"
 #include "FvLib.h"
 #include "PeCoffLib.h"
@@ -1656,8 +1655,8 @@ Returns:
 
   if (
        Vtf0Detected &&
-       (MachineType == EFI_IMAGE_MACHINE_IA32 ||
-        MachineType == EFI_IMAGE_MACHINE_X64)
+       (MachineType == IMAGE_FILE_MACHINE_I386 ||
+        MachineType == IMAGE_FILE_MACHINE_X64)
      ) {
     //
     // If the SEC core code is IA32 or X64 and the VTF-0 signature
@@ -1715,7 +1714,7 @@ Returns:
     DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = 0x%llX", (unsigned long long) PeiCorePhysicalAddress);
   }
 
-if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X64) {
+if (MachineType == IMAGE_FILE_MACHINE_I386 || MachineType == IMAGE_FILE_MACHINE_X64) {
     if (PeiCorePhysicalAddress != 0) {
       //
       // Get the location to update
@@ -1805,12 +1804,12 @@ if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X6
     //
     Ia32ResetAddressPtr   = (UINT32 *) ((UINTN) FvImage->Eof - 8);
     *Ia32ResetAddressPtr  = IpiVector;
-  } else if (MachineType == EFI_IMAGE_MACHINE_ARMT) {
+  } else if (MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) {
     //
     // Since the ARM reset vector is in the FV Header you really don't need a
     // Volume Top File, but if you have one for some reason don't crash...
     //
-  } else if (MachineType == EFI_IMAGE_MACHINE_AARCH64) {
+  } else if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
     //
     // Since the AArch64 reset vector is in the FV Header you really don't need a
     // Volume Top File, but if you have one for some reason don't crash...
@@ -2205,7 +2204,7 @@ Returns:
     return EFI_SUCCESS;
   }
 
-  if (MachineType == EFI_IMAGE_MACHINE_ARMT) {
+  if (MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) {
     // ARM: Array of 4 UINT32s:
     // 0 - is branch relative to SEC entry point
     // 1 - PEI Entry Point
@@ -2259,7 +2258,7 @@ Returns:
     //
     memcpy(FvImage->FileImage, ResetVector, sizeof (ResetVector));
 
-  } else if (MachineType == EFI_IMAGE_MACHINE_AARCH64) {
+  } else if (MachineType == IMAGE_FILE_MACHINE_ARM64) {
     // AArch64: Used as UINT64 ResetVector[2]
     // 0 - is branch relative to SEC entry point
     // 1 - PEI Entry Point
@@ -2378,7 +2377,7 @@ Returns:
     return EFI_ABORTED;
   }
 
-  if (MachineType != EFI_IMAGE_MACHINE_RISCV64) {
+  if (MachineType != IMAGE_FILE_MACHINE_RISCV64) {
     Error(NULL, 0, 3000, "Invalid", "Could not update SEC core because Machine type is not RiscV.");
     return EFI_ABORTED;
   }
@@ -2479,7 +2478,7 @@ Returns:
   if (!UpdateVectorSec)
     return EFI_SUCCESS;
 
-  if (MachineType == EFI_IMAGE_MACHINE_LOONGARCH64) {
+  if (MachineType == IMAGE_FILE_MACHINE_LOONGARCH64) {
     UINT32                      ResetVector[1];
 
     memset(ResetVector, 0, sizeof (ResetVector));
@@ -2596,9 +2595,9 @@ Returns:
   //
   // Verify machine type is supported
   //
-  if ((*MachineType != EFI_IMAGE_MACHINE_IA32) &&  (*MachineType != EFI_IMAGE_MACHINE_X64) && (*MachineType != EFI_IMAGE_MACHINE_EBC) &&
-      (*MachineType != EFI_IMAGE_MACHINE_ARMT) && (*MachineType != EFI_IMAGE_MACHINE_AARCH64) &&
-      (*MachineType != EFI_IMAGE_MACHINE_RISCV64) && (*MachineType != EFI_IMAGE_MACHINE_LOONGARCH64)) {
+  if ((*MachineType != IMAGE_FILE_MACHINE_I386) &&  (*MachineType != IMAGE_FILE_MACHINE_X64) && (*MachineType != IMAGE_FILE_MACHINE_EBC) &&
+      (*MachineType != IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) && (*MachineType != IMAGE_FILE_MACHINE_ARM64) &&
+      (*MachineType != IMAGE_FILE_MACHINE_RISCV64) && (*MachineType != IMAGE_FILE_MACHINE_LOONGARCH64)) {
     Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE32 file.");
     return EFI_UNSUPPORTED;
   }
@@ -3548,13 +3547,13 @@ Returns:
       }
 
       // machine type is ARM, set a flag so ARM reset vector processing occurs
-      if ((MachineType == EFI_IMAGE_MACHINE_ARMT) || (MachineType == EFI_IMAGE_MACHINE_AARCH64)) {
+      if ((MachineType == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) || (MachineType == IMAGE_FILE_MACHINE_ARM64)) {
         VerboseMsg("Located ARM/AArch64 SEC/PEI core in child FV");
         mArm = TRUE;
       }
 
       // Machine type is LOONGARCH64, set a flag so LoongArch64 reset vector processed.
-      if (MachineType == EFI_IMAGE_MACHINE_LOONGARCH64) {
+      if (MachineType == IMAGE_FILE_MACHINE_LOONGARCH64) {
         VerboseMsg("Located LoongArch64 SEC core in child FV");
         mLoongArch = TRUE;
       }
@@ -3707,16 +3706,16 @@ Returns:
       return Status;
     }
 
-    if ( (ImageContext.Machine == EFI_IMAGE_MACHINE_ARMT) ||
-         (ImageContext.Machine == EFI_IMAGE_MACHINE_AARCH64) ) {
+    if ( (ImageContext.Machine == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) ||
+         (ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) ) {
       mArm = TRUE;
     }
 
-    if (ImageContext.Machine == EFI_IMAGE_MACHINE_RISCV64) {
+    if (ImageContext.Machine == IMAGE_FILE_MACHINE_RISCV64) {
       mRiscV = TRUE;
     }
 
-    if (ImageContext.Machine == EFI_IMAGE_MACHINE_LOONGARCH64) {
+    if (ImageContext.Machine == IMAGE_FILE_MACHINE_LOONGARCH64) {
       mLoongArch = TRUE;
     }
 
@@ -3992,12 +3991,12 @@ Returns:
       return Status;
     }
 
-    if ( (ImageContext.Machine == EFI_IMAGE_MACHINE_ARMT) ||
-         (ImageContext.Machine == EFI_IMAGE_MACHINE_AARCH64) ) {
+    if ( (ImageContext.Machine == IMAGE_FILE_MACHINE_ARMTHUMB_MIXED) ||
+         (ImageContext.Machine == IMAGE_FILE_MACHINE_ARM64) ) {
       mArm = TRUE;
     }
 
-    if (ImageContext.Machine == EFI_IMAGE_MACHINE_LOONGARCH64) {
+    if (ImageContext.Machine == IMAGE_FILE_MACHINE_LOONGARCH64) {
       mLoongArch = TRUE;
     }
 

BaseTools/Source/C/GenFw/Elf32Convert.c

@@ -9,8 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include "WinNtInclude.h"
-
 #ifndef __GNUC__
 #include <windows.h>
 #include <io.h>
@@ -555,16 +553,16 @@ ScanSections32 (
 
   switch (mEhdr->e_machine) {
   case EM_386:
-    NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
+    NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_I386;
     NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
     break;
   case EM_ARM:
-    NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_ARMT;
+    NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_ARMTHUMB_MIXED;
     NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
     break;
   default:
     VerboseMsg ("%s unknown e_machine type %hu. Assume IA-32", mInImageName, mEhdr->e_machine);
-    NtHdr->Pe32.FileHeader.Machine = EFI_IMAGE_MACHINE_IA32;
+    NtHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_I386;
     NtHdr->Pe32.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;
   }
 

BaseTools/Source/C/GenFw/Elf64Convert.c

@@ -10,8 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include "WinNtInclude.h"
-
 #ifndef __GNUC__
 #include <windows.h>
 #include <io.h>
@@ -1139,25 +1137,25 @@ ScanSections64 (
 
   switch (mEhdr->e_machine) {
   case EM_X86_64:
-    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
+    NtHdr->Pe32Plus.FileHeader.Machine = IMAGE_FILE_MACHINE_X64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
     break;
   case EM_AARCH64:
-    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_AARCH64;
+    NtHdr->Pe32Plus.FileHeader.Machine = IMAGE_FILE_MACHINE_ARM64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
     break;
   case EM_RISCV64:
-    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_RISCV64;
+    NtHdr->Pe32Plus.FileHeader.Machine = IMAGE_FILE_MACHINE_RISCV64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
     break;
   case EM_LOONGARCH:
-    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_LOONGARCH64;
+    NtHdr->Pe32Plus.FileHeader.Machine = IMAGE_FILE_MACHINE_LOONGARCH64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
     break;
 
   default:
     VerboseMsg ("%u unknown e_machine type. Assume X64", (UINTN)mEhdr->e_machine);
-    NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;
+    NtHdr->Pe32Plus.FileHeader.Machine = IMAGE_FILE_MACHINE_X64;
     NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;
   }
 

BaseTools/Source/C/GenFw/ElfConvert.c

@@ -7,8 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include "WinNtInclude.h"
-
 #ifndef __GNUC__
 #include <windows.h>
 #include <io.h>

BaseTools/Source/C/GenFw/GenFw.c

@@ -6,8 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
-#include "WinNtInclude.h"
-
 #ifndef __GNUC__
 #include <windows.h>
 #include <io.h>
@@ -28,9 +26,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 // Acpi Table definition
 //
 #include <IndustryStandard/Acpi.h>
-#include <IndustryStandard/Acpi1_0.h>
-#include <IndustryStandard/Acpi2_0.h>
-#include <IndustryStandard/Acpi3_0.h>
+#include <IndustryStandard/Acpi10.h>
+#include <IndustryStandard/Acpi20.h>
+#include <IndustryStandard/Acpi30.h>
 #include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
 
 #include "CommonLib.h"
@@ -370,7 +368,7 @@ Returns:
     if (Facs->Version > EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) {
       break;
     }
-    if ((Facs->Version != EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
+    if ((Facs->Version != 0 /* field is reserved in ACPI 1.0 */) &&
         (Facs->Version != EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
         (Facs->Version != EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION)){
       Error (NULL, 0, 3000, "Invalid", "FACS version check failed.");
@@ -2199,12 +2197,6 @@ Returns:
     }
   }
 
-  if (PeHdr->Pe32.FileHeader.Machine == IMAGE_FILE_MACHINE_ARM) {
-    // Some tools kick out IMAGE_FILE_MACHINE_ARM (0x1c0) vs IMAGE_FILE_MACHINE_ARMT (0x1c2)
-    // so patch back to the official UEFI value.
-    PeHdr->Pe32.FileHeader.Machine = IMAGE_FILE_MACHINE_ARMT;
-  }
-
   //
   // Set new base address into image
   //
@@ -3119,7 +3111,7 @@ Returns:
   // Get Debug, Export and Resource EntryTable RVA address.
   // Resource Directory entry need to review.
   //
-  if (FileHdr->Machine == EFI_IMAGE_MACHINE_IA32) {
+  if (FileHdr->Machine == IMAGE_FILE_MACHINE_I386) {
     Optional32Hdr = (EFI_IMAGE_OPTIONAL_HEADER32 *) ((UINT8*) FileHdr + sizeof (EFI_IMAGE_FILE_HEADER));
     SectionHeader = (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) Optional32Hdr +  FileHdr->SizeOfOptionalHeader);
     if (Optional32Hdr->NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_EXPORT && \

BaseTools/Source/C/Include/AArch64/ProcessorBind.h

@@ -1,148 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types for AArch64.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PROCESSOR_BIND_H__
-#define __PROCESSOR_BIND_H__
-
-///
-/// Define the processor type so other code can make processor based choices
-///
-#define MDE_CPU_AARCH64
-
-//
-// Make sure we are using the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-#if _MSC_EXTENSIONS
-  //
-  // use Microsoft* C compiler dependent integer width types
-  //
-  typedef unsigned __int64    UINT64;
-  typedef __int64             INT64;
-  typedef unsigned __int32    UINT32;
-  typedef __int32             INT32;
-  typedef unsigned short      UINT16;
-  typedef unsigned short      CHAR16;
-  typedef short               INT16;
-  typedef unsigned char       BOOLEAN;
-  typedef unsigned char       UINT8;
-  typedef char                CHAR8;
-  typedef signed char         INT8;
-#else
-  //
-  // Use ANSI C 2000 stdint.h integer width declarations
-  //
-  #include <stdint.h>
-  typedef uint8_t   BOOLEAN;
-  typedef int8_t    INT8;
-  typedef uint8_t   UINT8;
-  typedef int16_t   INT16;
-  typedef uint16_t  UINT16;
-  typedef int32_t   INT32;
-  typedef uint32_t  UINT32;
-  typedef int64_t   INT64;
-  typedef uint64_t  UINT64;
-  typedef char      CHAR8;
-  typedef uint16_t  CHAR16;
-
-#endif
-
-///
-/// Unsigned value of native width.  (4 bytes on supported 32-bit processor instructions,
-/// 8 bytes on supported 64-bit processor instructions)
-///
-typedef UINT64  UINTN;
-
-///
-/// Signed value of native width.  (4 bytes on supported 32-bit processor instructions,
-/// 8 bytes on supported 64-bit processor instructions)
-///
-typedef INT64   INTN;
-
-//
-// Processor specific defines
-//
-
-///
-/// A value of native width with the highest bit set.
-///
-#define MAX_BIT      0x8000000000000000
-
-///
-/// A value of native width with the two highest bits set.
-///
-#define MAX_2_BITS   0xC000000000000000
-
-///
-/// The stack alignment required for AARCH64
-///
-#define CPU_STACK_ALIGNMENT  16
-
-//
-// Modifier to ensure that all protocol member functions and EFI intrinsics
-// use the correct C calling convention. All protocol member functions and
-// EFI intrinsics are required to modify their member functions with EFIAPI.
-//
-#define EFIAPI
-
-#if defined(__GNUC__)
-  ///
-  /// For GNU assembly code, .global or .globl can declare global symbols.
-  /// Define this macro to unify the usage.
-  ///
-  #define ASM_GLOBAL .globl
-
-  #if !defined(__APPLE__)
-    ///
-    /// ARM EABI defines that the linker should not manipulate call relocations
-    /// (do bl/blx conversion) unless the target symbol has function type.
-    /// CodeSourcery 2010.09 started requiring the .type to function properly
-    ///
-    #define INTERWORK_FUNC(func__)   .type ASM_PFX(func__), %function
-
-    #define GCC_ASM_EXPORT(func__)  \
-             .global  _CONCATENATE (__USER_LABEL_PREFIX__, func__)    ;\
-             .type ASM_PFX(func__), %function
-
-    #define GCC_ASM_IMPORT(func__)  \
-             .extern  _CONCATENATE (__USER_LABEL_PREFIX__, func__)
-
-  #else
-    //
-    // .type not supported by Apple Xcode tools
-    //
-    #define INTERWORK_FUNC(func__)
-
-    #define GCC_ASM_EXPORT(func__)  \
-             .globl  _CONCATENATE (__USER_LABEL_PREFIX__, func__)    \
-
-    #define GCC_ASM_IMPORT(name)
-
-  #endif
-#endif
-
-/**
-  Return the pointer to the first instruction of a function given a function pointer.
-  On ARM CPU architectures, these two pointer values are the same,
-  so the implementation of this macro is very simple.
-
-  @param  FunctionPointer   A pointer to a function.
-
-  @return The pointer to the first instruction of a function given a function pointer.
-
-**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
-
-#endif
-

BaseTools/Source/C/Include/Arm/ProcessorBind.h

@@ -1,147 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types for ARM.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PROCESSOR_BIND_H__
-#define __PROCESSOR_BIND_H__
-
-///
-/// Define the processor type so other code can make processor based choices
-///
-#define MDE_CPU_ARM
-
-//
-// Make sure we are using the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-#if _MSC_EXTENSIONS
-  //
-  // use Microsoft* C compiler dependent integer width types
-  //
-  typedef unsigned __int64    UINT64;
-  typedef __int64             INT64;
-  typedef unsigned __int32    UINT32;
-  typedef __int32             INT32;
-  typedef unsigned short      UINT16;
-  typedef unsigned short      CHAR16;
-  typedef short               INT16;
-  typedef unsigned char       BOOLEAN;
-  typedef unsigned char       UINT8;
-  typedef char                CHAR8;
-  typedef signed char         INT8;
-#else
-  //
-  // Assume standard ARM alignment.
-  //
-  typedef unsigned long long  UINT64;
-  typedef long long           INT64;
-  typedef unsigned int        UINT32;
-  typedef int                 INT32;
-  typedef unsigned short      UINT16;
-  typedef unsigned short      CHAR16;
-  typedef short               INT16;
-  typedef unsigned char       BOOLEAN;
-  typedef unsigned char       UINT8;
-  typedef char                CHAR8;
-  typedef signed char         INT8;
-
-  #define UINT8_MAX 0xff
-#endif
-
-///
-/// Unsigned value of native width.  (4 bytes on supported 32-bit processor instructions,
-/// 8 bytes on supported 64-bit processor instructions)
-///
-typedef UINT32  UINTN;
-
-///
-/// Signed value of native width.  (4 bytes on supported 32-bit processor instructions,
-/// 8 bytes on supported 64-bit processor instructions)
-///
-typedef INT32   INTN;
-
-//
-// Processor specific defines
-//
-
-///
-/// A value of native width with the highest bit set.
-///
-#define MAX_BIT      0x80000000
-
-///
-/// A value of native width with the two highest bits set.
-///
-#define MAX_2_BITS   0xC0000000
-
-///
-/// The stack alignment required for ARM
-///
-#define CPU_STACK_ALIGNMENT  sizeof(UINT64)
-
-//
-// Modifier to ensure that all protocol member functions and EFI intrinsics
-// use the correct C calling convention. All protocol member functions and
-// EFI intrinsics are required to modify their member functions with EFIAPI.
-//
-#define EFIAPI
-
-#if defined(__GNUC__)
-  ///
-  /// For GNU assembly code, .global or .globl can declare global symbols.
-  /// Define this macro to unify the usage.
-  ///
-  #define ASM_GLOBAL .globl
-
-  #if !defined(__APPLE__)
-    ///
-    /// ARM EABI defines that the linker should not manipulate call relocations
-    /// (do bl/blx conversion) unless the target symbol has function type.
-    /// CodeSourcery 2010.09 started requiring the .type to function properly
-    ///
-    #define INTERWORK_FUNC(func__)   .type ASM_PFX(func__), %function
-
-    #define GCC_ASM_EXPORT(func__)  \
-             .global  _CONCATENATE (__USER_LABEL_PREFIX__, func__)    ;\
-             .type ASM_PFX(func__), %function
-
-    #define GCC_ASM_IMPORT(func__)  \
-             .extern  _CONCATENATE (__USER_LABEL_PREFIX__, func__)
-
-  #else
-    //
-    // .type not supported by Apple Xcode tools
-    //
-    #define INTERWORK_FUNC(func__)
-
-    #define GCC_ASM_EXPORT(func__)  \
-             .globl  _CONCATENATE (__USER_LABEL_PREFIX__, func__)    \
-
-    #define GCC_ASM_IMPORT(name)
-
-  #endif
-#endif
-
-/**
-  Return the pointer to the first instruction of a function given a function pointer.
-  On ARM CPU architectures, these two pointer values are the same,
-  so the implementation of this macro is very simple.
-
-  @param  FunctionPointer   A pointer to a function.
-
-  @return The pointer to the first instruction of a function given a function pointer.
-
-**/
-#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
-
-#endif
-
-

BaseTools/Source/C/Include/Ia32/ProcessorBind.h

@@ -1,155 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types for x64.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PROCESSOR_BIND_H__
-#define __PROCESSOR_BIND_H__
-
-//
-// Define the processor type so other code can make processor based choices
-//
-#define MDE_CPU_IA32
-
-//
-// Make sure we are useing the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-#if _MSC_EXTENSIONS
-
-//
-// Disable warning that make it impossible to compile at /W4
-// This only works for Microsoft* tools
-//
-
-//
-// Disabling bitfield type checking warnings.
-//
-#pragma warning ( disable : 4214 )
-
-//
-// Disabling the unreferenced formal parameter warnings.
-//
-#pragma warning ( disable : 4100 )
-
-//
-// Disable slightly different base types warning as CHAR8 * can not be set
-// to a constant string.
-//
-#pragma warning ( disable : 4057 )
-
-//
-// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
-//
-#pragma warning ( disable : 4127 )
-
-
-#endif
-
-
-#if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L)
-  //
-  // No ANSI C 2000 stdint.h integer width declarations, so define equivalents
-  //
-
-  #if _MSC_EXTENSIONS
-
-    //
-    // use Microsoft* C compiler dependent integer width types
-    //
-    typedef unsigned __int64    UINT64;
-    typedef __int64             INT64;
-    typedef unsigned __int32    UINT32;
-    typedef __int32             INT32;
-    typedef unsigned short      UINT16;
-    typedef unsigned short      CHAR16;
-    typedef short               INT16;
-    typedef unsigned char       BOOLEAN;
-    typedef unsigned char       UINT8;
-    typedef char                CHAR8;
-    typedef char                INT8;
-  #else
-
-    //
-    // Assume standard IA-32 alignment.
-    // BugBug: Need to check portability of long long
-    //
-    typedef unsigned long long  UINT64;
-    typedef long long           INT64;
-    typedef unsigned int        UINT32;
-    typedef int                 INT32;
-    typedef unsigned short      UINT16;
-    typedef unsigned short      CHAR16;
-    typedef short               INT16;
-    typedef unsigned char       BOOLEAN;
-    typedef unsigned char       UINT8;
-    typedef char                CHAR8;
-    typedef char                INT8;
-  #endif
-
-  #define UINT8_MAX 0xff
-
-#else
-  //
-  // Use ANSI C 2000 stdint.h integer width declarations
-  //
-  #include "stdint.h"
-  typedef uint8_t   BOOLEAN;
-  typedef int8_t    INT8;
-  typedef uint8_t   UINT8;
-  typedef int16_t   INT16;
-  typedef uint16_t  UINT16;
-  typedef int32_t   INT32;
-  typedef uint32_t  UINT32;
-  typedef int64_t   INT64;
-  typedef uint64_t  UINT64;
-  typedef char      CHAR8;
-  typedef uint16_t  CHAR16;
-
-#endif
-
-typedef UINT32  UINTN;
-typedef INT32   INTN;
-
-
-//
-// Processor specific defines
-//
-#define MAX_BIT     0x80000000
-#define MAX_2_BITS  0xC0000000
-
-//
-// Modifier to ensure that all protocol member functions and EFI intrinsics
-// use the correct C calling convention. All protocol member functions and
-// EFI intrinsics are required to modify their member functions with EFIAPI.
-//
-#if _MSC_EXTENSIONS
-  //
-  // Microsoft* compiler requires _EFIAPI usage, __cdecl is Microsoft* specific C.
-  //
-  #define EFIAPI __cdecl
-#endif
-
-#if __GNUC__
-  #define EFIAPI __attribute__((cdecl))
-#endif
-
-//
-// The Microsoft* C compiler can removed references to unreferenced data items
-//  if the /OPT:REF linker option is used. We defined a macro as this is a
-//  a non standard extension
-//
-#if _MSC_EXTENSIONS
-  #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
-#else
-  #define GLOBAL_REMOVE_IF_UNREFERENCED
-#endif
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/Acpi.h

@@ -1,117 +0,0 @@
-/** @file
-  This file contains some basic ACPI definitions that are consumed by drivers
-  that do not care about ACPI versions.
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _ACPI_H_
-#define _ACPI_H_
-
-//
-// Common table header, this prefaces all ACPI tables, including FACS, but
-// excluding the RSD PTR structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-} EFI_ACPI_COMMON_HEADER;
-
-//
-// Common ACPI description table header.  This structure prefaces most ACPI tables.
-//
-#pragma pack(1)
-
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-  UINT8   Revision;
-  UINT8   Checksum;
-  UINT8   OemId[6];
-  UINT64  OemTableId;
-  UINT32  OemRevision;
-  UINT32  CreatorId;
-  UINT32  CreatorRevision;
-} EFI_ACPI_DESCRIPTION_HEADER;
-
-#pragma pack()
-//
-// Define for Pci Host Bridge Resource Allocation
-//
-#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
-#define ACPI_END_TAG_DESCRIPTOR       0x79
-
-#define ACPI_ADDRESS_SPACE_TYPE_MEM   0x00
-#define ACPI_ADDRESS_SPACE_TYPE_IO    0x01
-#define ACPI_ADDRESS_SPACE_TYPE_BUS   0x02
-
-//
-// Power Management Timer frequency is fixed at 3.579545MHz
-//
-#define ACPI_TIMER_FREQUENCY       3579545
-
-//
-// Make sure structures match spec
-//
-#pragma pack(1)
-
-typedef struct {
-  UINT8   Desc;
-  UINT16  Len;
-  UINT8   ResType;
-  UINT8   GenFlag;
-  UINT8   SpecificFlag;
-  UINT64  AddrSpaceGranularity;
-  UINT64  AddrRangeMin;
-  UINT64  AddrRangeMax;
-  UINT64  AddrTranslationOffset;
-  UINT64  AddrLen;
-} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
-
-typedef struct {
-  UINT8 Desc;
-  UINT8 Checksum;
-} EFI_ACPI_END_TAG_DESCRIPTOR;
-
-//
-// General use definitions
-//
-#define EFI_ACPI_RESERVED_BYTE  0x00
-#define EFI_ACPI_RESERVED_WORD  0x0000
-#define EFI_ACPI_RESERVED_DWORD 0x00000000
-#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
-
-//
-// Resource Type Specific Flags
-// Ref ACPI specification 6.4.3.5.5
-//
-// Bit [0]    : Write Status, _RW
-//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE                (1 << 0)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY                 (0 << 0)
-//
-// Bit [2:1]  : Memory Attributes, _MEM
-//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE             (0 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE                 (1 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE    (3 << 1)
-//
-// Bit [4:3]  : Memory Attributes, _MTP
-//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY      (0 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED    (1 << 3)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI        (2 << 3)
-#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS         (3 << 3)
-//
-// Bit [5]    : Memory to I/O Translation, _TTP
-//
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION          (1 << 5)
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC               (0 << 5)
-
-#pragma pack()
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/Acpi1_0.h

@@ -1,285 +0,0 @@
-/** @file
-  ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _ACPI_1_0_H_
-#define _ACPI_1_0_H_
-
-#include "IndustryStandard/Acpi.h"
-
-//
-// Ensure proper structure formats
-//
-#pragma pack(1)
-//
-// ACPI 1.0b table structures
-//
-//
-// Root System Description Pointer Structure
-//
-typedef struct {
-  UINT64  Signature;
-  UINT8   Checksum;
-  UINT8   OemId[6];
-  UINT8   Reserved;
-  UINT32  RsdtAddress;
-} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
-
-//
-// Root System Description Table
-// No definition needed as it is a common description table header followed by a
-// variable number of UINT32 table pointers.
-//
-//
-// RSDT Revision (as defined in ACPI 1.0b spec.)
-//
-#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Fixed ACPI Description Table Structure (FADT)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      FirmwareCtrl;
-  UINT32                      Dsdt;
-  UINT8                       IntModel;
-  UINT8                       Reserved1;
-  UINT16                      SciInt;
-  UINT32                      SmiCmd;
-  UINT8                       AcpiEnable;
-  UINT8                       AcpiDisable;
-  UINT8                       S4BiosReq;
-  UINT8                       Reserved2;
-  UINT32                      Pm1aEvtBlk;
-  UINT32                      Pm1bEvtBlk;
-  UINT32                      Pm1aCntBlk;
-  UINT32                      Pm1bCntBlk;
-  UINT32                      Pm2CntBlk;
-  UINT32                      PmTmrBlk;
-  UINT32                      Gpe0Blk;
-  UINT32                      Gpe1Blk;
-  UINT8                       Pm1EvtLen;
-  UINT8                       Pm1CntLen;
-  UINT8                       Pm2CntLen;
-  UINT8                       PmTmLen;
-  UINT8                       Gpe0BlkLen;
-  UINT8                       Gpe1BlkLen;
-  UINT8                       Gpe1Base;
-  UINT8                       Reserved3;
-  UINT16                      PLvl2Lat;
-  UINT16                      PLvl3Lat;
-  UINT16                      FlushSize;
-  UINT16                      FlushStride;
-  UINT8                       DutyOffset;
-  UINT8                       DutyWidth;
-  UINT8                       DayAlrm;
-  UINT8                       MonAlrm;
-  UINT8                       Century;
-  UINT8                       Reserved4;
-  UINT8                       Reserved5;
-  UINT8                       Reserved6;
-  UINT32                      Flags;
-} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
-
-//
-// FADT Version (as defined in ACPI 1.0b spec.)
-//
-#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x01
-
-//
-// Fixed ACPI Description Table Fixed Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_1_0_WBINVD       (1 << 0)
-#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)
-#define EFI_ACPI_1_0_PROC_C1      (1 << 2)
-#define EFI_ACPI_1_0_P_LVL2_UP    (1 << 3)
-#define EFI_ACPI_1_0_PWR_BUTTON   (1 << 4)
-#define EFI_ACPI_1_0_SLP_BUTTON   (1 << 5)
-#define EFI_ACPI_1_0_FIX_RTC      (1 << 6)
-#define EFI_ACPI_1_0_RTC_S4       (1 << 7)
-#define EFI_ACPI_1_0_TMR_VAL_EXT  (1 << 8)
-#define EFI_ACPI_1_0_DCK_CAP      (1 << 9)
-
-#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x0
-//
-// Firmware ACPI Control Structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-  UINT32  HardwareSignature;
-  UINT32  FirmwareWakingVector;
-  UINT32  GlobalLock;
-  UINT32  Flags;
-  UINT8   Reserved[40];
-} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
-
-//
-// Firmware Control Structure Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)
-
-//
-// Multiple APIC Description Table header definition.  The rest of the table
-// must be defined in a platform specific manner.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      LocalApicAddress;
-  UINT32                      Flags;
-} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
-
-//
-// MADT Revision (as defined in ACPI 1.0b spec.)
-//
-#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Multiple APIC Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_1_0_PCAT_COMPAT  (1 << 0)
-
-//
-// Multiple APIC Description Table APIC structure types
-// All other values between 0x09 an 0xFF are reserved and
-// will be ignored by OSPM.
-//
-#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC           0x00
-#define EFI_ACPI_1_0_IO_APIC                        0x01
-#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE      0x02
-#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
-#define EFI_ACPI_1_0_LOCAL_APIC_NMI                 0x04
-
-//
-// APIC Structure Definitions
-//
-//
-// Processor Local APIC Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT8   ApicId;
-  UINT32  Flags;
-} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
-
-//
-// Local APIC Flags.  All other bits are reserved and must be 0.
-//
-#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)
-
-//
-// IO APIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   IoApicId;
-  UINT8   Reserved;
-  UINT32  IoApicAddress;
-  UINT32  SystemVectorBase;
-} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
-
-//
-// Interrupt Source Override Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   Bus;
-  UINT8   Source;
-  UINT32  GlobalSystemInterruptVector;
-  UINT16  Flags;
-} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
-
-//
-// Non-Maskable Interrupt Source Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT32  GlobalSystemInterruptVector;
-} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
-
-//
-// Local APIC NMI Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT16  Flags;
-  UINT8   LocalApicInti;
-} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
-
-//
-// Smart Battery Description Table (SBST)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      WarningEnergyLevel;
-  UINT32                      LowEnergyLevel;
-  UINT32                      CriticalEnergyLevel;
-} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
-
-//
-// Known table signatures
-//
-//
-// "RSD PTR " Root System Description Pointer
-//
-#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352ULL
-
-//
-// "APIC" Multiple APIC Description Table
-//
-#define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041
-
-//
-// "DSDT" Differentiated System Description Table
-//
-#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
-
-//
-// "FACS" Firmware ACPI Control Structure
-//
-#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
-
-//
-// "FACP" Fixed ACPI Description Table
-//
-#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
-
-//
-// "PSDT" Persistent System Description Table
-//
-#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
-
-//
-// "RSDT" Root System Description Table
-//
-#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
-
-//
-// "SBST" Smart Battery Specification Table
-//
-#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
-
-//
-// "SSDT" Secondary System Description Table
-//
-#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
-
-#pragma pack()
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/Acpi2_0.h

@@ -1,520 +0,0 @@
-/** @file
-  ACPI 2.0 definitions from the ACPI Specification, revision 2.0
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _ACPI_2_0_H_
-#define _ACPI_2_0_H_
-
-#include "IndustryStandard/Acpi.h"
-
-//
-// Ensure proper structure formats
-//
-#pragma pack(1)
-//
-// ACPI Specification Revision
-//
-#define EFI_ACPI_2_0_REVISION 0x02
-
-//
-// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
-// and produced by a platform specific driver.
-//
-//
-// ACPI OEM ID
-//
-#define EFI_ACPI_2_0_OEM_ID       "INTEL "
-#define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245  // "E2T8704P"
-//
-// ACPI OEM Revision
-//
-#define EFI_ACPI_2_0_OEM_REVISION 0x00000002
-
-//
-// ACPI table creator ID
-//
-#define EFI_ACPI_2_0_CREATOR_ID 0x5446534D  // TBD "MSFT"
-//
-// ACPI table creator revision
-//
-#define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013  // TBD
-//
-// ACPI 2.0 Generic Address Space definition
-//
-typedef struct {
-  UINT8   AddressSpaceId;
-  UINT8   RegisterBitWidth;
-  UINT8   RegisterBitOffset;
-  UINT8   Reserved;
-  UINT64  Address;
-} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
-
-//
-// Generic Address Space Address IDs
-//
-#define EFI_ACPI_2_0_SYSTEM_MEMORY              0
-#define EFI_ACPI_2_0_SYSTEM_IO                  1
-#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2
-#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3
-#define EFI_ACPI_2_0_SMBUS                      4
-#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F
-
-//
-// ACPI 2.0 table structures
-//
-//
-// Root System Description Pointer Structure
-//
-typedef struct {
-  UINT64  Signature;
-  UINT8   Checksum;
-  UINT8   OemId[6];
-  UINT8   Revision;
-  UINT32  RsdtAddress;
-  UINT32  Length;
-  UINT64  XsdtAddress;
-  UINT8   ExtendedChecksum;
-  UINT8   Reserved[3];
-} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
-
-//
-// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
-
-//
-// Common table header, this prefaces all ACPI tables, including FACS, but
-// excluding the RSD PTR structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-} EFI_ACPI_2_0_COMMON_HEADER;
-
-//
-// Root System Description Table
-// No definition needed as it is a common description table header followed by a
-// variable number of UINT32 table pointers.
-//
-//
-// RSDT Revision (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Extended System Description Table
-// No definition needed as it is a common description table header followed by a
-// variable number of UINT64 table pointers.
-//
-//
-// XSDT Revision (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Fixed ACPI Description Table Structure (FADT)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER             Header;
-  UINT32                                  FirmwareCtrl;
-  UINT32                                  Dsdt;
-  UINT8                                   Reserved0;
-  UINT8                                   PreferredPmProfile;
-  UINT16                                  SciInt;
-  UINT32                                  SmiCmd;
-  UINT8                                   AcpiEnable;
-  UINT8                                   AcpiDisable;
-  UINT8                                   S4BiosReq;
-  UINT8                                   PstateCnt;
-  UINT32                                  Pm1aEvtBlk;
-  UINT32                                  Pm1bEvtBlk;
-  UINT32                                  Pm1aCntBlk;
-  UINT32                                  Pm1bCntBlk;
-  UINT32                                  Pm2CntBlk;
-  UINT32                                  PmTmrBlk;
-  UINT32                                  Gpe0Blk;
-  UINT32                                  Gpe1Blk;
-  UINT8                                   Pm1EvtLen;
-  UINT8                                   Pm1CntLen;
-  UINT8                                   Pm2CntLen;
-  UINT8                                   PmTmrLen;
-  UINT8                                   Gpe0BlkLen;
-  UINT8                                   Gpe1BlkLen;
-  UINT8                                   Gpe1Base;
-  UINT8                                   CstCnt;
-  UINT16                                  PLvl2Lat;
-  UINT16                                  PLvl3Lat;
-  UINT16                                  FlushSize;
-  UINT16                                  FlushStride;
-  UINT8                                   DutyOffset;
-  UINT8                                   DutyWidth;
-  UINT8                                   DayAlrm;
-  UINT8                                   MonAlrm;
-  UINT8                                   Century;
-  UINT16                                  IaPcBootArch;
-  UINT8                                   Reserved1;
-  UINT32                                  Flags;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;
-  UINT8                                   ResetValue;
-  UINT8                                   Reserved2[3];
-  UINT64                                  XFirmwareCtrl;
-  UINT64                                  XDsdt;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
-} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
-
-//
-// FADT Version (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03
-
-//
-// Fixed ACPI Description Table Boot Architecture Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)
-#define EFI_ACPI_2_0_8042           (1 << 1)
-
-//
-// Fixed ACPI Description Table Fixed Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_2_0_WBINVD         (1 << 0)
-#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)
-#define EFI_ACPI_2_0_PROC_C1        (1 << 2)
-#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)
-#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)
-#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)
-#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)
-#define EFI_ACPI_2_0_RTC_S4         (1 << 7)
-#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)
-#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)
-#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)
-#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)
-#define EFI_ACPI_2_0_HEADLESS       (1 << 12)
-#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)
-
-//
-// Firmware ACPI Control Structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-  UINT32  HardwareSignature;
-  UINT32  FirmwareWakingVector;
-  UINT32  GlobalLock;
-  UINT32  Flags;
-  UINT64  XFirmwareWakingVector;
-  UINT8   Version;
-  UINT8   Reserved[31];
-} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
-
-//
-// FACS Version (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01
-
-//
-// Firmware Control Structure Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)
-
-//
-// Multiple APIC Description Table header definition.  The rest of the table
-// must be defined in a platform specific manner.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      LocalApicAddress;
-  UINT32                      Flags;
-} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
-
-//
-// MADT Revision (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Multiple APIC Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)
-
-//
-// Multiple APIC Description Table APIC structure types
-// All other values between 0x09 an 0xFF are reserved and
-// will be ignored by OSPM.
-//
-#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00
-#define EFI_ACPI_2_0_IO_APIC                        0x01
-#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02
-#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
-#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04
-#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
-#define EFI_ACPI_2_0_IO_SAPIC                       0x06
-#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07
-#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08
-
-//
-// APIC Structure Definitions
-//
-//
-// Processor Local APIC Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT8   ApicId;
-  UINT32  Flags;
-} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
-
-//
-// Local APIC Flags.  All other bits are reserved and must be 0.
-//
-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)
-
-//
-// IO APIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   IoApicId;
-  UINT8   Reserved;
-  UINT32  IoApicAddress;
-  UINT32  GlobalSystemInterruptBase;
-} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
-
-//
-// Interrupt Source Override Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   Bus;
-  UINT8   Source;
-  UINT32  GlobalSystemInterrupt;
-  UINT16  Flags;
-} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
-
-//
-// Non-Maskable Interrupt Source Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT32  GlobalSystemInterrupt;
-} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
-
-//
-// Local APIC NMI Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT16  Flags;
-  UINT8   LocalApicLint;
-} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
-
-//
-// Local APIC Address Override Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Reserved;
-  UINT64  LocalApicAddress;
-} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
-
-//
-// IO SAPIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   IoApicId;
-  UINT8   Reserved;
-  UINT32  GlobalSystemInterruptBase;
-  UINT64  IoSapicAddress;
-} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
-
-//
-// Local SAPIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT8   LocalSapicId;
-  UINT8   LocalSapicEid;
-  UINT8   Reserved[3];
-  UINT32  Flags;
-} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
-
-//
-// Platform Interrupt Sources Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT8   InterruptType;
-  UINT8   ProcessorId;
-  UINT8   ProcessorEid;
-  UINT8   IoSapicVector;
-  UINT32  GlobalSystemInterrupt;
-  UINT32  Reserved;
-} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
-
-//
-// Smart Battery Description Table (SBST)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      WarningEnergyLevel;
-  UINT32                      LowEnergyLevel;
-  UINT32                      CriticalEnergyLevel;
-} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
-
-//
-// SBST Version (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Embedded Controller Boot Resources Table (ECDT)
-// The table is followed by a null terminated ASCII string that contains
-// a fully qualified reference to the name space object.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER             Header;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;
-  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;
-  UINT32                                  Uid;
-  UINT8                                   GpeBit;
-} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
-
-//
-// ECDT Version (as defined in ACPI 2.0 spec.)
-//
-#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
-
-//
-// Known table signatures
-//
-//
-// "RSD PTR " Root System Description Pointer
-//
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352
-
-//
-// "SPIC" Multiple SAPIC Description Table
-//
-// BUGBUG: Don't know where this came from except SR870BN4 uses it.
-// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
-//
-#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
-
-//
-// "BOOT" MS Simple Boot Spec
-//
-#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
-
-//
-// "DBGP" MS Bebug Port Spec
-//
-#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
-
-//
-// "DSDT" Differentiated System Description Table
-//
-#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
-
-//
-// "ECDT" Embedded Controller Boot Resources Table
-//
-#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
-
-//
-// "ETDT" Event Timer Description Table
-//
-#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445
-
-//
-// "FACS" Firmware ACPI Control Structure
-//
-#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
-
-//
-// "FACP" Fixed ACPI Description Table
-//
-#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
-
-//
-// "APIC" Multiple APIC Description Table
-//
-#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041
-
-//
-// "PSDT" Persistent System Description Table
-//
-#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
-
-//
-// "RSDT" Root System Description Table
-//
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
-
-//
-// "SBST" Smart Battery Specification Table
-//
-#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
-
-//
-// "SLIT" System Locality Information Table
-//
-#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53
-
-//
-// "SPCR" Serial Port Console Redirection Table
-//
-#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053
-
-//
-// "SRAT" Static Resource Affinity Table
-//
-#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
-
-//
-// "SSDT" Secondary System Description Table
-//
-#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
-
-//
-// "SPMI" Server Platform Management Interface Table
-//
-#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053
-
-//
-// "XSDT" Extended System Description Table
-//
-#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358
-
-#pragma pack()
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/Acpi3_0.h

@@ -1,668 +0,0 @@
-/** @file
-  ACPI 3.0 definitions from the ACPI Specification Revision 3.0 September 2, 2004
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _ACPI_3_0_H_
-#define _ACPI_3_0_H_
-
-#include "IndustryStandard/Acpi.h"
-
-//
-// Ensure proper structure formats
-//
-#pragma pack(1)
-//
-// ACPI Specification Revision
-//
-#define EFI_ACPI_3_0_REVISION 0x03  // BUGBUG: Not in spec yet.
-//
-// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
-// and produced by a platform specific driver.
-//
-//
-// ACPI 3.0 Generic Address Space definition
-//
-typedef struct {
-  UINT8   AddressSpaceId;
-  UINT8   RegisterBitWidth;
-  UINT8   RegisterBitOffset;
-  UINT8   AccessSize;
-  UINT64  Address;
-} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
-
-//
-// Generic Address Space Address IDs
-//
-#define EFI_ACPI_3_0_SYSTEM_MEMORY              0
-#define EFI_ACPI_3_0_SYSTEM_IO                  1
-#define EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE    2
-#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER        3
-#define EFI_ACPI_3_0_SMBUS                      4
-#define EFI_ACPI_3_0_FUNCTIONAL_FIXED_HARDWARE  0x7F
-
-//
-// Generic Address Space Access Sizes
-//
-#define EFI_ACPI_3_0_UNDEFINED  0
-#define EFI_ACPI_3_0_BYTE       1
-#define EFI_ACPI_3_0_WORD       2
-#define EFI_ACPI_3_0_DWORD      3
-#define EFI_ACPI_3_0_QWORD      4
-
-//
-// ACPI 3.0 table structures
-//
-//
-// Root System Description Pointer Structure
-//
-typedef struct {
-  UINT64  Signature;
-  UINT8   Checksum;
-  UINT8   OemId[6];
-  UINT8   Revision;
-  UINT32  RsdtAddress;
-  UINT32  Length;
-  UINT64  XsdtAddress;
-  UINT8   ExtendedChecksum;
-  UINT8   Reserved[3];
-} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
-
-//
-// RSD_PTR Revision (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02  // ACPISpec30 (Revision 3.0 September 2, 2004) says current value is 2
-//
-// Common table header, this prefaces all ACPI tables, including FACS, but
-// excluding the RSD PTR structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-} EFI_ACPI_3_0_COMMON_HEADER;
-
-//
-// Root System Description Table
-// No definition needed as it is a common description table header followed by a
-// variable number of UINT32 table pointers.
-//
-//
-// RSDT Revision (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Extended System Description Table
-// No definition needed as it is a common description table header followed by a
-// variable number of UINT64 table pointers.
-//
-//
-// XSDT Revision (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Fixed ACPI Description Table Structure (FADT)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER             Header;
-  UINT32                                  FirmwareCtrl;
-  UINT32                                  Dsdt;
-  UINT8                                   Reserved0;
-  UINT8                                   PreferredPmProfile;
-  UINT16                                  SciInt;
-  UINT32                                  SmiCmd;
-  UINT8                                   AcpiEnable;
-  UINT8                                   AcpiDisable;
-  UINT8                                   S4BiosReq;
-  UINT8                                   PstateCnt;
-  UINT32                                  Pm1aEvtBlk;
-  UINT32                                  Pm1bEvtBlk;
-  UINT32                                  Pm1aCntBlk;
-  UINT32                                  Pm1bCntBlk;
-  UINT32                                  Pm2CntBlk;
-  UINT32                                  PmTmrBlk;
-  UINT32                                  Gpe0Blk;
-  UINT32                                  Gpe1Blk;
-  UINT8                                   Pm1EvtLen;
-  UINT8                                   Pm1CntLen;
-  UINT8                                   Pm2CntLen;
-  UINT8                                   PmTmrLen;
-  UINT8                                   Gpe0BlkLen;
-  UINT8                                   Gpe1BlkLen;
-  UINT8                                   Gpe1Base;
-  UINT8                                   CstCnt;
-  UINT16                                  PLvl2Lat;
-  UINT16                                  PLvl3Lat;
-  UINT16                                  FlushSize;
-  UINT16                                  FlushStride;
-  UINT8                                   DutyOffset;
-  UINT8                                   DutyWidth;
-  UINT8                                   DayAlrm;
-  UINT8                                   MonAlrm;
-  UINT8                                   Century;
-  UINT16                                  IaPcBootArch;
-  UINT8                                   Reserved1;
-  UINT32                                  Flags;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;
-  UINT8                                   ResetValue;
-  UINT8                                   Reserved2[3];
-  UINT64                                  XFirmwareCtrl;
-  UINT64                                  XDsdt;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
-} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
-
-//
-// FADT Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x04
-
-//
-// Fixed ACPI Description Table Preferred Power Management Profile
-//
-#define EFI_ACPI_3_0_PM_PROFILE_UNSPECIFIED         0
-#define EFI_ACPI_3_0_PM_PROFILE_DESKTOP             1
-#define EFI_ACPI_3_0_PM_PROFILE_MOBILE              2
-#define EFI_ACPI_3_0_PM_PROFILE_WORKSTATION         3
-#define EFI_ACPI_3_0_PM_PROFILE_ENTERPRISE_SERVER   4
-#define EFI_ACPI_3_0_PM_PROFILE_SOHO_SERVER         5
-#define EFI_ACPI_3_0_PM_PROFILE_APPLIANCE_PC        6
-#define EFI_ACPI_3_0_PM_PROFILE_PERFORMANCE_SERVER  7
-
-//
-// Fixed ACPI Description Table Boot Architecture Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_LEGACY_DEVICES    (1 << 0)
-#define EFI_ACPI_3_0_8042              (1 << 1)
-#define EFI_ACPI_3_0_VGA_NOT_PRESENT   (1 << 2)
-#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED (1 << 3)
-//
-// Fixed ACPI Description Table Fixed Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_WBINVD                   (1 << 0)
-#define EFI_ACPI_3_0_WBINVD_FLUSH             (1 << 1)
-#define EFI_ACPI_3_0_PROC_C1                  (1 << 2)
-#define EFI_ACPI_3_0_P_LVL2_UP                (1 << 3)
-#define EFI_ACPI_3_0_PWR_BUTTON               (1 << 4)
-#define EFI_ACPI_3_0_SLP_BUTTON               (1 << 5)
-#define EFI_ACPI_3_0_FIX_RTC                  (1 << 6)
-#define EFI_ACPI_3_0_RTC_S4                   (1 << 7)
-#define EFI_ACPI_3_0_TMR_VAL_EXT              (1 << 8)
-#define EFI_ACPI_3_0_DCK_CAP                  (1 << 9)
-#define EFI_ACPI_3_0_RESET_REG_SUP            (1 << 10)
-#define EFI_ACPI_3_0_SEALED_CASE              (1 << 11)
-#define EFI_ACPI_3_0_HEADLESS                 (1 << 12)
-#define EFI_ACPI_3_0_CPU_SW_SLP               (1 << 13)
-#define EFI_ACPI_3_0_PCI_EXP_WAK              (1 << 14)
-#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK       (1 << 15)
-#define EFI_ACPI_3_0_S4_RTC_STS_VALID         (1 << 16)
-#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE  (1 << 17)
-#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL (1 << 18)
-#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)
-
-//
-// Firmware ACPI Control Structure
-//
-typedef struct {
-  UINT32  Signature;
-  UINT32  Length;
-  UINT32  HardwareSignature;
-  UINT32  FirmwareWakingVector;
-  UINT32  GlobalLock;
-  UINT32  Flags;
-  UINT64  XFirmwareWakingVector;
-  UINT8   Version;
-  UINT8   Reserved[31];
-} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
-
-//
-// FACS Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01
-
-//
-// Firmware Control Structure Feature Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)
-
-//
-// Differentiated System Description Table,
-// Secondary System Description Table
-// and Persistent System Description Table,
-// no definition needed as they are common description table header followed by a
-// definition block.
-//
-#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION   0x02
-#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION        0x02
-
-//
-// Multiple APIC Description Table header definition.  The rest of the table
-// must be defined in a platform specific manner.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      LocalApicAddress;
-  UINT32                      Flags;
-} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
-
-//
-// MADT Revision (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
-
-//
-// Multiple APIC Flags
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_PCAT_COMPAT  (1 << 0)
-
-//
-// Multiple APIC Description Table APIC structure types
-// All other values between 0x09 an 0xFF are reserved and
-// will be ignored by OSPM.
-//
-#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC           0x00
-#define EFI_ACPI_3_0_IO_APIC                        0x01
-#define EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE      0x02
-#define EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03
-#define EFI_ACPI_3_0_LOCAL_APIC_NMI                 0x04
-#define EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
-#define EFI_ACPI_3_0_IO_SAPIC                       0x06
-#define EFI_ACPI_3_0_LOCAL_SAPIC                    0x07
-#define EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES     0x08
-
-//
-// APIC Structure Definitions
-//
-//
-// Processor Local APIC Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT8   ApicId;
-  UINT32  Flags;
-} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
-
-//
-// Local APIC Flags.  All other bits are reserved and must be 0.
-//
-#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)
-
-//
-// IO APIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   IoApicId;
-  UINT8   Reserved;
-  UINT32  IoApicAddress;
-  UINT32  GlobalSystemInterruptBase;
-} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
-
-//
-// Interrupt Source Override Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   Bus;
-  UINT8   Source;
-  UINT32  GlobalSystemInterrupt;
-  UINT16  Flags;
-} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
-
-//
-// Platform Interrupt Sources Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT8   InterruptType;
-  UINT8   ProcessorId;
-  UINT8   ProcessorEid;
-  UINT8   IoSapicVector;
-  UINT32  GlobalSystemInterrupt;
-  UINT32  PlatformInterruptSourceFlags;
-  UINT8   CpeiProcessorOverride;
-  UINT8   Reserved[31];
-} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
-
-//
-// MPS INTI flags.
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_POLARITY      (3 << 0)
-#define EFI_ACPI_3_0_TRIGGER_MODE  (3 << 2)
-
-//
-// Non-Maskable Interrupt Source Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT32  GlobalSystemInterrupt;
-} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
-
-//
-// Local APIC NMI Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT16  Flags;
-  UINT8   LocalApicLint;
-} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
-
-//
-// Local APIC Address Override Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Reserved;
-  UINT64  LocalApicAddress;
-} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
-
-//
-// IO SAPIC Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   IoApicId;
-  UINT8   Reserved;
-  UINT32  GlobalSystemInterruptBase;
-  UINT64  IoSapicAddress;
-} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
-
-//
-// Local SAPIC Structure
-// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   AcpiProcessorId;
-  UINT8   LocalSapicId;
-  UINT8   LocalSapicEid;
-  UINT8   Reserved[3];
-  UINT32  Flags;
-  UINT32  ACPIProcessorUIDValue;
-} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
-
-//
-// Platform Interrupt Sources Structure
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT16  Flags;
-  UINT8   InterruptType;
-  UINT8   ProcessorId;
-  UINT8   ProcessorEid;
-  UINT8   IoSapicVector;
-  UINT32  GlobalSystemInterrupt;
-  UINT32  PlatformInterruptSourceFlags;
-} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
-
-//
-// Platform Interrupt Source Flags.
-// All other bits are reserved and must be set to 0.
-//
-#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE     (1 << 0)
-
-//
-// Smart Battery Description Table (SBST)
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      WarningEnergyLevel;
-  UINT32                      LowEnergyLevel;
-  UINT32                      CriticalEnergyLevel;
-} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
-
-//
-// SBST Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
-
-//
-// Embedded Controller Boot Resources Table (ECDT)
-// The table is followed by a null terminated ASCII string that contains
-// a fully qualified reference to the name space object.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER             Header;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  EcControl;
-  EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE  EcData;
-  UINT32                                  Uid;
-  UINT8                                   GpeBit;
-} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
-
-//
-// ECDT Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
-
-//
-// System Resource Affinity Table (SRAT.  The rest of the table
-// must be defined in a platform specific manner.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT32                      Reserved1;  // Must be set to 1
-  UINT64                      Reserved2;
-} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
-
-//
-// SRAT Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x02
-
-//
-// SRAT structure types.
-// All other values between 0x02 an 0xFF are reserved and
-// will be ignored by OSPM.
-//
-#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
-#define EFI_ACPI_3_0_MEMORY_AFFINITY                      0x01
-
-//
-// Processor Local APIC/SAPIC Affinity Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT8   ProximityDomain7To0;
-  UINT8   ApicId;
-  UINT32  Flags;
-  UINT8   LocalSapicEid;
-  UINT8   ProximityDomain31To8[3];
-  UINT8   Reserved[4];
-} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
-
-//
-// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
-//
-#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
-
-//
-// Memory Affinity Structure Definition
-//
-typedef struct {
-  UINT8   Type;
-  UINT8   Length;
-  UINT32  ProximityDomain;
-  UINT16  Reserved1;
-  UINT32  AddressBaseLow;
-  UINT32  AddressBaseHigh;
-  UINT32  LengthLow;
-  UINT32  LengthHigh;
-  UINT32  Reserved2;
-  UINT32  Flags;
-  UINT64  Reserved3;
-} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
-
-//
-// Memory Flags.  All other bits are reserved and must be 0.
-//
-#define EFI_ACPI_3_0_MEMORY_ENABLED       (1 << 0)
-#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
-#define EFI_ACPI_3_0_MEMORY_NONVOLATILE   (1 << 2)
-
-//
-// System Locality Distance Information Table (SLIT).
-// The rest of the table is a matrix.
-//
-typedef struct {
-  EFI_ACPI_DESCRIPTION_HEADER Header;
-  UINT64                      NumberOfSystemLocalities;
-} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
-
-//
-// SLIT Version (as defined in ACPI 3.0 spec.)
-//
-#define EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
-
-//
-// Known table signatures
-//
-//
-// "RSD PTR " Root System Description Pointer
-//
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352ULL
-
-//
-// "APIC" Multiple APIC Description Table
-//
-#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041
-
-//
-// "DSDT" Differentiated System Description Table
-//
-#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344
-
-//
-// "ECDT" Embedded Controller Boot Resources Table
-//
-#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
-
-//
-// "FACP" Fixed ACPI Description Table
-//
-#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
-
-//
-// "FACS" Firmware ACPI Control Structure
-//
-#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146
-
-//
-// "PSDT" Persistent System Description Table
-//
-#define EFI_ACPI_3_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350
-
-//
-// "RSDT" Root System Description Table
-//
-#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352
-
-//
-// "SBST" Smart Battery Specification Table
-//
-#define EFI_ACPI_3_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253
-
-//
-// "SLIT" System Locality Information Table
-//
-#define EFI_ACPI_3_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53
-
-//
-// "SRAT" System Resource Affinity Table
-//
-#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
-
-//
-// "SSDT" Secondary System Description Table
-//
-#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
-
-//
-// "XSDT" Extended System Description Table
-//
-#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358
-
-//
-// "BOOT" MS Simple Boot Spec
-//
-#define EFI_ACPI_3_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
-
-//
-// "CPEP" Corrected Platform Error Polling Table
-// See
-//
-#define EFI_ACPI_3_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE 0x50455043
-
-//
-// "DBGP" MS Debug Port Spec
-//
-#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
-
-//
-// "ETDT" Event Timer Description Table
-//
-#define EFI_ACPI_3_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445
-
-//
-// "HPET" IA-PC High Precision Event Timer Table
-//
-#define EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE 0x54455048
-
-//
-// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
-//
-#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE  0x4746434D
-
-//
-// "SPCR" Serial Port Console Redirection Table
-//
-#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053
-
-//
-// "SPMI" Server Platform Management Interface Table
-//
-#define EFI_ACPI_3_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE 0x494D5053
-
-//
-// "TCPA" Trusted Computing Platform Alliance Capabilities Table
-//
-#define EFI_ACPI_3_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE 0x41504354
-
-//
-// "WDRT" Watchdog Resource Table
-//
-#define EFI_ACPI_3_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE 0x54524457
-
-#pragma pack()
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/Bluetooth.h

@@ -1,56 +0,0 @@
-/** @file
-  This file contains the Bluetooth definitions that are consumed by drivers.
-  These definitions are from Bluetooth Core Specification Version 4.0 June, 2010
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _BLUETOOTH_H_
-#define _BLUETOOTH_H_
-
-#pragma pack(1)
-
-///
-/// BLUETOOTH_ADDRESS
-///
-typedef struct {
-  ///
-  /// 48bit Bluetooth device address.
-  ///
-  UINT8      Address[6];
-} BLUETOOTH_ADDRESS;
-
-///
-/// BLUETOOTH_CLASS_OF_DEVICE. See Bluetooth specification for detail.
-///
-typedef struct {
-  UINT8      FormatType:2;
-  UINT8      MinorDeviceClass: 6;
-  UINT16     MajorDeviceClass: 5;
-  UINT16     MajorServiceClass:11;
-} BLUETOOTH_CLASS_OF_DEVICE;
-
-///
-/// BLUETOOTH_LE_ADDRESS
-///
-typedef struct {
-  ///
-  /// 48-bit Bluetooth device address
-  ///
-  UINT8      Address[6];
-  ///
-  /// 0x00 - Public Device Address
-  /// 0x01 - Random Device Address
-  ///
-  UINT8      Type;
-} BLUETOOTH_LE_ADDRESS;
-
-#pragma pack()
-
-#define BLUETOOTH_HCI_COMMAND_LOCAL_READABLE_NAME_MAX_SIZE    248
-
-#define BLUETOOTH_HCI_LINK_KEY_SIZE                           16
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/EfiPci.h

@@ -1,51 +0,0 @@
-/** @file
-  Support for EFI PCI specification.
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _EFI_PCI_H_
-#define _EFI_PCI_H_
-
-//#include "pci22.h"
-//#include "pci23.h"
-//#include "pci30.h"
-
-#pragma pack(push, 1)
-
-typedef struct {
-  UINT8 Register;
-  UINT8 Function;
-  UINT8 Device;
-  UINT8 Bus;
-  UINT8 Reserved[4];
-} DEFIO_PCI_ADDR;
-
-#define EFI_ROOT_BRIDGE_LIST                            'eprb'
-#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE       0x0EF1
-
-typedef struct {
-  UINT16  Signature;    // 0xaa55
-  UINT16  InitializationSize;
-  UINT32  EfiSignature; // 0x0EF1
-  UINT16  EfiSubsystem;
-  UINT16  EfiMachineType;
-  UINT16  CompressionType;
-  UINT8   Reserved[8];
-  UINT16  EfiImageHeaderOffset;
-  UINT16  PcirOffset;
-} EFI_PCI_EXPANSION_ROM_HEADER;
-
-typedef union {
-  UINT8                           *Raw;
-  PCI_EXPANSION_ROM_HEADER        *Generic;
-  EFI_PCI_EXPANSION_ROM_HEADER    *Efi;
-  EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
-} EFI_PCI_ROM_HEADER;
-
-#pragma pack(pop)
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h

@@ -1,39 +0,0 @@
-/** @file
-  ACPI memory mapped configuration space access table definition, defined at
-  in the PCI Firmware Specification, version 3.0 draft version 0.5.
-  Specification is available at http://www.pcisig.com.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
-#define _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
-
-//
-// Ensure proper structure formats
-//
-#pragma pack(1)
-//
-// Memory Mapped Configuration Space Access Table (MCFG)
-// This table is a basic description table header followed by
-// a number of base address allocation structures.
-//
-typedef struct {
-  UINT64  BaseAddress;
-  UINT16  PciSegmentGroupNumber;
-  UINT8   StartBusNumber;
-  UINT8   EndBusNumber;
-  UINT32  Reserved;
-} EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE;
-
-//
-// MCFG Revision (defined in spec)
-//
-#define EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION  0x01
-
-#pragma pack()
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/PeImage.h

@@ -1,789 +0,0 @@
-/** @file
-  EFI image format for PE32+. Please note some data structures are different
-  for IA-32 and Itanium-based images, look for UINTN and the #ifdef EFI_IA64
-
-  @bug Fix text - doc as defined in MSFT EFI specification.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
-  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PE_IMAGE_H__
-#define __PE_IMAGE_H__
-
-//
-// PE32+ Subsystem type for EFI images
-//
-#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION         10
-#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
-#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER      12
-#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER      13
-
-//
-// BugBug: Need to get a real answer for this problem. This is not in the
-//         PE specification.
-//
-//         A SAL runtime driver does not get fixed up when a transition to
-//         virtual mode is made. In all other cases it should be treated
-//         like a EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER image
-//
-#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER  13
-
-//
-// PE32+ Machine type for EFI images
-//
-#define IMAGE_FILE_MACHINE_I386        0x014c
-#define IMAGE_FILE_MACHINE_EBC         0x0EBC
-#define IMAGE_FILE_MACHINE_X64         0x8664
-#define IMAGE_FILE_MACHINE_ARM         0x01c0  // Thumb only
-#define IMAGE_FILE_MACHINE_ARMT        0x01c2  // 32bit Mixed ARM and Thumb/Thumb 2  Little Endian
-#define IMAGE_FILE_MACHINE_ARM64       0xAA64  // 64bit ARM Architecture, Little Endian
-#define IMAGE_FILE_MACHINE_RISCV64     0x5064  // 64bit RISC-V ISA
-#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264  // 64bit LoongArch Architecture
-
-//
-// Support old names for backward compatible
-//
-#define EFI_IMAGE_MACHINE_IA32        IMAGE_FILE_MACHINE_I386
-#define EFI_IMAGE_MACHINE_EBC         IMAGE_FILE_MACHINE_EBC
-#define EFI_IMAGE_MACHINE_X64         IMAGE_FILE_MACHINE_X64
-#define EFI_IMAGE_MACHINE_ARMT        IMAGE_FILE_MACHINE_ARMT
-#define EFI_IMAGE_MACHINE_AARCH64     IMAGE_FILE_MACHINE_ARM64
-#define EFI_IMAGE_MACHINE_RISCV64     IMAGE_FILE_MACHINE_RISCV64
-#define EFI_IMAGE_MACHINE_LOONGARCH64 IMAGE_FILE_MACHINE_LOONGARCH64
-
-#define EFI_IMAGE_DOS_SIGNATURE     0x5A4D      // MZ
-#define EFI_IMAGE_OS2_SIGNATURE     0x454E      // NE
-#define EFI_IMAGE_OS2_SIGNATURE_LE  0x454C      // LE
-#define EFI_IMAGE_NT_SIGNATURE      0x00004550  // PE00
-#define EFI_IMAGE_EDOS_SIGNATURE    0x44454550  // PEED
-
-///
-/// PE images can start with an optional DOS header, so if an image is run
-///  under DOS it can print an error message.
-///
-typedef struct {
-  UINT16  e_magic;    // Magic number
-  UINT16  e_cblp;     // Bytes on last page of file
-  UINT16  e_cp;       // Pages in file
-  UINT16  e_crlc;     // Relocations
-  UINT16  e_cparhdr;  // Size of header in paragraphs
-  UINT16  e_minalloc; // Minimum extra paragraphs needed
-  UINT16  e_maxalloc; // Maximum extra paragraphs needed
-  UINT16  e_ss;       // Initial (relative) SS value
-  UINT16  e_sp;       // Initial SP value
-  UINT16  e_csum;     // Checksum
-  UINT16  e_ip;       // Initial IP value
-  UINT16  e_cs;       // Initial (relative) CS value
-  UINT16  e_lfarlc;   // File address of relocation table
-  UINT16  e_ovno;     // Overlay number
-  UINT16  e_res[4];   // Reserved words
-  UINT16  e_oemid;    // OEM identifier (for e_oeminfo)
-  UINT16  e_oeminfo;  // OEM information; e_oemid specific
-  UINT16  e_res2[10]; // Reserved words
-  UINT32  e_lfanew;   // File address of new exe header
-} EFI_IMAGE_DOS_HEADER;
-
-///
-/// File header format.
-///
-typedef struct {
-  UINT16  Machine;
-  UINT16  NumberOfSections;
-  UINT32  TimeDateStamp;
-  UINT32  PointerToSymbolTable;
-  UINT32  NumberOfSymbols;
-  UINT16  SizeOfOptionalHeader;
-  UINT16  Characteristics;
-} EFI_IMAGE_FILE_HEADER;
-
-#define EFI_IMAGE_SIZEOF_FILE_HEADER        20
-
-#define EFI_IMAGE_FILE_RELOCS_STRIPPED      0x0001  // Relocation info stripped from file.
-#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE     0x0002  // File is executable  (i.e. no unresolved externel references).
-#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED   0x0004  // Line nunbers stripped from file.
-#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED  0x0008  // Local symbols stripped from file.
-#define EFI_IMAGE_FILE_LARGE_ADDRESS_AWARE  0x0020  // Supports addresses > 2-GB
-#define EFI_IMAGE_FILE_BYTES_REVERSED_LO    0x0080  // Bytes of machine word are reversed.
-#define EFI_IMAGE_FILE_32BIT_MACHINE        0x0100  // 32 bit word machine.
-#define EFI_IMAGE_FILE_DEBUG_STRIPPED       0x0200  // Debugging info stripped from file in .DBG file
-#define EFI_IMAGE_FILE_SYSTEM               0x1000  // System File.
-#define EFI_IMAGE_FILE_DLL                  0x2000  // File is a DLL.
-#define EFI_IMAGE_FILE_BYTES_REVERSED_HI    0x8000  // Bytes of machine word are reversed.
-#define EFI_IMAGE_FILE_MACHINE_UNKNOWN      0
-#define EFI_IMAGE_FILE_MACHINE_I386         0x14c   // Intel 386.
-#define EFI_IMAGE_FILE_MACHINE_R3000        0x162   // MIPS* little-endian, 0540 big-endian
-#define EFI_IMAGE_FILE_MACHINE_R4000        0x166   // MIPS* little-endian
-#define EFI_IMAGE_FILE_MACHINE_ALPHA        0x184   // Alpha_AXP*
-#define EFI_IMAGE_FILE_MACHINE_POWERPC      0x1F0   // IBM* PowerPC Little-Endian
-#define EFI_IMAGE_FILE_MACHINE_TAHOE        0x7cc   // Intel EM machine
-//
-// * Other names and brands may be claimed as the property of others.
-//
-
-///
-/// Directory format.
-///
-typedef struct {
-  UINT32  VirtualAddress;
-  UINT32  Size;
-} EFI_IMAGE_DATA_DIRECTORY;
-
-#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
-
-typedef struct {
-  UINT16  Magic;
-  UINT8   MajorLinkerVersion;
-  UINT8   MinorLinkerVersion;
-  UINT32  SizeOfCode;
-  UINT32  SizeOfInitializedData;
-  UINT32  SizeOfUninitializedData;
-  UINT32  AddressOfEntryPoint;
-  UINT32  BaseOfCode;
-  UINT32  BaseOfData;
-  UINT32  BaseOfBss;
-  UINT32  GprMask;
-  UINT32  CprMask[4];
-  UINT32  GpValue;
-} EFI_IMAGE_ROM_OPTIONAL_HEADER;
-
-#define EFI_IMAGE_ROM_OPTIONAL_HDR_MAGIC      0x107
-#define EFI_IMAGE_SIZEOF_ROM_OPTIONAL_HEADER  sizeof (EFI_IMAGE_ROM_OPTIONAL_HEADER)
-
-typedef struct {
-  EFI_IMAGE_FILE_HEADER         FileHeader;
-  EFI_IMAGE_ROM_OPTIONAL_HEADER OptionalHeader;
-} EFI_IMAGE_ROM_HEADERS;
-
-///
-/// @attention
-/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
-/// are for use ONLY by tools.  All proper EFI code MUST use
-/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
-///
-#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
-
-typedef struct {
-  //
-  // Standard fields.
-  //
-  UINT16                    Magic;
-  UINT8                     MajorLinkerVersion;
-  UINT8                     MinorLinkerVersion;
-  UINT32                    SizeOfCode;
-  UINT32                    SizeOfInitializedData;
-  UINT32                    SizeOfUninitializedData;
-  UINT32                    AddressOfEntryPoint;
-  UINT32                    BaseOfCode;
-  UINT32                    BaseOfData;
-  //
-  // NT additional fields.
-  //
-  UINT32                    ImageBase;
-  UINT32                    SectionAlignment;
-  UINT32                    FileAlignment;
-  UINT16                    MajorOperatingSystemVersion;
-  UINT16                    MinorOperatingSystemVersion;
-  UINT16                    MajorImageVersion;
-  UINT16                    MinorImageVersion;
-  UINT16                    MajorSubsystemVersion;
-  UINT16                    MinorSubsystemVersion;
-  UINT32                    Win32VersionValue;
-  UINT32                    SizeOfImage;
-  UINT32                    SizeOfHeaders;
-  UINT32                    CheckSum;
-  UINT16                    Subsystem;
-  UINT16                    DllCharacteristics;
-  UINT32                    SizeOfStackReserve;
-  UINT32                    SizeOfStackCommit;
-  UINT32                    SizeOfHeapReserve;
-  UINT32                    SizeOfHeapCommit;
-  UINT32                    LoaderFlags;
-  UINT32                    NumberOfRvaAndSizes;
-  EFI_IMAGE_DATA_DIRECTORY  DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
-} EFI_IMAGE_OPTIONAL_HEADER32;
-
-///
-/// @attention
-/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
-/// are for use ONLY by tools.  All proper EFI code MUST use
-/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
-///
-#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
-
-typedef struct {
-  //
-  // Standard fields.
-  //
-  UINT16                    Magic;
-  UINT8                     MajorLinkerVersion;
-  UINT8                     MinorLinkerVersion;
-  UINT32                    SizeOfCode;
-  UINT32                    SizeOfInitializedData;
-  UINT32                    SizeOfUninitializedData;
-  UINT32                    AddressOfEntryPoint;
-  UINT32                    BaseOfCode;
-  //
-  // NT additional fields.
-  //
-  UINT64                    ImageBase;
-  UINT32                    SectionAlignment;
-  UINT32                    FileAlignment;
-  UINT16                    MajorOperatingSystemVersion;
-  UINT16                    MinorOperatingSystemVersion;
-  UINT16                    MajorImageVersion;
-  UINT16                    MinorImageVersion;
-  UINT16                    MajorSubsystemVersion;
-  UINT16                    MinorSubsystemVersion;
-  UINT32                    Win32VersionValue;
-  UINT32                    SizeOfImage;
-  UINT32                    SizeOfHeaders;
-  UINT32                    CheckSum;
-  UINT16                    Subsystem;
-  UINT16                    DllCharacteristics;
-  UINT64                    SizeOfStackReserve;
-  UINT64                    SizeOfStackCommit;
-  UINT64                    SizeOfHeapReserve;
-  UINT64                    SizeOfHeapCommit;
-  UINT32                    LoaderFlags;
-  UINT32                    NumberOfRvaAndSizes;
-  EFI_IMAGE_DATA_DIRECTORY  DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
-} EFI_IMAGE_OPTIONAL_HEADER64;
-
-///
-/// @attention
-/// EFI_IMAGE_NT_HEADERS32 and EFI_IMAGE_HEADERS64 are for use ONLY
-/// by tools.  All proper EFI code MUST use EFI_IMAGE_NT_HEADERS ONLY!!!
-///
-typedef struct {
-  UINT32                      Signature;
-  EFI_IMAGE_FILE_HEADER       FileHeader;
-  EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
-} EFI_IMAGE_NT_HEADERS32;
-
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
-
-typedef struct {
-  UINT32                      Signature;
-  EFI_IMAGE_FILE_HEADER       FileHeader;
-  EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
-} EFI_IMAGE_NT_HEADERS64;
-
-#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
-
-//
-// Subsystem Values
-//
-#define EFI_IMAGE_SUBSYSTEM_UNKNOWN     0
-#define EFI_IMAGE_SUBSYSTEM_NATIVE      1
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
-#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3.
-#define EFI_IMAGE_SUBSYSTEM_OS2_CUI     5
-#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI   7
-
-//
-// Directory Entries
-//
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT      0
-#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT      1
-#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE    2
-#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION   3
-#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY    4
-#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC   5
-#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG       6
-#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT   7
-#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR   8
-#define EFI_IMAGE_DIRECTORY_ENTRY_TLS         9
-#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
-
-//
-// Section header format.
-//
-#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
-
-typedef struct {
-  UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
-  union {
-    UINT32  PhysicalAddress;
-    UINT32  VirtualSize;
-  } Misc;
-  UINT32  VirtualAddress;
-  UINT32  SizeOfRawData;
-  UINT32  PointerToRawData;
-  UINT32  PointerToRelocations;
-  UINT32  PointerToLinenumbers;
-  UINT16  NumberOfRelocations;
-  UINT16  NumberOfLinenumbers;
-  UINT32  Characteristics;
-} EFI_IMAGE_SECTION_HEADER;
-
-#define EFI_IMAGE_SIZEOF_SECTION_HEADER       40
-
-#define EFI_IMAGE_SCN_TYPE_NO_PAD             0x00000008  // Reserved.
-#define EFI_IMAGE_SCN_CNT_CODE                0x00000020
-#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA    0x00000040
-#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA  0x00000080
-
-#define EFI_IMAGE_SCN_LNK_OTHER               0x00000100  // Reserved.
-#define EFI_IMAGE_SCN_LNK_INFO                0x00000200  // Section contains comments or some other type of information.
-#define EFI_IMAGE_SCN_LNK_REMOVE              0x00000800  // Section contents will not become part of image.
-#define EFI_IMAGE_SCN_LNK_COMDAT              0x00001000
-
-#define EFI_IMAGE_SCN_ALIGN_1BYTES            0x00100000
-#define EFI_IMAGE_SCN_ALIGN_2BYTES            0x00200000
-#define EFI_IMAGE_SCN_ALIGN_4BYTES            0x00300000
-#define EFI_IMAGE_SCN_ALIGN_8BYTES            0x00400000
-#define EFI_IMAGE_SCN_ALIGN_16BYTES           0x00500000
-#define EFI_IMAGE_SCN_ALIGN_32BYTES           0x00600000
-#define EFI_IMAGE_SCN_ALIGN_64BYTES           0x00700000
-
-#define EFI_IMAGE_SCN_MEM_DISCARDABLE         0x02000000
-#define EFI_IMAGE_SCN_MEM_NOT_CACHED          0x04000000
-#define EFI_IMAGE_SCN_MEM_NOT_PAGED           0x08000000
-#define EFI_IMAGE_SCN_MEM_SHARED              0x10000000
-#define EFI_IMAGE_SCN_MEM_EXECUTE             0x20000000
-#define EFI_IMAGE_SCN_MEM_READ                0x40000000
-#define EFI_IMAGE_SCN_MEM_WRITE               0x80000000
-
-///
-/// Symbol format.
-///
-#define EFI_IMAGE_SIZEOF_SYMBOL 18
-
-//
-// Section values.
-//
-// Symbols have a section number of the section in which they are
-// defined. Otherwise, section numbers have the following meanings:
-//
-#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0  // Symbol is undefined or is common.
-#define EFI_IMAGE_SYM_ABSOLUTE  (UINT16) -1 // Symbol is an absolute value.
-#define EFI_IMAGE_SYM_DEBUG     (UINT16) -2 // Symbol is a special debug item.
-//
-// Type (fundamental) values.
-//
-#define EFI_IMAGE_SYM_TYPE_NULL   0   // no type.
-#define EFI_IMAGE_SYM_TYPE_VOID   1   //
-#define EFI_IMAGE_SYM_TYPE_CHAR   2   // type character.
-#define EFI_IMAGE_SYM_TYPE_SHORT  3   // type short integer.
-#define EFI_IMAGE_SYM_TYPE_INT    4
-#define EFI_IMAGE_SYM_TYPE_LONG   5
-#define EFI_IMAGE_SYM_TYPE_FLOAT  6
-#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
-#define EFI_IMAGE_SYM_TYPE_STRUCT 8
-#define EFI_IMAGE_SYM_TYPE_UNION  9
-#define EFI_IMAGE_SYM_TYPE_ENUM   10  // enumeration.
-#define EFI_IMAGE_SYM_TYPE_MOE    11  // member of enumeration.
-#define EFI_IMAGE_SYM_TYPE_BYTE   12
-#define EFI_IMAGE_SYM_TYPE_WORD   13
-#define EFI_IMAGE_SYM_TYPE_UINT   14
-#define EFI_IMAGE_SYM_TYPE_DWORD  15
-
-//
-// Type (derived) values.
-//
-#define EFI_IMAGE_SYM_DTYPE_NULL      0 // no derived type.
-#define EFI_IMAGE_SYM_DTYPE_POINTER   1
-#define EFI_IMAGE_SYM_DTYPE_FUNCTION  2
-#define EFI_IMAGE_SYM_DTYPE_ARRAY     3
-
-//
-// Storage classes.
-//
-#define EFI_IMAGE_SYM_CLASS_END_OF_FUNCTION   (UINT8) -1
-#define EFI_IMAGE_SYM_CLASS_NULL              0
-#define EFI_IMAGE_SYM_CLASS_AUTOMATIC         1
-#define EFI_IMAGE_SYM_CLASS_EXTERNAL          2
-#define EFI_IMAGE_SYM_CLASS_STATIC            3
-#define EFI_IMAGE_SYM_CLASS_REGISTER          4
-#define EFI_IMAGE_SYM_CLASS_EXTERNAL_DEF      5
-#define EFI_IMAGE_SYM_CLASS_LABEL             6
-#define EFI_IMAGE_SYM_CLASS_UNDEFINED_LABEL   7
-#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_STRUCT  8
-#define EFI_IMAGE_SYM_CLASS_ARGUMENT          9
-#define EFI_IMAGE_SYM_CLASS_STRUCT_TAG        10
-#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_UNION   11
-#define EFI_IMAGE_SYM_CLASS_UNION_TAG         12
-#define EFI_IMAGE_SYM_CLASS_TYPE_DEFINITION   13
-#define EFI_IMAGE_SYM_CLASS_UNDEFINED_STATIC  14
-#define EFI_IMAGE_SYM_CLASS_ENUM_TAG          15
-#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_ENUM    16
-#define EFI_IMAGE_SYM_CLASS_REGISTER_PARAM    17
-#define EFI_IMAGE_SYM_CLASS_BIT_FIELD         18
-#define EFI_IMAGE_SYM_CLASS_BLOCK             100
-#define EFI_IMAGE_SYM_CLASS_FUNCTION          101
-#define EFI_IMAGE_SYM_CLASS_END_OF_STRUCT     102
-#define EFI_IMAGE_SYM_CLASS_FILE              103
-#define EFI_IMAGE_SYM_CLASS_SECTION           104
-#define EFI_IMAGE_SYM_CLASS_WEAK_EXTERNAL     105
-
-//
-// type packing constants
-//
-#define EFI_IMAGE_N_BTMASK  017
-#define EFI_IMAGE_N_TMASK   060
-#define EFI_IMAGE_N_TMASK1  0300
-#define EFI_IMAGE_N_TMASK2  0360
-#define EFI_IMAGE_N_BTSHFT  4
-#define EFI_IMAGE_N_TSHIFT  2
-
-//
-// Communal selection types.
-//
-#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES    1
-#define EFI_IMAGE_COMDAT_SELECT_ANY             2
-#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE       3
-#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH     4
-#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE     5
-
-#define EFI_IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY  1
-#define EFI_IMAGE_WEAK_EXTERN_SEARCH_LIBRARY    2
-#define EFI_IMAGE_WEAK_EXTERN_SEARCH_ALIAS      3
-
-///
-/// Relocation format.
-///
-typedef struct {
-  UINT32  VirtualAddress;
-  UINT32  SymbolTableIndex;
-  UINT16  Type;
-} EFI_IMAGE_RELOCATION;
-
-#define EFI_IMAGE_SIZEOF_RELOCATION 10
-
-//
-// I386 relocation types.
-//
-#define EFI_IMAGE_REL_I386_ABSOLUTE 0   // Reference is absolute, no relocation is necessary
-#define EFI_IMAGE_REL_I386_DIR16    01  // Direct 16-bit reference to the symbols virtual address
-#define EFI_IMAGE_REL_I386_REL16    02  // PC-relative 16-bit reference to the symbols virtual address
-#define EFI_IMAGE_REL_I386_DIR32    06  // Direct 32-bit reference to the symbols virtual address
-#define EFI_IMAGE_REL_I386_DIR32NB  07  // Direct 32-bit reference to the symbols virtual address, base not included
-#define EFI_IMAGE_REL_I386_SEG12    09  // Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
-#define EFI_IMAGE_REL_I386_SECTION  010
-#define EFI_IMAGE_REL_I386_SECREL   011
-#define EFI_IMAGE_REL_I386_REL32    020 // PC-relative 32-bit reference to the symbols virtual address
-
-//
-// x64 processor relocation types.
-//
-#define IMAGE_REL_AMD64_ABSOLUTE  0x0000
-#define IMAGE_REL_AMD64_ADDR64    0x0001
-#define IMAGE_REL_AMD64_ADDR32    0x0002
-#define IMAGE_REL_AMD64_ADDR32NB  0x0003
-#define IMAGE_REL_AMD64_REL32      0x0004
-#define IMAGE_REL_AMD64_REL32_1    0x0005
-#define IMAGE_REL_AMD64_REL32_2    0x0006
-#define IMAGE_REL_AMD64_REL32_3    0x0007
-#define IMAGE_REL_AMD64_REL32_4    0x0008
-#define IMAGE_REL_AMD64_REL32_5    0x0009
-#define IMAGE_REL_AMD64_SECTION    0x000A
-#define IMAGE_REL_AMD64_SECREL    0x000B
-#define IMAGE_REL_AMD64_SECREL7    0x000C
-#define IMAGE_REL_AMD64_TOKEN      0x000D
-#define IMAGE_REL_AMD64_SREL32    0x000E
-#define IMAGE_REL_AMD64_PAIR      0x000F
-#define IMAGE_REL_AMD64_SSPAN32    0x0010
-
-///
-/// Based relocation format.
-///
-typedef struct {
-  UINT32  VirtualAddress;
-  UINT32  SizeOfBlock;
-} EFI_IMAGE_BASE_RELOCATION;
-
-#define EFI_IMAGE_SIZEOF_BASE_RELOCATION  8
-
-//
-// Based relocation types.
-//
-#define EFI_IMAGE_REL_BASED_ABSOLUTE             0
-#define EFI_IMAGE_REL_BASED_HIGH                 1
-#define EFI_IMAGE_REL_BASED_LOW                  2
-#define EFI_IMAGE_REL_BASED_HIGHLOW              3
-#define EFI_IMAGE_REL_BASED_HIGHADJ              4
-#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR         5
-#define EFI_IMAGE_REL_BASED_ARM_MOV32A           5
-#define EFI_IMAGE_REL_BASED_RISCV_HI20           5
-#define EFI_IMAGE_REL_BASED_ARM_MOV32T           7
-#define EFI_IMAGE_REL_BASED_RISCV_LOW12I         7
-#define EFI_IMAGE_REL_BASED_RISCV_LOW12S         8
-#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA  8
-#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA  8
-#define EFI_IMAGE_REL_BASED_IA64_IMM64           9
-#define EFI_IMAGE_REL_BASED_DIR64                10
-
-
-///
-/// Line number format.
-///
-typedef struct {
-  union {
-    UINT32  SymbolTableIndex; // Symbol table index of function name if Linenumber is 0.
-    UINT32  VirtualAddress;   // Virtual address of line number.
-  } Type;
-  UINT16  Linenumber;         // Line number.
-} EFI_IMAGE_LINENUMBER;
-
-#define EFI_IMAGE_SIZEOF_LINENUMBER 6
-
-//
-// Archive format.
-//
-#define EFI_IMAGE_ARCHIVE_START_SIZE        8
-#define EFI_IMAGE_ARCHIVE_START             "!<arch>\n"
-#define EFI_IMAGE_ARCHIVE_END               "`\n"
-#define EFI_IMAGE_ARCHIVE_PAD               "\n"
-#define EFI_IMAGE_ARCHIVE_LINKER_MEMBER     "/               "
-#define EFI_IMAGE_ARCHIVE_LONGNAMES_MEMBER  "//              "
-
-typedef struct {
-  UINT8 Name[16];     // File member name - `/' terminated.
-  UINT8 Date[12];     // File member date - decimal.
-  UINT8 UserID[6];    // File member user id - decimal.
-  UINT8 GroupID[6];   // File member group id - decimal.
-  UINT8 Mode[8];      // File member mode - octal.
-  UINT8 Size[10];     // File member size - decimal.
-  UINT8 EndHeader[2]; // String to end header.
-} EFI_IMAGE_ARCHIVE_MEMBER_HEADER;
-
-#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
-
-//
-// DLL support.
-//
-
-///
-/// DLL Export Format
-///
-typedef struct {
-  UINT32  Characteristics;
-  UINT32  TimeDateStamp;
-  UINT16  MajorVersion;
-  UINT16  MinorVersion;
-  UINT32  Name;
-  UINT32  Base;
-  UINT32  NumberOfFunctions;
-  UINT32  NumberOfNames;
-  UINT32  AddressOfFunctions;
-  UINT32  AddressOfNames;
-  UINT32  AddressOfNameOrdinals;
-} EFI_IMAGE_EXPORT_DIRECTORY;
-
-//
-// Based export types.
-//
-#define EFI_IMAGE_EXPORT_ORDINAL_BASE     1
-#define EFI_IMAGE_EXPORT_ADDR_SIZE        4
-#define EFI_IMAGE_EXPORT_ORDINAL_SIZE     2
-
-///
-/// DLL support.
-/// Import Format
-///
-typedef struct {
-  UINT16  Hint;
-  UINT8   Name[1];
-} EFI_IMAGE_IMPORT_BY_NAME;
-
-typedef struct {
-  union {
-    UINT32                    Function;
-    UINT32                    Ordinal;
-    EFI_IMAGE_IMPORT_BY_NAME  *AddressOfData;
-  } u1;
-} EFI_IMAGE_THUNK_DATA;
-
-#define EFI_IMAGE_ORDINAL_FLAG              0x80000000
-#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal)  ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0)
-#define EFI_IMAGE_ORDINAL(Ordinal)          (Ordinal & 0xffff)
-
-typedef struct {
-  UINT32                Characteristics;
-  UINT32                TimeDateStamp;
-  UINT32                ForwarderChain;
-  UINT32                Name;
-  EFI_IMAGE_THUNK_DATA  *FirstThunk;
-} EFI_IMAGE_IMPORT_DESCRIPTOR;
-
-///
-/// Debug Format
-///
-#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW               2
-#define EFI_IMAGE_DEBUG_TYPE_EX_DLLCHARACTERISTICS  20
-
-typedef struct {
-  UINT32  Characteristics;
-  UINT32  TimeDateStamp;
-  UINT16  MajorVersion;
-  UINT16  MinorVersion;
-  UINT32  Type;
-  UINT32  SizeOfData;
-  UINT32  RVA;
-  UINT32  FileOffset;
-} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY;
-
-#define CODEVIEW_SIGNATURE_NB10 0x3031424E  // "NB10"
-typedef struct {
-  UINT32  Signature;                        // "NB10"
-  UINT32  Unknown;
-  UINT32  Unknown2;
-  UINT32  Unknown3;
-  //
-  // Filename of .PDB goes here
-  //
-} EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY;
-
-#define CODEVIEW_SIGNATURE_RSDS 0x53445352  // "RSDS"
-typedef struct {
-  UINT32  Signature;                        // "RSDS"
-  UINT32  Unknown;
-  UINT32  Unknown2;
-  UINT32  Unknown3;
-  UINT32  Unknown4;
-  UINT32  Unknown5;
-  //
-  // Filename of .PDB goes here
-  //
-} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY;
-
-///
-/// Debug Data Structure defined by Apple Mach-O to Coff utility
-///
-#define CODEVIEW_SIGNATURE_MTOC  SIGNATURE_32('M', 'T', 'O', 'C')
-typedef struct {
-  UINT32    Signature;                       ///< "MTOC"
-  EFI_GUID  MachOUuid;
-  //
-  //  Filename of .DLL (Mach-O with debug info) goes here
-  //
-} EFI_IMAGE_DEBUG_CODEVIEW_MTOC_ENTRY;
-
-///
-/// Extended DLL Characteristics
-///
-#define EFI_IMAGE_DLLCHARACTERISTICS_EX_CET_COMPAT          0x0001
-#define EFI_IMAGE_DLLCHARACTERISTICS_EX_FORWARD_CFI_COMPAT  0x0040
-
-typedef struct {
-  UINT32  DllCharacteristicsEx;
-} EFI_IMAGE_DEBUG_EX_DLLCHARACTERISTICS_ENTRY;
-
-//
-// .pdata entries for X64
-//
-typedef struct {
-  UINT32  FunctionStartAddress;
-  UINT32  FunctionEndAddress;
-  UINT32  UnwindInfoAddress;
-} RUNTIME_FUNCTION;
-
-typedef struct {
-  UINT8  Version:3;
-  UINT8  Flags:5;
-  UINT8  SizeOfProlog;
-  UINT8  CountOfUnwindCodes;
-  UINT8  FrameRegister:4;
-  UINT8  FrameRegisterOffset:4;
-} UNWIND_INFO;
-
-///
-/// Resource format.
-///
-typedef struct {
-  UINT32  Characteristics;
-  UINT32  TimeDateStamp;
-  UINT16  MajorVersion;
-  UINT16  MinorVersion;
-  UINT16  NumberOfNamedEntries;
-  UINT16  NumberOfIdEntries;
-  //
-  // Array of EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY entries goes here.
-  //
-} EFI_IMAGE_RESOURCE_DIRECTORY;
-
-///
-/// Resource directory entry format.
-///
-typedef struct {
-  union {
-    struct {
-      UINT32  NameOffset:31;
-      UINT32  NameIsString:1;
-    } s;
-    UINT32  Id;
-  } u1;
-  union {
-    UINT32  OffsetToData;
-    struct {
-      UINT32  OffsetToDirectory:31;
-      UINT32  DataIsDirectory:1;
-    } s;
-  } u2;
-} EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY;
-
-///
-/// Resource directory entry for string.
-///
-typedef struct {
-  UINT16  Length;
-  CHAR16  String[1];
-} EFI_IMAGE_RESOURCE_DIRECTORY_STRING;
-
-///
-/// Resource directory entry for data array.
-///
-typedef struct {
-  UINT32  OffsetToData;
-  UINT32  Size;
-  UINT32  CodePage;
-  UINT32  Reserved;
-} EFI_IMAGE_RESOURCE_DATA_ENTRY;
-
-///
-/// Header format for TE images
-///
-typedef struct {
-  UINT16                    Signature;            // signature for TE format = "VZ"
-  UINT16                    Machine;              // from the original file header
-  UINT8                     NumberOfSections;     // from the original file header
-  UINT8                     Subsystem;            // from original optional header
-  UINT16                    StrippedSize;         // how many bytes we removed from the header
-  UINT32                    AddressOfEntryPoint;  // offset to entry point -- from original optional header
-  UINT32                    BaseOfCode;           // from original image -- required for ITP debug
-  UINT64                    ImageBase;            // from original file header
-  EFI_IMAGE_DATA_DIRECTORY  DataDirectory[2];     // only base relocation and debug directory
-} EFI_TE_IMAGE_HEADER;
-
-#define EFI_TE_IMAGE_HEADER_SIGNATURE 0x5A56      // "VZ"
-
-//
-// Data directory indexes in our TE image header
-//
-#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC  0
-#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG      1
-
-
-//
-// Union of PE32, PE32+, and TE headers
-//
-typedef union {
-  EFI_IMAGE_NT_HEADERS32   Pe32;
-  EFI_IMAGE_NT_HEADERS64   Pe32Plus;
-  EFI_TE_IMAGE_HEADER      Te;
-} EFI_IMAGE_OPTIONAL_HEADER_UNION;
-
-typedef union {
-  EFI_IMAGE_NT_HEADERS32            *Pe32;
-  EFI_IMAGE_NT_HEADERS64            *Pe32Plus;
-  EFI_TE_IMAGE_HEADER               *Te;
-  EFI_IMAGE_OPTIONAL_HEADER_UNION   *Union;
-} EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION;
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/pci22.h

@@ -1,536 +0,0 @@
-/** @file
-  Support for PCI 2.2 standard.
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _PCI22_H
-#define _PCI22_H
-
-#define PCI_MAX_SEGMENT 0
-
-#define PCI_MAX_BUS     255
-
-#define PCI_MAX_DEVICE  31
-#define PCI_MAX_FUNC    7
-
-//
-// Command
-//
-#define PCI_VGA_PALETTE_SNOOP_DISABLED  0x20
-
-#pragma pack(push, 1)
-typedef struct {
-  UINT16  VendorId;
-  UINT16  DeviceId;
-  UINT16  Command;
-  UINT16  Status;
-  UINT8   RevisionID;
-  UINT8   ClassCode[3];
-  UINT8   CacheLineSize;
-  UINT8   LatencyTimer;
-  UINT8   HeaderType;
-  UINT8   BIST;
-} PCI_DEVICE_INDEPENDENT_REGION;
-
-typedef struct {
-  UINT32  Bar[6];
-  UINT32  CISPtr;
-  UINT16  SubsystemVendorID;
-  UINT16  SubsystemID;
-  UINT32  ExpansionRomBar;
-  UINT8   CapabilityPtr;
-  UINT8   Reserved1[3];
-  UINT32  Reserved2;
-  UINT8   InterruptLine;
-  UINT8   InterruptPin;
-  UINT8   MinGnt;
-  UINT8   MaxLat;
-} PCI_DEVICE_HEADER_TYPE_REGION;
-
-typedef struct {
-  PCI_DEVICE_INDEPENDENT_REGION Hdr;
-  PCI_DEVICE_HEADER_TYPE_REGION Device;
-} PCI_TYPE00;
-
-typedef struct {
-  UINT32  Bar[2];
-  UINT8   PrimaryBus;
-  UINT8   SecondaryBus;
-  UINT8   SubordinateBus;
-  UINT8   SecondaryLatencyTimer;
-  UINT8   IoBase;
-  UINT8   IoLimit;
-  UINT16  SecondaryStatus;
-  UINT16  MemoryBase;
-  UINT16  MemoryLimit;
-  UINT16  PrefetchableMemoryBase;
-  UINT16  PrefetchableMemoryLimit;
-  UINT32  PrefetchableBaseUpper32;
-  UINT32  PrefetchableLimitUpper32;
-  UINT16  IoBaseUpper16;
-  UINT16  IoLimitUpper16;
-  UINT8   CapabilityPtr;
-  UINT8   Reserved[3];
-  UINT32  ExpansionRomBAR;
-  UINT8   InterruptLine;
-  UINT8   InterruptPin;
-  UINT16  BridgeControl;
-} PCI_BRIDGE_CONTROL_REGISTER;
-
-typedef struct {
-  PCI_DEVICE_INDEPENDENT_REGION Hdr;
-  PCI_BRIDGE_CONTROL_REGISTER   Bridge;
-} PCI_TYPE01;
-
-typedef union {
-  PCI_TYPE00  Device;
-  PCI_TYPE01  Bridge;
-} PCI_TYPE_GENERIC;
-
-typedef struct {
-  UINT32  CardBusSocketReg; // Cardbus Socket/ExCA Base
-  // Address Register
-  //
-  UINT16  Reserved;
-  UINT16  SecondaryStatus;      // Secondary Status
-  UINT8   PciBusNumber;         // PCI Bus Number
-  UINT8   CardBusBusNumber;     // CardBus Bus Number
-  UINT8   SubordinateBusNumber; // Subordinate Bus Number
-  UINT8   CardBusLatencyTimer;  // CardBus Latency Timer
-  UINT32  MemoryBase0;          // Memory Base Register 0
-  UINT32  MemoryLimit0;         // Memory Limit Register 0
-  UINT32  MemoryBase1;
-  UINT32  MemoryLimit1;
-  UINT32  IoBase0;
-  UINT32  IoLimit0;             // I/O Base Register 0
-  UINT32  IoBase1;              // I/O Limit Register 0
-  UINT32  IoLimit1;
-  UINT8   InterruptLine;        // Interrupt Line
-  UINT8   InterruptPin;         // Interrupt Pin
-  UINT16  BridgeControl;        // Bridge Control
-} PCI_CARDBUS_CONTROL_REGISTER;
-
-//
-// Definitions of PCI class bytes and manipulation macros.
-//
-#define PCI_CLASS_OLD                 0x00
-#define PCI_CLASS_OLD_OTHER           0x00
-#define PCI_CLASS_OLD_VGA             0x01
-
-#define PCI_CLASS_MASS_STORAGE        0x01
-#define PCI_CLASS_MASS_STORAGE_SCSI   0x00
-#define PCI_CLASS_MASS_STORAGE_IDE    0x01  // obsolete
-#define PCI_CLASS_IDE                 0x01
-#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
-#define PCI_CLASS_MASS_STORAGE_IPI    0x03
-#define PCI_CLASS_MASS_STORAGE_RAID   0x04
-#define PCI_CLASS_MASS_STORAGE_OTHER  0x80
-
-#define PCI_CLASS_NETWORK             0x02
-#define PCI_CLASS_NETWORK_ETHERNET    0x00
-#define PCI_CLASS_ETHERNET            0x00  // obsolete
-#define PCI_CLASS_NETWORK_TOKENRING   0x01
-#define PCI_CLASS_NETWORK_FDDI        0x02
-#define PCI_CLASS_NETWORK_ATM         0x03
-#define PCI_CLASS_NETWORK_ISDN        0x04
-#define PCI_CLASS_NETWORK_OTHER       0x80
-
-#define PCI_CLASS_DISPLAY             0x03
-#define PCI_CLASS_DISPLAY_CTRL        0x03  // obsolete
-#define PCI_CLASS_DISPLAY_VGA         0x00
-#define PCI_CLASS_VGA                 0x00  // obsolete
-#define PCI_CLASS_DISPLAY_XGA         0x01
-#define PCI_CLASS_DISPLAY_3D          0x02
-#define PCI_CLASS_DISPLAY_OTHER       0x80
-#define PCI_CLASS_DISPLAY_GFX         0x80
-#define PCI_CLASS_GFX                 0x80  // obsolete
-#define PCI_CLASS_BRIDGE              0x06
-#define PCI_CLASS_BRIDGE_HOST         0x00
-#define PCI_CLASS_BRIDGE_ISA          0x01
-#define PCI_CLASS_ISA                 0x01  // obsolete
-#define PCI_CLASS_BRIDGE_EISA         0x02
-#define PCI_CLASS_BRIDGE_MCA          0x03
-#define PCI_CLASS_BRIDGE_P2P          0x04
-#define PCI_CLASS_BRIDGE_PCMCIA       0x05
-#define PCI_CLASS_BRIDGE_NUBUS        0x06
-#define PCI_CLASS_BRIDGE_CARDBUS      0x07
-#define PCI_CLASS_BRIDGE_RACEWAY      0x08
-#define PCI_CLASS_BRIDGE_ISA_PDECODE  0x80
-#define PCI_CLASS_ISA_POSITIVE_DECODE 0x80  // obsolete
-
-#define PCI_CLASS_SCC                 0x07  // Simple communications controllers
-#define PCI_SUBCLASS_SERIAL           0x00
-#define PCI_IF_GENERIC_XT             0x00
-#define PCI_IF_16450                  0x01
-#define PCI_IF_16550                  0x02
-#define PCI_IF_16650                  0x03
-#define PCI_IF_16750                  0x04
-#define PCI_IF_16850                  0x05
-#define PCI_IF_16950                  0x06
-#define PCI_SUBCLASS_PARALLEL         0x01
-#define PCI_IF_PARALLEL_PORT          0x00
-#define PCI_IF_BI_DIR_PARALLEL_PORT   0x01
-#define PCI_IF_ECP_PARALLEL_PORT      0x02
-#define PCI_IF_1284_CONTROLLER        0x03
-#define PCI_IF_1284_DEVICE            0xFE
-#define PCI_SUBCLASS_MULTIPORT_SERIAL 0x02
-#define PCI_SUBCLASS_MODEM            0x03
-#define PCI_IF_GENERIC_MODEM          0x00
-#define PCI_IF_16450_MODEM            0x01
-#define PCI_IF_16550_MODEM            0x02
-#define PCI_IF_16650_MODEM            0x03
-#define PCI_IF_16750_MODEM            0x04
-#define PCI_SUBCLASS_OTHER            0x80
-
-#define PCI_CLASS_SYSTEM_PERIPHERAL   0x08
-#define PCI_SUBCLASS_PIC              0x00
-#define PCI_IF_8259_PIC               0x00
-#define PCI_IF_ISA_PIC                0x01
-#define PCI_IF_EISA_PIC               0x02
-#define PCI_IF_APIC_CONTROLLER        0x10 // I/O APIC interrupt controller , 32 byte none-prefetchable memory.
-#define PCI_IF_APIC_CONTROLLER2       0x20
-#define PCI_SUBCLASS_TIMER            0x02
-#define PCI_IF_8254_TIMER             0x00
-#define PCI_IF_ISA_TIMER              0x01
-#define PCI_EISA_TIMER                0x02
-#define PCI_SUBCLASS_RTC              0x03
-#define PCI_IF_GENERIC_RTC            0x00
-#define PCI_IF_ISA_RTC                0x00
-#define PCI_SUBCLASS_PNP_CONTROLLER   0x04 // HotPlug Controller
-
-#define PCI_CLASS_INPUT_DEVICE        0x09
-#define PCI_SUBCLASS_KEYBOARD         0x00
-#define PCI_SUBCLASS_PEN              0x01
-#define PCI_SUBCLASS_MOUSE_CONTROLLER 0x02
-#define PCI_SUBCLASS_SCAN_CONTROLLER  0x03
-#define PCI_SUBCLASS_GAMEPORT         0x04
-
-#define PCI_CLASS_DOCKING_STATION     0x0A
-
-#define PCI_CLASS_PROCESSOR           0x0B
-#define PCI_SUBCLASS_PROC_386         0x00
-#define PCI_SUBCLASS_PROC_486         0x01
-#define PCI_SUBCLASS_PROC_PENTIUM     0x02
-#define PCI_SUBCLASS_PROC_ALPHA       0x10
-#define PCI_SUBCLASS_PROC_POWERPC     0x20
-#define PCI_SUBCLASS_PROC_MIPS        0x30
-#define PCI_SUBCLASS_PROC_CO_PORC     0x40 // Co-Processor
-
-#define PCI_CLASS_SERIAL              0x0C
-#define PCI_CLASS_SERIAL_FIREWIRE     0x00
-#define PCI_CLASS_SERIAL_ACCESS_BUS   0x01
-#define PCI_CLASS_SERIAL_SSA          0x02
-#define PCI_CLASS_SERIAL_USB          0x03
-#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
-#define PCI_CLASS_SERIAL_SMB          0x05
-
-#define PCI_CLASS_WIRELESS            0x0D
-#define PCI_SUBCLASS_IRDA             0x00
-#define PCI_SUBCLASS_IR               0x01
-#define PCI_SUBCLASS_RF               0x02
-
-#define PCI_CLASS_INTELLIGENT_IO      0x0E
-
-#define PCI_CLASS_SATELLITE           0x0F
-#define PCI_SUBCLASS_TV               0x01
-#define PCI_SUBCLASS_AUDIO            0x02
-#define PCI_SUBCLASS_VOICE            0x03
-#define PCI_SUBCLASS_DATA             0x04
-
-#define PCI_SECURITY_CONTROLLER       0x10 // Encryption and decryption controller
-#define PCI_SUBCLASS_NET_COMPUT       0x00
-#define PCI_SUBCLASS_ENTERTAINMENT    0x10
-
-#define PCI_CLASS_DPIO                0x11
-
-#define IS_CLASS1(_p, c)              ((_p)->Hdr.ClassCode[2] == (c))
-#define IS_CLASS2(_p, c, s)           (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
-#define IS_CLASS3(_p, c, s, p)        (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
-
-#define IS_PCI_DISPLAY(_p)            IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
-#define IS_PCI_VGA(_p)                IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 0)
-#define IS_PCI_8514(_p)               IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 1)
-#define IS_PCI_GFX(_p)                IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_GFX, 0)
-#define IS_PCI_OLD(_p)                IS_CLASS1 (_p, PCI_CLASS_OLD)
-#define IS_PCI_OLD_VGA(_p)            IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
-#define IS_PCI_IDE(_p)                IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
-#define IS_PCI_SCSI(_p)               IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI, 0)
-#define IS_PCI_RAID(_p)               IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID, 0)
-#define IS_PCI_LPC(_p)                IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA, 0)
-#define IS_PCI_P2P(_p)                IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 0)
-#define IS_PCI_P2P_SUB(_p)            IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 1)
-#define IS_PCI_USB(_p)                IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
-
-#define HEADER_TYPE_DEVICE            0x00
-#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
-#define HEADER_TYPE_CARDBUS_BRIDGE    0x02
-
-#define HEADER_TYPE_MULTI_FUNCTION    0x80
-#define HEADER_LAYOUT_CODE            0x7f
-
-#define IS_PCI_BRIDGE(_p)             (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
-#define IS_CARDBUS_BRIDGE(_p)         (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
-#define IS_PCI_MULTI_FUNC(_p)         ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
-
-#define PCI_DEVICE_ROMBAR             0x30
-#define PCI_BRIDGE_ROMBAR             0x38
-
-#define PCI_MAX_BAR                   0x0006
-#define PCI_MAX_CONFIG_OFFSET         0x0100
-
-#define PCI_VENDOR_ID_OFFSET                        0x00
-#define PCI_DEVICE_ID_OFFSET                        0x02
-#define PCI_COMMAND_OFFSET                          0x04
-#define PCI_PRIMARY_STATUS_OFFSET                   0x06
-#define PCI_REVISION_ID_OFFSET                      0x08
-#define PCI_CLASSCODE_OFFSET                        0x09
-#define PCI_CACHELINE_SIZE_OFFSET                   0x0C
-#define PCI_LATENCY_TIMER_OFFSET                    0x0D
-#define PCI_HEADER_TYPE_OFFSET                      0x0E
-#define PCI_BIST_OFFSET                             0x0F
-#define PCI_BASE_ADDRESSREG_OFFSET                  0x10
-#define PCI_CARDBUS_CIS_OFFSET                      0x28
-#define PCI_SVID_OFFSET                             0x2C // SubSystem Vendor id
-#define PCI_SUBSYSTEM_VENDOR_ID_OFFSET              0x2C
-#define PCI_SID_OFFSET                              0x2E // SubSystem ID
-#define PCI_SUBSYSTEM_ID_OFFSET                     0x2E
-#define PCI_EXPANSION_ROM_BASE                      0x30
-#define PCI_CAPBILITY_POINTER_OFFSET                0x34
-#define PCI_INT_LINE_OFFSET                         0x3C // Interrupt Line Register
-#define PCI_INT_PIN_OFFSET                          0x3D // Interrupt Pin Register
-#define PCI_MAXGNT_OFFSET                           0x3E // Max Grant Register
-#define PCI_MAXLAT_OFFSET                           0x3F // Max Latency Register
-
-#define PCI_BRIDGE_CONTROL_REGISTER_OFFSET          0x3E
-#define PCI_BRIDGE_STATUS_REGISTER_OFFSET           0x1E
-
-#define PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET      0x18
-#define PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET    0x19
-#define PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET  0x1a
-
-typedef union {
-  struct {
-    UINT32  Reg : 8;
-    UINT32  Func : 3;
-    UINT32  Dev : 5;
-    UINT32  Bus : 8;
-    UINT32  Reserved : 7;
-    UINT32  Enable : 1;
-  } Bits;
-  UINT32  Uint32;
-} PCI_CONFIG_ACCESS_CF8;
-
-#pragma pack()
-
-#define PCI_EXPANSION_ROM_HEADER_SIGNATURE              0xaa55
-#define PCI_DATA_STRUCTURE_SIGNATURE                    SIGNATURE_32 ('P', 'C', 'I', 'R')
-#define PCI_CODE_TYPE_PCAT_IMAGE                        0x00
-#define PCI_CODE_TYPE_EFI_IMAGE                         0x03
-#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED         0x0001
-
-#define EFI_PCI_COMMAND_IO_SPACE                        0x0001
-#define EFI_PCI_COMMAND_MEMORY_SPACE                    0x0002
-#define EFI_PCI_COMMAND_BUS_MASTER                      0x0004
-#define EFI_PCI_COMMAND_SPECIAL_CYCLE                   0x0008
-#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE     0x0010
-#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP               0x0020
-#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND            0x0040
-#define EFI_PCI_COMMAND_STEPPING_CONTROL                0x0080
-#define EFI_PCI_COMMAND_SERR                            0x0100
-#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK               0x0200
-
-#define EFI_PCI_BRIDGE_CONTROL_PARITY_ERROR_RESPONSE    0x0001
-#define EFI_PCI_BRIDGE_CONTROL_SERR                     0x0002
-#define EFI_PCI_BRIDGE_CONTROL_ISA                      0x0004
-#define EFI_PCI_BRIDGE_CONTROL_VGA                      0x0008
-#define EFI_PCI_BRIDGE_CONTROL_VGA_16                   0x0010
-#define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT             0x0020
-#define EFI_PCI_BRIDGE_CONTROL_RESET_SECONDARY_BUS      0x0040
-#define EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK        0x0080
-#define EFI_PCI_BRIDGE_CONTROL_PRIMARY_DISCARD_TIMER    0x0100
-#define EFI_PCI_BRIDGE_CONTROL_SECONDARY_DISCARD_TIMER  0x0200
-#define EFI_PCI_BRIDGE_CONTROL_TIMER_STATUS             0x0400
-#define EFI_PCI_BRIDGE_CONTROL_DISCARD_TIMER_SERR       0x0800
-
-//
-// Following are the PCI-CARDBUS bridge control bit
-//
-#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE       0x0080
-#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE   0x0100
-#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE   0x0200
-#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE 0x0400
-
-//
-// Following are the PCI status control bit
-//
-#define EFI_PCI_STATUS_CAPABILITY             0x0010
-#define EFI_PCI_STATUS_66MZ_CAPABLE           0x0020
-#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE     0x0080
-#define EFI_PCI_MASTER_DATA_PARITY_ERROR      0x0100
-
-#define EFI_PCI_CAPABILITY_PTR                0x34
-#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
-
-#pragma pack(1)
-typedef struct {
-  UINT16  Signature;    // 0xaa55
-  UINT8   Reserved[0x16];
-  UINT16  PcirOffset;
-} PCI_EXPANSION_ROM_HEADER;
-
-typedef struct {
-  UINT16  Signature;    // 0xaa55
-  UINT8   Size512;
-  UINT8   InitEntryPoint[3];
-  UINT8   Reserved[0x12];
-  UINT16  PcirOffset;
-} EFI_LEGACY_EXPANSION_ROM_HEADER;
-
-typedef struct {
-  UINT32  Signature;    // "PCIR"
-  UINT16  VendorId;
-  UINT16  DeviceId;
-  UINT16  Reserved0;
-  UINT16  Length;
-  UINT8   Revision;
-  UINT8   ClassCode[3];
-  UINT16  ImageLength;
-  UINT16  CodeRevision;
-  UINT8   CodeType;
-  UINT8   Indicator;
-  UINT16  Reserved1;
-} PCI_DATA_STRUCTURE;
-
-//
-// PCI Capability List IDs and records
-//
-#define EFI_PCI_CAPABILITY_ID_PMI     0x01
-#define EFI_PCI_CAPABILITY_ID_AGP     0x02
-#define EFI_PCI_CAPABILITY_ID_VPD     0x03
-#define EFI_PCI_CAPABILITY_ID_SLOTID  0x04
-#define EFI_PCI_CAPABILITY_ID_MSI     0x05
-#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
-#define EFI_PCI_CAPABILITY_ID_PCIX    0x07
-
-typedef struct {
-  UINT8 CapabilityID;
-  UINT8 NextItemPtr;
-} EFI_PCI_CAPABILITY_HDR;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_PMI
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  PMC;
-  UINT16                  PMCSR;
-  UINT8                   BridgeExtention;
-  UINT8                   Data;
-} EFI_PCI_CAPABILITY_PMI;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_AGP
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT8                   Rev;
-  UINT8                   Reserved;
-  UINT32                  Status;
-  UINT32                  Command;
-} EFI_PCI_CAPABILITY_AGP;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_VPD
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  AddrReg;
-  UINT32                  DataReg;
-} EFI_PCI_CAPABILITY_VPD;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_SLOTID
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT8                   ExpnsSlotReg;
-  UINT8                   ChassisNo;
-} EFI_PCI_CAPABILITY_SLOTID;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_MSI
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  MsgCtrlReg;
-  UINT32                  MsgAddrReg;
-  UINT16                  MsgDataReg;
-} EFI_PCI_CAPABILITY_MSI32;
-
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  MsgCtrlReg;
-  UINT32                  MsgAddrRegLsdw;
-  UINT32                  MsgAddrRegMsdw;
-  UINT16                  MsgDataReg;
-} EFI_PCI_CAPABILITY_MSI64;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_HOTPLUG
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  //
-  // not finished - fields need to go here
-  //
-} EFI_PCI_CAPABILITY_HOTPLUG;
-
-//
-// Capability EFI_PCI_CAPABILITY_ID_PCIX
-//
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  CommandReg;
-  UINT32                  StatusReg;
-} EFI_PCI_CAPABILITY_PCIX;
-
-typedef struct {
-  EFI_PCI_CAPABILITY_HDR  Hdr;
-  UINT16                  SecStatusReg;
-  UINT32                  StatusReg;
-  UINT32                  SplitTransCtrlRegUp;
-  UINT32                  SplitTransCtrlRegDn;
-} EFI_PCI_CAPABILITY_PCIX_BRDG;
-
-#define DEVICE_ID_NOCARE    0xFFFF
-
-#define PCI_ACPI_UNUSED     0
-#define PCI_BAR_NOCHANGE    0
-#define PCI_BAR_OLD_ALIGN   0xFFFFFFFFFFFFFFFFULL
-#define PCI_BAR_EVEN_ALIGN  0xFFFFFFFFFFFFFFFEULL
-#define PCI_BAR_SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL
-#define PCI_BAR_DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL
-
-#define PCI_BAR_IDX0        0x00
-#define PCI_BAR_IDX1        0x01
-#define PCI_BAR_IDX2        0x02
-#define PCI_BAR_IDX3        0x03
-#define PCI_BAR_IDX4        0x04
-#define PCI_BAR_IDX5        0x05
-#define PCI_BAR_ALL         0xFF
-
-#pragma pack(pop)
-
-//
-// NOTE: The following header files are included here for
-// compatibility consideration.
-//
-#include "pci23.h"
-#include "pci30.h"
-#include "EfiPci.h"
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/pci23.h

@@ -1,18 +0,0 @@
-/** @file
-  Support for PCI 2.3 standard.
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _PCI23_H
-#define _PCI23_H
-
-//#include "pci22.h"
-
-#define PCI_EXP_MAX_CONFIG_OFFSET     0x1000
-#define EFI_PCI_CAPABILITY_ID_PCIEXP  0x10
-
-#endif

BaseTools/Source/C/Include/IndustryStandard/pci30.h

@@ -1,38 +0,0 @@
-/** @file
-  Support for PCI 3.0 standard.
-
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef _PCI30_H
-#define _PCI30_H
-
-//#include "pci23.h"
-
-#define PCI_CLASS_MASS_STORAGE_SATADPA   0x06
-
-#pragma pack(push, 1)
-
-typedef struct {
-  UINT32  Signature;    // "PCIR"
-  UINT16  VendorId;
-  UINT16  DeviceId;
-  UINT16  DeviceListOffset;
-  UINT16  Length;
-  UINT8   Revision;
-  UINT8   ClassCode[3];
-  UINT16  ImageLength;
-  UINT16  CodeRevision;
-  UINT8   CodeType;
-  UINT8   Indicator;
-  UINT16  MaxRuntimeImageLength;
-  UINT16  ConfigUtilityCodeHeaderOffset;
-  UINT16  DMTFCLPEntryPointOffset;
-} PCI_3_0_DATA_STRUCTURE;
-
-#pragma pack(pop)
-
-#endif

BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h

@@ -1,80 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types for LoongArch
-
-  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#ifndef PROCESSOR_BIND_H_
-#define PROCESSOR_BIND_H_
-
-//
-// Define the processor type so other code can make processor based choices
-//
-#define MDE_CPU_LOONGARCH64
-
-#define EFIAPI
-
-//
-// Make sure we are using the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-//
-// Use ANSI C 2000 stdint.h integer width declarations
-//
-#include <stdint.h>
-typedef uint8_t   BOOLEAN;
-typedef int8_t    INT8;
-typedef uint8_t   UINT8;
-typedef int16_t   INT16;
-typedef uint16_t  UINT16;
-typedef int32_t   INT32;
-typedef uint32_t  UINT32;
-typedef int64_t   INT64;
-typedef uint64_t  UINT64;
-typedef char      CHAR8;
-typedef uint16_t  CHAR16;
-
-//
-// Unsigned value of native width.  (4 bytes on supported 32-bit processor instructions,
-// 8 bytes on supported 64-bit processor instructions)
-//
-typedef UINT64 UINTN;
-
-//
-// Signed value of native width.  (4 bytes on supported 32-bit processor instructions,
-// 8 bytes on supported 64-bit processor instructions)
-//
-typedef INT64 INTN;
-
-//
-// Processor specific defines
-//
-
-//
-// A value of native width with the highest bit set.
-//
-#define MAX_BIT  0x8000000000000000ULL
-//
-// A value of native width with the two highest bits set.
-//
-#define MAX_2_BITS  0xC000000000000000ULL
-
-#if defined (__GNUC__)
-//
-// For GNU assembly code, .global or .globl can declare global symbols.
-// Define this macro to unify the usage.
-//
-#define ASM_GLOBAL  .globl
-#endif
-
-//
-// The stack alignment required for LoongArch
-//
-#define CPU_STACK_ALIGNMENT  16
-
-#endif

BaseTools/Source/C/Include/Protocol/DevicePath.h

@@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define __EFI_DEVICE_PATH_H__
 
 #include <Guid/PcAnsi.h>
-#include <IndustryStandard/Acpi3_0.h>
+#include <IndustryStandard/Acpi30.h>
 #include <IndustryStandard/Bluetooth.h>
 
 ///

BaseTools/Source/C/Include/RiscV64/ProcessorBind.h

@@ -1,85 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types for RISC-V.
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PROCESSOR_BIND_H__
-#define __PROCESSOR_BIND_H__
-
-//
-// Define the processor type so other code can make processor based choices
-//
-#define MDE_CPU_RISCV64
-
-//
-// Make sure we are using the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-//
-// Use ANSI C 2000 stdint.h integer width declarations
-//
-#include <stdint.h>
-typedef uint8_t   BOOLEAN;
-typedef int8_t    INT8;
-typedef uint8_t   UINT8;
-typedef int16_t   INT16;
-typedef uint16_t  UINT16;
-typedef int32_t   INT32;
-typedef uint32_t  UINT32;
-typedef int64_t   INT64;
-typedef uint64_t  UINT64;
-typedef char      CHAR8;
-typedef uint16_t  CHAR16;
-
-//
-// Unsigned value of native width.  (4 bytes on supported 32-bit processor instructions,
-// 8 bytes on supported 64-bit processor instructions)
-//
-typedef UINT64  UINTN;
-
-//
-// Signed value of native width.  (4 bytes on supported 32-bit processor instructions,
-// 8 bytes on supported 64-bit processor instructions)
-//
-typedef INT64   INTN;
-
-//
-// Processor specific defines
-//
-
-//
-// A value of native width with the highest bit set.
-//
-#define MAX_BIT      0x8000000000000000
-
-//
-// A value of native width with the two highest bits set.
-//
-#define MAX_2_BITS   0xC000000000000000
-
-//
-// The stack alignment required for RISC-V
-//
-#define CPU_STACK_ALIGNMENT  16
-
-//
-// Modifier to ensure that all protocol member functions and EFI intrinsics
-// use the correct C calling convention. All protocol member functions and
-// EFI intrinsics are required to modify their member functions with EFIAPI.
-//
-#define EFIAPI
-
-#if defined(__GNUC__)
-  //
-  // For GNU assembly code, .global or .globl can declare global symbols.
-  // Define this macro to unify the usage.
-  //
-  #define ASM_GLOBAL .globl
-#endif
-
-#endif

BaseTools/Source/C/Include/X64/ProcessorBind.h

@@ -1,183 +0,0 @@
-/** @file
-  Processor or Compiler specific defines and types x64 (Intel(r) EM64T, AMD64).
-
-  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef __PROCESSOR_BIND_H__
-#define __PROCESSOR_BIND_H__
-
-//
-// Define the processor type so other code can make processor based choices
-//
-#define MDE_CPU_X64
-
-
-//
-// Make sure we are useing the correct packing rules per EFI specification
-//
-#ifndef __GNUC__
-#pragma pack()
-#endif
-
-
-#if _MSC_EXTENSIONS
-
-//
-// Disable warning that make it impossible to compile at /W4
-// This only works for Microsoft* tools
-//
-
-//
-// Disabling bitfield type checking warnings.
-//
-#pragma warning ( disable : 4214 )
-
-//
-// Disabling the unreferenced formal parameter warnings.
-//
-#pragma warning ( disable : 4100 )
-
-//
-// Disable slightly different base types warning as CHAR8 * can not be set
-// to a constant string.
-//
-#pragma warning ( disable : 4057 )
-
-//
-// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning
-//
-#pragma warning ( disable : 4127 )
-
-
-#endif
-
-
-#if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L)
-  //
-  // No ANSI C 2000 stdint.h integer width declarations, so define equivalents
-  //
-
-  #if _MSC_EXTENSIONS
-
-
-    //
-    // use Microsoft C compiler dependent integer width types
-    //
-    typedef unsigned __int64    UINT64;
-    typedef __int64             INT64;
-    typedef unsigned __int32    UINT32;
-    typedef __int32             INT32;
-    typedef unsigned short      UINT16;
-    typedef unsigned short      CHAR16;
-    typedef short               INT16;
-    typedef unsigned char       BOOLEAN;
-    typedef unsigned char       UINT8;
-    typedef char                CHAR8;
-    typedef char                INT8;
-  #else
-    #ifdef _EFI_P64
-      //
-      // P64 - is Intel Itanium(TM) speak for pointers being 64-bit and longs and ints
-      //  are 32-bits
-      //
-      typedef unsigned long long  UINT64;
-      typedef long long           INT64;
-      typedef unsigned int        UINT32;
-      typedef int                 INT32;
-      typedef unsigned short      CHAR16;
-      typedef unsigned short      UINT16;
-      typedef short               INT16;
-      typedef unsigned char       BOOLEAN;
-      typedef unsigned char       UINT8;
-      typedef char                CHAR8;
-      typedef char                INT8;
-    #else
-      //
-      // Assume LP64 - longs and pointers are 64-bit. Ints are 32-bit.
-      //
-      typedef unsigned long   UINT64;
-      typedef long            INT64;
-      typedef unsigned int    UINT32;
-      typedef int             INT32;
-      typedef unsigned short  UINT16;
-      typedef unsigned short  CHAR16;
-      typedef short           INT16;
-      typedef unsigned char   BOOLEAN;
-      typedef unsigned char   UINT8;
-      typedef char            CHAR8;
-      typedef char            INT8;
-    #endif
-  #endif
-
-  #define UINT8_MAX 0xff
-
-#else
-  //
-  // Use ANSI C 2000 stdint.h integer width declarations
-  //
-  #include <stdint.h>
-  typedef uint8_t   BOOLEAN;
-  typedef int8_t    INT8;
-  typedef uint8_t   UINT8;
-  typedef int16_t   INT16;
-  typedef uint16_t  UINT16;
-  typedef int32_t   INT32;
-  typedef uint32_t  UINT32;
-  typedef int64_t   INT64;
-  typedef uint64_t  UINT64;
-  typedef char      CHAR8;
-  typedef uint16_t  CHAR16;
-
-#endif
-
-typedef UINT64  UINTN;
-typedef INT64   INTN;
-
-
-//
-// Processor specific defines
-//
-#define MAX_BIT     0x8000000000000000ULL
-#define MAX_2_BITS  0xC000000000000000ULL
-
-//
-// Modifier to ensure that all protocol member functions and EFI intrinsics
-// use the correct C calling convention. All protocol member functions and
-// EFI intrinsics are required to modify their member functions with EFIAPI.
-//
-#if _MSC_EXTENSIONS
-  ///
-  /// Define the standard calling convention regardless of optimization level.
-  /// __cdecl is Microsoft* specific C extension.
-  ///
-  #define EFIAPI __cdecl
-#elif __GNUC__
-  ///
-  /// Define the standard calling convention regardless of optimization level.
-  /// efidecl is an extension to GCC that supports the differnece between x64
-  /// GCC ABI and x64 Microsoft* ABI. EFI is closer to the Microsoft* ABI and
-  /// EFIAPI makes sure the right ABI is used for public interfaces.
-  /// eficecl is a work in progress and we do not yet have the compiler
-  ///
-  #define EFIAPI
-#else
-  #define EFIAPI
-#endif
-
-//
-// The Microsoft* C compiler can removed references to unreferenced data items
-//  if the /OPT:REF linker option is used. We defined a macro as this is a
-//  a non standard extension
-//
-#if _MSC_EXTENSIONS
-  #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
-#else
-  #define GLOBAL_REMOVE_IF_UNREFERENCED
-#endif
-
-#endif
-

BaseTools/Source/C/Makefiles/header.makefile

@@ -8,6 +8,8 @@
 # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 
+EDK2_PATH ?= $(MAKEROOT)/../../..
+
 ifndef HOST_ARCH
   #
   # If HOST_ARCH is not defined, then we use 'uname -m' to attempt
@@ -60,28 +62,29 @@ LD = ld
 endif
 LINKER ?= $(CC)
 ifeq ($(HOST_ARCH), IA32)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/Ia32/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/Ia32/
 
 else ifeq ($(HOST_ARCH), X64)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/X64/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/X64/
 
 else ifeq ($(HOST_ARCH), ARM)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/Arm/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/Arm/
 
 else ifeq ($(HOST_ARCH), AARCH64)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/AArch64/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/AArch64/
 
 else ifeq ($(HOST_ARCH), RISCV64)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/RiscV64/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/RiscV64/
 
 else ifeq ($(HOST_ARCH), LOONGARCH64)
-ARCH_INCLUDE = -I $(MAKEROOT)/Include/LoongArch64/
+ARCH_INCLUDE = -I $(EDK2_PATH)/MdePkg/Include/LoongArch64/
 
 else
 $(error Bad HOST_ARCH)
 endif
 
 INCLUDE = $(TOOL_INCLUDE) -I $(MAKEROOT) -I $(MAKEROOT)/Include/Common -I $(MAKEROOT)/Include/ -I $(MAKEROOT)/Include/IndustryStandard -I $(MAKEROOT)/Common/ -I .. -I . $(ARCH_INCLUDE)
+INCLUDE += -I $(EDK2_PATH)/MdePkg/Include
 CPPFLAGS = $(INCLUDE)
 
 # keep EXTRA_OPTFLAGS last

BaseTools/Source/C/Makefiles/ms.common

@@ -17,6 +17,14 @@
 HOST_ARCH = IA32
 !ENDIF
 
+!IFNDEF MAKEROOT
+MAKEROOT = $(SOURCE_PATH)
+!ENDIF
+
+!IFNDEF EDK2_PATH
+EDK2_PATH = $(MAKEROOT)\..\..\..
+!ENDIF
+
 MAKE        = nmake -nologo
 
 # DOS del command doesn't support ":\\" in the file path, such as j:\\BaseTools. Convert ":\\" to ":\"
@@ -31,14 +39,14 @@ SYS_BIN_PATH=$(EDK_TOOLS_PATH)\Bin
 SYS_LIB_PATH=$(EDK_TOOLS_PATH)\Lib
 
 !IF "$(HOST_ARCH)"=="IA32"
-ARCH_INCLUDE = $(SOURCE_PATH)\Include\Ia32
+ARCH_INCLUDE = $(EDK2_PATH)\MdePkg\Include\Ia32
 BIN_PATH     = $(BASE_TOOLS_PATH)\Bin\Win32
 LIB_PATH     = $(BASE_TOOLS_PATH)\Lib\Win32
 SYS_BIN_PATH = $(EDK_TOOLS_PATH)\Bin\Win32
 SYS_LIB_PATH = $(EDK_TOOLS_PATH)\Lib\Win32
 
 !ELSEIF "$(HOST_ARCH)"=="X64"
-ARCH_INCLUDE = $(SOURCE_PATH)\Include\X64
+ARCH_INCLUDE = $(EDK2_PATH)\MdePkg\Include\X64
 BIN_PATH     = $(BASE_TOOLS_PATH)\Bin\Win64
 LIB_PATH     = $(BASE_TOOLS_PATH)\Lib\Win64
 SYS_BIN_PATH = $(EDK_TOOLS_PATH)\Bin\Win64
@@ -56,6 +64,7 @@ LD = link.exe
 LINKER = $(LD)
 
 INC = $(INC) -I . -I $(SOURCE_PATH)\Include -I $(ARCH_INCLUDE) -I $(SOURCE_PATH)\Common
+INC = $(INC) -I $(EDK2_PATH)\MdePkg\Include
 
 CFLAGS = $(CFLAGS) /nologo /Z7 /c /O2 /MT /W4 /WX /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE
 CPPFLAGS = $(CPPFLAGS) /EHsc /nologo /Z7 /c /O2 /MT /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE

BaseTools/toolsetup.bat

@@ -313,14 +313,16 @@ if not defined PYTHON_COMMAND (
   )
 )
 
-if defined PYTHON_HOME (
-  if EXIST "%PYTHON_HOME%" (
-    set PYTHON_COMMAND=%PYTHON_HOME%\python.exe
-  ) else (
-    echo .
-    echo !!! ERROR !!!  PYTHON_HOME="%PYTHON_HOME%" does not exist.
-    echo .
-    goto end
+if not defined PYTHON_COMMAND (
+  if defined PYTHON_HOME (
+    if EXIST "%PYTHON_HOME%" (
+      set PYTHON_COMMAND=%PYTHON_HOME%\python.exe
+    ) else (
+      echo .
+      echo !!! ERROR !!!  PYTHON_HOME="%PYTHON_HOME%" does not exist.
+      echo .
+      goto end
+    )
   )
 )
 
@@ -447,5 +449,4 @@ set VS2015=
 set VSTool=
 set PYTHON_VER_MAJOR=
 set PYTHON_VER_MINOR=
-set SCRIPT_ERROR=
 popd

CryptoPkg/CryptoPkg.ci.yaml

@@ -9,11 +9,7 @@
     "LicenseCheck": {
         "IgnoreFiles": [
             # These directories contain auto-generated OpenSSL content
-            "Library/OpensslLib/IA32",
-            "Library/OpensslLib/IA32Gcc",
-            "Library/OpensslLib/X64",
-            "Library/OpensslLib/X64Gcc",
-            "Library/Include/openssl"
+            "Library/OpensslLib/OpensslGen"
         ]
     },
     "EccCheck": {
@@ -30,14 +26,13 @@
         ## Both file path and directory path are accepted.
         "IgnoreFiles": [
             "Library/OpensslLib/openssl",
-            "Library/Include/openssl",
-            "Library/Include/crypto",
+            "Library/OpensslLib/OpensslGen",
             # The unit testing folder is not to be checked
             "Test/UnitTest",
             # This has OpenSSL interfaces that aren't UEFI spec compliant
             "Library/BaseCryptLib/SysCall",
             # This has OpenSSL interfaces that aren't UEFI spec compliant
-            "Library/OpensslLib/rand_pool.c",
+            "Library/OpensslLib/OpensslStub",
             # This has OpenSSL interfaces that aren't UEFI spec compliant
             "Library/Include/CrtLibSupport.h",
             # This has OpenSSL interfaces that aren't UEFI spec compliant
@@ -96,9 +91,46 @@
     # options defined in .pytool/Plugin/UncrustifyCheck
     "UncrustifyCheck": {
         "IgnoreFiles": [
-            "opensslconf.h",
-            "dso_conf.h",
-            "opensslconf_generated.h"
+            "Library/OpensslLib/OpensslGen/include/crypto/bn_conf.h",
+            "Library/OpensslLib/OpensslGen/include/crypto/dso_conf.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/asn1.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/asn1t.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/bio.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/cmp.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/cms.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/conf.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/configuration-ec.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/configuration-noec.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/configuration.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/crmf.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/crypto.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/ct.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/err.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/ess.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/fipskey.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/lhash.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/ocsp.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/opensslv.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/pkcs12.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/pkcs7.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/safestack.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/srp.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/ssl.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/ui.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/x509.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/x509v3.h",
+            "Library/OpensslLib/OpensslGen/include/openssl/x509_vfy.h",
+            "Library/OpensslLib/OpensslGen/providers/common/der/der_digests_gen.c",
+            "Library/OpensslLib/OpensslGen/providers/common/der/der_ecx_gen.c",
+            "Library/OpensslLib/OpensslGen/providers/common/der/der_ec_gen.c",
+            "Library/OpensslLib/OpensslGen/providers/common/der/der_rsa_gen.c",
+            "Library/OpensslLib/OpensslGen/providers/common/der/der_wrap_gen.c",
+            "Library/OpensslLib/OpensslGen/providers/common/include/prov/der_digests.h",
+            "Library/OpensslLib/OpensslGen/providers/common/include/prov/der_ec.h",
+            "Library/OpensslLib/OpensslGen/providers/common/include/prov/der_ecx.h",
+            "Library/OpensslLib/OpensslGen/providers/common/include/prov/der_rsa.h",
+            "Library/OpensslLib/OpensslGen/providers/common/include/prov/der_wrap.h",
+            "Library/OpensslLib/OpensslStub/uefiprov.c"
         ]
     }
 }

CryptoPkg/CryptoPkg.dec

@@ -23,6 +23,10 @@
   Private
   Library/Include
   Library/OpensslLib/openssl/include
+  Library/OpensslLib/openssl/providers/common/include
+  Library/OpensslLib/openssl/providers/implementations/include
+  Library/OpensslLib/OpensslGen/include
+  Library/OpensslLib/OpensslGen/providers/common/include
 
 [LibraryClasses]
   ##  @libraryclass  Provides basic library functions for cryptographic primitives.

CryptoPkg/CryptoPkg.dsc

@@ -456,8 +456,8 @@
     <LibraryClasses>
       OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibFullAccel.inf
     <BuildOptions>
-      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:64
-      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:256
+      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:4096
+      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:4096
   }
 !endif
 
@@ -522,8 +522,8 @@
     <LibraryClasses>
       OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibFullAccel.inf
     <BuildOptions>
-      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:64
-      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:256
+      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:4096
+      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:4096
   }
   #
   # CryptoSmm with OpensslLib instance with no SSL or EC services
@@ -575,8 +575,8 @@
     <LibraryClasses>
       OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibFullAccel.inf
     <BuildOptions>
-      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:64
-      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:256
+      MSFT:*_*_IA32_DLINK_FLAGS = /ALIGN:4096
+      MSFT:*_*_X64_DLINK_FLAGS  = /ALIGN:4096
   }
 !endif
 

CryptoPkg/Library/BaseCryptLib/Hash/CryptSm3.c

@@ -7,7 +7,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
 #include "InternalCryptLib.h"
-#include "crypto/sm3.h"
+#include "internal/sm3.h"
 
 /**
   Retrieves the size, in bytes, of the context buffer required for SM3 hash operations.
@@ -55,7 +55,7 @@ Sm3Init (
   //
   // Openssl SM3 Context Initialization
   //
-  sm3_init ((SM3_CTX *)Sm3Context);
+  ossl_sm3_init ((SM3_CTX *)Sm3Context);
   return TRUE;
 }
 
@@ -136,7 +136,7 @@ Sm3Update (
   //
   // Openssl SM3 Hash Update
   //
-  sm3_update ((SM3_CTX *)Sm3Context, Data, DataSize);
+  ossl_sm3_update ((SM3_CTX *)Sm3Context, Data, DataSize);
 
   return TRUE;
 }
@@ -178,7 +178,7 @@ Sm3Final (
   //
   // Openssl SM3 Hash Finalization
   //
-  sm3_final (HashValue, (SM3_CTX *)Sm3Context);
+  ossl_sm3_final (HashValue, (SM3_CTX *)Sm3Context);
 
   return TRUE;
 }
@@ -225,11 +225,11 @@ Sm3HashAll (
   //
   // SM3 Hash Computation.
   //
-  sm3_init (&Ctx);
+  ossl_sm3_init (&Ctx);
 
-  sm3_update (&Ctx, Data, DataSize);
+  ossl_sm3_update (&Ctx, Data, DataSize);
 
-  sm3_final (HashValue, &Ctx);
+  ossl_sm3_final (HashValue, &Ctx);
 
   return TRUE;
 }

CryptoPkg/Library/BaseCryptLib/InternalCryptLib.h

@@ -20,6 +20,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "CrtLibSupport.h"
 
+#define OPENSSL_NO_DEPRECATED  0
+
 #include <openssl/opensslv.h>
 
 #if OPENSSL_VERSION_NUMBER < 0x10100000L

CryptoPkg/Library/BaseCryptLib/SysCall/CrtWrapper.c

@@ -275,6 +275,15 @@ strcpy (
   return strDest;
 }
 
+int
+strcmp (
+  const char  *s1,
+  const char  *s2
+  )
+{
+  return (int)AsciiStrCmp (s1, s2);
+}
+
 //
 // -- Character Classification Routines --
 //
@@ -472,33 +481,6 @@ fwrite (
   return 0;
 }
 
-//
-//  -- Dummy OpenSSL Support Routines --
-//
-
-int
-BIO_printf (
-  void        *bio,
-  const char  *format,
-  ...
-  )
-{
-  return 0;
-}
-
-int
-BIO_snprintf (
-  char        *buf,
-  size_t      n,
-  const char  *format,
-  ...
-  )
-{
-  // Because the function does not actually print anything to buf, it returns -1 as error.
-  // Otherwise, the consumer may think that the buf is valid and parse the buffer.
-  return -1;
-}
-
 #ifdef __GNUC__
 
 typedef

CryptoPkg/Library/BaseCryptLib/SysCall/UnitTestHostCrtWrapper.c

@@ -72,31 +72,6 @@ sscanf (
   return 0;
 }
 
-//
-//  -- Dummy OpenSSL Support Routines --
-//
-
-int
-BIO_printf (
-  void        *bio,
-  const char  *format,
-  ...
-  )
-{
-  return 0;
-}
-
-int
-BIO_snprintf (
-  char        *buf,
-  size_t      n,
-  const char  *format,
-  ...
-  )
-{
-  return 0;
-}
-
 uid_t
 getuid (
   void

CryptoPkg/Library/Include/CrtLibSupport.h

@@ -87,6 +87,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define UINT_MAX      0xFFFFFFFF      /* Maximum unsigned int value */
 #define ULONG_MAX     0xFFFFFFFF      /* Maximum unsigned long value */
 #define CHAR_BIT      8               /* Number of bits in a char */
+#define SIZE_MAX      0xFFFFFFFF      /* Maximum unsigned size_t */
 
 //
 // Address families.

CryptoPkg/Library/Include/openssl/opensslconf.h

@@ -1,333 +0,0 @@
-/*
- * WARNING: do not edit!
- * Generated from include/openssl/opensslconf.h.in
- *
- * Copyright 2016-2020 The OpenSSL Project Authors. All Rights Reserved.
- *
- * Licensed under the OpenSSL license (the "License").  You may not use
- * this file except in compliance with the License.  You can obtain a copy
- * in the file LICENSE in the source distribution or at
- * https://www.openssl.org/source/license.html
- */
-
-#include <openssl/opensslv.h>
-
-#ifdef  __cplusplus
-extern "C" {
-#endif
-
-#ifdef OPENSSL_ALGORITHM_DEFINES
-# error OPENSSL_ALGORITHM_DEFINES no longer supported
-#endif
-
-/*
- * OpenSSL was configured with the following options:
- */
-
-#ifndef OPENSSL_SYS_UEFI
-# define OPENSSL_SYS_UEFI 1
-#endif
-#define OPENSSL_MIN_API 0x10100000L
-#ifndef OPENSSL_NO_BF
-# define OPENSSL_NO_BF
-#endif
-#ifndef OPENSSL_NO_BLAKE2
-# define OPENSSL_NO_BLAKE2
-#endif
-#ifndef OPENSSL_NO_CAMELLIA
-# define OPENSSL_NO_CAMELLIA
-#endif
-#ifndef OPENSSL_NO_CAST
-# define OPENSSL_NO_CAST
-#endif
-#ifndef OPENSSL_NO_CHACHA
-# define OPENSSL_NO_CHACHA
-#endif
-#ifndef OPENSSL_NO_CMS
-# define OPENSSL_NO_CMS
-#endif
-#ifndef OPENSSL_NO_CT
-# define OPENSSL_NO_CT
-#endif
-#ifndef OPENSSL_NO_DES
-# define OPENSSL_NO_DES
-#endif
-#ifndef OPENSSL_NO_DSA
-# define OPENSSL_NO_DSA
-#endif
-#ifndef OPENSSL_NO_IDEA
-# define OPENSSL_NO_IDEA
-#endif
-#ifndef OPENSSL_NO_MD2
-# define OPENSSL_NO_MD2
-#endif
-#ifndef OPENSSL_NO_MD4
-# define OPENSSL_NO_MD4
-#endif
-#ifndef OPENSSL_NO_MDC2
-# define OPENSSL_NO_MDC2
-#endif
-#ifndef OPENSSL_NO_POLY1305
-# define OPENSSL_NO_POLY1305
-#endif
-#ifndef OPENSSL_NO_RC2
-# define OPENSSL_NO_RC2
-#endif
-#ifndef OPENSSL_NO_RC4
-# define OPENSSL_NO_RC4
-#endif
-#ifndef OPENSSL_NO_RC5
-# define OPENSSL_NO_RC5
-#endif
-#ifndef OPENSSL_NO_RMD160
-# define OPENSSL_NO_RMD160
-#endif
-#ifndef OPENSSL_NO_SEED
-# define OPENSSL_NO_SEED
-#endif
-#ifndef OPENSSL_NO_SRP
-# define OPENSSL_NO_SRP
-#endif
-#ifndef OPENSSL_NO_TS
-# define OPENSSL_NO_TS
-#endif
-#ifndef OPENSSL_NO_WHIRLPOOL
-# define OPENSSL_NO_WHIRLPOOL
-#endif
-#ifndef OPENSSL_RAND_SEED_NONE
-# define OPENSSL_RAND_SEED_NONE
-#endif
-#ifndef OPENSSL_NO_AFALGENG
-# define OPENSSL_NO_AFALGENG
-#endif
-#ifndef OPENSSL_NO_APPS
-# define OPENSSL_NO_APPS
-#endif
-#ifndef OPENSSL_NO_ASAN
-# define OPENSSL_NO_ASAN
-#endif
-#ifndef OPENSSL_NO_ASYNC
-# define OPENSSL_NO_ASYNC
-#endif
-#ifndef OPENSSL_NO_AUTOERRINIT
-# define OPENSSL_NO_AUTOERRINIT
-#endif
-#ifndef OPENSSL_NO_AUTOLOAD_CONFIG
-# define OPENSSL_NO_AUTOLOAD_CONFIG
-#endif
-#ifndef OPENSSL_NO_CAPIENG
-# define OPENSSL_NO_CAPIENG
-#endif
-#ifndef OPENSSL_NO_CRYPTO_MDEBUG
-# define OPENSSL_NO_CRYPTO_MDEBUG
-#endif
-#ifndef OPENSSL_NO_CRYPTO_MDEBUG_BACKTRACE
-# define OPENSSL_NO_CRYPTO_MDEBUG_BACKTRACE
-#endif
-#ifndef OPENSSL_NO_DEPRECATED
-# define OPENSSL_NO_DEPRECATED
-#endif
-#ifndef OPENSSL_NO_DEVCRYPTOENG
-# define OPENSSL_NO_DEVCRYPTOENG
-#endif
-#ifndef OPENSSL_NO_DGRAM
-# define OPENSSL_NO_DGRAM
-#endif
-#ifndef OPENSSL_NO_DTLS
-# define OPENSSL_NO_DTLS
-#endif
-#ifndef OPENSSL_NO_DTLS1
-# define OPENSSL_NO_DTLS1
-#endif
-#ifndef OPENSSL_NO_DTLS1_2
-# define OPENSSL_NO_DTLS1_2
-#endif
-#ifndef OPENSSL_NO_EC2M
-# define OPENSSL_NO_EC2M
-#endif
-#ifndef OPENSSL_NO_EC_NISTP_64_GCC_128
-# define OPENSSL_NO_EC_NISTP_64_GCC_128
-#endif
-#ifndef OPENSSL_NO_EGD
-# define OPENSSL_NO_EGD
-#endif
-#ifndef OPENSSL_NO_ENGINE
-# define OPENSSL_NO_ENGINE
-#endif
-#ifndef OPENSSL_NO_ERR
-# define OPENSSL_NO_ERR
-#endif
-#ifndef OPENSSL_NO_EXTERNAL_TESTS
-# define OPENSSL_NO_EXTERNAL_TESTS
-#endif
-#ifndef OPENSSL_NO_FILENAMES
-# define OPENSSL_NO_FILENAMES
-#endif
-#ifndef OPENSSL_NO_FUZZ_AFL
-# define OPENSSL_NO_FUZZ_AFL
-#endif
-#ifndef OPENSSL_NO_FUZZ_LIBFUZZER
-# define OPENSSL_NO_FUZZ_LIBFUZZER
-#endif
-#ifndef OPENSSL_NO_GOST
-# define OPENSSL_NO_GOST
-#endif
-#ifndef OPENSSL_NO_HEARTBEATS
-# define OPENSSL_NO_HEARTBEATS
-#endif
-#ifndef OPENSSL_NO_HW
-# define OPENSSL_NO_HW
-#endif
-#ifndef OPENSSL_NO_MSAN
-# define OPENSSL_NO_MSAN
-#endif
-#ifndef OPENSSL_NO_OCB
-# define OPENSSL_NO_OCB
-#endif
-#ifndef OPENSSL_NO_POSIX_IO
-# define OPENSSL_NO_POSIX_IO
-#endif
-#ifndef OPENSSL_NO_RFC3779
-# define OPENSSL_NO_RFC3779
-#endif
-#ifndef OPENSSL_NO_SCRYPT
-# define OPENSSL_NO_SCRYPT
-#endif
-#ifndef OPENSSL_NO_SCTP
-# define OPENSSL_NO_SCTP
-#endif
-#ifndef OPENSSL_NO_SOCK
-# define OPENSSL_NO_SOCK
-#endif
-#ifndef OPENSSL_NO_SSL_TRACE
-# define OPENSSL_NO_SSL_TRACE
-#endif
-#ifndef OPENSSL_NO_SSL3
-# define OPENSSL_NO_SSL3
-#endif
-#ifndef OPENSSL_NO_SSL3_METHOD
-# define OPENSSL_NO_SSL3_METHOD
-#endif
-#ifndef OPENSSL_NO_STDIO
-# define OPENSSL_NO_STDIO
-#endif
-#ifndef OPENSSL_NO_TESTS
-# define OPENSSL_NO_TESTS
-#endif
-#ifndef OPENSSL_NO_UBSAN
-# define OPENSSL_NO_UBSAN
-#endif
-#ifndef OPENSSL_NO_UI_CONSOLE
-# define OPENSSL_NO_UI_CONSOLE
-#endif
-#ifndef OPENSSL_NO_UNIT_TEST
-# define OPENSSL_NO_UNIT_TEST
-#endif
-#ifndef OPENSSL_NO_WEAK_SSL_CIPHERS
-# define OPENSSL_NO_WEAK_SSL_CIPHERS
-#endif
-#ifndef OPENSSL_NO_DYNAMIC_ENGINE
-# define OPENSSL_NO_DYNAMIC_ENGINE
-#endif
-
-
-/*
- * Sometimes OPENSSSL_NO_xxx ends up with an empty file and some compilers
- * don't like that.  This will hopefully silence them.
- */
-#define NON_EMPTY_TRANSLATION_UNIT static void *dummy = &dummy;
-
-/*
- * Applications should use -DOPENSSL_API_COMPAT=<version> to suppress the
- * declarations of functions deprecated in or before <version>. Otherwise, they
- * still won't see them if the library has been built to disable deprecated
- * functions.
- */
-#ifndef DECLARE_DEPRECATED
-# define DECLARE_DEPRECATED(f)   f;
-# ifdef __GNUC__
-#  if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 0)
-#   undef DECLARE_DEPRECATED
-#   define DECLARE_DEPRECATED(f)    f __attribute__ ((deprecated));
-#  endif
-# elif defined(__SUNPRO_C)
-#  if (__SUNPRO_C >= 0x5130)
-#   undef DECLARE_DEPRECATED
-#   define DECLARE_DEPRECATED(f)    f __attribute__ ((deprecated));
-#  endif
-# endif
-#endif
-
-#ifndef OPENSSL_FILE
-# ifdef OPENSSL_NO_FILENAMES
-#  define OPENSSL_FILE ""
-#  define OPENSSL_LINE 0
-# else
-#  define OPENSSL_FILE __FILE__
-#  define OPENSSL_LINE __LINE__
-# endif
-#endif
-
-#ifndef OPENSSL_MIN_API
-# define OPENSSL_MIN_API 0
-#endif
-
-#if !defined(OPENSSL_API_COMPAT) || OPENSSL_API_COMPAT < OPENSSL_MIN_API
-# undef OPENSSL_API_COMPAT
-# define OPENSSL_API_COMPAT OPENSSL_MIN_API
-#endif
-
-/*
- * Do not deprecate things to be deprecated in version 1.2.0 before the
- * OpenSSL version number matches.
- */
-#if OPENSSL_VERSION_NUMBER < 0x10200000L
-# define DEPRECATEDIN_1_2_0(f)   f;
-#elif OPENSSL_API_COMPAT < 0x10200000L
-# define DEPRECATEDIN_1_2_0(f)   DECLARE_DEPRECATED(f)
-#else
-# define DEPRECATEDIN_1_2_0(f)
-#endif
-
-#if OPENSSL_API_COMPAT < 0x10100000L
-# define DEPRECATEDIN_1_1_0(f)   DECLARE_DEPRECATED(f)
-#else
-# define DEPRECATEDIN_1_1_0(f)
-#endif
-
-#if OPENSSL_API_COMPAT < 0x10000000L
-# define DEPRECATEDIN_1_0_0(f)   DECLARE_DEPRECATED(f)
-#else
-# define DEPRECATEDIN_1_0_0(f)
-#endif
-
-#if OPENSSL_API_COMPAT < 0x00908000L
-# define DEPRECATEDIN_0_9_8(f)   DECLARE_DEPRECATED(f)
-#else
-# define DEPRECATEDIN_0_9_8(f)
-#endif
-
-/* Generate 80386 code? */
-#undef I386_ONLY
-
-#undef OPENSSL_UNISTD
-#define OPENSSL_UNISTD <unistd.h>
-
-#undef OPENSSL_EXPORT_VAR_AS_FUNCTION
-
-/*
- * The following are cipher-specific, but are part of the public API.
- */
-#if !defined(OPENSSL_SYS_UEFI)
-# undef BN_LLONG
-/* Only one for the following should be defined */
-# undef SIXTY_FOUR_BIT_LONG
-# undef SIXTY_FOUR_BIT
-# define THIRTY_TWO_BIT
-#endif
-
-#define RC4_INT unsigned int
-
-#ifdef  __cplusplus
-}
-#endif

CryptoPkg/Library/IntrinsicLib/Ia32/MathDivModU64x64.c

@@ -0,0 +1,23 @@
+/** @file
+  64-bit Math Worker Function.
+  The 32-bit versions of C compiler generate calls to library routines
+  to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+
+/* https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html */
+__attribute__ ((__used__))
+unsigned long long
+__udivmoddi4 (
+  unsigned long long  A,
+  unsigned long long  B,
+  unsigned long long  *C
+  )
+{
+  return DivU64x64Remainder ((UINT64)A, (UINT64)B, (UINT64 *)C);
+}

CryptoPkg/Library/IntrinsicLib/Ia32/MathDivS64x64.c

@@ -0,0 +1,22 @@
+/** @file
+  64-bit Math Worker Function.
+  The 32-bit versions of C compiler generate calls to library routines
+  to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+
+/* https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html */
+__attribute__ ((__used__))
+long long
+__divdi3 (
+  long long  A,
+  long long  B
+  )
+{
+  return DivS64x64Remainder ((INT64)A, (INT64)B, NULL);
+}

CryptoPkg/Library/IntrinsicLib/Ia32/MathDivU64x64.c

@@ -0,0 +1,22 @@
+/** @file
+  64-bit Math Worker Function.
+  The 32-bit versions of C compiler generate calls to library routines
+  to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+
+/* https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html */
+__attribute__ ((__used__))
+unsigned long long
+__udivdi3 (
+  unsigned long long  A,
+  unsigned long long  B
+  )
+{
+  return DivU64x64Remainder ((UINT64)A, (UINT64)B, NULL);
+}

CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c

@@ -23,3 +23,15 @@ _ftol2 (
     ret
   }
 }
+
+__declspec(naked) void
+_ftol2_sse (
+  void
+  )
+{
+  _asm {
+    fistp dword ptr [esp-4]
+    mov   eax,[esp-4]
+    ret
+  }
+}

CryptoPkg/Library/IntrinsicLib/Ia32/MathLldiv.asm

@@ -0,0 +1,203 @@
+;***
+;lldiv.asm - signed long divide routine
+;
+;       Copyright (c) Microsoft Corporation. All rights reserved.
+;       SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;Purpose:
+;       defines the signed long divide routine
+;           __alldiv
+;
+;Original Implemenation: MSVC 14.29.30133
+;
+;*******************************************************************************
+    .686
+    .model  flat,C
+    .code
+
+
+
+;***
+;lldiv - signed long divide
+;
+;Purpose:
+;       Does a signed long divide of the arguments.  Arguments are
+;       not changed.
+;
+;Entry:
+;       Arguments are passed on the stack:
+;               1st pushed: divisor (QWORD)
+;               2nd pushed: dividend (QWORD)
+;
+;Exit:
+;       EDX:EAX contains the quotient (dividend/divisor)
+;       NOTE: this routine removes the parameters from the stack.
+;
+;Uses:
+;       ECX
+;
+;Exceptions:
+;
+;*******************************************************************************
+_alldiv PROC NEAR
+
+HIWORD  EQU     [4]             ;
+LOWORD  EQU     [0]
+
+        push    edi
+        push    esi
+        push    ebx
+
+; Set up the local stack and save the index registers.  When this is done
+; the stack frame will look as follows (assuming that the expression a/b will
+; generate a call to lldiv(a, b)):
+;
+;               -----------------
+;               |               |
+;               |---------------|
+;               |               |
+;               |--divisor (b)--|
+;               |               |
+;               |---------------|
+;               |               |
+;               |--dividend (a)-|
+;               |               |
+;               |---------------|
+;               | return addr** |
+;               |---------------|
+;               |      EDI      |
+;               |---------------|
+;               |      ESI      |
+;               |---------------|
+;       ESP---->|      EBX      |
+;               -----------------
+;
+
+DVND    equ     [esp + 16]      ; stack address of dividend (a)
+DVSR    equ     [esp + 24]      ; stack address of divisor (b)
+
+
+; Determine sign of the result (edi = 0 if result is positive, non-zero
+; otherwise) and make operands positive.
+
+        xor     edi,edi         ; result sign assumed positive
+
+        mov     eax,HIWORD(DVND) ; hi word of a
+        or      eax,eax         ; test to see if signed
+        jge     short L1        ; skip rest if a is already positive
+        inc     edi             ; complement result sign flag
+        mov     edx,LOWORD(DVND) ; lo word of a
+        neg     eax             ; make a positive
+        neg     edx
+        sbb     eax,0
+        mov     HIWORD(DVND),eax ; save positive value
+        mov     LOWORD(DVND),edx
+L1:
+        mov     eax,HIWORD(DVSR) ; hi word of b
+        or      eax,eax         ; test to see if signed
+        jge     short L2        ; skip rest if b is already positive
+        inc     edi             ; complement the result sign flag
+        mov     edx,LOWORD(DVSR) ; lo word of a
+        neg     eax             ; make b positive
+        neg     edx
+        sbb     eax,0
+        mov     HIWORD(DVSR),eax ; save positive value
+        mov     LOWORD(DVSR),edx
+L2:
+
+;
+; Now do the divide.  First look to see if the divisor is less than 4194304K.
+; If so, then we can use a simple algorithm with word divides, otherwise
+; things get a little more complex.
+;
+; NOTE - eax currently contains the high order word of DVSR
+;
+
+        or      eax,eax         ; check to see if divisor < 4194304K
+        jnz     short L3        ; nope, gotta do this the hard way
+        mov     ecx,LOWORD(DVSR) ; load divisor
+        mov     eax,HIWORD(DVND) ; load high word of dividend
+        xor     edx,edx
+        div     ecx             ; eax <- high order bits of quotient
+        mov     ebx,eax         ; save high bits of quotient
+        mov     eax,LOWORD(DVND) ; edx:eax <- remainder:lo word of dividend
+        div     ecx             ; eax <- low order bits of quotient
+        mov     edx,ebx         ; edx:eax <- quotient
+        jmp     short L4        ; set sign, restore stack and return
+
+;
+; Here we do it the hard way.  Remember, eax contains the high word of DVSR
+;
+
+L3:
+        mov     ebx,eax         ; ebx:ecx <- divisor
+        mov     ecx,LOWORD(DVSR)
+        mov     edx,HIWORD(DVND) ; edx:eax <- dividend
+        mov     eax,LOWORD(DVND)
+L5:
+        shr     ebx,1           ; shift divisor right one bit
+        rcr     ecx,1
+        shr     edx,1           ; shift dividend right one bit
+        rcr     eax,1
+        or      ebx,ebx
+        jnz     short L5        ; loop until divisor < 4194304K
+        div     ecx             ; now divide, ignore remainder
+        mov     esi,eax         ; save quotient
+
+;
+; We may be off by one, so to check, we will multiply the quotient
+; by the divisor and check the result against the orignal dividend
+; Note that we must also check for overflow, which can occur if the
+; dividend is close to 2**64 and the quotient is off by 1.
+;
+
+        mul     dword ptr HIWORD(DVSR) ; QUOT * HIWORD(DVSR)
+        mov     ecx,eax
+        mov     eax,LOWORD(DVSR)
+        mul     esi             ; QUOT * LOWORD(DVSR)
+        add     edx,ecx         ; EDX:EAX = QUOT * DVSR
+        jc      short L6        ; carry means Quotient is off by 1
+
+;
+; do long compare here between original dividend and the result of the
+; multiply in edx:eax.  If original is larger or equal, we are ok, otherwise
+; subtract one (1) from the quotient.
+;
+
+        cmp     edx,HIWORD(DVND) ; compare hi words of result and original
+        ja      short L6        ; if result > original, do subtract
+        jb      short L7        ; if result < original, we are ok
+        cmp     eax,LOWORD(DVND) ; hi words are equal, compare lo words
+        jbe     short L7        ; if less or equal we are ok, else subtract
+L6:
+        dec     esi             ; subtract 1 from quotient
+L7:
+        xor     edx,edx         ; edx:eax <- quotient
+        mov     eax,esi
+
+;
+; Just the cleanup left to do.  edx:eax contains the quotient.  Set the sign
+; according to the save value, cleanup the stack, and return.
+;
+
+L4:
+        dec     edi             ; check to see if result is negative
+        jnz     short L8        ; if EDI == 0, result should be negative
+        neg     edx             ; otherwise, negate the result
+        neg     eax
+        sbb     edx,0
+
+;
+; Restore the saved registers and return.
+;
+
+L8:
+        pop     ebx
+        pop     esi
+        pop     edi
+
+        ret     16
+
+_alldiv ENDP
+
+end

CryptoPkg/Library/IntrinsicLib/Ia32/MathModU64x64.c

@@ -0,0 +1,26 @@
+/** @file
+  64-bit Math Worker Function.
+  The 32-bit versions of C compiler generate calls to library routines
+  to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/BaseLib.h>
+
+/* https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html */
+__attribute__ ((__used__))
+unsigned long long
+__umoddi3 (
+  unsigned long long  A,
+  unsigned long long  B
+  )
+{
+  unsigned long long  Reminder;
+
+  DivU64x64Remainder ((UINT64)A, (UINT64)B, (UINT64 *)&Reminder);
+
+  return Reminder;
+}

CryptoPkg/Library/IntrinsicLib/Ia32/MathUlldiv.asm

@@ -0,0 +1,157 @@
+;***
+;ulldiv.asm - unsigned long divide routine
+;
+;       Copyright (c) Microsoft Corporation. All rights reserved.
+;       SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;Purpose:
+;       defines the unsigned long divide routine
+;           __aulldiv
+;
+;Original Implemenation: MSVC 14.29.30133
+;
+;*******************************************************************************
+    .686
+    .model  flat,C
+    .code
+
+;***
+;ulldiv - unsigned long divide
+;
+;Purpose:
+;       Does a unsigned long divide of the arguments.  Arguments are
+;       not changed.
+;
+;Entry:
+;       Arguments are passed on the stack:
+;               1st pushed: divisor (QWORD)
+;               2nd pushed: dividend (QWORD)
+;
+;Exit:
+;       EDX:EAX contains the quotient (dividend/divisor)
+;       NOTE: this routine removes the parameters from the stack.
+;
+;Uses:
+;       ECX
+;
+;Exceptions:
+;
+;*******************************************************************************
+_aulldiv        PROC NEAR
+
+HIWORD  EQU     [4]             ;
+LOWORD  EQU     [0]
+
+        push    ebx
+        push    esi
+
+; Set up the local stack and save the index registers.  When this is done
+; the stack frame will look as follows (assuming that the expression a/b will
+; generate a call to uldiv(a, b)):
+;
+;               -----------------
+;               |               |
+;               |---------------|
+;               |               |
+;               |--divisor (b)--|
+;               |               |
+;               |---------------|
+;               |               |
+;               |--dividend (a)-|
+;               |               |
+;               |---------------|
+;               | return addr** |
+;               |---------------|
+;               |      EBX      |
+;               |---------------|
+;       ESP---->|      ESI      |
+;               -----------------
+;
+
+DVND    equ     [esp + 12]      ; stack address of dividend (a)
+DVSR    equ     [esp + 20]      ; stack address of divisor (b)
+
+;
+; Now do the divide.  First look to see if the divisor is less than 4194304K.
+; If so, then we can use a simple algorithm with word divides, otherwise
+; things get a little more complex.
+;
+
+        mov     eax,HIWORD(DVSR) ; check to see if divisor < 4194304K
+        or      eax,eax
+        jnz     short L1        ; nope, gotta do this the hard way
+        mov     ecx,LOWORD(DVSR) ; load divisor
+        mov     eax,HIWORD(DVND) ; load high word of dividend
+        xor     edx,edx
+        div     ecx             ; get high order bits of quotient
+        mov     ebx,eax         ; save high bits of quotient
+        mov     eax,LOWORD(DVND) ; edx:eax <- remainder:lo word of dividend
+        div     ecx             ; get low order bits of quotient
+        mov     edx,ebx         ; edx:eax <- quotient hi:quotient lo
+        jmp     short L2        ; restore stack and return
+
+;
+; Here we do it the hard way.  Remember, eax contains DVSRHI
+;
+
+L1:
+        mov     ecx,eax         ; ecx:ebx <- divisor
+        mov     ebx,LOWORD(DVSR)
+        mov     edx,HIWORD(DVND) ; edx:eax <- dividend
+        mov     eax,LOWORD(DVND)
+L3:
+        shr     ecx,1           ; shift divisor right one bit; hi bit <- 0
+        rcr     ebx,1
+        shr     edx,1           ; shift dividend right one bit; hi bit <- 0
+        rcr     eax,1
+        or      ecx,ecx
+        jnz     short L3        ; loop until divisor < 4194304K
+        div     ebx             ; now divide, ignore remainder
+        mov     esi,eax         ; save quotient
+
+;
+; We may be off by one, so to check, we will multiply the quotient
+; by the divisor and check the result against the original dividend
+; Note that we must also check for overflow, which can occur if the
+; dividend is close to 2**64 and the quotient is off by 1.
+;
+
+        mul     dword ptr HIWORD(DVSR) ; QUOT * HIWORD(DVSR)
+        mov     ecx,eax
+        mov     eax,LOWORD(DVSR)
+        mul     esi             ; QUOT * LOWORD(DVSR)
+        add     edx,ecx         ; EDX:EAX = QUOT * DVSR
+        jc      short L4        ; carry means Quotient is off by 1
+
+;
+; do long compare here between original dividend and the result of the
+; multiply in edx:eax.  If original is larger or equal, we are ok, otherwise
+; subtract one (1) from the quotient.
+;
+
+        cmp     edx,HIWORD(DVND) ; compare hi words of result and original
+        ja      short L4        ; if result > original, do subtract
+        jb      short L5        ; if result < original, we are ok
+        cmp     eax,LOWORD(DVND) ; hi words are equal, compare lo words
+        jbe     short L5        ; if less or equal we are ok, else subtract
+L4:
+        dec     esi             ; subtract 1 from quotient
+L5:
+        xor     edx,edx         ; edx:eax <- quotient
+        mov     eax,esi
+
+;
+; Just the cleanup left to do.  edx:eax contains the quotient.
+; Restore the saved registers and return.
+;
+
+L2:
+
+        pop     esi
+        pop     ebx
+
+        ret     16
+
+_aulldiv        ENDP
+
+        end

CryptoPkg/Library/IntrinsicLib/Ia32/MathUlldvrm.asm

@@ -0,0 +1,184 @@
+;***
+;ulldvrm.asm - unsigned long divide and remainder routine
+;
+;       Copyright (c) Microsoft Corporation. All rights reserved.
+;       SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;Purpose:
+;       defines the unsigned long divide and remainder routine
+;           __aulldvrm
+;
+;Original Implemenation: MSVC 14.29.30133
+;
+;*******************************************************************************
+    .686
+    .model  flat,C
+    .code
+
+
+;***
+;ulldvrm - unsigned long divide and remainder
+;
+;Purpose:
+;       Does a unsigned long divide and remainder of the arguments.  Arguments
+;       are not changed.
+;
+;Entry:
+;       Arguments are passed on the stack:
+;               1st pushed: divisor (QWORD)
+;               2nd pushed: dividend (QWORD)
+;
+;Exit:
+;       EDX:EAX contains the quotient (dividend/divisor)
+;       EBX:ECX contains the remainder (divided % divisor)
+;       NOTE: this routine removes the parameters from the stack.
+;
+;Uses:
+;       ECX
+;
+;Exceptions:
+;
+;*******************************************************************************
+_aulldvrm PROC NEAR
+
+HIWORD  EQU     [4]             ;
+LOWORD  EQU     [0]
+        push    esi
+
+; Set up the local stack and save the index registers.  When this is done
+; the stack frame will look as follows (assuming that the expression a/b will
+; generate a call to aulldvrm(a, b)):
+;
+;               -----------------
+;               |               |
+;               |---------------|
+;               |               |
+;               |--divisor (b)--|
+;               |               |
+;               |---------------|
+;               |               |
+;               |--dividend (a)-|
+;               |               |
+;               |---------------|
+;               | return addr** |
+;               |---------------|
+;       ESP---->|      ESI      |
+;               -----------------
+;
+
+DVND    equ     [esp + 8]       ; stack address of dividend (a)
+DVSR    equ     [esp + 16]      ; stack address of divisor (b)
+
+;
+; Now do the divide.  First look to see if the divisor is less than 4194304K.
+; If so, then we can use a simple algorithm with word divides, otherwise
+; things get a little more complex.
+;
+
+        mov     eax,HIWORD(DVSR) ; check to see if divisor < 4194304K
+        or      eax,eax
+        jnz     short L1        ; nope, gotta do this the hard way
+        mov     ecx,LOWORD(DVSR) ; load divisor
+        mov     eax,HIWORD(DVND) ; load high word of dividend
+        xor     edx,edx
+        div     ecx             ; get high order bits of quotient
+        mov     ebx,eax         ; save high bits of quotient
+        mov     eax,LOWORD(DVND) ; edx:eax <- remainder:lo word of dividend
+        div     ecx             ; get low order bits of quotient
+        mov     esi,eax         ; ebx:esi <- quotient
+
+;
+; Now we need to do a multiply so that we can compute the remainder.
+;
+        mov     eax,ebx         ; set up high word of quotient
+        mul     dword ptr LOWORD(DVSR) ; HIWORD(QUOT) * DVSR
+        mov     ecx,eax         ; save the result in ecx
+        mov     eax,esi         ; set up low word of quotient
+        mul     dword ptr LOWORD(DVSR) ; LOWORD(QUOT) * DVSR
+        add     edx,ecx         ; EDX:EAX = QUOT * DVSR
+        jmp     short L2        ; complete remainder calculation
+
+;
+; Here we do it the hard way.  Remember, eax contains DVSRHI
+;
+
+L1:
+        mov     ecx,eax         ; ecx:ebx <- divisor
+        mov     ebx,LOWORD(DVSR)
+        mov     edx,HIWORD(DVND) ; edx:eax <- dividend
+        mov     eax,LOWORD(DVND)
+L3:
+        shr     ecx,1           ; shift divisor right one bit; hi bit <- 0
+        rcr     ebx,1
+        shr     edx,1           ; shift dividend right one bit; hi bit <- 0
+        rcr     eax,1
+        or      ecx,ecx
+        jnz     short L3        ; loop until divisor < 4194304K
+        div     ebx             ; now divide, ignore remainder
+        mov     esi,eax         ; save quotient
+
+;
+; We may be off by one, so to check, we will multiply the quotient
+; by the divisor and check the result against the original dividend
+; Note that we must also check for overflow, which can occur if the
+; dividend is close to 2**64 and the quotient is off by 1.
+;
+
+        mul     dword ptr HIWORD(DVSR) ; QUOT * HIWORD(DVSR)
+        mov     ecx,eax
+        mov     eax,LOWORD(DVSR)
+        mul     esi             ; QUOT * LOWORD(DVSR)
+        add     edx,ecx         ; EDX:EAX = QUOT * DVSR
+        jc      short L4        ; carry means Quotient is off by 1
+
+;
+; do long compare here between original dividend and the result of the
+; multiply in edx:eax.  If original is larger or equal, we are ok, otherwise
+; subtract one (1) from the quotient.
+;
+
+        cmp     edx,HIWORD(DVND) ; compare hi words of result and original
+        ja      short L4        ; if result > original, do subtract
+        jb      short L5        ; if result < original, we are ok
+        cmp     eax,LOWORD(DVND) ; hi words are equal, compare lo words
+        jbe     short L5        ; if less or equal we are ok, else subtract
+L4:
+        dec     esi             ; subtract 1 from quotient
+        sub     eax,LOWORD(DVSR) ; subtract divisor from result
+        sbb     edx,HIWORD(DVSR)
+L5:
+        xor     ebx,ebx         ; ebx:esi <- quotient
+
+L2:
+;
+; Calculate remainder by subtracting the result from the original dividend.
+; Since the result is already in a register, we will do the subtract in the
+; opposite direction and negate the result.
+;
+
+        sub     eax,LOWORD(DVND) ; subtract dividend from result
+        sbb     edx,HIWORD(DVND)
+        neg     edx             ; otherwise, negate the result
+        neg     eax
+        sbb     edx,0
+
+;
+; Now we need to get the quotient into edx:eax and the remainder into ebx:ecx.
+;
+        mov     ecx,edx
+        mov     edx,ebx
+        mov     ebx,ecx
+        mov     ecx,eax
+        mov     eax,esi
+;
+; Just the cleanup left to do.  edx:eax contains the quotient.
+; Restore the saved registers and return.
+;
+
+        pop     esi
+
+        ret     16
+
+_aulldvrm ENDP
+
+        end

CryptoPkg/Library/IntrinsicLib/Ia32/MathUllrem.asm

@@ -0,0 +1,163 @@
+;***
+;ullrem.asm - unsigned long remainder routine
+;
+;       Copyright (c) Microsoft Corporation. All rights reserved.
+;       SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;Purpose:
+;       defines the unsigned long remainder routine
+;           __aullrem
+;
+;Original Implemenation: MSVC 14.29.30133
+;
+;*******************************************************************************
+    .686
+    .model  flat,C
+    .code
+
+
+;***
+;ullrem - unsigned long remainder
+;
+;Purpose:
+;       Does a unsigned long remainder of the arguments.  Arguments are
+;       not changed.
+;
+;Entry:
+;       Arguments are passed on the stack:
+;               1st pushed: divisor (QWORD)
+;               2nd pushed: dividend (QWORD)
+;
+;Exit:
+;       EDX:EAX contains the remainder (dividend%divisor)
+;       NOTE: this routine removes the parameters from the stack.
+;
+;Uses:
+;       ECX
+;
+;Exceptions:
+;
+;*******************************************************************************
+_aullrem        PROC NEAR
+
+HIWORD  EQU     [4]             ;
+LOWORD  EQU     [0]
+
+        push    ebx
+
+; Set up the local stack and save the index registers.  When this is done
+; the stack frame will look as follows (assuming that the expression a%b will
+; generate a call to ullrem(a, b)):
+;
+;               -----------------
+;               |               |
+;               |---------------|
+;               |               |
+;               |--divisor (b)--|
+;               |               |
+;               |---------------|
+;               |               |
+;               |--dividend (a)-|
+;               |               |
+;               |---------------|
+;               | return addr** |
+;               |---------------|
+;       ESP---->|      EBX      |
+;               -----------------
+;
+
+DVND    equ     [esp + 8]       ; stack address of dividend (a)
+DVSR    equ     [esp + 16]      ; stack address of divisor (b)
+
+; Now do the divide.  First look to see if the divisor is less than 4194304K.
+; If so, then we can use a simple algorithm with word divides, otherwise
+; things get a little more complex.
+;
+
+        mov     eax,HIWORD(DVSR) ; check to see if divisor < 4194304K
+        or      eax,eax
+        jnz     short L1        ; nope, gotta do this the hard way
+        mov     ecx,LOWORD(DVSR) ; load divisor
+        mov     eax,HIWORD(DVND) ; load high word of dividend
+        xor     edx,edx
+        div     ecx             ; edx <- remainder, eax <- quotient
+        mov     eax,LOWORD(DVND) ; edx:eax <- remainder:lo word of dividend
+        div     ecx             ; edx <- final remainder
+        mov     eax,edx         ; edx:eax <- remainder
+        xor     edx,edx
+        jmp     short L2        ; restore stack and return
+
+;
+; Here we do it the hard way.  Remember, eax contains DVSRHI
+;
+
+L1:
+        mov     ecx,eax         ; ecx:ebx <- divisor
+        mov     ebx,LOWORD(DVSR)
+        mov     edx,HIWORD(DVND) ; edx:eax <- dividend
+        mov     eax,LOWORD(DVND)
+L3:
+        shr     ecx,1           ; shift divisor right one bit; hi bit <- 0
+        rcr     ebx,1
+        shr     edx,1           ; shift dividend right one bit; hi bit <- 0
+        rcr     eax,1
+        or      ecx,ecx
+        jnz     short L3        ; loop until divisor < 4194304K
+        div     ebx             ; now divide, ignore remainder
+
+;
+; We may be off by one, so to check, we will multiply the quotient
+; by the divisor and check the result against the orignal dividend
+; Note that we must also check for overflow, which can occur if the
+; dividend is close to 2**64 and the quotient is off by 1.
+;
+
+        mov     ecx,eax         ; save a copy of quotient in ECX
+        mul     dword ptr HIWORD(DVSR)
+        xchg    ecx,eax         ; put partial product in ECX, get quotient in EAX
+        mul     dword ptr LOWORD(DVSR)
+        add     edx,ecx         ; EDX:EAX = QUOT * DVSR
+        jc      short L4        ; carry means Quotient is off by 1
+
+;
+; do long compare here between original dividend and the result of the
+; multiply in edx:eax.  If original is larger or equal, we're ok, otherwise
+; subtract the original divisor from the result.
+;
+
+        cmp     edx,HIWORD(DVND) ; compare hi words of result and original
+        ja      short L4        ; if result > original, do subtract
+        jb      short L5        ; if result < original, we're ok
+        cmp     eax,LOWORD(DVND) ; hi words are equal, compare lo words
+        jbe     short L5        ; if less or equal we're ok, else subtract
+L4:
+        sub     eax,LOWORD(DVSR) ; subtract divisor from result
+        sbb     edx,HIWORD(DVSR)
+L5:
+
+;
+; Calculate remainder by subtracting the result from the original dividend.
+; Since the result is already in a register, we will perform the subtract in
+; the opposite direction and negate the result to make it positive.
+;
+
+        sub     eax,LOWORD(DVND) ; subtract original dividend from result
+        sbb     edx,HIWORD(DVND)
+        neg     edx             ; and negate it
+        neg     eax
+        sbb     edx,0
+
+;
+; Just the cleanup left to do.  dx:ax contains the remainder.
+; Restore the saved registers and return.
+;
+
+L2:
+
+        pop     ebx
+
+        ret     16
+
+_aullrem        ENDP
+
+        end

CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf

@@ -32,6 +32,10 @@
   Ia32/MathFtol.c           | MSFT
   Ia32/MathLlmul.asm        | MSFT
   Ia32/MathLlshr.asm        | MSFT
+  Ia32/MathUlldiv.asm       | MSFT
+  Ia32/MathUlldvrm.asm      | MSFT
+  Ia32/MathLldiv.asm        | MSFT
+  Ia32/MathUllrem.asm       | MSFT
 
   Ia32/MathLShiftS64.c      | INTEL
   Ia32/MathRShiftU64.c      | INTEL
@@ -39,9 +43,14 @@
 
   Ia32/MathLShiftS64.nasm   | GCC
   Ia32/MathRShiftU64.nasm   | GCC
-
+  Ia32/MathDivModU64x64.c   | GCC
+  Ia32/MathDivS64x64.c      | GCC
+  Ia32/MathDivU64x64.c      | GCC
+  Ia32/MathModU64x64.c      | GCC
 [Sources.X64]
   CopyMem.c
+[Sources.RISCV64]
+  CopyMem.c
 
 [Packages]
   MdePkg/MdePkg.dec

CryptoPkg/Library/IntrinsicLib/MemoryIntrinsics.c

@@ -63,12 +63,3 @@ memcmp (
 {
   return (int)CompareMem (buf1, buf2, count);
 }
-
-int
-strcmp (
-  const char  *s1,
-  const char  *s2
-  )
-{
-  return (int)AsciiStrCmp (s1, s2);
-}

CryptoPkg/Library/OpensslLib/IA32/crypto/modes/ghash-x86.nasm

@@ -1,700 +0,0 @@
-; WARNING: do not edit!
-; Generated from openssl/crypto/modes/asm/ghash-x86.pl
-;
-; Copyright 2010-2020 The OpenSSL Project Authors. All Rights Reserved.
-;
-; Licensed under the OpenSSL license (the "License").  You may not use
-; this file except in compliance with the License.  You can obtain a copy
-; in the file LICENSE in the source distribution or at
-; https://www.openssl.org/source/license.html
-
-%ifidn __OUTPUT_FORMAT__,obj
-section code    use32 class=code align=64
-%elifidn __OUTPUT_FORMAT__,win32
-$@feat.00 equ 1
-section .text   code align=64
-%else
-section .text   code
-%endif
-global  _gcm_gmult_4bit_x86
-align   16
-_gcm_gmult_4bit_x86:
-L$_gcm_gmult_4bit_x86_begin:
-        push    ebp
-        push    ebx
-        push    esi
-        push    edi
-        sub     esp,84
-        mov     edi,DWORD [104+esp]
-        mov     esi,DWORD [108+esp]
-        mov     ebp,DWORD [edi]
-        mov     edx,DWORD [4+edi]
-        mov     ecx,DWORD [8+edi]
-        mov     ebx,DWORD [12+edi]
-        mov     DWORD [16+esp],0
-        mov     DWORD [20+esp],471859200
-        mov     DWORD [24+esp],943718400
-        mov     DWORD [28+esp],610271232
-        mov     DWORD [32+esp],1887436800
-        mov     DWORD [36+esp],1822425088
-        mov     DWORD [40+esp],1220542464
-        mov     DWORD [44+esp],1423966208
-        mov     DWORD [48+esp],3774873600
-        mov     DWORD [52+esp],4246732800
-        mov     DWORD [56+esp],3644850176
-        mov     DWORD [60+esp],3311403008
-        mov     DWORD [64+esp],2441084928
-        mov     DWORD [68+esp],2376073216
-        mov     DWORD [72+esp],2847932416
-        mov     DWORD [76+esp],3051356160
-        mov     DWORD [esp],ebp
-        mov     DWORD [4+esp],edx
-        mov     DWORD [8+esp],ecx
-        mov     DWORD [12+esp],ebx
-        shr     ebx,20
-        and     ebx,240
-        mov     ebp,DWORD [4+ebx*1+esi]
-        mov     edx,DWORD [ebx*1+esi]
-        mov     ecx,DWORD [12+ebx*1+esi]
-        mov     ebx,DWORD [8+ebx*1+esi]
-        xor     eax,eax
-        mov     edi,15
-        jmp     NEAR L$000x86_loop
-align   16
-L$000x86_loop:
-        mov     al,bl
-        shrd    ebx,ecx,4
-        and     al,15
-        shrd    ecx,edx,4
-        shrd    edx,ebp,4
-        shr     ebp,4
-        xor     ebp,DWORD [16+eax*4+esp]
-        mov     al,BYTE [edi*1+esp]
-        and     al,240
-        xor     ebx,DWORD [8+eax*1+esi]
-        xor     ecx,DWORD [12+eax*1+esi]
-        xor     edx,DWORD [eax*1+esi]
-        xor     ebp,DWORD [4+eax*1+esi]
-        dec     edi
-        js      NEAR L$001x86_break
-        mov     al,bl
-        shrd    ebx,ecx,4
-        and     al,15
-        shrd    ecx,edx,4
-        shrd    edx,ebp,4
-        shr     ebp,4
-        xor     ebp,DWORD [16+eax*4+esp]
-        mov     al,BYTE [edi*1+esp]
-        shl     al,4
-        xor     ebx,DWORD [8+eax*1+esi]
-        xor     ecx,DWORD [12+eax*1+esi]
-        xor     edx,DWORD [eax*1+esi]
-        xor     ebp,DWORD [4+eax*1+esi]
-        jmp     NEAR L$000x86_loop
-align   16
-L$001x86_break:
-        bswap   ebx
-        bswap   ecx
-        bswap   edx
-        bswap   ebp
-        mov     edi,DWORD [104+esp]
-        mov     DWORD [12+edi],ebx
-        mov     DWORD [8+edi],ecx
-        mov     DWORD [4+edi],edx
-        mov     DWORD [edi],ebp
-        add     esp,84
-        pop     edi
-        pop     esi
-        pop     ebx
-        pop     ebp
-        ret
-global  _gcm_ghash_4bit_x86
-align   16
-_gcm_ghash_4bit_x86:
-L$_gcm_ghash_4bit_x86_begin:
-        push    ebp
-        push    ebx
-        push    esi
-        push    edi
-        sub     esp,84
-        mov     ebx,DWORD [104+esp]
-        mov     esi,DWORD [108+esp]
-        mov     edi,DWORD [112+esp]
-        mov     ecx,DWORD [116+esp]
-        add     ecx,edi
-        mov     DWORD [116+esp],ecx
-        mov     ebp,DWORD [ebx]
-        mov     edx,DWORD [4+ebx]
-        mov     ecx,DWORD [8+ebx]
-        mov     ebx,DWORD [12+ebx]
-        mov     DWORD [16+esp],0
-        mov     DWORD [20+esp],471859200
-        mov     DWORD [24+esp],943718400
-        mov     DWORD [28+esp],610271232
-        mov     DWORD [32+esp],1887436800
-        mov     DWORD [36+esp],1822425088
-        mov     DWORD [40+esp],1220542464
-        mov     DWORD [44+esp],1423966208
-        mov     DWORD [48+esp],3774873600
-        mov     DWORD [52+esp],4246732800
-        mov     DWORD [56+esp],3644850176
-        mov     DWORD [60+esp],3311403008
-        mov     DWORD [64+esp],2441084928
-        mov     DWORD [68+esp],2376073216
-        mov     DWORD [72+esp],2847932416
-        mov     DWORD [76+esp],3051356160
-align   16
-L$002x86_outer_loop:
-        xor     ebx,DWORD [12+edi]
-        xor     ecx,DWORD [8+edi]
-        xor     edx,DWORD [4+edi]
-        xor     ebp,DWORD [edi]
-        mov     DWORD [12+esp],ebx
-        mov     DWORD [8+esp],ecx
-        mov     DWORD [4+esp],edx
-        mov     DWORD [esp],ebp
-        shr     ebx,20
-        and     ebx,240
-        mov     ebp,DWORD [4+ebx*1+esi]
-        mov     edx,DWORD [ebx*1+esi]
-        mov     ecx,DWORD [12+ebx*1+esi]
-        mov     ebx,DWORD [8+ebx*1+esi]
-        xor     eax,eax
-        mov     edi,15
-        jmp     NEAR L$003x86_loop
-align   16
-L$003x86_loop:
-        mov     al,bl
-        shrd    ebx,ecx,4
-        and     al,15
-        shrd    ecx,edx,4
-        shrd    edx,ebp,4
-        shr     ebp,4
-        xor     ebp,DWORD [16+eax*4+esp]
-        mov     al,BYTE [edi*1+esp]
-        and     al,240
-        xor     ebx,DWORD [8+eax*1+esi]
-        xor     ecx,DWORD [12+eax*1+esi]
-        xor     edx,DWORD [eax*1+esi]
-        xor     ebp,DWORD [4+eax*1+esi]
-        dec     edi
-        js      NEAR L$004x86_break
-        mov     al,bl
-        shrd    ebx,ecx,4
-        and     al,15
-        shrd    ecx,edx,4
-        shrd    edx,ebp,4
-        shr     ebp,4
-        xor     ebp,DWORD [16+eax*4+esp]
-        mov     al,BYTE [edi*1+esp]
-        shl     al,4
-        xor     ebx,DWORD [8+eax*1+esi]
-        xor     ecx,DWORD [12+eax*1+esi]
-        xor     edx,DWORD [eax*1+esi]
-        xor     ebp,DWORD [4+eax*1+esi]
-        jmp     NEAR L$003x86_loop
-align   16
-L$004x86_break:
-        bswap   ebx
-        bswap   ecx
-        bswap   edx
-        bswap   ebp
-        mov     edi,DWORD [112+esp]
-        lea     edi,[16+edi]
-        cmp     edi,DWORD [116+esp]
-        mov     DWORD [112+esp],edi
-        jb      NEAR L$002x86_outer_loop
-        mov     edi,DWORD [104+esp]
-        mov     DWORD [12+edi],ebx
-        mov     DWORD [8+edi],ecx
-        mov     DWORD [4+edi],edx
-        mov     DWORD [edi],ebp
-        add     esp,84
-        pop     edi
-        pop     esi
-        pop     ebx
-        pop     ebp
-        ret
-align   16
-__mmx_gmult_4bit_inner:
-        xor     ecx,ecx
-        mov     edx,ebx
-        mov     cl,dl
-        shl     cl,4
-        and     edx,240
-        movq    mm0,[8+ecx*1+esi]
-        movq    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [14+edi]
-        psllq   mm2,60
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [13+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [12+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [11+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [10+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [9+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [8+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [7+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [6+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [5+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [4+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [3+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [2+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [1+edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        mov     cl,BYTE [edi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        mov     edx,ecx
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        shl     cl,4
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+ecx*1+esi]
-        psllq   mm2,60
-        and     edx,240
-        pxor    mm1,[ebp*8+eax]
-        and     ebx,15
-        pxor    mm1,[ecx*1+esi]
-        movd    ebp,mm0
-        pxor    mm0,mm2
-        psrlq   mm0,4
-        movq    mm2,mm1
-        psrlq   mm1,4
-        pxor    mm0,[8+edx*1+esi]
-        psllq   mm2,60
-        pxor    mm1,[ebx*8+eax]
-        and     ebp,15
-        pxor    mm1,[edx*1+esi]
-        movd    ebx,mm0
-        pxor    mm0,mm2
-        mov     edi,DWORD [4+ebp*8+eax]
-        psrlq   mm0,32
-        movd    edx,mm1
-        psrlq   mm1,32
-        movd    ecx,mm0
-        movd    ebp,mm1
-        shl     edi,4
-        bswap   ebx
-        bswap   edx
-        bswap   ecx
-        xor     ebp,edi
-        bswap   ebp
-        ret
-global  _gcm_gmult_4bit_mmx
-align   16
-_gcm_gmult_4bit_mmx:
-L$_gcm_gmult_4bit_mmx_begin:
-        push    ebp
-        push    ebx
-        push    esi
-        push    edi
-        mov     edi,DWORD [20+esp]
-        mov     esi,DWORD [24+esp]
-        call    L$005pic_point
-L$005pic_point:
-        pop     eax
-        lea     eax,[(L$rem_4bit-L$005pic_point)+eax]
-        movzx   ebx,BYTE [15+edi]
-        call    __mmx_gmult_4bit_inner
-        mov     edi,DWORD [20+esp]
-        emms
-        mov     DWORD [12+edi],ebx
-        mov     DWORD [4+edi],edx
-        mov     DWORD [8+edi],ecx
-        mov     DWORD [edi],ebp
-        pop     edi
-        pop     esi
-        pop     ebx
-        pop     ebp
-        ret
-global  _gcm_ghash_4bit_mmx
-align   16
-_gcm_ghash_4bit_mmx:
-L$_gcm_ghash_4bit_mmx_begin:
-        push    ebp
-        push    ebx
-        push    esi
-        push    edi
-        mov     ebp,DWORD [20+esp]
-        mov     esi,DWORD [24+esp]
-        mov     edi,DWORD [28+esp]
-        mov     ecx,DWORD [32+esp]
-        call    L$006pic_point
-L$006pic_point:
-        pop     eax
-        lea     eax,[(L$rem_4bit-L$006pic_point)+eax]
-        add     ecx,edi
-        mov     DWORD [32+esp],ecx
-        sub     esp,20
-        mov     ebx,DWORD [12+ebp]
-        mov     edx,DWORD [4+ebp]
-        mov     ecx,DWORD [8+ebp]
-        mov     ebp,DWORD [ebp]
-        jmp     NEAR L$007mmx_outer_loop
-align   16
-L$007mmx_outer_loop:
-        xor     ebx,DWORD [12+edi]
-        xor     edx,DWORD [4+edi]
-        xor     ecx,DWORD [8+edi]
-        xor     ebp,DWORD [edi]
-        mov     DWORD [48+esp],edi
-        mov     DWORD [12+esp],ebx
-        mov     DWORD [4+esp],edx
-        mov     DWORD [8+esp],ecx
-        mov     DWORD [esp],ebp
-        mov     edi,esp
-        shr     ebx,24
-        call    __mmx_gmult_4bit_inner
-        mov     edi,DWORD [48+esp]
-        lea     edi,[16+edi]
-        cmp     edi,DWORD [52+esp]
-        jb      NEAR L$007mmx_outer_loop
-        mov     edi,DWORD [40+esp]
-        emms
-        mov     DWORD [12+edi],ebx
-        mov     DWORD [4+edi],edx
-        mov     DWORD [8+edi],ecx
-        mov     DWORD [edi],ebp
-        add     esp,20
-        pop     edi
-        pop     esi
-        pop     ebx
-        pop     ebp
-        ret
-align   64
-L$rem_4bit:
-dd      0,0,0,29491200,0,58982400,0,38141952
-dd      0,117964800,0,113901568,0,76283904,0,88997888
-dd      0,235929600,0,265420800,0,227803136,0,206962688
-dd      0,152567808,0,148504576,0,177995776,0,190709760
-db      71,72,65,83,72,32,102,111,114,32,120,56,54,44,32,67
-db      82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112
-db      112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62
-db      0