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548 Commits

Author SHA1 Message Date
Igor Kulchytskyy
8736b8fdca RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4602

Filter out the network interfaces which are not supported by
Redfish Host Interface.

Cc: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Mike Maslenkin <mike.maslenkin@gmail.com>
Signed-off-by: Igor Kulchytskyy <igork@ami.com>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-22 13:31:54 +00:00
Igor Kulchytskyy
f444c4bea5 RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after RestEx
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4602

Supported function of the driver changed to wait for all network
interface to be installed.

Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Acked-by Mike Maslenkin <mike.maslenkin@gmail.com>
Signed-off-by: Igor Kulchytskyy <igork@ami.com>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-22 13:31:54 +00:00
Liming Gao
8dd52c949e Revert "RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed later"
This reverts commit 06b27ccb90.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-11-22 13:31:54 +00:00
Liming Gao
15538bc62e Revert "RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow"
This reverts commit 3db76e6476.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-11-22 13:31:54 +00:00
Ashish Singhal
23dbb8a07d DynamicTablesPkg: Fix ETE _UID Creation
Bugzilla: 4600 (https://bugzilla.tianocore.org/show_bug.cgi?id=4600)

Just like CPU _UID, ETE UID also needs to be unique so
use AcpiProcessorUid instead of CpuName

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-11-21 14:13:54 +00:00
Igor Kulchytskyy
3db76e6476 RedfishPkg: RedfishDiscoverDxe: Optimize the Redfish Discover flow
Filter out the network interfaces which are not supported by
Redfish Host Interface.

Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Acked-by Mike Maslenkin <mike.maslenkin@gmail.com>
Signed-off-by: Igor Kulchytskyy <igork@ami.com>
2023-11-15 03:50:39 +00:00
Igor Kulchytskyy
06b27ccb90 RedfishPkg: RedfishDiscoverDxe: Fix issue if IPv4 installed after RestEx
Supported function of the driver changed to wait for all network
interface to be installed.

Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Acked-by Mike Maslenkin <mike.maslenkin@gmail.com>
Signed-off-by: Igor Kulchytskyy <igork@ami.com>
2023-11-15 03:50:39 +00:00
Jake Garver via groups.io
c9cce5a005 MdeModulePkg/RegularExpressinoDxe: Fix clang error
Ignore old style declaration warnings in oniguruma/src/st.c.  This was
already ignored for MSFT, but newer versions of clang complain as well.

Signed-off-by: Jake Garver <jake@nvidia.com>
Reviewed-by: Nhi Pham <nhi@os.amperecomputing.com>
Tested-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-11-13 05:21:09 +00:00
Michael D Kinney
33deaa3b84 BaseTools/Scripts/GetMaintainer: Sort output addresses
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4593

Sort the list of output addresses alphabetically so this
script produces the same output even if the order of patches
in a patch series is modified such that that order of files
processed by this script changes.

Use set() logic instead of OrderedDict to accumulate the
list of unique addresses that are sorted alphabetically.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-11 02:31:13 +00:00
Michael D Kinney
706811819d BaseTools/Scripts/GetMaintainer: Handle reviewer only case
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4593

If a package only has reviewers and no maintainers, then also
return the <default> maintainers.

In order to detect this case, get_maintainers() is updated to
return maintainers, reviews, and lists separately instead of
a single merged list.  This also allows this module to be used
by other scripts that need to distinguish between maintainers,
reviewers, and lists.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-11 02:31:13 +00:00
Leif Lindholm
05f3c3f3d0 BaseTools/Scripts/GetMaintainer: refactor internal returns as dicts
To clean up interfaces, change the lookup functions to return dictionaries
rather than multiple values.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-11 02:31:13 +00:00
Michael D Kinney
1cb580be85 BaseTools/Scripts/GetMaintainer: Simplify logic
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4593

get_section_maintainers() either returns a list with
valid entries or an empty list.  It never returns None.
Simplify logic that accumulates maintainers and lists by
unconditionally appending lists returned from
get_section_maintainers().

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-11 02:31:13 +00:00
Michael D Kinney
431ead235f BaseTools/Scripts/GetMaintainer: Fix logic bug collecting maintainers
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4593

Fix logic bug where maintainers is incorrectly added to lists.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-11 02:31:13 +00:00
Jiaxin Wu
589f2e49e5 UefiCpuPkg/PiSmmCpuDxeSmm: Fix CP Exception when CET enable
Root cause:
1. Before DisableReadonlyPageWriteProtect() is called, the return
address (#1) is pushed in shadow stack.
2. CET is disabled.
3. DisableReadonlyPageWriteProtect() returns to #1.
4. Page table is modified.
5. EnableReadonlyPageWriteProtect() is called, but the return
address (#2) is not pushed in shadow stack.
6. CET is enabled.
7. EnableReadonlyPageWriteProtect() returns to #2.
#CP exception happens because the actual return address (#2)
doesn't match the return address stored in shadow stack (#1).

Analysis:
Shadow stack will stop update after CET disable (DisableCet() in
DisableReadOnlyPageWriteProtect), but normal smi stack will be
continue updated with the function called and return
(DisableReadOnlyPageWriteProtect & EnableReadOnlyPageWriteProtect),
thus leading stack mismatch after CET re-enabled (EnableCet() in
EnableReadOnlyPageWriteProtect).

According SDM Vol 3, 6.15-Control Protection Exception:
Normal smi stack and shadow stack must be matched when CET enable,
otherwise CP Exception will happen, which is caused by a near RET
instruction.

CET is disabled in DisableCet(), while can be enabled in
EnableCet(). This way won't cause the problem because they are
implemented in a way that return address of DisableCet() is
poped out from shadow stack (Incsspq performs a pop to increases
the shadow stack) and EnableCet() doesn't use "RET" but "JMP" to
return to caller. So calling EnableCet() and DisableCet() doesn't
have the same issue as calling DisableReadonlyPageWriteProtect()
and EnableReadonlyPageWriteProtect().

With above root cause & analysis, define below 2 macros instead of
functions for WP & CET operation:
WRITE_UNPROTECT_RO_PAGES (Wp, Cet)
WRITE_PROTECT_RO_PAGES (Wp, Cet)
Because DisableCet() & EnableCet() must be in the same function
to avoid shadow stack and normal SMI stack mismatch.

Note: WRITE_UNPROTECT_RO_PAGES () must be called pair with
WRITE_PROTECT_RO_PAGES () in same function.

Change-Id: I4e126697efcd8dbfb4887da034d8691bfca969e3
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2023-11-10 01:21:12 +00:00
Michael D Kinney
35c0c63edb Maintainers.txt: Remove unused OvmfPkg Confidential Computing path
The following commit removed PlatformBootManagerLibGub from
OvmfPkg.  Update Maintainers.txt to remove reference to
deleted directory.

6fb2760dc8

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-09 20:23:32 +00:00
Yeping Song
e077ccff6d BaseTools/tools_def: drop -mgeneral-regs-only for AArch64 CLANGDWARF
Commit 0df6c8c157 ("BaseTools/tools_def AARCH64:
avoid SIMD registers in XIP code")
adds -mgeneral-regs-only to GCC_AARCH64_CC_XIPFLAGS,
in order to avoid a bug present in certain versions of GCC.
This was never a problem for clang.
That's given the history of what the problem is.
Then we can describe how we fix it:
Change *_CLANGDWARF_AARCH64_CC_XIPFLAGS to set the required -mstrict-align
option instead of importing the whole GCC variable.

Signed-off-by: Yeping Song <quic_yepings@quicinc.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-09 19:04:39 +00:00
Ceping Sun
8a41004643 OvmfPkg/BaseMemEncryptTdxLib: Handle retry result of MapGPA
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572

According to section 3.2 of the [GHCI] document, if the return status
of MapGPA is "TDG.VP.VMCALL_RETRY", TD must retry this operation for the
pages in the region starting at the GPA specified in R11.

In this patch, when a retry state is detected, TDVF needs to retry the
mapping with the specified address from the output results of TdVmCall.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.0
https://cdrdv2.intel.com/v1/dl/getContent/726790

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
2023-11-09 17:15:39 +00:00
Ceping Sun
212cf07aaa MdePkg/Tdx.h: Add TDVMCALL_STATUS_RETRY
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572

TDVMCALL_STATUS_RETRY is defined in GHCI spec section 2.4.1.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.0
https://cdrdv2.intel.com/v1/dl/getContent/726790

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
2023-11-09 17:15:39 +00:00
Ceping Sun
68e37f4578 MdePkg/BaseLib: Update TdVmcall to always output the value in R11
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4572

According to section 3.2 of the [GHCI] spec, if the return status
of MapGPA is "TDG.VP.VMCALL_RETRY", TD must retry this operation
for the pages in the region starting at the GPA specified in R11.

Currently, TDVF has not handled the retry results and always clears
the R11 on unsuccessful return status. For this, the TdVmcall needs
to output the value of R11 on unsuccessful return status to handle
the retry results of MapGPA.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.0
https://cdrdv2.intel.com/v1/dl/getContent/726790

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
2023-11-09 17:15:39 +00:00
JasonX.Hsu
616f0d5037 IntelFsp2WrapperPkg: Add variable initialization
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4595

Fix build error when remove "-Wno-sometimes-uninitialized" option,
Add variable "FspMultiPhaseApiOffset" initialization.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Chen Gang C <gang.c.chen@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: Jason Hsu <jasonx.hsu@intel.com>
2023-11-09 12:31:33 +00:00
Michael D Kinney
bb18fb80ab Maintainers.txt: Remove Orphan status option
We would like any proposed change in the edk2 codebase to be
assignable to a human maintainer/reviewer. If there is a feature
for which there is no longer any support, we should find a way
to remove it from the head of the repository. For critical
features, we must find community members that are willing to
own it.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-11-08 02:59:26 +00:00
Michael Kubacki
c96b4da2a0 ReadMe.rst: Add CodeQL/analyze directory under other licenses
The code in this directory is licensed under Apache License, Version
2.0. Therefore, the directory is listed under paths with licenses
other than BSD-2-Clause Plus Patent. The directory link points to the
complete Apache License, Version 2.0 on apache.org.

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
d461137e22 BaseTools/Plugin/CodeQL: Enable 30 queries
Updates the CodeQL queries opted into by edk2 to a set of queries from
the standard CodeQL query package `codeql/cpp-queries`.

After testing a large number of queries the included set here were
found to be the most useful with the least number of false positives.
Some queries had a number of issues that led to them being placed on
the exclusion list so that they are not considered in the future
without the notes there being taken into account.

General details about queries available in the pack are available here:
https://codeql.github.com/codeql-query-help/cpp/

The issues found by these queries will need to be fixed over time. In
the meantime, the results will show to those that have permission in
the repo's GitHub Code Scanning area. The build will not fail due to
CodeQL issues (since they are not all fixed) but that can be enabled in
the future.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
a3e8efcc8e .pytool/CISettings: Enable CodeQL audit mode
Since a large number of CodeQL queries are being enabled to identify
issues that the community can collectively resolve, audit mode needs to
be enabled to prevent the build from failing.

In the future, this global audit mode can be disabled and individual
packages can enable/disable audit mode in their package CI YAML file
using the instructions in the CodeQL plugin readme.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
1384ce443d .github/workflows/codeql.yml: Add CodeQL workflow
Adds a workflow to run CodeQL against all packages built in
.pytool/CISettings.py. The following is done:

1. Determine which packages to build against. Those that support
   are managed by .pytool/CISettings.py will be selected.

For each package:

2. Determine how to interact with the package. Such as whether
   `stuart_ci_setup` or `stuart_setup` should be used.
3. Perform supported Stuart steps for setup and update.
4. Discover the CodeQL plugin directory in the repo.
5. Attempt to load the CodeQL CLI specific to the host OS from a
   GitHub cache.
6. Perform the build.
7. Clean up some files after build to improve robustness.
8. Upload the CodeQL results (generated SARIF file) to GitHub Code
   Scanning. The results will be associated with the trigger of the
   workflow.

After each step that can upload logs such as the setup, update, and
build steps the logs are uploaded as an artifact to the workflow run.
This allows easy debugging in case there's an error in the step.

The SARIF file is also uploaded to the workflow run so it can be
downloaded and analyzed.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
29763016e0 .pytool/CISettings.py: Integrate CodeQL
Adds the `--codeql` parameter to `stuart_update` and
`stuart_ci_build`.

- `stuart_update --codeql` - Downloads the CodeQL CLI locally. The
  command will pull the appropriate binary for the host OS.
- `stuart_ci_build --codeql` - Runs CodeQL during the build resulting
  in a CodeQL database and SARIF result file in the `Build`
  directory.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
b531ca4bb3 BaseTools/Plugin/CodeQL: Add integration helpers
Adds a Python module to the CodeQL plugin directory that exports
functions commonly needed for Stuart-based platforms to easily
enable CodeQL in their platform build.

This functionality has already moved to edk2-pytool-extensions
https://github.com/tianocore/edk2-pytool-extensions in the
`edk2toolext/codeql.py` file but edk2 is too far behind to use that.

Additional integration changes are needed in edk2 and the series
to add those has not made it past review. In the meantime, the
functions are available locally in this commit and this commit can
be reverted after edk2-pytool-extensions 0.24.1 or greater is used
in edk2.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
5464d0bed6 BaseTools/Plugin/CodeQL: Add CodeQL build plugin
Adds a CodeQL plugin that supports CodeQL in the build system.

1. CodeQlBuildPlugin - Generates a CodeQL database for a given build.
2. CodeQlAnalyzePlugin - Analyzes a CodeQL database and interprets
   results.
3. External dependencies - Assist with downloading the CodeQL CLI and
   making it available to the CodeQL plugins.
4. CodeQlQueries.qls - A C/C++ CodeQL query set run against the code.
5. Readme.md - A comprehensive readme file to help:
   - Platform integrators understand how to configure the plugin
   - Developers understand how to modify the plugin
   - Users understand how to use the plugin

Read Readme.md for additional details.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Michael Kubacki
c1393bd486 Remove existing CodeQL infrastructure
CodeQL currently runs via the codeql-analysis.yml GitHub workflow
which uses the `github/codeql-action/init@v2` action (pre-build)
and the `github/codeql-action/analyze@v2` action (post-build) to
setup the CodeQL environment and extract results.

This infrastructure is removed in preparation for a new design that
will directly run the CodeQL CLI as part of the build. This will
allow CodeQL to be run locally as part of the normal build process
with results that match 1:1 with CI builds.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-11-07 03:19:26 +00:00
Joey Vagedes
da21991953 BaseTools: GenFw: auto-set nxcompat flag
Automatically set the nxcompat flag in the DLL Characteristics field of
the Optional Header of the PE32+ image. For this flag to be set
automatically, the section alignment must be evenly divisible
by 4K (EFI_PAGE_SIZE) and no section must be executable and writable.

Adds a command line flag to GenFw, --nonxcompat, to ensure the
IMAGE_DLLCHARACTERISTICS_NX_COMPAT bit is not set, even if all
requirements are met. Updates the manual for GenFw to include the new
flag.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-11-06 21:44:34 +00:00
Joey Vagedes
e53c618ea4 MdePkg: IndustryStandard: Add DLL Characteristics
Add the bit masks for DLL Characteristics, used within the optional
header of a PE, to the PeImage.h header file.

Update the Visual Studio, Microsoft Portable Executable and Common
Object File Format Specification, and the PE/COFF Specification to the
latest version.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-11-06 21:44:34 +00:00
Rebecca Cran
ae02d487a3 BaseTools: Update PatchCheck.py to allow whitespace issues in .rtf files
Allow .rtf files created by applications such as Notepad to be committed
as-is without further manual editing by skipping the requirements for
CRLF, no tabs and no trailing whitespace.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2023-11-06 20:25:57 +00:00
Jeff Brasen
778134e491 ShellPkg/Dp: Allow dp command to work without ACPI
If the system does not have ACPI setup use the configuration table
to get the performance info.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-11-06 01:33:49 +00:00
Jeff Brasen
ee942c5360 MdeModulePkg/DxeCorePerformanceLib: Install BPDT in config table
Install the performance table into the UEFI configuration table.
This will allow the shell application to get this if the system
is not using ACPI.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-11-06 01:33:49 +00:00
Michael D Kinney
038499a268 Maintainers.txt: Update based on active community members
Over the past few months, all the of the Maintainers and
Reviewers listed in Maintainers.txt have been contacted to make
sure Maintainers.txt accurately represents the TianoCore
community members that are actively participating in their
roles.  Based on specific feedback, bounced emails, and no
responses, updates have been made.

* RISCV64: Daniel Schaefer replaced with Andrei Warkentin
* ArmVirtPkg Xen has no remaining reviewers and review
  responsibility defaults to ArmVirtPkg Maintainers/Reviewers.
* ACPI modules related to S3 has no remaining reviewers and
  review responsibility defaults to MdeModulePkg Maintainers/
  Reviewers.
* OVMF CSM modules has no remaining reviewers and review
  responsibility defaults to OvmfPkg Maintainers/Reviewers.
* Bounce: Chan Laura <laura.chan@intel.com>
* Many smaller updates removing individuals that are no
  longer involved or have replacement coverage.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Julien Grall <julien@xen.org>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Stefan Berger <stefanb@linux.ibm.com>
Cc: Wenxing Hou <wenxing.hou@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Julien Grall <julien@xen.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2023-11-04 23:23:52 +00:00
Ray Ni
08ac799d36 IntelFsp2Pkg/PatchFv: Fix syntax issue in markdown manual
According to the markdown language syntax, headings should be after
number signs (#). The number of number signs correspond to the heading
level.
But current PatchFvUserManual.md doesn't insert a space between the
number signs and the heading title, resulting the markdown file is not
rendered well in markdown viewers.

The patch doesn't change any content but only adds spaces to ensure
the headings are correctly recognized.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
2023-11-03 21:09:10 +00:00
Ni, Ray
0b4acb88d6 IntelFsp2Pkg/SwitchStack: Reserve 32B when calling C function in 64bit
When FSP runs in API mode, it saves the IDTR in its own stack then
switches to bootloader's stack before it returns from FspMemoryInit.
Next time when the bootloader calls TempRamExit, FSP switches to
its own stack and restores IDTR from its stack saved earlier.

However, due to a bug in BaseFspSwitchStackLib, the IDTR saved on
FSP's stack might be corrupted that results the following TempRamExit
call fails inside FSP due to PeiServices pointer cannot be retrieved
from IDT.base - 8.

The bug is the assembly code doesn't reserve 32 bytes before calling
the C routine in 64bit. According to the x86-64 calling convention,
caller is responsible for allocating 32 bytes of "shadow space" on the
stack right before calling the function (regardless of the actual
number of parameters used).

When FSP is built in optimization-off mode, the C routine makes use
of the 32-byte "shadow space" which is not reserved by the assembly
caller. That causes the IDTR saved on the stack is corrupted by the
C routine.
The patch fixes so by reserving the 32 bytes before calling C routine.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
2023-11-03 19:41:25 +00:00
Michael Kubacki
8da978bf68 ReadMe.rst: Add Apache License 2.0 and update submodule list
- Adds Apache License 2.0 as an acceptable source license per
  discussion in https://edk2.groups.io/g/devel/message/110226
- Updates the URL for existing licenses to match the current path
  used by opensource.org.
- The submodule list in this file is stale and is very prone to
  being forgotten. The list of submodules in the submodules setion
  is replaced with a link to .gitmodules which has an active list
  of submodules at any given time.

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Pedro Falcato <pedro.falcato@gmail.com>
2023-11-02 18:43:10 +00:00
Sami Mujawar
fbbbd98499 DynamicTablesPkg: Fix assert in CmObject parser
The patch "f81ee47513e5 DynamicTablesPkg: Add an ET info
object parser" updates the Configuration Manager object
parser to add support for parsing CM_ARM_ET_INFO object.

However, the GicC info structure also has an ET Reference
token that points to the CM_ARM_ET_INFO object. Therefore,
update the GICC info object parser to add an entry to parse
the ET reference token. Without this change an assert
stating that the RemainingSize != 0 will be triggered.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
2023-11-01 15:17:37 +00:00
Nickle Wang
1b1509abee RedfishPkg/RedfishCrtLib: remove multiple definitions.
There are two definitions for below functions in RedfishCrtLib.h. Create
this change to remote duplicated functions.
Function list: strcmp(), strncmp(), strncpy(), strcpy(), strcat(),
strlen(), strchr(), strcasecmp(), strstr(), memcmp(), memset(),
memcpy(), memchr(), memcmp() and memmove().

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Cc: Mike Maslenkin <mike.maslenkin@gmail.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Acked-by: Mike Maslenkin <mike.maslenkin@gmail.com>
2023-11-01 03:07:50 +00:00
Yuanhao Xie
ccbe2e9383 UefiCpuPkg: Correct file description for MpHandOff header file
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Message-Id: <20231007063203.936-1-yuanhao.xie@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Rahul R Kumar <rahul.r.kumar@intel.com>
2023-10-31 20:55:37 +00:00
Michael Kubacki
36812d6c3e .github/workflows: Add Stale Check
Adds a GitHub workflow that uses the actions/stale GitHub action to
automatically leave notifications on and close PRs that have had no
activity for a long time.

Note: Modifications to a PR reset the staleness counter. This
      includes pushing to the PR, adding a label to the PR,
      commenting on the PR, etc.

      If a PR has been marked "stale", simply leaving a comment will
      reset the counter.

Configuration choices:

1. Do not attempt to close edk2 GitHub issues.
2. Mark edk2 PRs as stale if no activity in the last 60 days. Close
   PRs marked stale if no further activity in 7 days.
3. Do not exempt PRs with a "push" label.
4. Run the check once daily. Allow manual runs from those that have
   permission to run GitHub workflows.
5. Add the label "stale" to the PR when it enters the stale state.

Rationale:

1. We do not use issues often enough. The limited usage of GitHub
   issues in Tianocore org GitHub projects are in another repo not
   impacted by this workflow and expected to track long term tasks.
2. This is the default value. In non-edk2 projects, I've seen these
   times work fairly well to identify PRs that have fallen stale.
3. Adding a "push" label resets the stale timer. If a PR has had a
   "push" label for 60+ days and has not been fixed for submission,
   then it is has very likely been abandoned.
4. This is sufficient to update PRs on the day granularity the
   configuration settings are applied against.
5. The label makes it easy to filter stale PRs in the PR list and
   write automation around PRs that are stale. It's also an obvious
   visual identifier that a PR needs attention in the PR list.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Message-Id: <20231031014120.917-1-mikuback@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2023-10-31 14:40:50 +00:00
Michael Kubacki
a6871b5359 ArmVirtPkg/PlatformCI/ReadMe.md: Update contents
Since the code is most regularly tested in CI, distro/versioning
details are updated to match the latest CI configuration.

CI has moved from Ubuntu 18.04 to Ubuntu 22.04 since the time of the
file's creation, but the code is actually built in a Fedora container
so Fedora is mentioned as the primary build/test environment.

Updates the following information:

- Build OS: Fedora 37 Linux
- Supported Configuration: Additional DSCs added
- Python: 3.12.x
- Packaging Tool: dnf instead of apt
- Container Details: Added
- Primary Build Example: QemuBuild.py instead of PlatformBuild.py

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Message-Id: <20231030230902.849-1-mikuback@linux.microsoft.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: don't specify the number of supported firmware builds]
2023-10-31 14:40:50 +00:00
Michael Kubacki
2e128302e6 ArmVirtPkg: Add varpolicy shell command
Adds the varpolicy EFI shell command to all DSC files that
currently include other dynamic shell commands from ShellPkg.

This command allows variable policies to be dumped in the EFI
shell for convenient auditing and debug.

Use the command in the EFI shell as follows:

- `"varpolicy"` dumps platform variables
- `"varpolicy -?"` shows help text
- `"varpolicy -b"` pages output as expected
- `"varpolicy -s"` shows accurate variable statistic information
- `"varpolicy -p"` shows accurate UEFI variable policy information
- `"varpolicy-v -b"` dumps all information including variable data hex dump

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Julien Grall <julien@xen.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Message-Id: <20231030203112.736-5-mikuback@linux.microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-31 14:40:50 +00:00
Michael Kubacki
fe6cd1c187 OvmfPkg: Add varpolicy shell command
Adds the varpolicy EFI shell command to all DSC files that
currently include other dynamic shell commands from ShellPkg.

This command allows variable policies to be dumped in the EFI
shell for convenient auditing and debug.

Use the command in QEMU EFI shell as follows:

- `"varpolicy"` dumps platform variables
- `"varpolicy -?"` shows help text
- `"varpolicy -b"` pages output as expected
- `"varpolicy -s"` shows accurate variable statistic information
- `"varpolicy -p"` shows accurate UEFI variable policy information
- `"varpolicy-v -b"` dumps all information including variable data hex dump

Cc: Anatol Belski <anbelski@linux.microsoft.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jianyong Wu <jianyong.wu@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Julien Grall <julien@xen.org>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Message-Id: <20231030203112.736-4-mikuback@linux.microsoft.com>
2023-10-31 14:40:50 +00:00
Michael Kubacki
d4358a7f76 ShellPkg: Add varpolicy dynamic shell command and app
Adds a new module (dynamic shell command) to ShellPkg that lists
variable policy information for all UEFI variables on the system.

Some other UEFI variable related functionality is also included to
give a greater sense of platform UEFI variable state. This command
is intended to help make variable policies more transparent and
easier to understand and configure on a platform.

Like all dynamic shell commands, a platform only needs to include
`VariablePolicyDynamicCommand.inf` in their flash image to have
the command registered in their UEFI shell.

Include the following lines in platform DSC (in DXE components section):

```
  ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf {
    <PcdsFixedAtBuild>
      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
  }
```

Include the following line in platform FDF:

```
INF  ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf
```

A standalone UEFI application can also be built that uses the same
underlying functional code as the dynamic shell command.

The path to use in the DSC and FDF for the app:

```
  ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyApp.inf
```

Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Message-Id: <20231030203112.736-3-mikuback@linux.microsoft.com>
2023-10-31 14:40:50 +00:00
Michael Kubacki
f3b2187d55 MdeModulePkg/VariablePolicy: Add more granular variable policy querying
Introduces two new APIs to EDKII_VARIABLE_POLICY_PROTOCOL:
  1. GetVariablePolicyInfo()
  2. GetLockOnVariableStateVariablePolicyInfo()

These allow a caller to retrieve policy information associated with
a UEFI variable given the variable name and vendor GUID.

GetVariablePolicyInfo() - Returns the variable policy applied to the
UEFI variable. If the variable policy is applied toward an individual
UEFI variable, that name can optionally be returned.

GetLockOnVariableStateVariablePolicyInfo() - Returns the Lock on
Variable State policy applied to the UEFI variable. If the Lock on
Variable State policy is applied to a specific variable name, that
name can optionally be returned.

These functions can be useful for a variety of purposes such as
auditing, testing, and functional flows.

Also fixed some variable name typos in code touched by the changes.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Message-Id: <20231030203112.736-2-mikuback@linux.microsoft.com>
2023-10-31 14:40:50 +00:00
Joey Vagedes
8e74629070 .azurepipelines: Fix Python version (to 3.12)
Upgrades python to 3.12 for build as it has been released and all
supporting tools have been updated to also support 3.12.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Message-Id: <20231030164131.20419-1-joeyvagedes@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-10-31 14:40:50 +00:00
Jinlong Xu
2426a35625 MdePkg ACPI65: Add 0x0B/PRM to Generic Address Structure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4567

ACPI_Spec_6_5_Aug29 Table 5.1, add 0x0B/Platform Runtime Mechanism (PRM)
in Address Space ID of Generic Address Structure (GAS)

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Jinlong Xu <jinlong.xu@intel.com>
Message-Id: <20231020111348.2921-1-jinlong.xu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-31 14:40:50 +00:00
Jeff Brasen
aa8431822b MdeModulePkg/DxeCore: Allow relocation of images with large address
Add PCD to control if modules with start addresses in PE/COFF > 0x100000
attempt to load at specified address.
If a module has an address in this range and there is untested memory
DxeCore will attempt to promote all memory to tested which bypasses any
memory testing that would occur later in boot.

There are several existing AARCH64 option roms that have base addresses
of 0x180000000.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Ashish Singhal <ashishsingha@nvidia.com>
Message-Id: <bd36c9c24158590db2226ede05cb8c2f50c93a37.1684194452.git.jbrasen@nvidia.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-31 14:40:50 +00:00
Sami Mujawar
a671a14e63 ArmPkg/ArmLib: Add ArmHasEte () helper function
Create a helper function to query whether ID_AA64MFR1_EL1 indicates
presence of the Embedded Trace Extension (ETE). This feature is only
visible in AARCH64 state.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
08431081a3 ArmPkg/ArmLib: Add ArmHasTrbe () helper function
Create a helper function to query whether ID_AA64MFR1_EL1 indicates
presence of the Trace Buffer Extension (TRBE). This feature is only
visible in AARCH64 state.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
09fd4e4172 DynamicTablesPkg: Fix referencing of CPC token
The CpcToken has been incorrectly referenced in the
CreateTopologyFromGicC() and always points to the
CPC token in the first GICC Info object.

Therefore, fix this by correctly indexing into the
GicCInfo object array.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
3ee23713e1 DynamicTablesPkg: Add ETE device to CPU node in AML
The Coresight Embedded Trace Extension (ETE) feature
can be detected by the platform firmware by examining
the debug feature register ID_AA64DFR0_EL1.TraceVer
field.
The platform configuration manager can then describe
the ETE by creating CM_ARM_ET_INFO object(s) and
referencing these in CM_ARM_GICC_INFO.EtToken.

The 'Table 3: Compatible IDs for architected
CoreSight components' in the 'ACPI for CoreSight
1.2 Platform Design Document' specifies the HID
value for Coresight ETE and CoreSight Embedded
Trace Macrocell (ETM) v4.x as ARMH C500.

Therefore, update the SsdtCpuTopologyGenerator
to add an ETE device to the CPU node in the AML
CPU hierarchy so that an OS can utilise this
information.

Note: Although ETE and ETM share the same HID,
ETE has a system register interfaces, unlike
ETM which requires memory mapped registers.
Since this patch aims to support ETE, the AML
description does not describe any memory mapped
registers. However, support for ETM can be
added in the future.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
f81ee47513 DynamicTablesPkg: Add an ET info object parser
An Embedded Trace (ET) info object is used to provide
information about an Embedded Trace Extension (ETE) or
an Embedded Trace Module (ETM) available on a platform.

The CM_ARM_ET_INFO object has already been added to the
Arm namespace objects list by a previous patch.

Therefore, update the CM Object parser to add support
for parsing the CM_ARM_ET_INFO object.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
4821daa524 DynamicTablesPkg: Add an ET info object to Arm namespace
Add an Embedded Trace (ET) info object that can be
used to provide information about Embedded Trace
Extension (ETE) or Embedded Trace Module (ETM)
available on a platform.

Although ETE and ETM share the same HID,
ETE has a system register interfaces, unlike
ETM which requires memory mapped registers.

Since this patch aims to support ETE it does
not describe any memory mapped registers.
However, required support for ETM can be added
in the future.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
2b0d117b4b ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
ACPI 6.5 introduces a new filed to the MADT GICC
structure to specify the TRBE interrupt. The TRBE
interrupt is a Processor Private interrupt (PPI)
and is used to specify a platform-specific
interrupt to signal TRBE events.

Therefore, update the MADT GICC structure parser
to parse the new TRBE interrupt field. Also, add
validations to check that the TRBE interrupt is
within the PPI interrupt range.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
50e8518276 DynamicTablesPkg: Update FADT generator to ACPI 6.5
The ACPI 6.5 specification updates the minor revision
of the FADT table to 5. Therefore, update the FADT
generator to setup the minor revision for ACPI 6.5.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
36e9f3d08a DynamicTablesPkg: Update MADT generator for ACPI 6.5
The ACPI 6.5 specification updates the MADT table to add
a new field to GICC for specifying the TRBE interrupt and
also adds support for Online Capable flag to the GICC flags.

The Online Capable flags should be passed transparently
through as specified in the CM_ARM_GICC_INFO.Flags field
and only require the MADT table revision to be setup to
6 to reflect the ACPI 6.5 specification.

The TRBE field needs to be appropriately setup in the
GICC structure.

Therefore, update the MADT generator to reflect the
above updates required for supporting ACPI 6.5

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
cf62548a35 DynamicTablesPkg: Add TRBE interrupt to GICC object parser
ACPI 6.5 introduces a new filed to the MADT GICC structure
to specify the Trace Buffer Extension (TRBE) interrupt. The
TRBE interrupt is a Processor Private interrupt (PPI) and is
used to specify a platform-specific interrupt to signal TRBE
events.

This field has already been added to the CM_ARM_GICC_INFO
structure in a previous patch.

Therefore, update the Configuration Manager Object Parser to
reflect the addition of the TRBE interrupt field.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
db9800dce8 DynamicTablesPkg: Add TRBE interrupt to GICC object
ACPI 6.5 introduces a new filed to the MADT GICC structure
to specify the Trace Buffer Extension (TRBE) interrupt. The
TRBE interrupt is a Processor Private interrupt (PPI) and is
used to specify a platform-specific interrupt to signal TRBE
events.

Therefore, update the CM_ARM_GICC_INFO to reflect the addition
of the TRBE interrupt field.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
f9925c8953 MdePkg: MADT: Add TRBE interrupt to GICC
The ASWG ECR 2303 introduces a new field 'TRBE
interrupt' to GICC structure in ACPI 6.5.

The Trace Buffer Extension (TRBE) interrupt is a
Processor Private interrupt (PPI) and is used to
specify a platform-specific interrupt to signal
TRBE events.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-10-30 12:16:56 +00:00
Sami Mujawar
822c54eb01 MdePkg: MADT: Add Online capable flag in GICC
Bugzilla: 3706 'Code First - MADT GICC new flags'

On ARM systems physical CPU hotplug is not supported.
All CPUs are considered present and this is true
throughout the system uptime.

The ECR 2285 introduces a new 'online-capable' flag
in the GICC structure flags in ACPI 6.5, to signal
firmware policy (CPU is not enabled but it can be
enabled and onlined). This enables OSPM to support
virtual CPU hotplug (on virtual platforms for
instance).

This ECR also updates the MADT table revision to 6
to reflect the ACPI 6.5 changes. Therefore, update
the MADT table revision to match the value as
specified in ACPI 6.5.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-10-30 12:16:56 +00:00
Gary Lin
4f3ee7fbaf Maintainers.txt: update Gary's email address
Update Gary's email address from HPE to SUSE.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-28 18:46:44 +00:00
Joey Vagedes
7806713f00 BaseTools: Plugin: Integration of edk2-pytools
Performs Integration instructions necessary to upgrade edk2-pytool-library
to 0.19.3 and edk2-pytool-extensions to 0.25.1. This includes resolving the
deprecation of builder.mws and replacing it with builder.edk2path
functionality.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Message-Id: <20231027151551.1043941-3-joeyvagedes@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@os.amperecomputing.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-10-28 14:59:29 +00:00
Joey Vagedes
7f5c24ad35 .pytool: Integration of edk2-pytools
Performs Integration instructions necessary to upgrade edk2-pytool-library
to 0.19.3 and edk2-pytool-extensions to 0.25.1. This includes resolving
deprecation warnings in the UncrustifyCheck plugin, and Updating the
HostUnitTestDscCompleteCheck plguin to account for a change such that inf's
that do not filter the LIBRARY_CLASS define to certain types, are assumed
to also support HOST_APPLICATION.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Message-Id: <20231027151551.1043941-2-joeyvagedes@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@os.amperecomputing.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-10-28 14:59:29 +00:00
BruceX Wang
7ff6ab2b3e UefiPayloadPkg: Fix incorrect code on Fit function.
1. Add firmware volume need to check firmware volume exist or not.
2. Remove clang version check dependency.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>

Signed-off-by: BruceX Wang <brucex.wang@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
2023-10-27 23:36:15 +00:00
Michael Kubacki
7e08d17a4a Maintainers.txt: Add .pytool maintainers to BaseTools/Plugin
Plugins can be placed either in .pytool/Plugin (CI plugin) or
BaseTools/Plugin (build plugin).

Since most of the .pytool maintainers already review many of the
plugins placed there, the same maintainers are added for the Plugin
directory in BaseTools to increase the total number of maintainers
for plugin changes.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-27 02:07:27 +00:00
Vivian Nowka-Keane
ca32f75fc6 .pytool: Undo uncrustify check change
Set global audit only to False now that new rules have been applied to
all necessary packages.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
1e27258a89 UnitTestFrameworkPkg: Apply uncrustify formatting to relevant files
Apply uncrustify formatting to GoogleTest cpp and header files.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
a00f7a355a SecurityPkg: Apply uncrustify formatting to relevant files
Apply uncrustify formatting to GoogleTest cpp and header files.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
716a3292e0 MdePkg: Apply uncrustify formatting to relevant files
Apply uncrustify formatting to GoogleTest cpp and header files.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
504953ef97 MdeModulePkg: Apply uncrustify formatting to relevant files.
Apply uncrustify formatting to GoogleTest cpp files and respective
header file.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
41c622523d .pytool: Add cpp support to uncrustify plugin
Modified the uncrustify config to apply cpp specific formatting rules.
Modified uncrustify check to include *.cpp files.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Vivian Nowka-Keane
d0cac9f63f .pytool: Set uncrustify check to audit only (temporary)
Temporarily set uncrustify to audit only mode so the following commits can adjust the code for new formatting settings before those settings are applied.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Vivian Nowka-Keane <vnowkakeane@linux.microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-27 00:50:49 +00:00
Laszlo Ersek
f945b72331 ArmVirtPkg: steer DebugLib output away from SerialPortLib+console traffic
For the RELEASE target, all ArmVirtPkg DSCs inherit BaseDebugLibNull from
"ArmVirt.dsc.inc"; keep that.

For NOOPT and DEBUG:

- switch the lib class resolution pair (BaseDebugLibSerialPort +
  FdtPL011SerialPortLib) that is set as the default for all module types
  in "ArmVirt.dsc.inc" to DebugLibFdtPL011UartRam;

- switch the lib class resolution pair (BaseDebugLibSerialPort +
  EarlyFdtPL011SerialPortLib) that is set as an override for SEC,
  PEI_CORE, PEIM modules in "ArmVirt.dsc.inc" to
  DebugLibFdtPL011UartFlash;

- switch the lib class resolution pair (DxeRuntimeDebugLibSerialPort +
  FdtPL011SerialPortLib) that is set as an override for DXE_RUNTIME_DRIVER
  modules in "ArmVirt.dsc.inc" to DxeRuntimeDebugLibFdtPL011Uart;

- mask all of the above DebugLib class resolution changes in
  "ArmVirtKvmTool.dsc", because "ArmVirtKvmTool.dsc" uses
  BaseSerialPortLib16550 rather than PL011 UARTs,

- mask all of the above DebugLib class resolution changes in
  "ArmVirtXen.dsc" too, because "ArmVirtXen.dsc" uses
  XenConsoleSerialPortLib rather than PL011 UARTs.

I regression-tested this change for "ArmVirtKvmTool.dsc" and
"ArmVirtXen.dsc" by building them for both DEBUG and RELEASE, both before
the patch and after, and comparing the edk2 build report files (focusing
on lib class resolutions). There are no changes.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Julien Grall <julien@xen.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-10-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
601abf5d50 ArmVirtPkg: introduce DebugLibFdtPL011Uart DXE Runtime instance
Introduce three new DebugLib instances, forked from
MdePkg/Library/BaseDebugLibSerialPort. All three instances rely on
PL011UartLib rather than SerialPortLib so that they can customize the
PL011 UART that the debug messages are written to. All three instances
direct the debug output to the first such PL011 UART that *differs* from
the one specified in the Device Tree's /chosen node's "stdout-path"
property.

From these, DxeRuntimeDebugLibFdtPL011Uart is identical to
DebugLibFdtPL011UartRam, with the addition that UART access is permanently
disabled when the containing DXE_RUNTIME_DRIVER module is notified about
exiting boot services.

The contexts in which these DebugLib instances run are identical to those
in which the corresponding SerialPortLib instances run. The particular
original dependency chain is

  DxeRuntimeDebugLibSerialPort (DXE_RUNTIME_DRIVER)
    FdtPL011SerialPortLib
      gEarlyPL011BaseAddressGuid
      HobLib
      PL011UartLib

and the new dependency chain is

  DxeRuntimeDebugLibFdtPL011Uart (DXE_RUNTIME_DRIVER)
    gEarlyPL011BaseAddressGuid
    HobLib
    PL011UartLib

The ArmVirtPkg DSC files will be switched to the new library instances in
a separate patch.

This patch is worth viewing with "git show --find-copies-harder".

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-9-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
ba5d955e25 ArmVirtPkg: introduce DebugLibFdtPL011Uart RAM instance
Introduce three new DebugLib instances, forked from
MdePkg/Library/BaseDebugLibSerialPort. All three instances rely on
PL011UartLib rather than SerialPortLib so that they can customize the
PL011 UART that the debug messages are written to. All three instances
direct the debug output to the first such PL011 UART that *differs* from
the one specified in the Device Tree's /chosen node's "stdout-path"
property.

From these, DebugLibFdtPL011UartRam mirrors FdtPL011SerialPortLib: it
relies on the EarlyPL011BaseAddress GUID HOB, and initializes the UART --
a UART different from FdtPL011SerialPortLib's -- only once in the lifetime
of the containing module. Suitable for module types that can only execute
from RAM (i.e., all types different from SEC, PEI_CORE, PEIM), except
DXE_RUNTIME_DRIVER.

(Note that OVMF uses a similar set of dedicated DebugLib instances
(PlatformDebugLibIoPort) for logging to the (x86-only) isa-debugcon device
from various firmware phases.)

The contexts in which these DebugLib instances run are identical to those
in which the corresponding SerialPortLib instances run. The particular
original dependency chain is

  BaseDebugLibSerialPort (not SEC, PEI_CORE, PEIM, DXE_RUNTIME_DRIVER)
    FdtPL011SerialPortLib
      gEarlyPL011BaseAddressGuid
      HobLib
      PL011UartLib

and the new dependency chain is

  DebugLibFdtPL011UartRam (not SEC, PEI_CORE, PEIM, DXE_RUNTIME_DRIVER)
    gEarlyPL011BaseAddressGuid
    HobLib
    PL011UartLib

Note that FdtPL011SerialPortLib remains in use (just not via
BaseDebugLibSerialPort); for instance by MdeModulePkg/Universal/SerialDxe,
which produces the SerialIo protocol, underlying the UEFI console.

The ArmVirtPkg DSC files will be switched to the new library instances in
a separate patch.

This patch is worth viewing with "git show --find-copies-harder".

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-8-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
b7e6d97973 ArmVirtPkg: introduce DebugLibFdtPL011Uart Flash instance
Introduce three new DebugLib instances, forked from
MdePkg/Library/BaseDebugLibSerialPort. All three instances rely on
PL011UartLib rather than SerialPortLib so that they can customize the
PL011 UART that the debug messages are written to. All three instances
direct the debug output to the first such PL011 UART that *differs* from
the one specified in the Device Tree's /chosen node's "stdout-path"
property.

From these, DebugLibFdtPL011UartFlash mirrors EarlyFdtPL011SerialPortLib:
it parses the initial Device Tree, and initializes the UART -- a UART
different from EarlyFdtPL011SerialPortLib's -- for every message written.
Suitable for SEC, PEI_CORE, PEIM.

(Note that OVMF uses a similar set of dedicated DebugLib instances
(PlatformDebugLibIoPort) for logging to the (x86-only) isa-debugcon device
from various firmware phases.)

The contexts in which these DebugLib instances run are identical to those
in which the corresponding SerialPortLib instances run. The particular
original dependency chain is

  BaseDebugLibSerialPort (SEC, PEI_CORE, PEIM)
    EarlyFdtPL011SerialPortLib
      PcdDeviceTreeInitialBaseAddress
      FdtSerialPortAddressLib
      PL011UartLib

and the new dependency chain is

  DebugLibFdtPL011UartFlash (SEC, PEI_CORE, PEIM)
    PcdDeviceTreeInitialBaseAddress
    FdtSerialPortAddressLib
    PL011UartLib

Note that EarlyFdtPL011SerialPortLib remains in use (just not via
BaseDebugLibSerialPort), namely for direct SerialPortLib calls from SEC,
PEI_CORE, PEIM. See for example commit 56035d1c8b
("ArmPlatformPkg/PrePeiCore: Print the firmware version early in boot",
2022-10-25).

The ArmVirtPkg DSC files will be switched to the new library instances in
a separate patch.

This patch is worth viewing with "git show --find-copies-harder".

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-7-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
115b59d9c6 ArmVirtPkg: store separate console and debug PL011 addresses in GUID HOB
PlatformPeiLib produces the EarlyPL011BaseAddress GUID HOB, and
FdtPL011SerialPortLib consumes it. Extend the HOB such that it also carry
the base address of the PL011 UART meant for DebugLib usage -- namely the
first UART that is *not* designated by the /chosen node's "stdout-path"
property. Implement this policy in PlatformPeiLib.

Note that as far as the SerialPortLib+console UART is concerned, this
patch makes no difference. That selection remains consistent with the
pre-patch state, and therefore consistent with EarlyFdtPL011SerialPortLib.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-6-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
66046aeb6d ArmVirtPkg: adhere to the serial port selected by /chosen "stdout-path"
Convert both EarlyFdtPL011SerialPortLib and PlatformPeiLib at the same
time to clients of FdtSerialPortAddressLib (so that both "early" and
"late" serial output continue going to a common serial port). If the
device tree specifies just one serial port, this conversion makes no
difference, but if there are multiple ports, the output is written to the
port identified by /chosen "stdout-path".

In this patch, DebugLib output is not separated yet from the UEFI console.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-5-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
5fc3c39704 ArmVirtPkg: adjust whitespace in block scope declarations
I strongly dislike when *small* local variable declaration changes are
muddled by whitespace changes. When that happens, a reviewer can choose
from two suboptimal options: display the patch with "git show -b", which
creates confusion in *other* parts of the patch, or display the patch with
just "git show", which then produces an unjustifiedly large hunk for the
sequence of declarations.

For avoiding that in subsequent patches, adjust some whitespace in this
patch in isolation. Functionally this is a no-op; "git show -b" produces
empty output.

Note that uncrustify is (of course) unhappy with this patch, but that's
fine -- this patch is in the middle of a series, and by the end of the
series (which is where uncrustify is run in CI) the whitespace is going to
be tight.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-4-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
f078a6fdd4 ArmVirtPkg/Fdt16550SerialPortHookLib: rebase to FdtSerialPortAddressLib
This is only a refactoring; the patch is not supposed to cause any
observable change.

Build-tested only (with "ArmVirtKvmTool.dsc").

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-3-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Laszlo Ersek
eb83b53309 ArmVirtPkg: introduce FdtSerialPortAddressLib
Introduce a new library class + instance for:

- collecting serial port base addresses from the device tree,

- collecting the /chosen stdout-path serial port base address from the
  device tree.

The logic is loosely based on the following functions:

- SerialPortGetBaseAddress()
  [ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.c]

- PlatformPeim() [ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c]

- GetSerialConsolePortAddress()
  [ArmVirtPkg/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.c]

which are going to be converted to clients of the new library later.
Copyright notices from those other files are preserved.

The new library fixes the following warts, found by reading the existent
code:

- Neither of the three functions check whether the "reg" property exists.
  (This may be implicitly checked when they compare the property size to
  16.)

- GetSerialConsolePortAddress() uses ScanMem8() for locating a colon (":")
  node path separator in "stdout-path", when AsciiStrStr() could work just
  as fine. While ScanMem8() is likely faster, "stdout-path" is presumably
  very short, and ScanMem8() introduces an extra lib class dependency
  (namely BaseMemoryLib).

- If ScanMem8() fails to locate a colon in "stdout-path", then
  GetSerialConsolePortAddress() re-measures the length of the whole
  "stdout-path" property. This is conceptually (if not performance-wise)
  disturbing, because we know the whole size of the "stdout-path" property
  from the property lookup just before, so we only need to subtract the
  NUL-terminator for learning the length.

- GetSerialConsolePortAddress() does not check if the first (or only) node
  path inside the "stdout-path" property is empty. (Not a big deal, the
  subsequent alias resolution should simply fail.)

- GetSerialConsolePortAddress() does not verify if the node path retrieved
  (and potentially alias-resolved) from "stdout-path" can be located in
  the device tree; it assumes it.

- Code is duplicated (of course) between SerialPortGetBaseAddress() and
  PlatformPeim(), but more surprisingly, all three functions embed the
  same code for verifying the "status" property of the serial port node,
  and for checking and reading its "reg" property.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231008153912.175941-2-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4577
[lersek@redhat.com: add TianoCore BZ reference]
2023-10-26 18:55:43 +00:00
Yuanhao Xie
74c687cc2f UefiCpuPkg/MpInitLib: Wait for all APs to finish initialization
Aim:
- To solve the assertion that checks if CpuMpData->FinishedCount
equals (CpuMpData->CpuCount - 1). The assertion arises from a timing
discrepancy between the BSP's completion of startup signal checks and
the APs' incrementation of the FinishedCount.
- This patch also ensures that "finished" reporting from the APs is as
later as possible.

More specifially:

In the SwitchApContext() function, the BSP trigers
the startup signal and check whether the APs have received it. After
completing this check, the BSP then verifies if the FinishedCount is
equal to CpuCount-1.

On the AP side, upon receiving the startup signal, they invoke
SwitchContextPerAp() and increase the FinishedCount to indicate their
activation. However, even when all APs have received the startup signal,
they might not have finished incrementing the FinishedCount. This timing
gap results in the triggering of the assertion.

Solution:
Instead of assertion, use while loop to waits until all the APs have
incremented the FinishedCount.

Fixes: 964a4f032d

Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <20231025114216.2824-1-yuanhao.xie@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2023-10-26 17:43:03 +00:00
Abner Chang
fe43b42676 MdeModulePkg/Include: API of IPMI Get System Interface Capabilities
Define the API for IPMI Get System Interface
Capabilities command (0x57)

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
2023-10-26 15:39:01 +00:00
Abner Chang
9a38ddc806 MdePkg/Include: Definitions of IPMI Get System Interface Capabilities
Define the structure for IPMI Get System Interface
Capabilities command (0x57)

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
2023-10-26 15:39:01 +00:00
Nickle Wang
8765f3eb42 RedfishPkg/RedfishLib: return HTTP headers to caller
Call Ex interface to get HTTP headers and return to caller.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-26 07:38:01 +00:00
Nickle Wang
1cbdd6e9ff RedfishPkg/libredfish: introduce new interfaces.
- Add new interfaces to return HTTP headers back to caller.
New interfaces are: getUriFromServiceEx(), patchUriFromServiceEx(),
postUriFromServiceEx() and putUriFromServiceEx().
- Fix compile error in payload.c

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-26 07:38:01 +00:00
Nickle Wang
cf68ff6130 RedfishPkg/RedfishLib: introduce new interfaces.
Add two new interface: RedfishServiceInPayload() and RedfishPutToUri()
for Redfish HTTP protocol implementation. Fix several typos and add
missing JsonLib in INF file.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-26 07:38:01 +00:00
Chris Li
9bb5ef1287 MdePkg: Add Cxl20.h into IndustryStandard
1) Add CXL 2.0 header file to comply with CXL 2.0 specification
2) CXL 2.0 header will embed Cxl11.h
3) Updated Cxl.h to point to 2.0 header file

Signed-off-by: Chris Li <chrisli@os.amperecomputing.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Yao, Jiewen <jiewen.yao@intel.com>
Cc: Nong, Foster <foster.nong@intel.com>
Cc: Kinney, Michael D <michael.d.kinney@intel.com>
2023-10-26 01:35:29 +00:00
Konstantin Aladyshev
884ef98454 MdePkg/Pldm.h: Add define for the PLDM response flag
The PLDM protocol uses Request bit to help differentiate between PLDM
request and response messages.
Currently the Pldm.h header only have a flag for the request message.
Add a flag for the response message as well.

Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
2023-10-25 13:14:09 +00:00
Konstantin Aladyshev
00dbde5fa4 MdePkg/Mctp.h: Correct typo in structure member name
Correct MCTP_TRANSPORT_HEADER structure field 'SourceEndpointIdId' to
'SourceEndpointId'.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
2023-10-25 13:14:09 +00:00
Abner Chang
1f21e11168 Maintainers.txt: Update maintainers list
- Add two entries of MdePkg and MdeModulePkg for
  manageability modules and files.
- Add one entry of UefiCpuPkg AMD related files.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20231019054328.427-2-abner.chang@amd.com>
Acked-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Acked-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2023-10-25 09:52:06 +00:00
Ceping Sun
cf87fd95c1 OvmfPkg/AcpiPlatformDxe: Fix Coverity report issues
v1 -> v2 Changed list:
 1:Since both commits are intended to fix coverity issues, they are merged
   into one
 2:Changed the debug info level to debug error when "DsdtTable == NULL"
 3:Add the Cc member as below
  Erdem Aktas erdemaktas@google.com
  James Bottomley jejb@linux.ibm.com
  Tom Lendacky thomas.lendacky@amd.com
  Michael Roth michael.roth@amd.com

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4568

The function InstallCloudHvTablesTdx had an Assert when "DsdtTable ==
NULL", but this comes into play only in DEBUG mode. In Release mode ,
there is no handling if the pointer is NULL. To avoid the possible null
pointer dereference, it is better to handle it when the pointer is null.

In addition, the status of "AcpiProtocol->InstallAcpiTable" is overwritten
before it can be used in the function, it is better to check it before
overwriting.

code: https://github.com/sunceping/edk2/tree/fixcoverityerrors.v2

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Message-Id: <20231023090539.1003-1-cepingx.sun@intel.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
[lersek@redhat.com: rewrap commit message to placate PatchCheck.py]
2023-10-25 09:52:06 +00:00
Gerd Hoffmann
170d4ce8e9 UefiCpuPkg/BaseXApicX2ApicLib: fix CPUID_V2_EXTENDED_TOPOLOGY detection
Checking the max cpuid leaf is not enough to figure whenever
CPUID_V2_EXTENDED_TOPOLOGY is supported.  Intel SDM says:

   Software must detect the presence of CPUID leaf 1FH by verifying
   (a) the highest leaf index supported by CPUID is >= 1FH, and
   (b) CPUID.1FH:EBX[15:0] reports a non-zero value.

The same is true for CPUID leaf 0BH.

This patch adds the EBX check to GetProcessorLocation2ByApicId().  The
patch also fixes the existing check in GetProcessorLocationByApicId() to
be in line with the spec by looking at bits 15:0.  The comments are
updated with a quote from the Intel SDM.

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2241388
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20231017112807.1244254-1-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2023-10-25 09:52:06 +00:00
Laszlo Ersek
d85bf54b7f ArmPlatformPkg/PL031RealTimeClockLib: remove needless instance init steps
RealTimeClockLib instances are consumed by edk2's
EmbeddedPkg/RealTimeClockRuntimeDxe driver. In its entry point function
InitializeRealTimeClock(), the driver:

(1) calls LibRtcInitialize(),

(2) sets the GetTime(), SetTime(), GetWakeupTime() and SetWakeupTime()
    runtime services to its own similarly-named functions -- where those
    functions wrap the corresponding RealTimeClockLib APIs,

(3) installs EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL with a NULL protocol
    interface.

Steps (2) and (3) conform to PI v1.8 sections II-9.7.2.4 through
II-9.7.2.7.

However, this means that LibRtcInitialize() (of any RealTimeClockLib
instance) should not itself (a) set the GetTime(), SetTime(),
GetWakeupTime() and SetWakeupTime() runtime services, nor (b) install
EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL. The runtime service pointers will be
overwritten in step (2) anyway, and step (3) will uselessly install a
second (NULL-interface) EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL instance in the
protocol database. (The protocol only serves to notify the DXE Foundation
about said runtime services being available.)

Clean up ArmPlatformPkg/PL031RealTimeClockLib accordingly (it only has
code that's redundant for step (3); it does not try to set "gRT" fields).

(Note that the lib instance INF file already does not list
gEfiRealTimeClockArchProtocolGuid.)

Tested with ArmVirtQemu.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4565
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231020121748.44862-1-lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
[lersek@redhat.com: shorten patch subject line]
2023-10-24 16:05:00 +00:00
Aaron Young
a6648418c1 MdeModulePkg: Optimize BmExpandPartitionDevicePath
Reference: https://github.com/tianocore/edk2/pull/4892

BmExpandPartitionDevicePath is called to expand "short-form" device paths
which are commonly used with OS boot options. To expand a device path, it
calls EfiBootManagerConnectAll to connect all the possible BlockIo
devices in the system to search for a matching partition. However, this
is sometimes unnecessary on certain platforms (such as OVMF/QEMU) because
the boot devices are previously explicity connected
(See: ConnectDevicesFromQemu).  EfiBootManagerConnectAll calls are
extremely costly in terms of boot time and resources and should be avoided
whenever feasible.

(

OVMF call tree:

  PlatformBootManagerAfterConsole()         [OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c]
    PlatformBdsConnectSequence()            [OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c]
      ConnectDevicesFromQemu()              [OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c]
        ...
    EfiBootManagerRefreshAllBootOption()    [MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c]
      ...
    SetBootOrderFromQemu()                  [OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c]
      Match()                               [OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.c]
        EfiBootManagerGetLoadOptionBuffer() [MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c]
          BmGetNextLoadOptionBuffer()       [MdeModulePkg/Library/UefiBootManagerLib/BmLoadOption.c]
            BmGetNextLoadOptionDevicePath() [MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c]
              BmExpandPartitionDevicePath() [MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c]

)

Therefore optimize BmExpandPartitionDevicePath to first search the
existing BlockIo handles for a match. If a match is not found, then
fallback to the original code to call EfiBootManagerConnectAll and search
again. Thus, this optimization should be extremely low-risk given the
fallback to previous behavior.

NOTE: The existing optimization in the code to use a "HDDP" variable to
save the last matched device paths does not cover the first time a boot
option is expanded (i.e. before the "HDDP" is created) nor when the device
configuration has changed (resulting in the boot device moving to a
different location in the PCI Bus/Dev hierarchy). This new optimization
covers both of these cases on requisite platforms which explicity connect
boot devices.

In our testing on OVMF/QEMU VMs with dozens of configured vnic devices,
these extraneous calls to EfiBootManagerConnectAll from
BmExpandPartitionDevicePath were found to cause many seconds (or even
minutes) of additional VM boot time in some cases - due to the vnics
being unnecessarily connected.

Cc: Zhichao Gao zhichao.gao@intel.com
Cc: Ray Ni ray.ni@intel.com
Signed-off-by: Aaron Young <aaron.young@oracle.com>
Message-Id: <20231010150644.37857-1-Aaron.Young@oracle.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
[lersek@redhat.com: add OVMF call tree to commit message]
2023-10-24 13:00:18 +00:00
Jose Marinho
e17e58e81b DynamicTablesPkg: HOWTO for Handcrafted tables
Update the DynamicTablesPkg documentation to explain how to specify ACPI
tables in RAW format, or when there are no defined table generators.

Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Cc: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@arm.com>

Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-24 10:42:03 +00:00
Nickle Wang
fb044b7fe8 RedfishPkg/RedfishDiscoverDxe: remove Redfish false alarm
- It is expected that caller receives EFI_NO_MAPPING status
when call issues Configure() to unconfigured network interface.
Remove this false alarm in GetSubnetInfo() function.
- Fix typos

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-24 03:51:22 +00:00
Nickle Wang
da73578bf7 RedfishPkg/RedfishPlatformConfigDxe: add debug message.
Add debug prints to show HII option name when assert happens.
This helps developer to debug assert issue easily while Redfish
failed to convert HII value to Redfish value.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-24 03:06:02 +00:00
Joey Vagedes
2ad52adb66 IntelFsp2WrapperPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Chen Gang C <gang.c.chen@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
87ef986eeb MdeModulePkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-23 20:17:52 +00:00
Joey Vagedes
f8923b72de MdePkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-23 20:17:52 +00:00
Joey Vagedes
e44097a965 PrmPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
e5b4fe21ae RedfishPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Abner Chang <abner.chang@amd.com
2023-10-23 20:17:52 +00:00
Joey Vagedes
b24c8b0467 IntelFsp2Pkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
1cd0227c5d FmpDevicePkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-10-23 20:17:52 +00:00
Joey Vagedes
22b667c821 EmbeddedPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
2298769ecf DynamicTablesPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Alexei Fedorov <Alexei.Fedorov@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
36b41b067f CryptoPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
cbcdf4ff7b UnitTestFrameworkPkg: CI: Add PrEval entry
Adds a PrEval entry to the package's ci.yaml file which is used to
verify if the package uses a particular library instance when that
library instance file (INF) is updated.

When a library instance file (INF) is updated, PrEval will review each
package's DSC as described in the ci.yaml file to determine if the
package uses said library instance. If the package does use the library
instance, it will be built and tested to ensure the package is not
broken from the change.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-10-23 20:17:52 +00:00
Joey Vagedes
9f5e409623 Edk2: edk2-pytools: Update to latest versions
Update to the latest versions of edk2-pytool-extensions and
edk2-pytool-library. This introduces a new policy to stuart_pr_eval
which, when a change in an INF occurs, will mark any associated DSC
that uses this INF to be built during CI.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Michael Kubacki <mikuback@linux.microsoft.com>
2023-10-23 20:17:52 +00:00
Jeshua Smith
309450db26 DynamicTablesPkg/AmlLib: Enumerate memory attributes
AmlCodeGenRdQWordMemory's and AmlCodeGenRdDWordMemory's Cacheable
and MemoryRangeType parameters treat specific values as having
specific meanings as defined by the spec. This change adds enums to map
those meanings to their corresponding values.

Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-23 18:38:59 +00:00
Jeshua Smith
ec7f734366 DynamicTablesPkg/TableHelperLib: Enhance error handling
This patch enhances error handling and reporting in the CM ObjectParser.
Specifically:
1. ObjectIDs used as array indexes are checked for being out of bounds,
   and if so an error message is printed before the assert.
2. An error message is printed for unsupported NameSpaceIDs.
3. Adds support for unimplemented parsers by allowing IDs to list a
   NULL parser, resulting in an unimplemented message being printed.

Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-23 17:05:02 +00:00
Jeshua Smith
575bd4f55c DynamicTablesPkg/TableHelperLib: Fix and improve text handling
This fixes two bugs and adds some enhancements to the handling of
characters and strings in objects being printed by the CM ObjectParser.

Bug fixes:
1. PrintOemID() currently attempts to print characters with "%C",
   but the correct syntax is (lowercase) "%c". This bug results in
   "CCCCCC" being printed instead of the actual ASCII characters.
2. PrintString() is being passed a pointer to data in objects, but in
   some cases this data is the actual string to print and other cases
   it is a pointer to the string to print. This adds a PrintStringPtr
   function and uses the correct functions depending on the situation.

Enhancements:
1. Some objects contain ASCII characters, which are currently printed
   as their hex values. This adds functions to print out ASCII
   character fields as text rather than hex, and uses those functions in
   several cases where the object data is defined to be ASCII.
2. The PrintOemID() function is replaced with the new identical but more
   generecically-named PrintChar6() function.

Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-23 17:05:02 +00:00
John Chew
c591395f4a EmbeddedPkg/NorFlashInfoLib: Update norflash device list
Update Gigadevice norflash list:
gd25q16, gd25q32, gd25q64, gd25lq64c, gd25q128, gd25lq128, gd25q256

Add Silicon Kaiser norflash list:
sk25lp128

Signed-off-by: John Chew <yuinyee.chew@starfivetech.com>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-10-20 12:40:41 +00:00
Ni, Ray
bed477d9cf Maintainers.txt: Stop to be reviewer of several modules
Remove my name from reviewer list of following modules:
* MdeModulePkg: Console and Graphics modules
* MdeModulePkg: Reset modules
* MdeModulePkg: Serial modules
* MdeModulePkg: Universal Payload definitions

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-20 03:19:32 +00:00
Mateusz Albecki
0355e559c6 MdePkg/Test: Add DevicePathLib host test module
This commit adds host-based unit tests for device path lib.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@bysoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Michael D Kinney <Michael.d.kinney@intel.com>
2023-10-19 15:20:02 +00:00
Mateusz Albecki
96ed60dfd7 MdePkg/UefiDevicePathLib: Fix AcpiEx print logic
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4555

Add logic that checks if the code doesn't overflow
ACPI_EXTENDED_HID_DEVICE_PATH node when searching for optional
strings. If the string is not provided in the device path node
default value of "\0" is used.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@bysoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Michael D Kinney <Michael.d.kinney@intel.com>
2023-10-19 15:20:02 +00:00
Laszlo Ersek
8abbf6d87e OvmfPkg/VirtioFsDxe: tolerate opening an abs. pathname rel. to a reg. file
Referring to a file relative to a regular file makes no sense (or at least
it cannot be implemented consistently with how a file is referred to
relative to a directory). VirtioFsSimpleFileOpen() has enforced this
strictly since the beginning, and a few months ago I reported USWG Mantis
ticket #2367 [1] too, for clearing up the related confusion in the UEFI
spec.

Unfortunately, the shim boot loader contains such a bug [2] [3]. I don't
believe the shim bug is ever going to be fixed. We can however relax the
check in VirtioFsSimpleFileOpen() a bit: if the pathname that's being
opened relative to a regular file is absolute, then the base file is going
to be ignored anyway, so we can let the caller's bug slide. This happens
to make shim work.

Why this matters: UEFI-bootable Linux installer ISOs tend to come with
shim and grub in the embedded (ElTorito) FAT image (ESP). Sometimes you
want to build upstream shim/grub binaries, but boot the same ISO
otherwise. The fastest way for overriding the ESP for this purpose is to
copy its original contents to a virtio filesystem, then overwrite the shim
and grub binaries from the host side. Note that this is different from
direct-booting a kernel (via fw_cfg); the point is to check whether the
just-built shim and grub are able to boot the rest of the ISO.

[1] https://mantis.uefi.org/mantis/view.php?id=2367
[2] https://bugzilla.redhat.com/show_bug.cgi?id=1966973
[3] https://github.com/rhboot/shim/issues/382

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231018172434.91280-1-lersek@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
2023-10-19 12:39:26 +00:00
Yuwei Chen
b75d9f556d BaseTools: trim warning to error
As the error is changed to warning, Trim.py will skip the build
error when the source code have exactly issue.
This patch change warning to error to opens the checking.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Signed-off-by: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-10-18 18:17:19 +00:00
Laszlo Ersek
7fe49887c4 EmbeddedPkg/RealTimeClockLib: drop LibRtcVirtualNotifyEvent from lib class
The RealTimeClockLib class header in edk2 mistakenly declares a function
called LibRtcVirtualNotifyEvent(). No component ever calls this function
crossing module boundaries; all RealTimeClockLib instances in edk2 and
edk2-platforms are supposed to register (and do register) their
SetVirtualAddressMap() notification functions.

At this point, the word "LibRtcVirtualNotifyEvent" no longer occurs in any
of edk2, edk2-platforms, even edk2-non-osi, except the library class
header proper. Remove the LibRtcVirtualNotifyEvent() function declaration.

Build-tested only (with "EmbeddedPkg.dsc").

Cc: Abner Chang <abner.chang@amd.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4564
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231012091057.108728-6-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-18 16:15:41 +00:00
Laszlo Ersek
3c3136d3b6 EmbeddedPkg/VirtualRealTimeClockLib: drop LibRtcVirtualNotifyEvent
The RealTimeClockLib class header in edk2 mistakenly declares a function
called LibRtcVirtualNotifyEvent(). No component ever calls this function
crossing module boundaries; all RealTimeClockLib instances in edk2 and
edk2-platforms are supposed to register (and do register) their
SetVirtualAddressMap() notification functions.

In particular, VirtualRealTimeClockLib *itself* doesn't even use
LibRtcVirtualNotifyEvent() -- the function is defined with an empty body,
clearly in an understandable, but misguided, attempt, to conform to the
(bogus) library interface. Remove the function.

Build-tested only (with "RiscVVirtQemu.dsc").

Cc: Abner Chang <abner.chang@amd.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4564
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231012091057.108728-5-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-18 16:15:41 +00:00
Laszlo Ersek
e6e0e7ba74 EmbeddedPkg/TemplateRealTimeClockLib: drop LibRtcVirtualNotifyEvent
The RealTimeClockLib class header in edk2 mistakenly declares a function
called LibRtcVirtualNotifyEvent(). No component ever calls this function
crossing module boundaries; all RealTimeClockLib instances in edk2 and
edk2-platforms are supposed to register (and do register) their
SetVirtualAddressMap() notification functions.

In particular, TemplateRealTimeClockLib *itself* doesn't even use
LibRtcVirtualNotifyEvent() -- the function is defined with an empty body,
clearly in an understandable, but misguided, attempt, to conform to the
(bogus) library interface. Remove the function.

Build-tested only (with "EmbeddedPkg.dsc").

Cc: Abner Chang <abner.chang@amd.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4564
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231012091057.108728-4-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-18 16:15:41 +00:00
Laszlo Ersek
189addfde6 ArmPlatformPkg/PL031RealTimeClockLib: hide LibRtcVirtualNotifyEvent
The RealTimeClockLib class header in edk2 mistakenly declares a function
called LibRtcVirtualNotifyEvent(). No component ever calls this function
crossing module boundaries; all RealTimeClockLib instances in edk2 and
edk2-platforms are supposed to register (and do register) their
SetVirtualAddressMap() notification functions.

Rename LibRtcVirtualNotifyEvent() to VirtualNotifyEvent(), and make it
static, in preparation for removing the LibRtcVirtualNotifyEvent()
declaration from the lib class header later.

Build- and boot-tested with ArmVirtQemu.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4564
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231012091057.108728-3-lersek@redhat.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-18 16:15:41 +00:00
Laszlo Ersek
c62fb45549 PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe: rename LibRtcVirtualNotifyEvent
PcatRealTimeClockRuntimeDxe seems to have copied the interface name
LibRtcVirtualNotifyEvent() from EmbeddedPkg's RealTimeClockLib class.
That's not right, for two reasons:

- PcatRealTimeClockRuntimeDxe doesn't consume "EmbeddedPkg.dec" in the
  first place,

- in EmbeddedPkg, the RealTimeClockLib class API
  LibRtcVirtualNotifyEvent() is about to be eliminated (it's a bogus API).

Rename the LibRtcVirtualNotifyEvent() function to VirtualNotifyEvent(),
and make it static.

Tested with booting OVMF.

Cc: Ray Ni <ray.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4564
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231012091057.108728-2-lersek@redhat.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-18 16:15:41 +00:00
Nickle Wang
747a08eae2 RedfishPkg/RedfishDiscoverDxe: introduce PcdRedfishSendReceiveTimeout
Introduce PCD PcdRedfishSendReceiveTimeout to RedfishDiscoverDxe
driver. The SendReceiveTimeout is hard-code value in Redfish discover
driver. With this PCD, platform owner can configure timeout value
easily.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
2023-10-18 15:07:44 +00:00
Jeff Brasen via groups.io
01e1bc2894 ArmPkg/ArmPsciMpServices: Add EFI_NOT_READY return
Add EFI_NOT_READY return if the CPU can not be enabled because the
processor is already on.

This can occur in normal use if the CPU is still being turned off from
a previous call when this is called again.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-10-18 09:00:09 +00:00
Tuan Phan
772ec92577 UefiCpuPkg: RISC-V: MMU: Introduce a PCD for SATP mode
Introduce a PCD to control the maximum SATP mode that MMU allowed
to use. This PCD helps RISC-V platform set bare or minimum SATP mode
during bring up to debug memory map issue.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Dhaval Sharma <dhaval@rivosinc.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-10-17 07:44:25 +00:00
Giri Mudusuru
a445e1a42c ShellPkg: Increase PcdShellPrintBufferSize from UINT16 to UINT32
Increase max buffer size to support more than 64K.

Signed-off-by: Giri Mudusuru <girim@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-10-17 03:04:05 +00:00
Mike Maslenkin
03d6569f70 MdeModulePkg: UsbRndis: get rid of magic values
Replace magic values used for checking Base Class, SubClass and Protocol
fields of USB Interface Descriptor.
Add definitions for Base Class EFh (Miscellaneous) and RNDIS subclass.
These definitions were taken from https://www.usb.org/defined-class-codes

Cc: Richard Ho <richardho@ami.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
2023-10-16 22:49:33 +00:00
Mike Maslenkin
e07948255c MdeModulePkg: UsbNetwork: fix Ethernet functional descriptor processing
This patch fixes wrong condition because of UINT16 value to integer
promotion. NumberMcFilters is UINT16 value, so when bitwise shift operator
applied to small integer type, the operation is preceded by integral
promotion. This is described in MISRA-C:2004 guideline as Rule 10.5:
"If the bitwise operators ~ and << are applied to an operand of underlying
type unsigned char or unsigned short, the result shall be immediately cast
to the underlying type of the operand."

A simple fix for this issue would be the following:
  if ((UINT16)(UsbEthFunDescriptor.NumberMcFilters << 1) == 0)

But this patch proposes to use bitwise AND operation with a proper bit mask
rather than shifting to prevent similar mistakes in future.

Cc: Richard Ho <richardho@ami.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
2023-10-16 22:49:33 +00:00
YuanhaoXie
326b9e1d81 UefiCpuPkg/CpuDxe: Eliminate the unused variable.
This change does not introduce any functional modifications.

Remove the unused mValidMtrrAddressMask and mValidMtrrBitsMask.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
2023-10-12 07:30:46 +00:00
Wenxing Hou
eebd446875 CryptoPkg: Add CryptAes functions based on Mbedtls Add CryptAes APIS.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
c109e4a244 CryptoPkg: Add basic Readme for BaseCryptLibMbedTls
Update Readme for BaseCryptLibMbedTls.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
26754b3707 CryptoPkg: Add Mbedtls submodule in CI
Change CI for new Mbedtls submodule.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
c5fedb030a CryptoPkg: Add MD5/SHA1/SHA2 functions based on Mbedtls
Add MD5/SHA1/SHA256/SHA384/SHA512 APIs.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
4049ca493c CryptoPkg: Add Null functions for building pass
Add Null functions to build. These feature are not supported now.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
b26f7dfe29 CryptoPkg: Add all .inf files for BaseCryptLibMbedTls
Add .inf files and other support files.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
97f51f2e9b CryptoPkg: Add RSA functions based on Mbedtls
Add RSA APIs.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
60222e7eb9 CryptoPkg: Add HKDF functions based on Mbedtls
Add HKDF APIs.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
731aa70881 CryptoPkg: Add HMAC functions based on Mbedtls
Add HMAC APIS.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
586f05b9de CryptoPkg: Add mbedtls_config and MbedTlsLib.inf
Add MbedTlsLib support.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-12 05:31:19 +00:00
Wenxing Hou
1a79cc7d95 CryptoPkg: Add mbedtls submodule for EDKII
Add mbedtls 3.3.0 as submodule in CryptoPkg.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-10-12 05:31:19 +00:00
Abner Chang
95c9f470ca RedfishPkg: Use base version SortLib for the specific modules
BZ #: 4566

Update Redfish modules to use the small footprint
version of base SortLib by the means of module scoped
subelement <LibraryClass>. With this the platform
level SortLib (full version) is not impacted if
Redfish.dsc.inc is included in platform DSC.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Nhi Pham <nhi@os.amperecomputing.com>
Tested-by: Nhi Pham <nhi@os.amperecomputing.com>
2023-10-11 04:42:54 +00:00
Ray Ni
137f799aae UefiCpuPkg/CpuDxe: Update RefreshMemoryAttributesFromMtrr
Old implementation of RefreshMemoryAttributesFromMtrr directly
retrieves the MTRR register content and applies the MTRR cache type
to GCD database following the precedence order defined by SDM.

The code can updated to simply get all the memory cache types for all
memory through newly introduced API With the new introduced API
MtrrGetMemoryAttributesInMtrrSettings.

Benefits:
1. Remove the duplicated logic in CpuDxe driver that handles MTRR
    details.
2. Let the MtrrLib to handle the case when fixed MTRR is absent.
    (Old logic cannot handle the case.)

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
01b0d19dbb UefiCpuPkg/MtrrUnitTest: Add Unit test of setting/getting memory
attributes

Add Unit test of trrGetMemoryAttributesInMtrrSettings and
MtrrSetMemoryAttributesInMtrrSettings.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
c4fdec0a83 UefiCpuPkg/MtrrLib: Improve MtrrDebugPrintAllMtrrsWorker.
Improve MtrrDebugPrintAllMtrrsWorker by making use of
MtrrGetMemoryAttributesInMtrrSettings.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
4b7b32f846 UefiCpuPkg/MtrrLib: Add API MtrrGetMemoryAttributesInMtrrSettings.
MtrrGetMemoryAttributesInMtrrSettings parses the MTRR settings
either from hardware or from the parameter and returns an
array containing the memory cache types of all memory addresses.

This API could elinimate the needs of following APIs:
1. MtrrGetMemoryAttributeInVariableMtr
2. MtrrGetFixedMtrr

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Ray Ni
c032db3308 UefiCpuPkg/MtrrLib: Update APIs related to set memory attributes.
Update APIs related to set memory attributes to handle the fixed MTRR
is not always supported.

There are 3 APIs in MtrrLib that can set memory attributes:
1. MtrrSetMemoryAttributesInMtrrSettings
2. MtrrSetMemoryAttributeInMtrrSettings
3. MtrrSetMemoryAttribute

The general idea applied in MtrrSetMemoryAttributesInMtrrSettings is:
1. MtrrLibPreMtrrChange saves the old MTRR default type which
   contains bit to enable fixed MTRR.
2. Main logic in MtrrSetMemoryAttributesInMtrrSettings applies
    memory attribute settings for below 1MB to variable MTRRs
    if fixed MTRR is not supported.
3. MtrrLibPostMtrrChange unconditionally sets E bit in MTRR default
    type MSR but only set FE bit when fixed MTRRs are modified.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
1d0fd0bb3d UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrSetAllMtrrs().
Update UnitTestMtrrSetAllMtrrs() for the case that fixed MtrrLib
is not always supported.

Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Ray Ni
1217f59d23 UefiCpuPkg/MtrrLib: Fix MtrrSetAllMtrrs to handle absent fixed MTRRs.
Update MtrrSetAllMtrrs to not access fixed MTRRs if CPU doesn't
support them.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>

Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
cc070b88e4 UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetFixedMtrr().
UnitTestMtrrGetFixedMtrr updated for the case that fixed MtrrLib
is not always supported.

Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
0103d09ebe UefiCpuPkg/MtrrLib: Update MtrrGetFixedMtrr().
IsMtrrSupported() return true when either fixed mtrr supported or
variable mtrr suppored. In this case, rather than checking whether
MTRR is supported or not, we should specifically check for fixed MTRR
support.

Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
a519014472 UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetAllMtrrs().
Update UnitTestMtrrGetAllMtrrs() for the case that fixed MtrrLib
is not always supported

Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Ray Ni
0d89ceae31 UefiCpuPkg/MtrrLib: Fix MtrrGetAllMtrrs to return correct MTRR setting.
The patch fixes the following issues in the original implementation:

1. MtrrSetting contains random value if MTRR is not supported.
2. Unconditionally access fixed MTRR on CPU that may not support
    fixed MTRR.
3. The maximum number of Variable MTRR entries are initialized, while
the portion exceeding the maximum number remains uninitialized.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>

Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Ray Ni
5b76b4a9f9 UefiCpuPkg/MtrrUnitTest: Update test to cover no-fixed-mtrr cases.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
1ec374cb50 UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetDefaultMemoryType.
Update UnitTestMtrrGetDefaultMemoryType for the case the when Fixed
MTRRs are not supported.
The original implementation returns FALSE when either fixed MTRR isn't
supported or the number of variable MTRRs is 0. The correct behavior
should return FALSE only when both fixed MTRR isn't supported and the
number of variable MTRRs is 0.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
f784fc0e39 UefiCpuPkg/MtrrUnitTest: Update UnitTestGetFirmwareVariableMtrrCount.
Update UnitTestGetFirmwareVariableMtrrCount for the case the when
Fixed MTRRs are not supported.

The original implementation returns FALSE when either fixed MTRR isn't
supported or the number of variable MTRRs is 0. The correct behavior
should return FALSE only when both fixed MTRR isn't supported and the
number of variable MTRRs is 0.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
YuanhaoXie
ca3f8638fa UefiCpuPkg/MtrrUnitTest: Update the Unit Test for IsMtrrSupported().
The previous implementation returns FALSE if either fixed MTRR is
unsupported or the number of variable MTRRs is 0. The correct behavior
is to return FALSE only when both fixed MTRR is unsupported and the
number of variable MTRRs is 0.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Ray Ni
bf03c4a52a UefiCpuPkg/MtrrLib: Add internal function MtrrLibIsMtrrSupported.
Add internal function MtrrLibIsMtrrSupported and
update IsMtrrSupported to call the new internal function.

Signed-off-by: Ray Ni <ray.ni@intel.com>

Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-10-09 08:22:02 +00:00
Gerd Hoffmann
4ddd8ac3a2 CryptoPkg/TlsLib: fix tls cipher configuration
Trying to configure the TLS ciphers can lead to TLS handshake failures
because TlsCipherMappingTable is not in line with the ciphers actually
supported by OpensslLib.

Fix that by removing TlsCipherMappingTable altogether.  Use
SSL_get_ciphers() instead to get the stack of ciphers supported by
openssl.  Name and ID of the ciphers can be queried using the
SSL_CIPHER_get_name() and SSL_CIPHER_get_protocol_id() functions,
which allows us to map IDs to names without a hard-code table.

Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=2541
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20231004092003.3809321-1-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-10-08 10:46:45 +00:00
Laszlo Ersek
5087a07736 ArmVirtPkg/FdtPL011SerialPortLib: initialize implicitly
FdtPL011SerialPortLib claims that it's usable from the DXE_CORE. That's
not correct: the DXE_CORE calls DEBUG() and ASSERT() before it calls
ProcessLibraryConstructorList(). Via the BaseDebugLibSerialPort instance,
those DEBUG() and ASSERT() calls result in SerialPortWrite() calls, before
ProcessLibraryConstructorList() called either our constructor
FdtPL011SerialPortLibInitialize(), or BaseDebugLibSerialPortConstructor().

(And even if the DXE_CORE called the latter function early enough, it
would just invoke our SerialPortInitialize() function -- which does
nothing.)

This means that the earliest DXE_CORE debug messages are lost.

Rename FdtPL011SerialPortLibInitialize() to SerialPortInitialize(), so
that the same initialization occur through the constructor and the public
SerialPortInitialize() library API.

Turn SerialPortInitialize() calls after the first one into no-ops.

Our SerialPortLib APIs already use (mSerialBaseAddress != 0) to track
initialization. Rework those checks to actually initialize the library if
that hasn't happened yet.

The following new lines appear in the log:

> CoreInitializeMemoryServices:
>   BaseAddress - 0x48000000 Length - 0xF8000000 MinimalMemorySizeNeeded - 0x38C8000
> InstallProtocolInterface: [EfiLoadedImageProtocol] 46EFC3E0
> ProtectUefiImageCommon - 0x46EFC3E0
>   - 0x0000000046EB2000 - 0x0000000000068000

(0x46EB2000 is the load address of the DXE Core.)

Reported-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-07 13:41:27 +00:00
Michael Kubacki
82191f8a0e .github: Fix Python version (to 3.11)
Build was previously using 3.11. Using 3.12 now that is is released.
To allow scripts to take time to update, fix to 3.11.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2023-10-07 00:24:38 +00:00
Michael Kubacki
6439c73356 .azurepipelines: Fix Python version (to 3.11)
Build was previously using 3.11. Using 3.12 now that is is released.
To allow scripts to take time to update, fix to 3.11.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2023-10-07 00:24:38 +00:00
Pierre Gondois
d073a54511 MdePkg/DxeRngLib: Add missing GUID declaration in inf
Add missing GUID declaration in DxeRngLib.inf.

Fixes: bd1f0eecc1 ("MdePkg/DxeRngLib: Request raw algorithm
instead of default")

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Leif Lindholm <quic_llindhol@quicinc.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-04 15:53:01 +00:00
Leif Lindholm
1497c4b074 MdePkg/BaseLib: fix typo in Arm SetJump
RO -> R0

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-03 11:56:52 +00:00
Leif Lindholm
1a66bd51ca MdePkg/BaseLib: ensure ARM LongJump never returns 0
The ARM implementation of InternalLongJump always returned the value
Value - but it is not supposed to ever return 0. Add the test to prevent
that, and return 1 if Value is 0 - as is already present in AArch64.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-02 15:48:02 +00:00
Leif Lindholm
2b2705343a MdePkg/BaseLib: correct register sizes in AArch64 SetJump/LongJump
Both in SetJump and in InternalLongJump, 32-bit w register views were
used for the UINTN return value. In SetJump, this did not cause errors;
it was only counterintuitive. But in InternalLongJump, it meant the top
32 bits of Value were stripped off.

Change all of these to use the 64-bit x register views.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reanimated-by: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-10-02 15:48:02 +00:00
Leif Lindholm
ae79efb7bd MdePkg/BaseLib: use normal register init in ARM SetJump implementations
There may be architectures on which there are benefits to
  eor r0, r0(, r0)
but ARM was never one of them. Change to more readable
  mov r0, #0
instead.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-02 15:48:02 +00:00
Leif Lindholm
80bbea192a MdePkg/BaseLib: add ASSERT in ARM* SetJump implementations
The SetJump comment header states that:
  If JumpBuffer is NULL, then ASSERT().

However, this was not currently done.
Add a call to InternalAssertJumpBuffer.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-02 15:48:02 +00:00
Leif Lindholm
cbf0e4f5b3 MdePkg/BaseLib: fix comments in ARM* SetJump/LongJump implementations
Drop redundant comment about IPF (clearly copied across from now deleted
code).

Also change
"Instead is resumes execution" ->
"Instead it resumes execution"

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-10-02 15:48:02 +00:00
Leif Lindholm
f6a314e5b5 Maintainers.txt: add Sami as maintainer of arm-architectural subdirs
We added Sami as a reviewer to ArmPkg early last year, and I think it was
always our intention to have him as a reviewer of Arm architectural stuff
in general, but we seem to have missed out the Arm/AArch64 subdir
wildcards. So let's fix that.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-10-02 12:47:13 +00:00
Gao Cheng
f36e1ec1f0 MdeModulePkg/Xhci: Skip size round up for TRB during address translation
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560

TRB Template is 16 bytes. When boundary checking is 64 bytes for xHCI
device/host memory address, it may exceed xHCI host memory pool and
cause unwanted DXE_ASSERT. Introduce a new input parameter to indicate
whether to enforce 64byte size alignment and round up. For TRB case,
should set it to FALSE to skip the size round up.

Signed-off-by: Gao Cheng <gao.cheng@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-28 02:02:11 +00:00
Nate DeSimone
ad1c0394b1 EmulatorPkg: Fix Terminal Issues
After running EmulatorPkg, one will notice that their terminal acts
strangely. This is caused by the EmulatorPkg Host changing the terminal
mode and not restoring the original mode, which is now fixed.

Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-09-27 01:00:47 +00:00
HoraceX Lien
be971fc302 MdeModulePkg/SmbiosDxe: Fix BcdRevision is not match with SMBIOS version
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4544

These value of Major/Minor version are updated from SMBIOS memory data,
but BCD Revision is updated from PCD PcdSmbiosVersion.
We should also update BCD Revision from SMBIOS memory data,
to ensure that get consistent version value.

Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
2023-09-26 23:56:43 +00:00
Nate DeSimone
bf0bdacdd6 MdeModulePkg: Fix misspelling
confroms should be conforms.

Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
2023-09-26 20:03:23 +00:00
Brucex.Wang
39f3c26e8c UefiPayloadPkg: Add FIT support
Provide Fit format for UniversalPayload, developer can use argument
"--Fit" to build UniversalPayload.fit

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>

Reviewed-by: Gua Guo <gua.guo@intel.com>

Signed-off-by: BruceX Wang <brucex.wang@intel.com>
2023-09-26 07:26:21 +00:00
Brucex.Wang
d6b05375b4 MdePkg/BaseFdtLib: Add Fdt function.
Add FdtGetName() and FdtNodeDepth() function.

Cc: Benny Lin <benny.lin@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: James Lu <james.lu@intel.com>

Reviewed-by: Benny Lin <benny.lin@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>

Signed-off-by: BruceX Wang <brucex.wang@intel.com>
2023-09-26 07:26:21 +00:00
Dongyan Qian
c70d914428 BaseTools/GenFw: Add support for LOONGARCH64 relax relocation
Correct relax id from 99 to 100 and added relocation support up to 109

fix gcc14 adds new relocation, and the generated relocation
causes the build and compilation to fail.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4559

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>
2023-09-25 08:32:47 +00:00
Cai, Xianglei
d11f0ea045 MdeModulePkg/XhciDxe: Abort the Address Device cmd when time out
https://bugzilla.tianocore.org/show_bug.cgi?id=4552

Following XHCI spec 4.6.1.2, software may abort the
execution of Address Device Command when command failed
due to timeout.

Cc: Hao A Wu     <hao.a.wu@intel.com>
Cc: Ray Ni       <ray.ni@intel.com>
Cc: Jian J Wang  <jian.j.wang@intel.com>
Cc: Liming Gao   <gaoliming@byosoft.com.cn>
Cc: More Shih    <more.shih@intel.com>
Cc: Jenny Huang  <jenny.huang@intel.com>
Signed-off-by: Xianglei Cai <xianglei.cai@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-25 03:45:15 +00:00
Henz, Patrick
43dcf453fc MdeModulePkg/XhciDxe: Use Performance Timer for XHCI Timeouts
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948

XhciDxe uses the timer functionality provided by the
boot services table to detect timeout conditions. This
breaks the driver's ExitBootServices call back, as
CoreExitBootServices halts the timer before signaling
the ExitBootServices event. If the host controller
fails to halt in the call back, the timeout condition
will never occur and the boot gets stuck in an indefinite
spin loop. Use the free running timer provided by
TimerLib to calculate timeouts, avoiding the potential
hang.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Patrick Henz <patrick.henz@hpe.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-25 02:56:05 +00:00
Vidya Sagar
8b2e6b90b8 DynamicTablesPkg: AcpiSsdtPcieLibArm: Use QWord to describe I/O range
Use AmlCodeGenRdQWordIo() to generate the I/O range in _CRS instead of
AmlCodeGenRdDWordIo() to cater to the scenarios where 64-bit addresses
can be used to generate I/O packets over the PCIe bus.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 14:46:02 +00:00
Vidya Sagar
909e870e34 DynamicTablesPkg: AML Code generation for I/O ranges
Add helper functions to generate AML Resource Data describing I/O
ranges of four words long. API AmlCodeGenRdQWordIo () is exposed.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 14:46:02 +00:00
Jeff Brasen
b5003ab725 DynamicTablesPkg: Add Aml NameUnicodeString API
Add API to generate a Name that contains a Unicode string buffer.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 09:06:21 +00:00
Jeff Brasen
fd0ccccb42 DynamicTablesPkg: Add support to add Strings to package
Add API to add a String to a package created with NamedPackage API.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 09:06:21 +00:00
Jeff Brasen
b2df3ee17f DynamicTablesPkg: Add support for simple method invocation.
Add support to add Return objects via AML that pass a single integer
argument to the named method.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 09:06:21 +00:00
Jeff Brasen
8f5505a4c9 DynamicTablesPkg: Add ThermalZone CodeGen function
Add API to generate a ThermalZone object to AmlLib.

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-22 09:06:21 +00:00
Ranbir Singh
28a267af40 MdeModulePkg/Bus/Pci/UhciDxe: Fix FORWARD_NULL Coverity issues
The function UsbHcGetPciAddressForHostMem has

  ASSERT ((Block != NULL)); and

and the function UsbHcFreeMem has

  ASSERT (Block != NULL);

statement after for loop, but these are applicable only in DEBUG mode.
In RELEASE mode, if for whatever reasons there is no match inside for
loop and the loop exits because of Block != NULL; condition, then there
is no "Block" NULL pointer check afterwards and the code proceeds to do
dereferencing "Block" which will lead to CRASH.

Hence, for safety add NULL pointer checks always.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-22 04:56:35 +00:00
Ranbir Singh
e9f5d8c0e0 MdeModulePkg/Bus/Pci/UhciDxe: Fix BAD_SHIFT Coverity issue
The function UhciConvertPollRate has a check

    ASSERT (Interval != 0);

but this comes into play only in DEBUG mode. In Release mode, there is
no handling if the Interval parameter value is ZERO. To avoid shifting
by a negative amount later in the code flow in this undesirable case,
it is better to handle it as well by treating it same as if 1 is sent.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-22 04:56:35 +00:00
Nickle Wang
f67e1934d9 RedfishPkg/JsonLib: fix JsonObjectGetValue issue
JsonObjectGetValue() cannot find corresponding JSON value
when the EDKII_JSON_VALUE object is created by another UEFI
driver. This is because "hashtable_seed" is initialized by
current time while JsonLib is loaded. So, "hashtable_seed"
will be different in each individual UEFI driver.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-09-22 03:59:03 +00:00
Andrei Warkentin
ea628f28e5 RISCV: Fix InternalLongJump to return correct value
InternalLongJump was not returning the 2nd parameter passed
to LongJmp (Value) as the return value from SetJmp.

Seen with code compiled with -Os, where an LongJmp (Buffer, -1)
somehow translated to SetJmp returning 0...

Cc: Yong Li <yong.li@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Tuan Phan <tphan@ventanamicro.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-21 04:57:57 +00:00
Leif Lindholm
89dad77cfb ArmPkg/ArmLib: Add ArmHasVhe () helper function
Create a helper function to query whether ID_AA64MFR1_EL1 indicates
presence of the Virtualization Host Extensions. This feature is only
visible in AARCH64 state.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
2023-09-20 14:52:07 +00:00
Ranbir Singh
4317b4824b MdeModulePkg/Bus/Pci/NvmExpressPei: Fix DEADCODE Coverity issue
The code can reach line 65 only through the else path above at line 53.
The else path already has the same NULL check at line 55 and hence the
duplicate code lines are totally redundant which can be deleted.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4220

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-20 06:49:52 +00:00
Ranbir Singh
4fb69c2bee MdeModulePkg/Bus/Ata/AtaBusDxe: Fix SIGN_EXTENSION Coverity issue
Line number 365 does contain a typecast with UINT32, but it is after
all the operations (16-bit left shift followed by OR'ing) are over.
To avoid any SIGN_EXTENSION, typecast the intermediate result after
16-bit left shift operation immediately with UINT32.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4209

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-09-20 05:47:00 +00:00
Leif Lindholm
eb485b6438 ArmVirtPkg: handle virtual EL2 timer in DT
FEAT_VHE, introduced in ARMv8.1, adds a virtual EL2 timer.
However, this library verifies that exactly 3 or 4 12-byte timer
interrupts are provided in input DT, ASSERTing when the new timer
is added.

Change the assert to >= 36.

Extend the current logic, also initializing PcdArmArchTimerHypVirtIntrNum
if 5 interrupts are provided.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Peter Maydell <peter.maydell@linaro.org>
2023-09-19 20:27:55 +00:00
Leif Lindholm
baee97670f ArmPkg: add EL2 virtual timer interrupt Pcd
PcdArmArchTimerHypVirtIntrNum, defaults to 28 as defined in Arm's
Base System Architecture (current version DEN0094C 1.0C).

Relevant for systems implementing FEAT_VHE, added in ARMv8.1.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-19 20:27:55 +00:00
Nickle Wang
7275993dc6 RedfishPkg/RedfishRestExDxe: return HTTP status code to caller.
Return unsupported HTTP status code to caller so caller can handle
HTTP error status code. Current implementation only return EFI error
to caller. Without knowing the HTTP status code, caller has trouble
to handle HTTP request failure.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Cc: Mike Maslenkin <mike.maslenkin@gmail.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Acked-by: Mike Maslenkin <mike.maslenkin@gmail.com>
2023-09-19 15:41:18 +00:00
Michael Kubacki
cbcf0428e8 BaseTools/Plugin: Add DebugMacroCheck
Adds a plugin that finds debug macro formatting issues. These errors
often creep into debug prints in error conditions not frequently
executed and make debug more difficult when they are encountered.

The code can be as a standalone script which is useful to find
problems in a large codebase that has not been checked before or as
a build plugin that notifies a developer of an error right away.

The script was already used to find numerous issues in edk2 in the
past so there's not many code fixes in this change. More details
are available in the readme file:

.pytool\Plugin\DebugMacroCheck\Readme.md

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
97d367f37e OvmfPkg/PlatformCI: Disable DebugMacroCheck
Disables the DebugMacroCheck CI plugin to reduce CI checks performed
in the package.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
8803033c0c DynamicTablesPkg.ci.yaml: Add debug macro exception
Adds a CI YAML entry to acknowledge a case where custom strings
contain print specifiers for a single debug macro.

Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Alexei Fedorov <Alexei.Fedorov@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
1312c2e9fd ArmVirtPkg.ci.yaml: Add debug macro exception
Adds a CI YAML entry to acknowledge a case where a macro is expanded
that contains a print specifier.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
bc7bbd3bc4 SecurityPkg.ci.yaml: Add debug macro exception
Adds a CI YAML entry to acknowledge a case where a single argument
is matched to a format specifier with a ternary operator.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
5cfb5d6c01 pip-requirements.txt: Add regex
regex is a popular PIP module for regular expression support.

https://pypi.org/project/regex/

This change adds regex for the upcoming DebugMacroCheck plugin.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-19 01:20:27 +00:00
Michael Kubacki
6f0729484f RedfishPkg/PlatformHostInterfaceBmcUsbNicLib: Fix DEBUG macro args
Some macros added have a mismatched number of  print specifiers to
arguments.

Cc: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-09-19 01:20:27 +00:00
Taylor Beebe
408e463135 MdeModulePkg: Memory Bin Range Update Accounts for Guard Page
When finding a free page range for allocation, if the found range
starts below the tracked memory bin address range, the lowest
memory bin address is updated which will not include the guard page if
present. When CoreConvertPagesWithGuard() is called on the range
being allocated, the memory range is adjusted to include guard
pages which can push it out of the memory bin address range and
cause the memory type statistics to be unaltered.

This patch updates the lowest memory bin address range to account for
the guard page if NeedGuard is TRUE so the memory type statistics
are updated correctly.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Taylor Beebe <t@taylorbeebe.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-09-18 21:21:32 +00:00
Zhiguang Liu
db38c7de64 UefiCpuPkg/ResetVector: Remove AP waking vector from ResetVector
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494

Current reset vector uses 0xffffffe0 as AP waking vector, and expects
GenFv generates code aligned on a 4k boundary which will jump to this
location. However, some issues are listed below
1. GenFV doesn't generate code as the comment expects, because GenFv
assumes no modifications are required to the VTF-0 'Volume Top File'.
2. Even if removing VFT0 signature and let GenFv to modify, Genfv is
hard-code using another flash address 0xffffffd0.
3. In the same patch series, AP waking vector code is removed from
GenFv, because no such usage anymore. The existing of first two issues
also approve the usage is not available for a long time.

Therefore, remove AP waking vector related code.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-09-18 02:39:25 +00:00
Zhiguang Liu
dea6002d6e OvmfPkg: Remove applicationProcessorEntryPoint
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494

Current reset vector uses 0xffffffe0 as AP waking vector, and expects
GenFv generates code aligned on a 4k boundary which will jump to this
location. However, some issues are listed below
1. GenFV doesn't generate code as the comment expects, because GenFv
assumes no modifications are required to the VTF-0 'Volume Top File'.
2. Even if removing VFT0 signature and let GenFv to modify, Genfv is
hard-code using another flash address 0xffffffd0.
3. In the same patch series, AP waking vector code is removed from
GenFv, because no such usage anymore. The existing of first two issues
also approve the usage is not available for a long time.

Therefore, remove AP waking vector related code.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-09-18 02:39:25 +00:00
Zhiguang Liu
718cf21a5a UefiCpuPkg/SecCore: Remove AP waking Vector logic in SecCore
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494

There are two part of AP waking Vector logic in SecCore.
The first one working with GenFv to find a free 4K aligned space,
use the 4K aligned address as AP waking Vector and jump to 4G-30h,
and finally jump to ApStartup..
The second one hard code uses 4G-1000h as AP waking Vector and
jump to ApStartup.
Both usages are no longer used. Remove them.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-09-18 02:39:25 +00:00
Zhiguang Liu
392456240a BaseTools: Remove logic to create AP waking vector in GenFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494

Today for SEC core(not VTF-0), GenFv finds free 4K aligned space in
FV for AP waking vector and JMP to 4G-30h in the waking vector.
There is no usage of this today. Remove the logic to avoid confusing
and save spaces in reset vector.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-09-18 02:39:25 +00:00
Laszlo Ersek
29cce3356a OvmfPkg/RiscVVirt/README: document direct kernel boot
Direct (fw_cfg) kernel boot works on the RiscVVirt firmware platform too;
I've tested it after extracting the kernel, initrd, and kernel command
line from "openSUSE-Tumbleweed-RISC-V-E20-efi.riscv64.raw". Document this
type of boot, because at least historically, fw_cfg kernel boot was
implemented differently between OVMF and ArmVirtQemu. Thanks: Drew, Sunil.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Andrew Jones <ajones@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-14 09:56:20 +00:00
Laszlo Ersek
1bfd63ac39 OvmfPkg/RiscVVirt/README: explain the "acpi=off" machine property
"acpi=off" is arguably unusual with UEFI guest OSes; add a note to explain
it. Original explanation by Drew Jones.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Andrew Jones <ajones@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-14 09:56:20 +00:00
Laszlo Ersek
5242bae5dd OvmfPkg/RiscVVirt/README: explain that "-bios" is only useful with TCG
Riscv64 KVM services SBI calls internally, so OpenSBI is not used in such
setups. Restrict the "-bios" flag accordingly. Thanks: Andrei, Drew.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Andrew Jones <ajones@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: '-bios' is rejected with KVM accel (Drew)]
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-14 09:56:20 +00:00
Linus Liu
cdfe4310dd Pyrite support - Secure erase is only available if encryption is supported.
https://bugzilla.tianocore.org/show_bug.cgi?id=3004

Cc: Qi Zhang    <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao  <jiewen.yao@intel.com>
Cc: Tina Chen   <tina.chen@intel.com>
Cc: Xiao X Chen <xiao.x.chen@intel.com>
Signed-off-by: Linus Liu <linus.liu@intel.com>
Reviewed-by: Jiewen Yao  <jiewen.yao@intel.com>
2023-09-13 06:35:02 +00:00
Nickle Wang
4a1afea6f7 RedfishPkg/RedfishPlatformConfigDxe: fix can not set one-of option issue.
StatementValue->Buffer is converted from ASCII to Unicode by caller
already so we don't have to convert it again.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
2023-09-13 03:23:24 +00:00
Min M Xu
b844b106e2 OvmfPkg/TdxDxe: Change MadtMpWk->MailBoxVersion from 1 to 0
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4527

According to ACPI 6.5 (https://uefi.org/specs/ACPI/6.5/05_ACPI_Software
_Programming_Model.html?highlight=mailboxversion#multiprocessor-wakeup-
structure) the MailBoxVersion is 0.

This patch changed MadtMpWk->MailBoxVersion from 1 to 0 to fix the error.

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-09-13 02:29:52 +00:00
Sunil V L
7f1a8cad99 Maintainers.txt: Make myself maintainer for OvmfPkg/RiscVVirt
Since I take care of maintaining the contents in RiscVVirt, update my
entry from R to M.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-12 15:50:30 +00:00
Laszlo Ersek
6d074d6a10 OvmfPkg: raise DXEFV size to 14.5 MB in the traditional platform FDFs
My usual IA32X64 and X64 builds fail for the NOOPT target, using GCC5:

- IA32X64:

> the required fv image size 0xdef130 exceeds the set fv image size
> 0xd00000

- X64:

> the required fv image size 0xd8f7b8 exceeds the set fv image size
> 0xd00000

NOOPT is important for debugging (less confusing behavior with gdb, and
much less confusing disassembly).

Raise the DXEFV size to 14.5 MB (14 MB would work, but cut it too close
for IA32X64).

After this patch:

- IA32:

> DXEFV [83%Full] 15204352 (0xe80000) total, 12718784 (0xc212c0) used,
> 2485568 (0x25ed40) free

- IA32X64:

> DXEFV [96%Full] 15204352 (0xe80000) total, 14610736 (0xdef130) used,
> 593616 (0x90ed0) free

- X64:

> DXEFV [93%Full] 15204352 (0xe80000) total, 14219192 (0xd8f7b8) used,
> 985160 (0xf0848) free

Tested with:
- IA32, q35, SMM_REQUIRE, Fedora 30 guest
- X64, pc (i440fx), no SMM, RHEL-7.9 guest
- IA32X64, q35, SMM_REQUIRE, RHEL-7.9 guest

Test steps (IA32 and X64):
- configure 3 VCPUs
- boot
- run "taskset -c $I efibootmgr" with $I covering 0..2
- systemctl suspend
- resume from virt-manager
- run "taskset -c $I efibootmgr" with $I covering 0..2

Test steps (IA32X64):
- same, but
- start with only 2 cold-plugged CPUs, and
- hot-plug the third VCPU after initial (cold) boot, before the first
  "taskset -c $I efibootmgr" invocation

Also compared the verbose IA32 fw log from before the patch vs. the one
after (because IA32 builds even without this patch); the changes look
sane:

> @@ -1,6 +1,6 @@
>  SecCoreStartupWithStack(0xFFFCC000, 0x820000)
>  SEC: Normal boot
> -DecompressMemFvs: OutputBuffer@A00000+0xDE0090 ScratchBuffer@1800000+0x10000 PcdOvmfDecompressionScratchEnd=0x1810000
> +DecompressMemFvs: OutputBuffer@A00000+0xF60090 ScratchBuffer@1A00000+0x10000 PcdOvmfDecompressionScratchEnd=0x1A10000
>  Register PPI Notify: [EfiPeiSecurity2Ppi]
>  Install PPI: [EfiFirmwareFileSystem2]
>  Install PPI: [EfiFirmwareFileSystem3]
> @@ -28,7 +28,7 @@
>  Loading PEIM at 0x000008490C0 EntryPoint=0x0000085639A PlatformPei.efi
>  Platform PEIM Loaded
>  CMOS:
> -00: 10 00 30 00 13 00 03 12 09 23 26 02 00 80 00 00
> +00: 20 00 41 00 13 00 03 12 09 23 26 02 00 80 00 00
>  10: 00 00 00 00 06 80 02 FF FF 00 00 00 00 00 00 00
>  20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>  30: FF FF 20 00 00 7F 00 20 30 00 00 00 00 12 00 00
> @@ -70,7 +70,7 @@
>  Platform PEI Firmware Volume Initialization
>  Install PPI: [EfiPeiFirmwareVolumeInfoPpi]
>  Notify: PPI Guid: [EfiPeiFirmwareVolumeInfoPpi], Peim notify entry point: 826554
> -The 1th FV start address is 0x00000900000, size is 0x00D00000, handle is 0x900000
> +The 1th FV start address is 0x00000900000, size is 0x00E80000, handle is 0x900000
>  Register PPI Notify: [EfiPeiReadOnlyVariable2Ppi]
>  Select Item: 0x19
>  Select Item: 0x26
> @@ -90,8 +90,8 @@
>  Memory Allocation 0x00000000 0x7F000000 - 0x7FFFFFFF
>  Memory Allocation 0x00000000 0x30000 - 0x4FFFF
>  Memory Allocation 0x0000000A 0x820000 - 0x8FFFFF
> -Memory Allocation 0x0000000A 0x900000 - 0x15FFFFF
> -Memory Allocation 0x0000000A 0x1600000 - 0x180FFFF
> +Memory Allocation 0x0000000A 0x900000 - 0x177FFFF
> +Memory Allocation 0x0000000A 0x1780000 - 0x1A0FFFF
>  Memory Allocation 0x00000000 0xE0000000 - 0xEFFFFFFF
>  Old Stack size 32768, New stack size 131072
>  Stack Hob: BaseAddress=0x7AF68000 Length=0x20000
> @@ -196,8 +196,8 @@
>  Memory Allocation 0x00000000 0x7F000000 - 0x7FFFFFFF
>  Memory Allocation 0x00000000 0x30000 - 0x4FFFF
>  Memory Allocation 0x0000000A 0x820000 - 0x8FFFFF
> -Memory Allocation 0x0000000A 0x900000 - 0x15FFFFF
> -Memory Allocation 0x0000000A 0x1600000 - 0x180FFFF
> +Memory Allocation 0x0000000A 0x900000 - 0x177FFFF
> +Memory Allocation 0x0000000A 0x1780000 - 0x1A0FFFF
>  Memory Allocation 0x00000000 0xE0000000 - 0xEFFFFFFF
>  Memory Allocation 0x00000004 0x7EE50000 - 0x7EE6FFFF
>  Memory Allocation 0x00000003 0x7EF50000 - 0x7EF67FFF
> @@ -219,7 +219,7 @@
>  Memory Allocation 0x00000003 0x7EE70000 - 0x7EEB2FFF
>  Memory Allocation 0x00000004 0x7EE50000 - 0x7EE6FFFF
>  Memory Allocation 0x00000004 0x7AF68000 - 0x7AF87FFF
> -FV Hob            0x900000 - 0x15FFFFF
> +FV Hob            0x900000 - 0x177FFFF
>  InstallProtocolInterface: [EfiDecompressProtocol] 7EEAAA54
>  InstallProtocolInterface: [EfiFirmwareVolumeBlockProtocol|EfiFirmwareVolumeBlock2Protocol] 7EB3491C
>  InstallProtocolInterface: [EfiDevicePathProtocol] 7EB34990
> @@ -3259,7 +3259,7 @@
>  UefiMemory protection: 0x50000 - 0x9E000 Success
>  UefiMemory protection: 0x100000 - 0x807000 Success
>  UefiMemory protection: 0x808000 - 0x810000 Success
> -UefiMemory protection: 0x1810000 - 0x7AF88000 Success
> +UefiMemory protection: 0x1A10000 - 0x7AF88000 Success
>  UefiMemory protection: 0x7AF8B000 - 0x7EB3D000 Success
>  UefiMemory protection: 0x7EDBD000 - 0x7EDCF000 Success
>  UefiMemory protection: 0x7EE4F000 - 0x7EF68000 Success

Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-12 15:50:30 +00:00
Laszlo Ersek
c95158e419 OvmfPkg/PlatformBootManagerLib: refer to virtio console subsys symbolically
"OvmfPkg/Include/IndustryStandard/Virtio095.h" defines the macro
VIRTIO_SUBSYSTEM_CONSOLE with value 3; other locations in the tree already
use it (such as ArmVirtPkg/PlatformBootManagerLib,
OvmfPkg/VirtioSerialDxe). We should use it in
OvmfPkg/PlatformBootManagerLib too, rather than the naked constant 3.

Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-12 15:50:30 +00:00
Ard Biesheuvel
4f4a2c3b07 ArmPkg/ArmMmuLib: Drop buggy secure memory type check
Jake reports that the IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE() macro is
no longer accurate since commit 852227a9d5 ("ArmPkg/Mmu: Remove
handling of NONSECURE memory regions").

Fortunately, it only affects the NS bit in level 1 short descriptors,
which is ignored when executing in non-secure mode. And given that
running UEFI in the secure world is not a use case we aim to support,
let's just drop this logic altogether.

Reported-by: Jake Garver <jake@nvidia.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-09-12 10:20:27 +00:00
Laszlo Ersek
b7a48bed16 OvmfPkg/RiscVVirt/README.md: bring your own OpenSBI
Explain how users can compose their pre-OS environment purely from
binaries they've built themselves.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-09-12 06:07:32 +00:00
Michael Kubacki
e880c307c5 MdeModulePkg/BootMaintenanceManagerUiLib: Check array index before access
Many arrays are defined with a length of MAX_MENU_NUMBER in
FormGuid.h. Two of those are BootOptionOrder and DriverOptionOrder.

In UpdatePage.c, a pointer is set to either of those arrays. The
array buffer is accessed using an index whose range is checked after
the pointer to the array is dereferenced. This change moves the check
before the dereference.

In another place in the file, the ConsoleCheck pointer is also set to
an array buffer with MAX_MENU_NUMBER elements. Only an ASSERT()
currently checks the range of the array index. This change
conditionalizes the pointer dereference itself on the range of Index.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2023-09-12 02:43:14 +00:00
Pierre Gondois
a5cbb59905 Maintainers.txt: Update reviewers and maintainers for DynamicTablesPkg
Update reviewers and maintainers for DynamicTablesPkg

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-11 12:34:17 +00:00
Mike Maslenkin
cc26a2cb31 MdeModulePkg/Core/Dxe: Fix memory leak issue in FwVolBlock.c
FvbDev->LbaCache must be freed on error path before freeing FvbDev.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-09-11 02:17:51 +00:00
Mike Maslenkin
f18ec60fa4 MdeModulePkg/Core/Dxe: Fix memory leak issue in FwVol.c
FwVolHeader must be freed on error path.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-09-11 02:17:51 +00:00
Mike Beaton
0bcc503595 MdeModulePkg/HiiDatabase: Fix incorrect AllocateCopyPool size
The immediately preceding call, GetBestLanguage, plus the implementation of
HiiGetString, which is called immediately afterwards, make it clear that
BestLanguage is a null-terminated ASCII string, and not just a five byte,
non-null terminated buffer.

Therefore AsciiStrLen is one byte too short, meaning that whether the space
allocated is really sufficient and whether the resultant string is really
null-terminated becomes implementation-dependent. Rather than switching to
AsciiStrSize, we use an explicitly compile-time string length calculation
(both compile-time and run-time approaches are currently used elsewhere in
the codebase for copying static strings).

Signed-off-by: Mike Beaton <mjsbeaton@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2023-09-11 01:17:33 +00:00
Andrei Otcheretianski
b240eab035 NetworkPkg: Increase HTTP buffer size and enable TCP window scaling
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4505
This gives something like ~3 fold throughput boost.

Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Zachary Clark-williams <zachary.clark-williams@intel.com>
Signed-off-by: Andrei Otcheretianski <andrei.otcheretianski@intel.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-08 20:49:49 +00:00
Avinash Bhargava
d4ae5df711 MdePkg/SmBios.h: Add New Intel Processor family
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4547

Add New Intel Processor family for SMBIOS Type 4
Hex value - 16h
Name - Intel(R) Processor

Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Benny Lin <benny.lin@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Prakashan Krishnadas Veliyathuparambil <krishnadas.veliyathuparambil.prakashan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Avinash Bhargava <avinash.bhargava@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-08 20:05:49 +00:00
Rebecca Cran
d42ad81e22 Add a .editorconfig file to tell editors basic formatting details
Add a .editorconfig file which editors can use for basic formatting
details of files, such as tabs/spaces, line endings etc.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-09-08 18:56:52 +00:00
Corvin Köhne
28a74d7ab2 OvmfPkg/Bhyve: don't exit early if RSDP is not found in memory
If OVMF fails to find the RSDP in memory, it should fall back installing
the statically provided ACPI tables.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-09-08 16:06:10 +00:00
Michael Kubacki
493a375eef ShellPkg/UefiShellNetwork2CommandsLib: Check array index before access
Moves the range check for the index into the array before attempting
any accesses using the array index.

Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-09-08 15:02:35 +00:00
Michael Kubacki
60d0f5802b MdePkg/Library/TdxLib: Remove unnecessary comparison
Removes the comparison since unsigned values are always greater than
or equal to 0.

See the following CodeQL query for more info:
/cpp/cpp-unsigned-comparison-zero/

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-09-08 14:21:04 +00:00
Kun Qin
b74f1f7ab5 SecurityPkg: RngDxe: Fixing mAvailableAlgoArray allocator
REF: https://bugzilla.tianocore.org/show_bug.cgi?idD91

mAvailableAlgoArray is currently allocated for "RNG_AVAILABLE_ALGO_MAX"
number of bytes, whereas it was dereferenced as "EFI_RNG_ALGORITHM".

This change fixed the buffer allocation logic by allocating a proper size
of buffer before referencing.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>

Signed-off-by: Kun Qin <kuqin@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-09-08 12:48:57 +00:00
Pierre Gondois
ff7ddc02b2 SecurityPkg/RngDxe: Simplify Rng algorithm selection for Arm
The first element of mAvailableAlgoArray is defined as the default
Rng algorithm to use. Don't go through the array at each RngGetRNG()
call and just return the first element of the array.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
19438cff97 SecurityPkg/RngDxe: Use GetRngGuid() when probing RngLib
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4151

The EFI_RNG_PROTOCOL can rely on the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
a GetRngGuid() function was added in a previous patch.

The EFI_RNG_PROTOCOL can advertise multiple algorithms through
Guids. The PcdCpuRngSupportedAlgorithm is currently used to
advertise the RngLib in the Arm implementation.

The issues of doing that are:
- the RngLib implementation might not use CPU instructions,
  cf. the BaseRngLibTimerLib
- most platforms don't set PcdCpuRngSupportedAlgorithm

A GetRngGuid() was added to the RngLib in a previous patch,
allowing to identify the algorithm implemented by the RngLib.
Make use of this function and place the unsage algorithm
at the last position in the mAvailableAlgoArray.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
5443c2dc31 MdePkg/Rng: Add GetRngGuid() to RngLib
The EFI_RNG_PROTOCOL can use the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
add a GetRngGuid() function to the RngLib.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
414c0f2089 MdeModulePkg/Rng: Add GUID to describe unsafe Rng algorithms
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4441

The EFI_RNG_PROTOCOL can rely on the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
a GetRngGuid() function is added in a following patch.

Prepare GetRngGuid() return values and add a gEdkiiRngAlgorithmUnSafe
to describe an unsafe implementation, cf. the BaseRngLibTimerLib.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
cf07238e5f MdePkg/Rng: Add GUID to describe Arm Rndr Rng algorithms
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4441

The EFI_RNG_PROTOCOL can rely on the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
a GetRngGuid() function is added in a following patch.

Prepare GetRngGuid() return values and add a gEfiRngAlgorithmArmRndr
to describe a Rng algorithm accessed through Arm's RNDR instruction.
[1] states that the implementation of this algorithm should be
compliant to NIST SP900-80. The compliance is not guaranteed.

[1] Arm Architecture Reference Manual Armv8, for A-profile architecture
sK12.1 'Properties of the generated random number'

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
bd1f0eecc1 MdePkg/DxeRngLib: Request raw algorithm instead of default
The DxeRngLib tries to generate a random number using the 3 NIST
SP 800-90 compliant DRBG algorithms, i.e. 256-bits CTR, HASH and HMAC.
If none of the call is successful, the fallback option is the default
RNG algorithm of the EFI_RNG_PROTOCOL. This default algorithm might
be an unsafe implementation.

Try requesting the Raw algorithm before requesting the default one.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
65b5dd828e SecurityPkg/SecurityPkg.dec: Move PcdCpuRngSupportedAlgorithm to MdePkg
In order to use PcdCpuRngSupportedAlgorithm in the MdePkg in a
following patch and to avoid making the MdePkg dependent on another
package, move PcdCpuRngSupportedAlgorithm to the MdePkg.

As the Pcd is only used for AARCH64, place it in an AARCH64
specific sections.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
e93468442b MdePkg: Add deprecated warning to BaseRngLibTimer
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4504

To keep the MdePkg self-contained and avoid dependencies on GUIDs
defined in other packages, the BaseRngLibTimer was moved to the
MdePkg.
Add a constructor to warn and request to use the MdeModulePkg
implementation.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Pierre Gondois
2f981bddcb MdeModulePkg: Duplicate BaseRngLibTimerLib to MdeModulePkg
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4504

The BaseRngLibTimerLib allows to generate number based on a timer.
This mechanism allows to have a basic non-secure implementation
for non-production platforms.
To bind and identify Random Number Generators implementations with
a GUID, an unsafe GUID should be added. This GUID cannot be added
to the MdePkg unless it is also added to a specification.

To keep the MdePkg self-contained, copy the BaseRngLibTimerLib to
the MdeModulePkg. This will allow to define an unsafe Rng GUID
in a later patch in the MdeModulePkg.

The MdePkg implementation will be removed later. This allows to give
some time to platform owners to switch to the MdeModulePkg
implementation.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
2023-09-08 09:48:55 +00:00
Dun Tan
2ce5ae43c2 UefiCpuPkg/PiSmmCpuDxe: use MpService2Ppi to wakeup AP in s3
Use MpService2Ppi to wakeup AP in s3 boot flow during initializing
CPU. If mSmmS3ResumeState->MpService2Ppi is not 0, then BSP will
use MpService2Ppi->StartupAllCPUs to do CPU initialization for both
BSP and AP instead of only sending InitSipiSipi for AP.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2023-09-08 06:19:34 +00:00
Dun Tan
cf82c09bac UefiCpuPkg/PiSmmCpuDxe: code refinement for CpuS3.c
This commit is code logic refinement for s3 boot flow
in CpuS3.c. It doesn't change any code functionality.
This commit implementes InitializeAp and InitializeBsp
as a single function since they are doing almost the
same thing. Then both BSP and AP will execute the same
function InitializeCpuProcedure to do CPU initialization.
This can make the code logic easier to understand.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2023-09-08 06:19:34 +00:00
Dun Tan
48de494bb4 UefiCpuPkg/S3Resume2Pei: assert for invalid excution mode combo
Add assert for invalid excution mode combination of 64bit PEI +
32bit DXE.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2023-09-08 06:19:34 +00:00
Dun Tan
bc19f50c70 UefiCpuPkg/S3Resume2Pei: prepare MpService2Ppi in S3Resume
Prepare MpService2Ppi in S3Resume when PEI and SMM env run
in the same execution mode. Then smm s3 code can use Mp
Service to wakeup AP instead of only sending InitSipiSipi.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
2023-09-08 06:19:34 +00:00
Dun Tan
b1955cddb2 MdeModulePkg: add MpService2Ppi field in SMM_S3_RESUME_STATE
Add MpService2Ppi field in SMM_S3_RESUME_STATE of
AcpiS3Context.h. It will be used to wakeup AP to do the CPU
initialization during smm s3 boot flow in following patches.
With this field, we can avoid sending InitSipiSipi to wakeup
AP.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
2023-09-08 06:19:34 +00:00
Michael Kubacki
634192665e MdePkg/Library/BaseRngLib: Fix include guard
The include guard is incomplete and does not define the macro.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@os.amperecomputing.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-09-08 03:29:19 +00:00
Gerd Hoffmann
b29150aa3e ArmVirtPkg: use PcdTerminalTypeGuidBuffer for VirtioSerial console
Be consistent with pl011-based serial console setup.

Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-07 15:47:58 +00:00
Gerd Hoffmann
aff67922c5 OvmfPkg/Include: remove QemuSmramSaveStateMap.h
The qemu/kvm SMM emulation uses the AMD SaveState layout.

So, now that we have AMD SaveState support merged we can just use
Amd/SmramSaveStateMap.h, QemuSmramSaveStateMap.h is not needed any more.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-07 15:47:58 +00:00
Gerd Hoffmann
163083fd80 OvmfPkg/PlatformBootManagerLib: setup virtio-mmio devices.
Add DetectAndPreparePlatformVirtioDevicePath() helper function
to setup virtio-mmio devices.  Start with virtio-serial support.

This makes virtio console usable with microvm.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-07 15:47:58 +00:00
Joursoir
b81557a00c OvmfPkg/README: Document Secure Boot
Add the new section for Secure Boot.

Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-09-07 14:10:11 +00:00
Sheng Wei
bbf1822295 SecurityPkg/SecureBoot: Support RSA4096 and RSA3072
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Zeyi Chen <zeyi.chen@intel.com>
Cc: Fiona Wang <fiona.wang@intel.com>
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-09-07 06:12:18 +00:00
Sheng Wei
24da5c2f28 CryptoPkg/BaseCryptLib: add sha384 and sha512 to ImageTimestampVerify
Register and initialize sha384/sha512 digest algorithms
 for PKCS#7 Handling.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3413

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Zeyi Chen <zeyi.chen@intel.com>
Cc: Fiona Wang <fiona.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-09-07 06:12:18 +00:00
Mike Beaton
4d196352f3 OvmfPkg: Revert "Update build.sh to allow building OVMF then running QEMU"
This reverts commit 173a7a7daa

Fixes https://bugzilla.tianocore.org/show_bug.cgi?id=4528

The build.sh qemu option starts the correct qemu executable for the
selected architecture (build.sh -a option, or implicit) and uses the
correct previously built OVMF image for the selected architecture and
build target (build.sh -b option, or implicit).

With this revert, the above step will fail if there is no matching
previously built OVMF image. This is advantageous over rebuilding each
time the build.sh qemu option is used (as in the reverted commit),
because it provides a quick way to run a just-built OVMF image in place,
while:
 a) Starting immediately (saving the time required for a rebuild on each
    usage, if the VM is started multiple times)
 b) Preserving the NVRAM contents between multiple runs (i.e. until the
    image is next rebuilt)

Signed-off-by: Mike Beaton <mjsbeaton@gmail.com>
2023-09-06 11:09:24 +00:00
Oliver Smith-Denny
9b3d4f28f0 ArmVirtPkg: ArmVirtQemu: Add Graphics and Input
Currently, unlike OVMF, ArmVirtQemu does not display any graphics, only
the QEMU monitor. Graphics are helpful to confirm booting into an OS is
successful, interacting with the EFI shell while getting separate
logging messages, etc.

This patch adds the QEMU parameters to launch a graphical window and add
a USB keyboard and mouse, which is modeled as a tablet as it tracks
better in QEMU than a generic mouse. virtio-gpu-pci is chosen as the
graphics device as it is recommended by QEMU for the ARM virtual
platform.

The graphics and USB input devices will only be added to QEMU when
QEMU_HEADLESS == FALSE, so CI builds will not attempt to use the
graphics and if a user does not want graphics, they can add
QEMU_HEADLESS=TRUE to the build cmdline.

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-09-06 09:35:59 +00:00
Yin Wang
d1e4a16f86 OvmfPkg: Fix Hii form name mismatch with EFI variable
The Hii form is named "MainFormState" while the EFI variable is named
"PlatformConfig".  This discrepancy in names causes the following SCT
cases to fail on RiscVVirtQemu:

  ExtractConfigConformance
  ExtractConfigFunction
  ExtractConfig_Func

Previous commit 16acacf addressed two of these issues, and this patch
fixes the remaining one.

Signed-off-by: Yin Wang <yin.wang@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2023-09-06 07:45:40 +00:00
Roth, Michael via groups.io
f008890ae5 OvmfPkg/AmdSev: fix BdsPlatform.c assertion failure during boot
Booting an SEV guest with AmdSev OVMF package currently triggers the
following assertion with QEMU:

  InstallQemuFwCfgTables: installed 7 tables
  PcRtc: Write 0x20 to CMOS location 0x32
  [Variable]END_OF_DXE is signaled
  Initialize variable error flag (FF)

  ASSERT_EFI_ERROR (Status = Not Found)
  ASSERT [BdsDxe] /home/VT_BUILD/ovmf/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c(1711): !(((INTN)(RETURN_STATUS)(Status)) < 0)

This seems to be due to commit 81dc0d8b4c, which switched to using
PlatformBootManagerLib instead of PlatformBootManagerLibGrub. That pulls
in a dependency on gEfiS3SaveStateProtocolGuid provider being available
(which is asserted for in
BdsPlatform.c:PlatformBootManagerBeforeConsole()/SaveS3BootScript()),
but the libraries that provide it aren't currently included in the
build. Add them similarly to what's done for OvmfPkg.

Fixes: 81dc0d8b4c ("OvmfPkg/AmdSev: stop using PlatformBootManagerLibGrub")
Signed-off-by: Michael Roth <michael.roth@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-09-05 22:35:21 +00:00
Marcin Juszkiewicz
a23f4377c1 Revert "ArmPkg: add ArmCpuInfo EFI application"
I am moving this command outside of EDK2.

This reverts commit 2c2cb23528.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-09-05 17:00:40 +00:00
Michael Roth
8b66f9df1b OvmfPkg/AmdSev: Disable PcdFirstTimeWakeUpAPsBySipi
PcdFirstTimeWakeUpAPsBySipi was recently introduced to indicate when the
full INIT-SIPI-SIPI sequence can be skipped for AP bringup. It is true
by default, but needs to be disabled for QEMU/OVMF where early INIT is
not simulated. Commit 1d76560146 ("OvmfPkg: Disable
PcdFirstTimeWakeUpAPsBySipi.") added changes to disable it by default
for OvmfPkg, but a similar change was not made for the AmdSev package.
This breaks booting of SEV and SNP guests.

Fix this defaulting PcdFirstTimeWakeUpAPsBySipi to false for AmdSev
package, as was previously done for OvmfPkg variants.

Fixes: eaffa1d7ff ("UefiCpuPkg:Wake up APs after power-up or RESET through SIPI.")
Signed-off-by: Michael Roth <michael.roth@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-09-05 14:08:30 +00:00
Ard Biesheuvel
dfb941d32a OvmfPkg/IoMmuDxe: don't rely on TPLs to manage concurrency
Instead of relying on raising the TPL to protect the critical sections
that manipulate the global bitmask that keeps track of bounce buffer
allocations, use compare-and-exchange to manage the global variable, and
tweak the logic to line up with that.

Given that IoMmuDxe implements a singleton protocol that is shared
between multiple drivers, and considering the elaborate and confusing
requirements in the UEFP spec regarding TPL levels at which protocol
methods may be invoked, not relying on TPL levels at all is a more
robust approach in this case.

Link: https://bugzilla.redhat.com/show_bug.cgi?id=2211060
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Pedro Falcato <pedro.falcato@gmail.com>
2023-09-02 14:52:28 +00:00
Nate DeSimone
beafabdae4 MdeModulePkg: Fix memory leak in LocateHandleBuffer()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4543
REF: https://uefi.org/specs/UEFI/2.10/07_Services_Boot_Services.html#efi-boot-services-locatehandlebuffer

CoreLocateHandleBuffer() can in certain cases, return an
error and not free an allocated buffer. This scenario
occurs if the first call to InternalCoreLocateHandle()
returns success and the second call returns an error.

On a successful return, LocateHandleBuffer() passes
ownership of the buffer to the caller. However, the UEFI
specification is not explicit about what the expected
ownership of this buffer is in the case of an error.
However, it is heavily implied by the code example given
in section 7.3.15 of v2.10 of the UEFI specificaton that
if LocateHandleBuffer() returns a non-successful status
code then the ownership of the buffer does NOT transfer
to the caller. This code example explicitly refrains from
calling FreePool() if LocateHandleBuffer() returns an
error.

From a practical standpoint, it is logical to assume that
a non-successful status code indicates that no buffer of
handles was ever allocated. Indeed, in most error cases,
LocateHandleBuffer() does not go far enough to get to the
point where a buffer is allocated. Therefore, all existing
users of this API must already be coded to support the case
of a non-successful status code resulting in an invalid
handle buffer being returned. Therefore, this change will
not cause any backwards compatibility issues with existing
code.

In conclusion, this boils down to a fix for a memory leak
that also brings the behavior of our LocateHandleBuffer()
implementation into alignment with the original intentions
of the UEFI specification authors.

Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-08-31 19:35:19 +00:00
Eduardo Cuevas Farfan
4c8144dd66 ShellPkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
This patch adds below definitions from SMBIOS 3.7.0 into QueryTable.c
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan <eduardo.cuevas.farfan@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-08-31 13:20:19 +00:00
Eduardo Cuevas Farfan
a60eef3afa MdePkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
This patch adds below definitions from SMBIOS 3.7.0 into Smbios.h
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan <eduardo.cuevas.farfan@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-08-31 13:20:19 +00:00
Leif Lindholm
c5753c3e38 ArmPkg/SmbiosMiscDxe: use UINT64 for BiosPhysicalSize
The top two bits of the Extended BIOS ROM Size field indicates the unit
used for the remaining 14 bits. If the size is greater than 16GB, the
unit is gigabytes.
The test for this uses the local BiosPhysicalSize variable, which is a
UINTN, meaning that when building for ARM/CLANGDWARF we have a
tautological constant comparison, which the toolchain flags now we've
stopped disabling that warning.
So switch the BiosPhysicalSize variable to UINT64.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-08-30 21:10:54 +00:00
Tan, Dun
0c4d0b6c8a MdeModulePkg/DxeCorePerformanceLib:fix smm perf issue
Fix smm perf issue in DxeCorePerformanceLib. In
current code logic, total SMM perf record is copied
multiple times to FPDT table if multiple ReadyToBoot
events are signaled. This patch changes the function
InternalGetSmmPerfData() to only get newly generated
Smm perf data. Then previous generated Smm perf data
won't be copied to FPDT again.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4470
Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-08-30 11:20:29 +00:00
Wu, MingliangX
e8aa4c6546 UefiCpuPkg/ResetVector: Cache Disable should not be set by default in CR0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4511

With 64 bit build we are seeing the CD in control register CR 0 set.
This causes the NEM to disabled for some specific bios profiles.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Wu, Mingliang <mingliangx.wu@intel.com>
2023-08-30 10:26:38 +00:00
Nhi Pham
a481c11144 ShellPkg/SmbiosView: Update display of PCIe system slot ID
This updates the system slot ID up to SlotTypePCIExpressGen6andBeyond
(0xC4) added by updating type 9 with SMBIOS version 3.5 to cover modern
PCIe Gens.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-08-30 08:16:24 +00:00
Nhi Pham
5f46eb2307 MdeModulePkg/PciBusDxe: Fix boot hang with faulty PCI Option ROM
A faulty PCI device has the Option ROM image size set to 0. UEFI reads
two headers PCI_EXPANSION_ROM_HEADER and PCI_DATA_STRUCTURE to get the
Option ROM information. Because the image size is 0, the Option ROM
header address never changes. As a result, UEFI keeps reading the same
two headers definitely. This patch is intended to fix it.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-08-30 06:29:14 +00:00
Michael Kubacki
9896a9c618 SecurityPkg/Tpm2DeviceLibTcg2: Make mTcg2Protocol static
The global variable has a common name that can conflict with other
TCG modules. For example, Tcg2Dxe has a similarly named global that
is of type EFI_TCG2_PROTOCOL instead of EFI_TCG2_PROTOCOL*.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-08-30 00:05:52 +00:00
Leif Lindholm
14bf2cb411 BaseTools: drop tautological warning overrides for CLANGDWARF
The CLANGDWARF profile sets both -Wno-tautological-compare and
-Wno-tautological-constant-out-of-range-compare, but this prevents
compile-time detection of certain errors.
Drop these flags.

Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-08-29 12:24:01 +00:00
YuanhaoXie
020cc9e2e7 OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi
Disable PcdFirstTimeWakeUpAPsBySipi for IntelTdx, Microvm, and Xen to
preserve the original execution of INIT-SIPI-SIPI.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-08-29 06:56:53 +00:00
Nhi Pham
a107fcb618 RedfishPkg/RedfishPlatformConfigDxe: Fix unused variable
This fixes an unused variable 'Index' error in release build.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-08-29 03:23:14 +00:00
Zhang, Hongbin1
b1e558f636 IntelFsp2Pkg: Add get and set FspSmmInit upd data pointer functions
FSP-SMM module need get and set FspSmmInit upd data pointer functions
to get and set upd settings.

Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Reviewed-by: S Ashraf Ali <ashraf.ali.s@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2023-08-28 21:25:11 +00:00
Kuo, Ted
2c7fd32676 IntelFsp2Pkg: Support child FV in SplitFspBin.py
https://bugzilla.tianocore.org/show_bug.cgi?id=4502
Update SplitFspBin.py to support child FV in FSP binary. Without the
patch, the tool won't be able to rebase the images in child FV in FSP
binary.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com>
Cc: Ray Han Lim Ng <ray.han.lim.ng@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2023-08-28 20:23:22 +00:00
KasimX Liu
92006e5804 UefiPayloadPkg:Enhance the build processing for Universalpayload
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4532

To Copy the PrebuildUplBinary to Build folder then add/replace Fvs.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: KasimX Liu <kasimx.liu@intel.com>
2023-08-28 06:22:17 +00:00
Qingyu Shang
819cfc6b42 OvmfPkg/RiscVVirt: Fix issues in VarStore Blockmap config
The block size configuration of Blockmap does not match that in Qemu
VirtNorFlash, which causes variable data to be written into FtwWorkBlock
by mistake, resulting in data loss during reboot. Fix it and update
new checksum value.

Signed-off-by: Qingyu Shang <2931013282@sjtu.edu.cn>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-08-25 01:54:50 +00:00
Oliver Smith-Denny
00b51e0d78 MdeModulePkg: HeapGuard: Don't Assume Pool Head Allocated In First Page
Currently, HeapGuard, when in the GuardAlignedToTail mode, assumes that
the pool head has been allocated in the first page of memory that was
allocated. This is not the case for ARM64 platforms when allocating
runtime pools, as RUNTIME_PAGE_ALLOCATION_GRANULARITY is 64k, unlike
X64, which has RUNTIME_PAGE_ALLOCATION_GRANULARITY as 4k.

When a runtime pool is allocated on ARM64, the minimum number of pages
allocated is 16, to match the runtime granularity. When a small pool is
allocated and GuardAlignedToTail is true, HeapGuard instructs the pool
head to be placed as (MemoryAllocated + EFI_PAGES_TO_SIZE(Number of Pages)
- SizeRequiredForPool).

This gives this scenario:

|Head Guard|Large Free Number of Pages|PoolHead|TailGuard|

When this pool goes to be freed, HeapGuard instructs the pool code to
free from (PoolHead & ~EFI_PAGE_MASK). However, this assumes that the
PoolHead is in the first page allocated, which as shown above is not true
in this case. For the 4k granularity case (i.e. where the correct number of
pages are allocated for this pool), this logic does work.

In this failing case, HeapGuard then instructs the pool code to free 16
(or more depending) pages from the page the pool head was allocated on,
which as seen above means we overrun the pool and attempt to free memory
far past the pool. We end up running into the tail guard and getting an
access flag fault.

This causes ArmVirtQemu to fail to boot with an access flag fault when
GuardAlignedToTail is set to true (and pool guard enabled for runtime
memory). It should also cause all ARM64 platforms to fail in this
configuration, for exactly the same reason, as this is core code making
the assumption.

This patch removes HeapGuard's assumption that the pool head is allocated
on the first page and instead undoes the same logic that HeapGuard did
when allocating the pool head in the first place.

With this patch in place, ArmVirtQemu boots with GuardAlignedToTail
set to true (and when it is false, also).

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4521
Github PR: https://github.com/tianocore/edk2/pull/4731

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Dandan Bi <dandan.bi@intel.com>

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-08-19 03:18:50 +00:00
Corvin Köhne
48089f3a7c OvmfPkg/Bhyve: build platform info HOB
Copy the function BuildPlatformInfoHob() from OvmfPkg/PlatformPei.

QemuFwCfgLib expect this HOB to be present, or fails to do anything.
InternalQemuFwCfgIsAvailable() from QemuFwCfgPeiLib module will not
check if the HOB is actually present for example and try to use a NULL
pointer.

Fixes: cda98df162 ("OvmfPkg/QemuFwCfgLib: remove mQemuFwCfgSupported + mQemuFwCfgDmaSupported")
Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-08-18 12:24:35 +00:00
YuanhaoXie
eaffa1d7ff UefiCpuPkg:Wake up APs after power-up or RESET through SIPI.
The implementation of this new behavior aligns with the guidelines
outlined in the Intel SDM.

Following a power-up or RESET of an MP system, system hardware
dynamically selects one of the processors on the system bus as the BSP.
The remaining processors are designated as APs. The APs complete a
minimal self-configuration, then wait for a startup signal (a SIPI
message) from the BSP processor.

Additionally, the MP protocol is executed only after
a power-up or RESET. If the MP protocol has completed and a
BSP is chosen, subsequent INITs (either to a specific processor or
system wide) do not cause the MP protocol to be repeated. Instead, each
logical processor examines its BSP flag (in the IA32_APIC_BASE MSR) to
determine whether it should execute the BIOS boot-strap code (if it is
the BSP) or enter a wait-for-SIPI state (if it is an AP).

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-08-14 14:40:41 +00:00
YuanhaoXie
1d76560146 OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi.
Disable PcdFirstTimeWakeUpAPsBySipi for OVMF to let BSP wake up APs by
INIT-SIPI-SIPI.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-08-14 14:40:41 +00:00
YuanhaoXie
98e9d29e06 UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi
Add PcdFirstTimeWakeUpAPsBySipi to check if it is in the OVMF environment
 and necessary to wake up APs by INIT-SIPI-SIPI.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-08-14 14:40:41 +00:00
Yuanhao Xie
055c7bd1a7 UefiCpuPkg: Add SendStartupIpiAllExcludingSelf
Add new API SendStartupIpiAllExcludingSelf(), and modify
SendInitSipiSipiAllExcludingSelf() by let it call the new API.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-08-14 14:40:41 +00:00
Yi Li
991515a058 CryptoPkg: remove BN and EC accel for size optimization
BN and EC have not been fully tested, and will greatly increase
the size of the Crypto driver(>150KB).

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
e91bfffd4f CryptoPkg/openssl: update CI config for openssl 3.0
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
46226fb5d3 CryptoPkg: remove strcmp to syscall
In rare cases the platform may not provide the full IntrinsicLib.
But openssl30 build always require strcmp, provide this function by
moving it into CrtWrapper.c.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
c0aeb92663 CryptoPkg: run configure.py to update all generated files
cd */edk2/CryptoPkg/Library/OpensslLib
python configure.py

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
dfa6147a79 CryptoPkg: add more dummy implement of openssl for size optimization
Add dummy implement of Encoder, Pkcs12 and sslserver.
OpenSSL libraries which don't need these features can include
these files to reduce the size of output.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
2bead79cfc CryptoPkg: add implemention of _ftol2_sse() to avoid build error
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
b2ff8e45db CryptoPkg: add define of maximum unsigned size_t
Used by openssl30 source code.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
4b5faa5775 CryptoPkg: add missing gcc instructions
Used when build IA32 CryptoPkg by gcc, the definition of the
instructions can be found at:
https://gcc.gnu.org/onlinedocs/gccint/Integer-library-routines.html

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
43e0ede26b CryptoPkg: Enable memcpy sys call in RISCV64 build
When build Openssl30, compiler optimization may use memcpy()
for memory copy.
Need enable it in RISCV64 build also.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
f0d3e59754 CryptoPkg: Align with 4096 when build with OpensslFullAccel
Should align to 4096 when build ecp_nistz256 related asm files.
ecp_nistz256-x86.S Line3:
.globl	ecp_nistz256_precomputed
.align	4096

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
bdf3142eb7 CryptoPkg/TlsLib: use unsigned long for ErrorCode
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
20193b20b5 CryptoPkg: disable C4133 warning in openssl libraries
Disable warning as error of C4133:
v3_genn.c(101): warning C4133: 'function': incompatible types
- from 'ASN1_TYPE *' to 'const ASN1_STRING *'.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
bf1ff73c8c CryptoPkg: Add instrinsics to support building openssl3 on IA32 windows
This dependency is needed to build openssl lib with openssl3
under IA32 Windows, so added implementation for _alldiv, _aulldiv,
_aullrem and _alldvrm instrinsics.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
cea8e3b513 CryptoPkg: adapt 3.0 change in SslNull.c
Type of input params changed in openssl30.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
ea7a37d352 CryptoPkg: use UEFI provider as default
Added UEFI provider which removed unused features to
optimize the size of openssl3.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
9b9b331e0f CryptoPkg: Move all UEFI implement of openssl to OpensslStub
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
5e1900f266 CryptoPkg/openssl: adapt EcSm2Null.c for openssl 3.0
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
174a306ccd CryptoPkg/openssl: store dummy update for openssl 3.0
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
3af00aec7f CryptoPkg/openssl: move compiler_flags to buildinf.c
Seems with openssl 3.0 this is used by multiple source files,
so we get duplicate symbol errors when linking.  Fix that by
moving compiler_flags from header file to a source file.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
c638d1f672 CryptoPkg/openssl: adapt rand_pool.c to openssl 3.0 changes
Some functions have been renamed.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
eac38f74c4 CryptoPkg/TlsLib: ERR_GET_FUNC is gone
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
2a6dc1211f CryptoPkg/BaseCryptLib: drop BIO_* dummy functions
openssl 3.0 requires a functional BIO_sprintf() implementation.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
63c8d160ae CryptoPkg/BaseCryptLib: adapt CryptSm3.c to openssl 3.0 changes.
Functions have been renamed.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
84158d0ebe CryptoPkg/BaseCryptLib: no openssl deprecation warnings please
Stop using deprecated interfaces is left as exercise for another day.
So please don't warn for now so -Werror builds can work.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
ac492c3ead CryptoPkg/openssl: UefiAsm.conf update for openssl 3.0
New naming convention for the configs:  UEFI-${efiarch}-${compiler}.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
81f5aa0700 CryptoPkg/openssl: add openssl3 configure scripts
Rewrite the script to configure openssl 3.0 from scratch.  It's two
scripts now:

 * Tiny helper script, dumping the perl configdata as json.
 * Actual configure.py script, written in python, which copies over
   the generated files to openssl-gen and updates the OpensslLib*.inf
   file lists and build flags.

The configuration workflow has changed a bit:

 * All generated files are stored in the OpensslGen directory tree.
 * For ec/no-ec builds two different header files are used.  Default is
   the ec variant, and the new EDK2_OPENSSL_NOEC define is used to
   select the no-ec build.  A five line wrapper include is used to pick
   the one or the other.
 * For non-accel builds -DOPENSSL_NO_ASM on the command line is used
   (same as before).
 * For configration defines the OPENSSL_FLAGS_$(variant) variable is
   used, where variant is the architecture for the accelerated builds
   and 'NOASM' for the non-accelerated builds.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
7cede6d5f4 CryptoPkg/openssl: update Openssl*.inf files for openssl 3.0
The configure workflow as changed, see the commit adding the configure
script for details.  Adapt the *.inf files to the changes.  The
configuration define handling has changed a bit.  The new configure
script will build a single per-arch file list, which simplifies the
Accel configs.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Yi Li
49a113a7a4 CryptoPkg/openssl: cleanup all openssl1.1.1 generated files and code
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Gerd Hoffmann
9d6d237c3c CryptoPkg/openssl: update submodule to openssl-3.0.9
Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Brian J. Johnson <brian.johnson@hpe.com>
Tested-by: Kenneth Lautner <klautner@microsoft.com>
2023-08-09 07:10:31 +00:00
Foster Nong
136931c4db MedPkg/Include: Add PCI_EXPRESS_EXTENDED_CAPABILITY_DVSEC_ID
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4515

Add PCI_EXPRESS_EXTENDED_CAPABILITY_DESIGNATED_VENDOR_SPECIFIC_ID
0x0023 in PciExpress40.h

Signed-off-by: Foster Nong <foster.nong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-08-09 05:48:00 +00:00
Nate DeSimone
3c274c0d83 MdePkg: Add new status codes to PrintLib
PrintLib does not correctly decode the follow status codes:

 1. EFI_IP_ADDRESS_CONFLICT
 2. EFI_HTTP_ERROR
 3. EFI_WARN_FILE_SYSTEM
 4. EFI_WARN_RESET_REQUIRED

These missing status codes have been added.

Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-08-07 22:56:02 +00:00
Nate DeSimone
107ddf1de9 MdePkg: Add missing status codes
REF: https://uefi.org/specs/UEFI/2.10/Apx_D_Status_Codes.html

Upon review it has been found that MdePkg is missing two
status code definitions:

 1. EFI_IP_ADDRESS_CONFLICT - Added in UEFI Spec v2.5
 2. EFI_WARN_RESET_REQUIRED - Added in UEFI Spec v2.6

These missing status codes have been added.

Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
2023-08-07 22:56:02 +00:00
Gerd Hoffmann
2d8c17a9b6 OvmfPkg/PlatformCI: Boot OVMF in SMP mode.
Increase the chance that CI finds bugs in MP changes.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
(cherry picked from commit f92a9dce10)

Reapplying, since the CI (Windows and Linux) use Qemu 8 now, which works
with SMP again.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4324

Signed-off-by: Oliver Steffen <osteffen@redhat.com>
[ardb: use single-threaded TCG for SMM]
2023-08-04 16:36:04 +02:00
Oliver Steffen
bae848ee25 OvmfPkg/PlatformCI VS2019: Disable workaround for cpuhp bugfix
This reverts commit 3beb8c9654.

Both Windows and Linux CI jobs are now using Qemu 8, this workaround is
no longer needed.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4324

Signed-off-by: Oliver Steffen <osteffen@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-08-04 16:36:04 +02:00
Oliver Steffen
744c42bfd8 OvmfPkg/PlatformCI: Use recent Qemu on Windows
Bump the version of the Qemu chocolatey package up to 2023.7.25.
The Linux CI is already using Qemu 8.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4324

Signed-off-by: Oliver Steffen <osteffen@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-08-04 16:36:04 +02:00
likun su
01ad4134c3 MdeModulePkg: Solve boot hang Xhci driver when use USB DVD with empty disk
Signed-off-by: likun su <sulikun@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: lichao <lichao@loongson.cn>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
2023-08-04 01:27:33 +00:00
Oliver Smith-Denny
ef05145136 ArmPkg: DefaultExceptionHandlerLib: Do Not Allocate Memory
If gST->ConOut is available when Arm's DefaultExceptionHandler is
running, AsciiPrint will get called to attempt to print to ConOut, in
addition to the serial output.

AsciiPrint calls AsciiInternalPrint in UefiLibPrint.c which in turn
calls AllocatePool to allocate a buffer to convert the Ascii input
string to a Unicode string to pass to ConOut->OutputString.

Per the comment on DefaultExceptionHandler, we should not be allocating
memory in the exception handler, as this can cause the exception handler
to fail if we had a memory exception or the system state is such that we
cannot allocate memory.

It has been observed on ArmVirtQemu that exceptions generated in the
memory handling code will fail to output the stack dump and CPU state
that is critical to debugging because the AllocatePool will fail.

This patch fixes the Arm and AARCH64 DefaultExceptionHandlers to not
allocate memory when ConOut is available and instead use stack memory to
convert the Ascii string needed for SerialPortWrite to the Unicode
string needed for ConOut->OutputString. Correspondingly, ArmVirtQemu can
now output the stack dump and CPU state when hitting an exception in
memory code.

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
2023-08-03 14:43:08 +00:00
Dandan Bi
7672d1cca5 MdeModulePkg/SetupBrowser: Load storage via GetVariable for EfiVarStore
For EfiVarStore (EFI_HII_VARSTORE_EFI_VARIABLE_BUFFER), it will call
ExtractConfig-GetVariable-HiiBlockToConfig-ConfigToBlock when load storage
value in LoadStorage function. It's not necessary and costs lots of time
to do the conversion between config and block.
So now enhance it to call GetVariable directly.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2023-08-03 12:12:27 +00:00
Joey Vagedes
fa789cc68a BaseTools: scan Edk2ToolsBuild.py make output
Adds edk2_logging.scan_compiler_output() to Edk2ToolsBuild.py to catch
some compilation errors and log them as an error.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>

Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-08-02 15:20:47 +00:00
Joey Vagedes
5cadb8ce21 BaseTools: BinToPcd: Resolve xdrlib deprecation
Removes the dependency on xdrlib and replaces it with custom logic to
pack a per the xdr requirements. Necessary as xdrlib is being deprecated
in python 3.13.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-08-02 05:23:00 +00:00
Ranbir Singh
d11968fcc5 MdeModulePkg/Bus/Ata/AtaAtapiPassThru: Fix UNUSED_VALUE Coverity issue
The return value stored in Status after call to SetDriveParameters
is not made of any use thereafter and hence it remains as UNUSED.

Based on Hao's findings (https://edk2.groups.io/g/devel/message/106844),
the successful execution of SetDriveParameters() is not mandatory for
initializing IDE mode of a hard disk device. Hence remove the 'Status'
assignment of the return value from SetDriveParameters() and instead add
error checks & DEBUG_WARN level messages within SetDriveParameters()
function after sending INIT_DRIVE_PARAM & SET_MULTIPLE_MODE ATA commands.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4204

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-08-02 03:13:36 +00:00
Ranbir Singh
c7c1170a45 MdeModulePkg/Bus/Ata/AtaAtapiPassThru: Fix SIGN_EXTENSION Coverity issue
Line number 1348 does contain a typecast with UINT32, but it is after
all the operations (16-bit left shift followed by OR'ing) are over.
To avoid any SIGN_EXTENSION, typecast the intermediate result after
16-bit left shift operation immediately with UINT32.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4204

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-08-02 03:13:36 +00:00
Sunil V L
677f2c6f15 OvmfPkg/RiscVVirt: Update README for CLANGDWARF support
Update the README with instruction to build using CLANGDWARF
toolchain.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-31 12:37:12 +00:00
Sunil V L
3f49462558 BaseTools/tools_def: Add CLANGDWARF support for RISC-V
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4478

Add tools_def definitions to support CLANGDWARF toolchain
for RISC-V. This uses clang and the llvm LLD linker. This
helps people by not requiring to install multiple
cross compilers for different architectures.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-07-31 12:37:12 +00:00
Sunil V L
0f9fd06919 OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directives
llvm fails to resolve _ModuleEntry when these extra directives are
present. ASM_FUNC already takes care what is required.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-31 12:37:12 +00:00
Sunil V L
8543840cfd OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modules
Use auto alignment and FIXED FFS attribute for XIP modules similar
to [1]. Without this change, the CLANGDWARF toolchain will fail to
build with below error.

GenFfs: ERROR 1000: Unknown option
  SectionAlign option must be specified with section file.

[1] - 7669f73498

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc  Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org> # Debian clang version 14.0.6
2023-07-31 12:37:12 +00:00
Corvin Köhne
70f3e62dc7 OvmfPkg/BhyvePkg: enable bus enumeration
bhyve supports adding a ROM to PCI devices. It was added to support GPU
passthrough of dedicated AMD GPUs. At the moment, this ROM file is
mostly useless as it's not shadowed and executed by firmware. Change
that by enabling bus enumeration.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
2023-07-31 01:13:47 +00:00
Corvin Köhne
f284981506 Revert "OvmfPkg/Bhyve: remove IncompatiblePciDeviceSupport DXE driver"
We like to enable bus enumeration for bhyve. Therefore, this patch needs
to be reverted.

This reverts commit 8c8f886f27.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
2023-07-31 01:13:47 +00:00
Corvin Köhne
1c923b9f25 Revert "OvmfPkg/Bhyve: consume PciHostBridgeLibScan"
We like to enable bus enumartion for bhyve. Therefore, this patch needs
to be reverted.

This reverts commit c2f24ba321.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
2023-07-31 01:13:47 +00:00
YuanhaoXie
c7a7f09c1d UefiCpuPkg: Decouple the SEV-ES functionality.
The purpose is to fix an issue where an exception occurs at the start
of the DXE phase by applying the following patch series on INTEL-based
systems.

UefiCpuPkg: Refactor the logic for placing APs in HltLoop.
UefiCpuPkg: Refactor the logic for placing APs in Mwait/Runloop.
UefiCpuPkg: Create MpHandOff.
UefiCpuPkg: ApWakeupFunction directly use CpuMpData.
UefiCpuPkg: Eliminate the second INIT-SIPI-SIPI sequence.

This series of patches makes changes to the way the APs are
initialized and woken up. It removes the 2nd time INIT-SIPI-SIPI and
introduces a special startup signal to wake up APs. These patches also
create a new HOB identified by the mMpHandOffGuid, which stores only the
 minimum information required from the PEI phase to the DXE phase.
As a result, the original HOB (mCpuInitMpLibHobGuid) is now used only
as a global variable in the PEI phase and is no longer necessary in the
DXE phase for INTEL-based systems. The AMD SEV-ES related code
still relies on the OldCpuMpData in the DXE phase.

This patch decouple the SEV-ES functionality of assigning CpuMpData to
OldCpuMpData->NewCpuMpData from the Intel logic.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-27 17:10:13 +05:30
Nickle Wang
25a6745fe8 RedfishPkg/RedfishDiscoverDxe: fix netmask check issue
- Add NTOHL() for coverting IP address from EFI_IPv4_ADDRESS to
IP4_ADDR so that IP4_IS_VALID_NETMASK() return correct value.
- Add DumpIpv4Address() in RedfishDebugLib and print IP address
when invalid IP or subnet mask address is detected.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Igor Kulchytskyy  <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-26 00:49:45 +00:00
Michael D Kinney
dcf05f958e MdePkg/Include/IndustryStandard: Remove VS20xx workaround
Remove workaround for the redefinition of the type
RUNTIME_FUNCTION that is generated when building with
VS20xx tool chains and using windows include files.
The correct location for this fix is in the EmulatorPkg
in the WinInclude.h file that addresses all the name
collisions between edk2 types and windows types.

The commit that added the workaround is:

ff52068d92

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-07-24 03:57:52 +00:00
Michael D Kinney
5309ddc83b EmulatorPkg/Win/Host: Fix RUNTIME_FUNCTION redefinition error
Update WinInclude.h to prevent error due to redefinition of
RUNTIME_FUNCTION using same technique that has been used
in the past for structure types such as LIST_ENTRY.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-07-24 03:57:52 +00:00
Sunil V L
925c445fd3 OvmfPkg/RiscVVirt: Avoid printing hard coded timeout value
Print the timeout value set in the PCD variable instead of
hard coded 10 seconds.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2023-07-21 05:56:55 +00:00
Sunil V L
7427dd3fc0 OvmfPkg/RiscVVirt: Check "no-map" and mark EfiReservedMemoryType
OpenSBI now marks PMP regions with "no-map" attribute.
So, remove the workaround and add the ReservedMemory only
when no-map is set so that it follows DT spec.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Ranbir Singh <rsingh@ventanamicro.com>
2023-07-21 05:56:55 +00:00
Kun Qin
c6b512962e UnitTestFrameworkPkg: UnitTestPersistenceLib: Save Unit Test Cache Option
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4467

Current implementation of UnitTestFrameworkPkg for shell-based unit test
will save the unit test cache to the same volume as the test application
itself. This works as long as the test application is on a writable
volume, such as USB or EFI partition.

Instead of saving the files to the same file system of unit test
application, this change will save the cache file to the path where the
user ran this test application.

This change then added an input argument to allow user to specify where
to save such cache file through `--CachePath` shell argument to allow
even more flexibility.

This change was tested on proprietary physical hardware platforms and
QEMU based virtual platform.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-07-20 20:20:42 +00:00
Sheng Wei
b2de9ec5a7 CryptoPkg/OpensslLib: Upgrade OpenSSL to 1.1.1u
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-07-20 07:45:40 +00:00
devel@edk2.groups.io
6510dcf6f7 NetworkPkg/HttpDxe: fix driver binding start issue.
When failure happens in HttpDxeStart, the error handling code
release the memory buffer but it does not uninstall HTTP service
binding protocol. As the result, application can still locate
this protocol and invoke service binding functions in released
memory pool.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-07-20 01:41:02 +00:00
Gerd Hoffmann
a52044a9e6 OvmfPkg/IoMmuDxe: add locking to IoMmuAllocateBounceBuffer
Searching for an unused bounce buffer in mReservedMemBitmap and
reserving the buffer by flipping the bit is a critical section
which must not be interrupted.  Raise the TPL level to ensure
that.

Without this fix it can happen that IoMmuDxe hands out the same
bounce buffer twice, causing trouble down the road.  Seen happening
in practice with VirtioNetDxe setting up the network interface (and
calling into IoMmuDxe from a polling timer callback) in parallel with
Boot Manager doing some disk I/O.  An ASSERT() in VirtioNet caught
the buffer inconsistency.

Full story with lots of details and discussions is available here:
https://bugzilla.redhat.com/show_bug.cgi?id=2211060

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-07-19 17:36:31 +00:00
Jianyong Wu
08aacbf056 OvmfPkg/CloudHv: update Maintainers.txt entry
Add Jianyong Wu and Anatol Belski as co-reviewer for OvmfPkg/CloudHv
to replace Sebastien Boeuf.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-07-19 12:08:56 +00:00
Abdul Lateef Attar
4d1014093f UefiCpuPkg: Uses gMmst in MmSaveStateLib
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Use gMmst instead of gSmst.
Replace SmmServicesTableLib with MmServicesTableLib.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
2023-07-17 09:43:43 +00:00
Ceping Sun
39ded59c09 OvmfPkg/PeilessStartupLib: Updated with PcdSecureBootSupported
SECURE_BOOT_FEATURE_ENABLED was dropped by the commit(92da8a154f), but the
PeilessStartupLib was not updated with PcdSecureBootSupported, that made
SecureBoot no longer work in IntelTdxX64.

Fix this by replacing SECURE_BOOT_FEATURE_ENABLED with
PcdSecureBootSupported in PeilessStartupLib.

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-07-17 04:59:35 +00:00
Nickle Wang
3399f64588 RedfishPkg/RedfishRestExDxe: reset session when TCP timeout happens
Call ResetHttpTslSession() to reset HTTP session when TCP timeout
failure happens. So that application can perform retry to the same URI.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-17 03:58:02 +00:00
Ranbir Singh
dd49d448b0 MdeModulePkg/Bus/Pci/EhciDxe: Fix FORWARD_NULL Coverity issues
The function UsbHcGetPciAddressForHostMem has

    ASSERT ((Block != NULL));

and the UsbHcFreeMem has

    ASSERT (Block != NULL);

statement after for loop, but these are applicable only in DEBUG mode.
In RELEASE mode, if for whatever reasons there is no match inside the
for loop and the loop exits because of Block != NULL; condition, then
there is no "Block" NULL pointer check afterwards and the code proceeds
to do dereferencing "Block" which will lead to CRASH.

Hence, for safety add NULL pointer checks always.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4210
Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-07-17 02:19:45 +00:00
Tuan Phan
f220dcbba8 UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode
During CpuDxe initialization, MMU will be setup with the highest
mode that HW supports.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
cc13dcc576 OvmfPkg: RiscVVirt: Remove satp bare mode setting
There is no point to set satp to bare mode as that should be the
default mode when booting edk2.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
33d0a3cc92 OvmfPkg/RiscVVirt: Add VirtNorFlashDxe to APRIORI list
Make sure VirtNorFlashDxe loaded before VariableRuntimeDxe as it
is the backend flash driver.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
a8a72fc1ff OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devices
Normally, DXE driver would add device resource to GCD before start using.
But some key resources such as uart used for printing info at very early
stage.

Those resources should be populated to HOB in SEC phase so they are
added to GCD before MMU enabled.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
a9fc9bb466 OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash size
The size should be for single region, not the whole firmware FD.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
fbec9aec00 MdePkg/Register: RISC-V: Add satp mode bits shift definition
The satp mode bits shift is used cross modules. It should be defined
in one place.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-07-15 14:10:18 +00:00
Tuan Phan
7178047402 MdePkg/BaseLib: RISC-V: Support getting satp register value
Add an API to retrieve satp register value.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-15 14:10:18 +00:00
Tom Lendacky
e674096acc OvmfPkg/ResetVector: Fix assembler bit test flag check
Commit 63c50d3ff2 changed the check that is
used to determine if SEV-ES is active. Originally, a CMP instruction with
a supporting JZ instruction was used for the check. It was changed to use
the BT instruction but not JZ instruction. The result of a BT instruction
changes the the carry flag (CF) and not the zero flag (ZF). As a result,
the wrong condition is being checked. Update the JZ to a JNC to properly
detect if SEV-ES is active.

Fixes: 63c50d3ff2 ("OvmfPkg/ResetVector: cache the SEV status MSR...")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
2023-07-14 22:52:58 +00:00
Richard Ho
ff3382a51c MdeModulePkg/Bus/Usb/UsbNetwork/UsbCdcNcm: Add USB Cdc NCM devices support
This driver provides UEFI driver for USB CDC NCM device

Signed-off-by: Richard Ho <richardho@ami.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Tony Lo <tonylo@ami.com>
2023-07-13 17:18:40 +00:00
Richard Ho
5e400d22a0 MdeModulePkg/Bus/Usb/UsbNetwork/UsbCdcEcm: Add USB Cdc ECM devices support
This driver provides UEFI driver for USB CDC ECM device

Signed-off-by: Richard Ho <richardho@ami.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Tony Lo <tonylo@ami.com>
2023-07-13 17:18:40 +00:00
Richard Ho
fc0d5922f1 MdeModulePkg/Bus/Usb/UsbNetwork/UsbRndis: Add USB RNDIS devices support
This driver provides UEFI driver for USB RNDIS device

Signed-off-by: Richard Ho <richardho@ami.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Tested-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Tony Lo <tonylo@ami.com>
2023-07-13 17:18:40 +00:00
MarsX Lin
8dab4eebe4 UefiPayloadPkg: Integrate UiApp and BootManagerMenuApp into MultiFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4347

To put UiApp.inf and BootManagerMenuApp.inf to proper FV(BDSFV)

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>

Signed-off-by: MarsX Lin <marsx.lin@intel.com>
2023-07-11 06:36:11 +00:00
Xie, Yuanhao
964a4f032d UefiCpuPkg: Eliminate the second INIT-SIPI-SIPI sequence.
When both the PEI and DXE phases operate in the same execution
mode(32-bit/64-bit), the BSP send a special start-up signal during
the DXE phase to awaken the Application APs.

To eliminate the need for the INIT-SIPI-SIPI sequence at the beginning
of the DXE phase, the BSP call the SwitchApContext function to trigger
the special  start-up signal. By writing the specified
StartupSignalValue to the designated StartupSignalAddress, the BSP
wakes up the APs from mwait mode. Once the APs receive the
MP_HAND_OFF_SIGNAL value, they are awakened and proceed to execute the
SwitchContextPerAp procedure. They enter another while loop,
transitioning their context from the PEI phase to the DXE phase.

The original state transitions for an AP during the procedure are as
follows:
Idle ----> Ready ----> Busy ----> Idle
      [BSP]      [AP]      [AP]

Instead of init-sipi-sipi sequence, we make use of a
start-up signal to awaken the APs and transfer their context from
PEI to DXE. Consequently, APs, rather than the BSP, to set their state
to CpuStateReady.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-11 02:47:27 +00:00
Xie, Yuanhao
629c1dacc9 UefiCpuPkg: ApWakeupFunction directly use CpuMpData.
In the original design, once the APs finished executing their assembly
code and switched to executing C code, they would enter a continuous
loop within a function. In this function, they would collect CpuMpData
using the MP_CPU_EXCHANGE_INFO mechanism. However, in the updated
approach, CpuMpData can now be passed directly to the ApWakeUpFunction,
bypassing the need for MP_CPU_EXCHANGE_INFO. This modification is made
in preparation for eliminating the requirement of a second
INIT-SIPI-SIPI sequence in the DXE phase.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-11 02:47:27 +00:00
Xie, Yuanhao
8bb018afaf UefiCpuPkg: Create MpHandOff.
Initially, the purpose of the Hob was twofold: it served as a way to
transfer information from PEI to DXE. However, during the DXE phase,
only a few fields from the CPU_MP_DATA which collected in PEI phase were
 needed. A new Hob was specifically created to transfer information
 to the DXE phase. This new Hob contained only the essential fields
 required for reuse in DXE. For instance, instead of directly including
  the BspNumber in MpHandOff, the DXE phase introduced the use of
  GetBspNumber() to collect the BspNumber from ApicID and CpuCount.

The SaveCpuMpData() function was updated to construct the MP_HAND_OFF
Hob. Additionally, the function introduced the MP_HAND_OFF_SIGNAL,
which solely served the purpose of awakening the APs
and transitioning their context from PEI to DXE. The
WaitLoopExecutionMode field indicated whether the bit mode of PEI
matched that of DXE. Both of them were filled only if the ApLoopMode
was not ApInHltLoop. In the case of ApInHltLoop, it remained necessary
to wake up the APs using the init-sipi-sipi sequence. This improvement
 still allow INIT-SIPI-SIPI even APs are wait in Run/Mwait loop mode.

The function GetMpHandOffHob() was added to facilitate access to the
collected MpHandOff in the DXE phase. The CpuMpData in the DXE phase
was updated by gathering information from MpHandOff. Since MpHandOff
replaced the usage of OldCpuMpData and contained essential information
from the PEI phase to the DXE phase. AmdSevUpdateCpuMpData was included
to maintain the original implementation of AmdSev, ensuring that
OldCpuMpData->NewCpuMpData pointed to CpuMpData.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-11 02:47:27 +00:00
Xie, Yuanhao
243212b0d0 UefiCpuPkg: Refactor the logic for placing APs in Mwait/Runloop.
Refactor the logic for placing APs in
Mwait/Runloop into a separate function.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-11 02:47:27 +00:00
Xie, Yuanhao
88f436883b UefiCpuPkg: Refactor the logic for placing APs in HltLoop.
Refactor the logic for placing APs in HltLoop into a separate function.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
2023-07-11 02:47:27 +00:00
Abhi Singh
63923a5642 MdeModulePkg/Variable: TcgMorLockSmm Key Mismatch changes lock state
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4410

Inside TcgMorLockSmm.c, the SetVariableCheckHandlerMorLock() function
contains a scenario to prevent a possible dictionary attack on the MorLock
Key in accordance with the TCG Platform Reset Mitigation Spec v1.10.

The mechanism to prevent this attack must also change the MorLock Variable
Value to 0x01 to indicate Locked Without Key.

ASSERT_EFI_ERROR is added for error visibility since SetMorLockVariable
returns a status code

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Abhi Singh <Abhi.Singh@arm.com>

Acked-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-07-10 12:24:59 +00:00
Nickle Wang
96d691166f RedfishPkg/RedfishDebugLib: add new interfaces
Introduce DumpHiiStatementValue() and DumpRedfishValue() to
RedfishDebugLib. Application uses these functions to debug
print the value of HII_STATEMENT_VALUE and EDKII_REDFISH_VALUE.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-06 14:12:27 +00:00
Nickle Wang
60475162a6 RedfishPkg/JsonLib: add object clear interface
-Add JsonObjectClear() interface for application to clear
all elements in JSON object.
-Fix typo.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-06 13:25:15 +00:00
Nickle Wang
b164b6d149 RedfishPkg/RedfishPlatformConfigDxe: hide debug message
Change debug message level of showing ordered list op-code
to REDFISH_PLATFORM_CONFIG_DEBUG.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-06 13:25:15 +00:00
Nickle Wang
98ab6e8718 RedfishPkg/RedfishRestExDxe: fix CPU exception in RedfishRestExDxe
RedfishRestExDxe driver failed to uninstall service binding protocol
when driver binding stop is called. Application drivers may still
use RedfishRestExDxe after it is disconnected in system.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-06 13:25:15 +00:00
Yi Li
af8859bce2 OvmfPkg/PlatformCI: Skip GCC5_OVMF_IA32X64_FULL_NOOPT build
The effect of LTO is limited with optimization turned off, and blocked
the upgrade of Openssl3.0. We already skipped this build with VS2019,
skip the GCC NOOPT build also.

Signed-off-by: Yi Li <yi1.li@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-07-05 08:39:36 +00:00
Zhang, Hongbin1
1fadd18d0c UefiCpuPkg: Get processor extended information for SmmCpuServiceProtocol
Some features like RAS need to use processor extended information
under smm, So add code to support it

Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
2023-07-05 07:38:26 +00:00
Taylor Beebe
6c744465b6 ArmPkg: Add Function Headers to MMU Logic
Much of the MMU logic was written without function headers. This patch
adds function headers where absent and updates function headers which
do not match the EDK2 standard.

Signed-off-by: Taylor Beebe <t@taylorbeebe.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-07-03 14:29:32 +00:00
Taylor Beebe
3b74b0394d ArmPkg: Fix Unsafe ASSERTs in MMU Logic
There are ASSERTs present in the MMU logic to ensure various
functions return successfully, but these ASSERTs may be ignored
on release builds causing unsafe behavior. This patch updates
the logic to handle unexpected return values and branch safely.

Signed-off-by: Taylor Beebe <t@taylorbeebe.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-07-03 14:29:32 +00:00
Taylor Beebe
1b25a7049c ArmPkg: Update GetMemoryRegion() to Handle No mapping
This patch updates the GetMemoryRegion() function to handle the case
where there is no mapping for the requested address.

The original logic for the ARM would hit an ASSERT after
GetMemoryRegionPage() returned EFI_SUCCESS but did not update The
RegionLength parameter.

The original logic for the AARCH64 would never initialize the
RegionLength parameter to zero and return EFI_SUCCESS after
traversing an unknown number of pages.

To fix this, update the logic for both architecture to return
EFI_NO_MAPPING if the BaseAddress being checked is unmapped.

Signed-off-by: Taylor Beebe <t@taylorbeebe.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-07-03 14:29:32 +00:00
Taylor Beebe
cdbdd12460 ArmPkg: Apply Uncrustify to Non-Compliant Files
This patch applies Uncrustify to the following files:
ArmPkg/Drivers/MmCommunicationPei/MmCommunicationPei.c
ArmPkg/Include/IndustryStandard/ArmStdSmc.h

Signed-off-by: Taylor Beebe <t@taylorbeebe.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-07-03 14:29:32 +00:00
Abdul Lateef Attar
f2188fe5d1 OvmfPkg: Uses MmSaveStateLib library
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Uses new MmSaveStateLib library instance.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
fbb6f18e1c UefiCpuPkg: Removes SmmCpuFeaturesReadSaveStateRegister
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Removes SmmCpuFeaturesReadSaveStateRegister and
SmmCpuFeaturesWirteSaveStateRegister function from
SmmCpuFeaturesLib library.

MmSaveStateLib library replaces the functionality of the above
functions.
Platform old/new need to use MmSaveStateLib library to read/write save
state registers.
Current implementation supports Intel and AMD.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
065fa2dcc2 UefiCpuPkg: Implements MmSaveStateLib for Intel
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Implements MmSaveStateLib library interfaces
to read and write save state
registers for Intel processor family.

Moves Intel and AMD common functionality to common area.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
867851dc30 UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Implements interfaces to read and write save state
registers of AMD's processor family.
Initializes processor SMMADDR and MASK depends
on PcdSmrrEnable flag.
Program or corrects the IP once control returns from SMM.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
11dae72d3f UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

moves Intel-specific code to the arch-dependent file.
Other processor families might have different
implementation of these functions.
Hence, moving out of the common file.

Cc: Abner Chang <abner.chang@amd.com>
Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
775b337c78 UefiCpuPkg: Implements MmSaveStateLib library instance
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Implements MmSaveStateLib Library class for
AMD cpu family.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
4f3ddc6e15 UefiCpuPkg: Adds MmSaveStateLib library class
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Adds MmSaveStateLib Library class in UefiCpuPkg.dec.
Adds function declaration header file.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-07-03 03:01:10 +00:00
Abdul Lateef Attar
8d34c7afb3 MdePkg: Adds AMD SMRAM save state map
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182

Adds an SMM SMRAM save-state map for AMD processors.
SMRAM save state maps for the AMD processor family are now supported.

Save state map structure is added based on
AMD64 Architecture Programmer's Manual, Volume 2, Section 10.2.

The AMD legacy save state map for 32-bit architecture is defined.
The AMD64 save state map for 64-bit architecture is defined. 

Also added Amd/SmramSaveStateMap.h to IgnoreFiles of EccCheck,
because structures defined in this file are derived from
Intel/SmramSaveStateMap.h.

Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-07-03 03:01:10 +00:00
Tuan Phan
ad7d3ace1a UefiCpuPkg: CpuTimerDxeRiscV64: Fix timer event not working correctly
The timer notify function should be called with timer period, not the
value read from timer register.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
2023-07-02 10:33:11 +00:00
Mike Maslenkin
5a13f5c2fa RedfishPkg: Fix SortLib library class name typo.
BaseSortLib is the library instance name not the class name.

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
2023-06-30 16:16:12 +00:00
Dun Tan
f5c987fcac UefiCpuPkg/PiSmmCpuDxeSmm: Remove unnecessary function
Remove unnecessary function SetNotPresentPage(). We can directly
use ConvertMemoryPageAttributes to set a range to non-present.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
4ceefd6dd1 UefiCpuPkg: Refinement to smm runtime InitPaging() code
This commit is code refinement to current smm runtime InitPaging()
page table update code. In InitPaging(), if PcdCpuSmmProfileEnable
is TRUE, use ConvertMemoryPageAttributes() API to map the range in
mProtectionMemRange to the attrbute recorded in the attribute field
of mProtectionMemRange, map the range outside mProtectionMemRange
as non-present. If PcdCpuSmmProfileEnable is FALSE, only need to
set the ranges not in mSmmCpuSmramRanges as NX.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
b4394cca2d UefiCpuPkg: Sort mProtectionMemRange when ReadyToLock
Sort mProtectionMemRange in InitProtectedMemRange() when
ReadyToLock.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
7132df94ac UefiCpuPkg: Sort mSmmCpuSmramRanges in FindSmramInfo
Sort mSmmCpuSmramRanges after get the SMRAM info in
FindSmramInfo() function.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
b4dde1ae6a UefiCpuPkg: Use GenSmmPageTable() to create Smm S3 page table
Use GenSmmPageTable() to create both IA32 and X64 Smm S3
page table.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
701b5797b2 UefiCpuPkg: Add GenSmmPageTable() to create smm page table
This commit is code refinement to current smm pagetable generation
code. Add a new GenSmmPageTable() API to create smm page table
based on the PageTableMap() API in CpuPageTableLib. Caller only
needs to specify the paging mode and the PhysicalAddressBits to map.
This function can be used to create both IA32 pae paging and X64
5level, 4level paging.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
d706d9c64a UefiCpuPkg: Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h
Extern mSmmShadowStackSize in PiSmmCpuDxeSmm.h and remove
extern for mSmmShadowStackSize in c files to simplify code.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
ef64ae06f8 UefiCpuPkg/PiSmmCpuDxeSmm: Clear CR0.WP before modify page table
Clear CR0.WP before modify smm page table. Currently, there is
an assumption that smm pagetable is always RW before ReadyToLock.
However, when AMD SEV is enabled, FvbServicesSmm driver calls
MemEncryptSevClearMmioPageEncMask to clear AddressEncMask bit
in smm page table for this range:
[PcdOvmfFdBaseAddress,PcdOvmfFdBaseAddress+PcdOvmfFirmwareFdSize]
If page slpit happens in this process, new memory for smm page
table is allocated. Then the newly allocated page table memory
is marked as RO in smm page table in this FvbServicesSmm driver,
which may lead to PF if smm code doesn't clear CR0.WP before
modify smm page table when ReadyToLock.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
7b6e7d0098 UefiCpuPkg/PiSmmCpuDxeSmm: Add 2 function to disable/enable CR0.WP
Add two functions to disable/enable CR0.WP. These two unctions
will also be used in later commits. This commit doesn't change any
functionality.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
f51967280b UefiCpuPkg/PiSmmCpuDxeSmm: Avoid setting non-present range to RO/NX
In PiSmmCpuDxeSmm code, SetMemMapAttributes() marks memory ranges
in SmmMemoryAttributesTable to RO/NX. There may exist non-present
range in these memory ranges. Set other attributes for a non-present
range is not permitted in CpuPageTableMapLib. So add code to handle
this case. Only map the present ranges in SmmMemoryAttributesTable
to RO or NX.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
6585ced558 UefiCpuPkg: Add DEBUG_CODE for special case when clear RP
In ConvertMemoryPageAttributes() function, when clear RP for a
specific range [BaseAddress, BaseAddress + Length], it means to
set the present bit to 1 and assign default value for other
attributes in page table. The default attributes for the input
specific range are NX disabled and ReadOnly. If there is existing
present range in [BaseAddress, BaseAddress + Length] and the
attributes are not NX disabled or not ReadOnly, then output the
DEBUG message to indicate that the NX and ReadOnly attributes of
the existing present range are modified in the function.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
2d212083d0 UefiCpuPkg: Use CpuPageTableLib to convert SMM paging attribute.
Simplify the ConvertMemoryPageAttributes API to convert paging
attribute by CpuPageTableLib. In the new API, it calls
PageTableMap() to update the page attributes of a memory range.
With the PageTableMap() API in CpuPageTableLib, we can remove
the complicated page table manipulating code.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
2023-06-30 11:07:40 +05:30
Dun Tan
8c99839776 MdeModulePkg: Remove other attribute protection in UnsetGuardPage
In UnsetGuardPage(), before SmmReadyToLock, remove NX and RO
memory attribute protection for guarded page since
EfiConventionalMemory in SMRAM is RW and executable before
SmmReadyToLock. If UnsetGuardPage() happens after SmmReadyToLock,
then apply EFI_MEMORY_XP to the guarded page to make sure
EfiConventionalMemory in SMRAM is NX since EfiConventionalMemory
in SMRAM is marked as NX in PiSmmCpuDxe driver when SmmReadyToLock.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
2023-06-30 11:07:40 +05:30
Dun Tan
a78938f274 OvmfPkg:Remove code that apply AddressEncMask to non-leaf entry
Remove code that sets AddressEncMask for non-leaf entries when
modifing smm page table by MemEncryptSevLib. In FvbServicesSmm
driver, it calls MemEncryptSevClearMmioPageEncMask to clear
AddressEncMask bit in page table for a specific range. In AMD
SEV feature, this AddressEncMask bit in page table is used to
indicate if the memory is guest private memory or shared memory.
But all memory accessed by the hardware page table walker is
treated as encrypted, regardless of whether the encryption bit
is present. So remove the code to set the EncMask bit for smm
non-leaf entries doesn't impact AMD SEV feature.

The reason encryption mask should not be set for non-leaf
entries is because CpuPageTableLib doesn't consume encryption
mask PCD. In PiSmmCpuDxeSmm module, it will use CpuPageTableLib
to modify smm page table in next patch. The encryption mask is
overlapped with the PageTableBaseAddress field of non-leaf page
table entries. If the encryption mask is set for smm non-leaf
page table entries, issue happens when CpuPageTableLib code
use the non-leaf entry PageTableBaseAddress field with the
encryption mask set to find the next level page table.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-06-30 11:07:40 +05:30
Kun Qin
6607062e91 MdeModulePkg: Variable: Introduce MM based variable read service in PEI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4464

This change introduced the Standalone MM based variable read capability
in PEI phase for applicable platforms (such as ARM platforms).

Similar to the x86 counterpart, MM communicate PPI is used to request
variable information from Standalone MM environment.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>

Co-authored-by: Ronny Hansen <hansen.ronny@microsoft.com>
Co-authored-by: Shriram Masanamuthu Chinnathurai <shriramma@microsoft.com>
Co-authored-by: Preshit Harlikar <pharlikar@microsoft.com>
Signed-off-by: Kun Qin <kuqin@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-28 19:35:43 +00:00
Kun Qin
01ac3d8b69 ArmPkg: MmCommunicationPei: Introduce MM communicate in PEI
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4464

This change introduced the MM communicate support in PEI phase for ARM
based platforms. Similar to the DXE counterpart, `PcdMmBufferBase` is
used as communicate buffer and SMC will be invoked to communicate to
TrustZone when MMI is requested.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Co-authored-by: Ronny Hansen <hansen.ronny@microsoft.com>
Co-authored-by: Shriram Masanamuthu Chinnathurai <shriramma@microsoft.com>
Co-authored-by: Preshit Harlikar <pharlikar@microsoft.com>
Signed-off-by: Kun Qin <kuqin@microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-28 19:35:43 +00:00
devel@edk2.groups.io
4416bf3383 NetworkPkg: Correct the length of EAP Identity when in ASCII format
FIX: https://bugzilla.tianocore.org/show_bug.cgi?id=4477

Tls connection fail over WiFi in AMT OCR flow due to invalid identity.

This was due to missing conversion between unicode and ascii
string which resulted in invalid strlen.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Zachary Clark-Williams <zachary.clark-williams@intel.com>
Signed-off-by: Yi Li <yi1.li@intel.com>
Reviewed-by: Zachary Clark-Williams <zachary.clark-williams@intel.com>
2023-06-28 02:56:39 +00:00
Saloni Kasbekar
44a3d93af3 Maintainers.txt: Update NetworkPkg maintainers and reviewers
Add Zack, Saloni and remove unused IDs

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Zachary Clark-willilams <zachary.clark-williams@intel.com>
Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
Reviewed-by: Zachary Clark-willilams <zachary.clark-williams@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-06-28 02:15:57 +00:00
Sunil V L
1a39bdf2c5 BaseTools/tools_def: Add "-fno-unwind-tables" to GCC5_RISCV64_CC_FLAGS
gcc-13 for RISC-V enables unwind tables by default similar to ARM64.
This generates .eh_frame_hdr section which is not handled well by
GenFw causing failures.

Disable the unwind tables by adding -fno-unwind-tables flag similar
to [1].

[1] - https://github.com/tianocore/edk2/commit/cbf00651eda6

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-27 18:20:06 +00:00
Ard Biesheuvel
ea7a3015a2 OvmfPkg/VirtioSerialDxe: Remove noisy debug print on supported() call
The UEFI driver model invokes the supported() method on every driver
every time a connection attempt is made on any handle, and so doing an
unconditional DEBUG() print inside this method produced a lot of noise.

So let's drop this DEBUG() call from the VirtioSerial driver's
Supported() method.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-27 16:40:07 +00:00
Ard Biesheuvel
2f8b51d6af ArmPkg/OpteeLib: Map shared communication buffer non-executable
The OP-TEE secure OS exposes a non-secure memory region for
communication between the secure OS itself and any clients in the
non-secure firmware. This memory is writable by non-secure and is not
used for code only data, and so it should be mapped non-executable.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-06-27 16:40:07 +00:00
Ard Biesheuvel
8a1f540596 ArmPkg: Drop individual memory permission helpers
Now that we have a sane API to set and clear memory permissions that
works the same on ARM and AArch64, we no longer have a need for the
individual set/clear no-access/read-only/no-exec helpers so let's drop
them.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-06-27 16:40:07 +00:00
Ard Biesheuvel
7054f1a54e StandaloneMmPkg: Include correct MmuLib header
StandaloneMm has its own version of the ArmMmuLib library class, but
includes the ArmMmuLib header. This happens to work because the
prototypes that are referenced are the same, but this will no longer be
the case after a future patch. So correct the #includes.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-06-27 16:40:07 +00:00
Ray Ni
28eb51dd54 UefiCpuPkg/ResetVector: Remove pre-built binaries
Because it's simpler for a platform to include the ResetVector source
and having pre-built binaries add burdens of updating the pre-built
binaries. This patch removes the pre-built binaries and the script
that buids the pre-built binaries.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-27 10:16:25 +00:00
Ray Ni
8ef7e222ae UefiCpuPkg/ResetVector: Add guidance of FDF ffs rule
ResetVector assembly implementation puts "ALIGN 16" in the end
to guarantee the final executable file size is multiple of 16 bytes.
Because the module uses a special GUID which guarantees it's put in
the very end of a FV, which should be also the end of the FD.
All of these (file size is multiple of 16B, and the module is put at
end of FV, FV is put at end of FD) guarantee the "JMP xxx" instruction
is at FFFF_FFF0h.

This patch updates INF file and ReadMe.txt to add guidance of FDF ffs
rule for the ResetVector.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-27 10:16:25 +00:00
Ray Ni
ab85db3260 UefiCpuPkg: Include ResetVector in DSC
Since ResetVector source module shares the same GUID as the binary
module, the binary INF file is just removed from DSC.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-27 10:16:25 +00:00
Oliver Steffen
81cb0371f9 CI: Use latest image for Linux jobs (Qemu 8, gcc 12)
Use the latest Linux container image (from 2023-05-30).
It uses Qemu 8.0.0 and gcc 12.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4324

Signed-off-by: Oliver Steffen <osteffen@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-06-27 00:57:17 +00:00
Gerd Hoffmann
638dfb4135 OvmfPkg/PciHotPlugInitDxe: fix io window size
Smallest IO window size for PCI bridges is 0x1000.  Fix default size
accordingly.  Avoids broken resource assignments like this:

    [ ... ]
    PciBus: Resource Map for Root Bridge PciRoot(0x0)
    Type =   Io16; Base = 0x6000;   Length = 0x7000;        Alignment = 0xFFF
    [ ... ]
       Base = 0xC000;       Length = 0x200; Alignment = 0xFFF;      Owner = PPB [00|02|00:**]
       Base = 0xC200;       Length = 0x40;  Alignment = 0x3F;       Owner = PCI [00|1F|03:20]
       Base = 0xC240;       Length = 0x20;  Alignment = 0x1F;       Owner = PCI [00|1F|02:20]
    [ ... ]

... which the linux kernel fixes up later:

    [    0.644657] pci 0000:00:1f.3: BAR 4: assigned [io  0x1000-0x103f]
    [    0.646833] pci 0000:00:1f.2: BAR 4: assigned [io  0x1040-0x105f]

With the patch applied:

    { ... ]
    PciBus: Resource Map for Root Bridge PciRoot(0x0)
    Type =   Io16; Base = 0x6000;   Length = 0x8000;        Alignment = 0xFFF
    [ ... ]
       Base = 0xC000;       Length = 0x1000;        Alignment = 0xFFF;      Owner = PPB [00|02|00:**]
       Base = 0xD000;       Length = 0x40;  Alignment = 0x3F;       Owner = PCI [00|1F|03:20]
       Base = 0xD040;       Length = 0x20;  Alignment = 0x1F;       Owner = PCI [00|1F|02:20]
    [ ... ]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-26 11:08:31 +00:00
Ard Biesheuvel
5542e528cd ArmPkg/CpuDxe: Simplify memory attributes protocol implementation
Now that ArmSetMemoryAttributes() permits a mask to be provided, we can
simplify the implementation the UEFI memory attribute protocol
substantially, and just pass on the requested mask to be set or cleared
directly.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
a21a994f55 MdeModulePkg/DxeIpl ARM AARCH64: Switch to generic handoff code
Now that we have a generic method to manage memory permissions using a
PPI, we can switch to the generic version of the DXE handoff code in
DxeIpl, and drop the ARM specific version.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
4249829cf2 ArmPkg/CpuPei: Implement the memory attributes PPI
Implement the newly defined PPI that permits the PEI core and DXE IPL to
manage memory permissions on ranges of DRAM, for doing things like
mapping the stack non-executable, or granting executable permissions to
shadowed PEIMs.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
8f5ad634ad ArmPkg/ArmMmuLib: Extend API to manage memory permissions better
Currently, ArmSetMemoryAttributes () takes a combination of
EFI_MEMORY_xx constants describing the memory type and permission
attributes that should be set on a region of memory. In cases where the
memory type is omitted, we assume that the memory permissions being set
are final, and that existing memory permissions can be discarded.

This is problematic, because we aim to map memory non-executable
(EFI_MEMORY_XP) by default, and only relax this requirement for code
regions that are mapped read-only (EFI_MEMORY_RO). Currently, setting
one permission clears the other, and so code managing these permissions
has to be aware of the existing permissions in order to be able to
preserve them, and this is not always tractable (e.g., the UEFI memory
attribute protocol implements an abstraction that promises to preserve
memory permissions that it is not operating on explicitly).

So let's add an AttributeMask parameter to ArmSetMemoryAttributes(),
which is permitted to be non-zero if no memory type is being provided,
in which case only memory permission attributes covered in the mask will
be affected by the update.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
9df2c0a555 MdeModulePkg/DxeIpl: Use memory attribute PPI to remap the stack NX
If the associated PCD is set to TRUE, use the memory attribute PPI to
remap the stack non-executable. This provides a generic method for doing
so, which will be used by ARM and AArch64 as well once they move to the
generic DxeIpl handoff implementation.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
dfacaab57e MdeModulePkg/DxeIpl: Merge EBC, RISCV64 and LOONGARCH code
The Risc-V and LoongArch specific versions of the DXE core handoff code
in DxeIpl are essentially copies of the EBC version (modulo the
copyright in the header and some debug prints in the code).

In preparation for introducing a generic PPI based method to implement
the non-executable stack, let's merge these versions, so we only need to
add this logic once.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-26 09:11:53 +00:00
Ard Biesheuvel
9eb8f2c99f MdeModulePkg: Define memory attribute PPI
Define a PPI interface that may be used by the PEI core or other PEIMs
to manage permissions on memory ranges. This is primarily intended for
restricting permissions to what is actually needed for correct execution
by the code in question, and for limiting the use of memory mappings
that are both writable and executable at the same time.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-26 09:11:53 +00:00
Aishwarya, KurugoduMelmatamX
ac33eee8b8 IntelFsp2WrapperPkg: Get HobListPtr before calling the Multiphase FSPS
REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4480

In the FspsWrapperPeim, before calling FspWrapperVariableRequestHandler
and FspWrapperMultiPhaseHandler ,FspHobListPtr should be available so
that BL will be able to get the correct FspHobListPtr value

Signed-off-by: kurugodx <kurugodumelmatamx.aishwarya@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Chen Gang C <gang.c.chen@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2023-06-26 05:09:24 +00:00
Corvin Köhne
5779671137 OvmfPkg/Bhyve: include TPM driver
Bhyve will gain support for TPM emulation in the near future. Therefore,
prepare OVMF by copying all TPM driver used by qemu's OVMF DSC into the
bhyve OVMF DSC.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-23 17:26:37 +00:00
Corvin Köhne
c301291dc3 OvmfPkg/Bhyve: install Acpi tables provided by FwCfg
Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Corvin Köhne
5a118a61d1 OvmfPkg: move QemuFwCfgAcpi into AcpiPlatformLib
This makes the InstallQemuFwcfgTables function reusable by bhyve.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Corvin Köhne
0f612c1443 OvmfPkg: move BootScript into AcpiPlatformLib
This is required to move InstallQemuFwCfgTables into AcpiPlatformLib.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Corvin Köhne
ea88df6b26 OvmfPkg: move PciEncoding into AcpiPlatformLib
Bhyve supports providing ACPI tables by FwCfg. Therefore,
InstallQemuFwCfgTables should be moved to AcpiPlatformLib to reuse the
code. As first step, move PciEncoding into AcpiPlatformLib.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Corvin Köhne
f5d851673d OvmfPkg: avoid including AcpiPlatformLib twice
Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Corvin Köhne
8f63f4143d OvmfPkg/Library: fix definition of GetAcpiRsdpFromMemory
The definition and declaration of GetAcpiRsdpFromMemory doesn't match.
We don't get a compile error yet because UINTN is the same as UINT64 on
64bit machines. As the function works on memory addresses, UINTN is the
correct type of the input parameters.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
2023-06-23 17:26:37 +00:00
Kun Qin
6ee981c858 SecurityPkg: SubClassTpm: Updated default value
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966

This change updated the default value of TPM device subclass PCD to
`0x010E0000` in order to match the definition of EFI_PERIPHERAL_TPM
from PI specification v1.8.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-06-23 16:28:24 +00:00
Kun Qin
7c703f0a8a MdePkg: PiStatusCode: Add TPM subclass definition to MdePkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966

This change introduces a new peripheral subclass definition from PI
specification v1.8.

The new subclass definition will cover system reboot events under the
status reports from Trusted Platform Modules (TPMs).

These definition could provide helpful datapoints to OEMs to analyze
system security state and healthiness, as well as avoid definition
collision with other existing peripheral subclass definitions.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-06-23 16:28:24 +00:00
Kun Qin
e7667b7b9a MdePkg: PiStatusCode: Add new Host Software class Error Code to MdePkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3794

This change introduces a new error code definitions under Host Software
class according to PI specification v1.8.

The new error code definition will cover system reboot events under the
conditions of inconsistent memory map from one boot to another.

These error codes could provide helpful datapoints to OEMs to investigate
and prevent system failures in general.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2023-06-23 16:28:24 +00:00
Sunil V L
49f06b6640 OvmfPkg/RiscVVirt: Add a readme for build and test
Add a readme file which provides information regarding how
to build and test EDK2 on RISC-V qemu virt platform.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23 04:49:11 +00:00
Sunil V L
37423fa344 OvmfPkg/RiscVVirt: Add support for separate code and variable store
Currently, RiscVVirtQemu supports unified code and variable store
mainly because only one pflash devices was available in qemu for
EDK2. However, this doesn't allow to map the code part as read-only.

With recent qemu enhancements, it is now possible for EDK2 to make
use of both pflash devices in RISC-V virt machine. So, add support
to create code and vars images separately. This also allows easy
firmware code updates without losing the variable store.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23 04:49:11 +00:00
Sunil V L
420cd54993 OvmfPkg/RiscVVirt: Add VirtNorFlashDeviceTreeLib library
This library is required to support separate code and
variable store images.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23 04:49:11 +00:00
Sunil V L
f6c4b0a78e OvmfPkg/RiscVVirt: Fix couple of issues in VarStore
The size of the FV and the WriteQueueSize is incorrect which causes
the flash to be re-written during boot. Fix them and update the new
checksum value.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-23 04:49:11 +00:00
duntan
fcd71642df MdePkg: Code optimization to SMM InternalAllocateAlignedPages
This commit is code optimization to InternalAllocateAlignedPages of
SmmMemoryAllocationLib which can reduce free memory fragments. Also
it can reduce one pre-allocation page.

Let's take a simple example:
The expected pages size is 8KB, Alignment value is 8KB.

In original InternalAllocateAlignedPages(), the first step is to
allocate 4 pages and then find the first 8KB-aligned address in
allocated 4 pages. If the upper limit address of allocated 4 pages
is already 8KB aligned, then the allocated 4 pages contains two
8KB-aligned 8KB ranges. The lower 2 pages will be selected and
removed from free pages. Then the higher 2 pages will be free.
Since the whole memory allocation is from high address to low
address, then the higher 2 pages cann't be merged with other free
pages, causing the free memory fragments.

However, when only allocate 3(2+2-1) pages, we can avoid the free
memory fragments in specific case. Also 3 pages must contain a
8KB-aligned 8KB range, which meets the requirement. If the upper
limit address of allocated 3 pages is 8KB-aligned, then the higher
2 pages range of allocated 3 pages is 8KB-aligned and will be
selected and removed from free pages. The remaining lower one page
of allocated 3 pages will be free and merged with left lower free
memory. This can reduce free memory fragments in smm.

Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
2023-06-21 08:00:04 +00:00
Ray Ni
56f65e4bad MdeModulePkg/SmmCore: Perf-log PlatformHookBefore/AfterSmmDispatch
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
a87f5fdb3d UefiCpuPkg/SmmCpu: Add PcdSmmApPerfLogEnable control AP perf-logging
When a platform has lots of CPU cores/threads, perf-logging on every
AP produces lots of records. When this multiplies with number of SMIs
during post, the records are even more.

So, this patch adds a new PCD PcdSmmApPerfLogEnable (default TRUE)
to allow platform to turn off perf-logging on APs.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
2d3974a351 MdeModulePkg/SmmCorePerformanceLib: Disable perf-logging at runtime
Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot
by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and
impact the SMI latency at runtime.
Hence the SmmCorePerformanceLib is updated to disable perf-logging
after ExitBS.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
92759eeb0c MdeModulePkg/SmmPerformanceLib: Disable perf-logging after ExitBS
Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot
by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and
impact the SMI latency at runtime.
Hence the SmmPerformanceLib is updated to disable perf-logging
after ExitBS.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
0c136bbba0 MdeModulePkg/SmmCore: Add perf-logging for SmmDriverDispatchHandler
SmmDriverDispatchHandler is the routine that dispatches SMM drivers
from FV. It's a time-consuming routine.
Add perf-logging for this routine.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
e4ff852136 MdeModulePkg/SmmCore: Add perf-logging for time-consuming procedures
Following procedures are perf-logged:
* SmmReadyToBootHandler
* SmmReadyToLockHandler
* SmmEndOfDxeHandler
* SmmEntryPoint
  (It's the main routine run in BSP when SMI happens.)
* SmiManage

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
ad6c8540cc UefiCpuPkg/CpuSmm: Add perf-logging for MP procedures
MP procedures are those procedures that run in every CPU thread.
The EDKII perf infra is not MP safe so it doesn't support to be called
from those MP procedures.

The patch adds SMM MP perf-logging support in SmmMpPerf.c.
The following procedures are perf-logged:
* SmmInitHandler
* SmmCpuFeaturesRendezvousEntry
* PlatformValidSmi
* SmmCpuFeaturesRendezvousExit

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2023-06-21 04:37:17 +00:00
Ray Ni
0da3df78ff UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP procedures
The patch adds perf-logging for the following potential
time-consuming BSP procedures:
* PiCpuSmmEntry
  - SmmRelocateBases
  - ExecuteFirstSmiInit

* BSPHandler
  - SmmWaitForApArrival
  - PerformRemainingTasks
    * InitPaging
    * SetMemMapAttributes
    * SetUefiMemMapAttributes
    * SetPageTableAttributes
    * ConfigSmmCodeAccessCheck
    * SmmCpuFeaturesCompleteSmmReadyToLock

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2023-06-21 04:37:17 +00:00
Jian J Wang
4a0642ad27 Maintainers.txt: update maintainer for CryptoPkg
Cc: Jiewen Yao <jiewen.yao@intel.com> [jyao1]
Cc: Yi Li <yi1.li@intel.com> [liyi77]
Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com> [xiaoyuxlu]
Cc: Guomin Jiang <guomin.jiang@intel.com> [guominjia]
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen.yao@intel.com
Reviewed-by: Yi Li <yi1.li@intel.com>
2023-06-21 03:29:57 +00:00
Tuan Phan
ea55bd8f66 UefiCpuPkg: RISC-V: TimerLib: Fix delay function to use 64-bit
The timer compare register is 64-bit so simplifying the delay
function.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-06-15 05:32:51 +00:00
Tuan Phan
4dba2a9d08 UefiCpuPkg: CpuTimerDxeRiscV64: Fix incorrect value sent to SbiSetTimer
SbiSetTimer expects core tick value.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-06-15 05:32:51 +00:00
BruceX Wang
aad98d915a UefiPayloadPkg: Fix incorrect code on AddSectionHeader
Fix incorrect code on AddSectionHeader32() and AddSectionHeader64()

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: BruceX Wang <brucex.wang@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
2023-06-14 14:49:52 +00:00
MarsX Lin
51bb8eb76c UefiPayloadPkg: Add CAPSULE_SUPPORT in UPL and set it as FALSE in default
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4479

Add CAPSULE_SUPPORT to optionally select CapsuleLib instance,
default value is FALSE.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: James Lu <james.lu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>

Signed-off-by: MarsX Lin <marsx.lin@intel.com>
2023-06-13 06:36:16 +00:00
Ray Ni
6250124de8 Maintainers.txt: Remove me from maintainers of UefiPayloadPkg,ShellPkg
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
2023-06-13 04:11:34 +00:00
Ray Ni
e5b515f832 Maintainers.txt: Remove UEFI Shell Binaries section
The Shell binaries are not generated anymore in each
stable tag release.
So, remove the section.

Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Ray Ni <ray.ni@intel.com>
2023-06-13 04:11:34 +00:00
Zhiguang Liu
530f5b0912 UnitTestFrameworkPkg: Add UnitTestPeiServicesTablePointerLib
This library supports a PeiServicesTablePointerLib implementation
that allows code dependent upon PeiServicesTable to operate in an
isolated execution environment such as within the context of a
host-based unit test framework.

The unit test should initialize the PeiServicesTable database with
any required elements (e.g. PPIs, Hob etc.) prior to the services
being invoked by code under test.

It is strongly recommended to clean any global databases by using
EFI_PEI_SERVICES.ResetSystem2 after every unit test so the tests
execute in a predictable manner from a clean state.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-06-13 02:53:40 +00:00
Simon Wang
8314a85893 ShellPkg/SmbiosView: type 45 and type 46 support.
The initial version of Smbios Specification 3.6.0
type 45 and type 46 support.

Signed-off-by: Simon Wang <simowang@nvidia.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-06-08 07:11:06 +00:00
Gua Guo
69abcf1e78 UefiPayloadPkg: Enhance build script for BuildEntryOnly
Currently, have two command for pre-build binary support
1. --BuildEntryOnly: build UPL Entry file
2. --PreBuildUplBinary: build UPL binary based on UPL

And these two commands should be exclusived, shouldn't
have chance run it in the meantime.

Case1: Build UPL entry with CLANGDWARF
  python UefiPayloadPkg/UniversalPayloadBuild.py --BuildEntryOnly

Case2: Use pre-built UPL entry and build other fv by VS2019
  python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019 \
    --PreBuildUplBinary UniversalPayload.elf

Case3: Build UPL Entry with CLANGDWARF and build other fv by VS2019
  python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: James Lu <james.lu@intel.com>
2023-06-07 18:22:28 +00:00
Ni, Ray
8d238f1433 Maintainers.txt: Update maintainers for StandaloneMmPkg
Add Ray, remove Jiewen.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2023-06-07 15:31:17 +00:00
Sami Mujawar
aa3ea84407 Maintainers.txt: Remove reviewer for StandaloneMmPkg
Supreeth is no longer supreeth.venkatesh@arm.com. Therefore,
remove the reviewer entry from StandaloneMmPkg.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-07 15:31:17 +00:00
Nickle Wang
c082da89cf RedfishPkg: update Readme.md
RedfishClientPkg is moved from edk2-staging repository to
edk2-redfish-client repository. Update the link in Readme.md
to new location.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-06-07 08:53:27 +00:00
Neo Hsueh
67fc78d026 MdeModulePkg/Bus: Fix port multiplier port in AhciPei PEIM
If there is no port multiplier, PortMultiplierPort should be converted
to 0 to follow AHCI spec.
The same logic already applied in AtaAtapiPassThruDxe driver.

Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-06-07 03:13:56 +00:00
Yong Li
ded0b489af MdePkg/BaseLib: Add SpeculationBarrier implementation for RiscV64
Implement the SpeculationBarrier with implementations consisting of
fence instruction which provides finer-grain memory orderings.
Perform Data Barrier in RiscV: fence rw,rw
Perform Instruction Barrier in RiscV: fence.i; fence r,r
More detail is in Appendix A: RVWMO Explanatory Material in
https://github.com/riscv/riscv-isa-manual

This API is first introduced in the below commits for IA32 and x64
d9f1cac51b
e83d841fdc
and below the commit for ARM and AArch64 implementation
c0959b4426

This commit is to add the RiscV64 implementation which will be used by
variable service under Variable/RuntimeDxe

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Evan Chai <evan.chai@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Tuan Phan <tphan@ventanamicro.com>
Signed-off-by: Yong Li <yong.li@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-06-06 20:37:18 +00:00
Aryeh Chen
d189de3b0a MdePkg ACPI65: Update MADT Revision pre ACPI Spec 6.5
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4474

ACPI_Spec_6_5_Aug29 Table 5.19 page 128 that MADT Revision
field is 6.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Aryeh Chen <aryeh.chen@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Tested-by: Aryeh Chen <aryeh.chen@intel.com>
2023-06-06 19:11:50 +00:00
Oliver Smith-Denny
cdd20638bc CharEncodingCheckPlugin: Remove Noisy Print
Currently, CharEncodingCheckPlugin prints a message for every
file that passes the test, which for some platforms can cause
most of the CI build log to be filled with this print. It does
not add any value, so this patch removes the noisy print and
only prints if the encoding check fails.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
2023-06-06 17:08:05 +00:00
Corvin Köhne
4bd0849d81 OvmfPkg/Bhyve: install ACPI tables from memory
It's much easier to create configuration dependent ACPI tables for bhyve
than for OVMF. For this reason, don't use the statically created ACPI
tables provided by OVMF. Instead, prefer the dynamically created ACPI
tables of bhyve. If bhyve provides no ACPI tables or we are unable to
detect those, fall back to OVMF tables.

Ideally, we use the qemu fwcfg interface to pass the ACPI tables from
bhyve to OVMF. bhyve will support this in the future. However, current
bhyve executables don't support passing ACPI tables by the qemu fwcfg
interface. They just copy the ACPI into main memory. For that reason,
pick up the ACPI tables from main memory.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-06 10:55:41 +00:00
Corvin Köhne
1288c5415c OvmfPkg/Xen: export AcpiTable installation into AcpiPlatformLib
This makes the function reuseable by bhyve.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-06 10:55:41 +00:00
Corvin Köhne
f211292711 OvmfPkg/Xen: export search of RSDP into a library function
Xen and bhyve are placing ACPI tables into system memory. So, they can
share the same code. Therefore, create a new library which searches and
installs ACPI tables from system memory.

Signed-off-by: Corvin Köhne <corvink@FreeBSD.org>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-06 10:55:41 +00:00
Mikolaj Lisik via groups.io
c1dd400a13 OvmfPkg: Create additional PML1 entries for large SEV-SNP VMs
Edk2 was failing, rather than creating more PML4 entries, when they
weren't present in the initial memory acceptance flow. Because of that
VMs with more than 512G memory were crashing. This code fixes that.

This change affects only SEV-SNP VMs.

The code was tested by successfully booting a 512G SEV-SNP VM.

Signed-off-by: Mikolaj Lisik <lisik@google.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
2023-06-02 23:59:20 +00:00
Ard Biesheuvel
8fbf857a0b OvmfPkg/RiscVVirt: Remove unimplemented NxForStack configuration
The RISC-V version of the DXE IPL does not implement setting the stack
NX, so before switching to an implementation that will ASSERT() on the
missing support, drop the PCD setting that enables it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-06-02 16:38:32 +00:00
Marcin Juszkiewicz
4354c22f38 ArmPkg: add SMC defines for SiP service calls
They are useful for those platforms where SMC SiP calls exist.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-06-02 11:21:26 +00:00
Ard Biesheuvel
0364ccfead ArmPkg: Enable AuditMode for Uncrustify CI checks
Uncrustify checks are too rigid, making them counter-productive:

- it leads to code that is arguably harder to parse visually (e.g.,
  the changes to ArmPkg/Include/Chipset/AArch64Mmu.h in commit
  429309e0c6)
- it forces indentation-only changes to code in the vicinity of actual
  changes, making the code history more bloated than necessary (see
  commit 7f198321ee for an example)
- finding out from the web UI what exactly Uncrustify objected to is not
  straight-forward.

So let's enable AuditMode for ArmPkg, so that interested parties can see
the uncrustify recommendations if desired, but without preventing the
changes from being merged. This leaves it at the discretion of the
ArmPkg maintainers to decide which level of conformance is required.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-06-02 10:02:03 +00:00
Gerd Hoffmann
a8acc12dfd ShellPkgDisconnect: zero-initialize handles
In case ShellConvertStringToUint64() fails the Handles are left
uninitialized.  That can for example happen for Handle2 and Handle3 in
case only one parameter was specified on the command line. Which can
trigger the ASSERT() in line 185.

Reproducer: boot ovmf to efi shell in qemu, using q35 machine type, then
try disconnect the sata controller in efi shell.

Fix that by explicitly setting them to NULL in that case.  While being
at it also simplify the logic and avoid pointlessly calling
ShellConvertStringToUint64() in case ParamN is NULL.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-06-02 08:34:00 +00:00
Thejaswani Putta
78262899d2 ShellPkg: Add a condition to print accurate type0 Bios Size in smbiosview.
As per the SMBIOS spec, in smbios type0 table, if the Bios size is
greater than 16MB, extended bios size is used to update size information
and bios size is set to 0xff. when this data is printed by smbiosview,
both bios size and extended bios size is printed if the smbios version
is beyond 3.1, which is incorrect as Bios size is set to 0xff when
rom size is more than 16MB.

To fix this bug, added a condition to print bios size only when it is
not set to 0xff or if the smbios version is older than 3.1.

Signed-off-by: Thejaswani Putta <tputta@nvidia.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
2023-06-02 07:36:02 +00:00
Pedro Falcato
41abf00bf9 OvmfPkg: Remove SataControllerDxe
Now that OvmfPkg/SataControllerDxe and its MdeModulePkg counterpart have
been unified, and no in-tree uses of the OVMF variant remain, let's
delete it.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
77fee3a9d8 OvmfPkg/Xen: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the OvmfXen platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
07c7e68360 OvmfPkg/AmdSev: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the AmdSev platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
069d403587 OvmfPkg/IntelTdx: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the IntelTdx platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 18:08:33 +00:00
Pedro Falcato
b26359c176 OvmfPkg/CloudHv: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the CloudHv platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
d85b84e201 OvmfPkg/Bhyve: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the Bhyve platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Peter Grehan <grehan@freebsd.org>
Acked-by: Corvin Köhne <corvink@FreeBSD.org>
2023-06-01 18:08:33 +00:00
Pedro Falcato
bc59ede170 OvmfPkg/Microvm: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for the Microvm platform.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
f5137e1a54 OvmfPkg: Replace the OVMF-specific SataControllerDxe
Replace the OVMF-specific SataControllerDxe (to be later removed) with
the generic, MdeModulePkg one, for OvmfPkg{Ia32, X64, Ia32X64} platforms.

Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 18:08:33 +00:00
Pedro Falcato
2bc46e67b6 MdeModulePkg/SataControllerDxe: Fix up ASSERTS (Private != NULL)
ASSERT (Private != NULL) (where Private = CR(...)) is ineffective as
CR(Ptr, Type, Member, Sig) either returns Ptr - offsetof(Type, Member),
or ASSERTS on the signature, so it's unlikely to ever return NULL (must
be passed a pointer = member's offset, or in this case, 0x4).

ASSERT on This != NULL instead.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
82b81c6464 MdeModulePkg/SataControllerDxe: Remove useless null check
ASSERT (Private != NULL) already covers this check.
See commit 81310a6.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
897a2b447e MdeModulePkg/SataControllerDxe: Log expected errors at DEBUG_INFO level
When a UEFI_DRIVER attempts to open a protocol interface with BY_DRIVER
attribute that it already has open with BY_DRIVER attribute,
OpenProtocol() returns EFI_ALREADY_STARTED. This is not an error. The
UEFI-2.7 spec currently says,

> EFI_ALREADY_STARTED -- Attributes is BY_DRIVER and there is an item on
>                        the open list with an attribute of BY_DRIVER
>                        whose agent handle is the same as AgentHandle.

Downgrade the log mask for this one condition to DEBUG_INFO, in
SataControllerStart(). This will match the log mask of the other two
informative messages in this function.

(ported from commit 5dfba97)

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-06-01 18:08:33 +00:00
Pedro Falcato
5e8958472c MdeModulePkg/SataControllerDxe: Clean up error handling in Start()
Clean up error handling using cascading labels + goto.

(port of commit 379b179 + bcab714)

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-06-01 18:08:33 +00:00
Sami Mujawar
ded1d5414b ArmPkg: Fix ArmGicAcknowledgeInterrupt () for GICv3
The ArmGicAcknowledgeInterrupt () returns the value returned by the
Interrupt Acknowledge Register and the InterruptID separately in an out
parameter.

The function documents the following: 'InterruptId is returned
separately from the register value because in the GICv2 the register
value contains the CpuId and InterruptId while in the GICv3 the register
value is only the InterruptId.'

This function skips setting the InterruptId in the out parameter for
GICv3. Although the return value from the function is the InterruptId
for GICv3, this breaks the function usage model as the caller expects
the InterruptId in the out parameter for the function.  e.g. The caller
may end up using the InterruptID which could potentially be an
uninitialised variable value.

Therefore, set the InterruptID in the function out parameter for GICv3
as well.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 15:52:01 +00:00
Sami Mujawar
8bcddbcce2 ArmPkg: Adjust variable type and cast for RegShift & RegOffset
According to the GIC architecture version 3 and 4 specification, the
maximum number of INTID bits supported in the CPU interface is 24.

Considering this the RegShift variable is not required to be more than 8
bits. Therefore, make the RegShift variable type to UINT8.  Also add
necessary typecasts when calculating the RegOffset and RegShift values.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
8da2b97392 ArmPkg: Prevent SgiId from setting RES0 bits of GICD_SGIR
GICD_SGIR is a 32-bit register, of which INTID is bits [3:0] and Bits
[14:4] is RES0. Since SgiId parameter in the function ArmGicSendSgiTo ()
is UINT8, mask unused bits of SgiId before writing to the GICD_SGIR
register to prevent accidental setting of the RES0 bits.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 15:52:01 +00:00
Sami Mujawar
cfb4a10d76 ArmPkg: Remove unused function declarations
The IrqInterruptHandler () and ExitBootServicesEvent () function
declarations were unused. Therefore, remove these declarations.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
08a08129ae ArmPkg: Typecast IntID to UINT32 in ArmGicV2EndOfInterrupt
The EIOR register of the Gic CPU interface is a 32 bit register.
However, the HARDWARE_INTERRUPT_SOURCE used to represent the interrupt
source (Interrupt ID) is typedefed as UINTN, see
EmbeddedPkg\Include\Protocol\HardwareInterrupt.h

Therfore, typecast the interrupt ID (Source) value to UINT32 before
setting the EOIR register. Also, add an assert to check that the value
does not exceed 32 bits.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
7f198321ee ArmPkg: Make variables used for GicInterrupt UINTN
Although the maximum interrupt ID on GicV2 is 10bit and for GicV3/4 is
24bit, and that the IAR and EOIR registers of the Gic CPU interface are
32 bit; the typedef HARDWARE_INTERRUPT_SOURCE is defined as UINTN in
EmbeddedPkg\Include\Protocol\HardwareInterrupt.h

Therefore, use UINTN for Gic Interrupt variables and use appropriate
typecasts wherever needed.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
937fbe4878 ArmPkg: Fix return type for ArmGicGetInterfaceIdentification
The CPU Interface Identification Register (GICC_IIDR) is a 32-bit
register. Since ArmGicGetInterfaceIdentification () returns the value
read from the GICC_IIDR register, update the return type for this
function to UINT32.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
ed132ef8ae ArmPkg: Fix Non-Boolean comparison in ArmGicEnableDistributor
According to edk2 coding standard specification, Non-Boolean comparisons
must use a compare operator (==, !=, >, < >=, <=).  See Section 5.7.2.1
at https://edk2-docs.gitbook.io/
edk-ii-c-coding-standards-specification/5_source_files/ 57_c_programming

Therefore, fix the comparison in ArmGicEnableDistributor()

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
ea522a12b3 ArmPkg: Fix ArmGicSendSgiTo() parameters
The Software Generated Interrupt Register (GICD_SGIR) is a 32 bit
register with the following bit assignment:
  TargetListFilter, bits [25:24]
  CPUTargetList, bits [23:16]
  NSATT, bit [15]
  SGIINTID, bits [3:0]

Therefore, modify the TargetListFilter, CPUTargetList, SGI Interrupt ID
parameters of the ArmGicSendSgiTo () to use UINT8 instead of INTN.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Sami Mujawar
a44fef7de3 ArmPkg: Fix data type used for GicInterruptInterfaceBase
The data type used by variables representing the
GicInterruptInterfaceBase has been inconsistently used in the ArmGic
driver and the library.  The PCD defined for the GIC Interrupt interface
base address is UINT64. However, the data types for the variables used
is UINTN, INTN, and at some places UINT32.

Therefore, update the data types to use UINTN and add necessary
typecasts when reading values from the PCD. This should then be
consistent across AArch32 and AArch64 builds.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 15:52:01 +00:00
Sami Mujawar
4ec9a6f6cd ArmPkg: Fix data type used for GicDistributorBase
The data type used by variables representing the GicDistributorBase has
been inconsistently used in the ArmGic driver and the library.  The PCD
defined for the GIC Distributor base address is UINT64.  However, the
data types for the variables used is UINTN, INTN, and at some places
UINT32.

Therefore, update the data types to use UINTN and add necessary
typecasts when reading values from the PCD. This should then be
consistent across AArch32 and AArch64 builds.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Neil Jones
b38068f9f6 ArmPkg: Fix GicV2 BaseAddress types
The GIC v2 base addresses can be 64bit, don't limit to 32 on 64bit
machines.

Signed-off-by: Neil Jones <neil.jones@blaize.com>
Reviewed-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2023-06-01 15:52:01 +00:00
Gerd Hoffmann
15f83fa364 ArmVirt/PlatformBootManagerLib: set up virtio serial as console
In case a virtio serial device is found in the system register the first
console port as EFI console, by updating ConIn, ConOut and ErrOut.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 12:48:45 +00:00
Gerd Hoffmann
aaf546879a ArmVirt/PlatformBootManagerLib: factor out IsVirtioPci()
IsVirtioPciRng() becomes just a thin wrapper for IsVirtioPci().
This allows to add similar thin wrappers for other virtio
devices in the future.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 12:48:45 +00:00
Gerd Hoffmann
a196b04926 ArmVirt/PlatformBootManagerLib: factor out IsVirtio()
IsVirtioRng() becomes just a thin wrapper for IsVirtio().
This allows to add similar thin wrappers for other virtio
devices in the future.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 12:48:45 +00:00
Gerd Hoffmann
6925150feb ArmVirt: add VirtioSerialDxe to ArmVirtQemu builds
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-06-01 12:48:45 +00:00
Gerd Hoffmann
1df6658bcb BaseTools: remove duplicate includes: IndustryStandard/*.h
Use the MdePkg versions instead of maintaining a copy in BaseTools.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
6101bd125a BaseTools: remove duplicate includes: IndustryStandard/PeImage.h
Use the MdePkg version instead of maintaining a copy in BaseTools.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
c15941a643 BaseTools: switch from EFI_IMAGE_MACHINE_* to IMAGE_FILE_MACHINE_*
Use the newer versions of the machine #defines.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
fdc6288f81 BaseTools: drop IMAGE_FILE_MACHINE_ARM hacks
The #define for IMAGE_FILE_MACHINE_ARM is not present in MdePkg,
this looks like a relic not used any more.  Remove.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
ff52068d92 MdePkg/PeImage.h: add bits from BaseTools version
The BaseTools and MdePkg versions of PeImage.h diverged over time,
add some missing bits to the MdePkg header file in preparation for
removing the BaseTools version.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
26d6ef38e7 BaseTools: remove duplicate includes: IndustryStandard/Acpi*.h
Use the MdePkg version instead of maintaining a copy in BaseTools.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
69ac88cabd BaseTools: remove duplicate includes: <arch>/ProcessorBind.h
Use the MdePkg version instead of maintaining a copy in BaseTools.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
6a07d9cacf BaseTools: remove WinNtInclude.h
Appears to be a relic for ancient windows / compiler versions,
windows builds in CI work just fine without it.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
140e4422b1 MdePkg: don't set visibility to hidden
Not needed any more on modern toolchains, they are better
in not creating a GOT without this trick.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
bd035a066f BaseTools: add -fdirect-access-external-data to clang pie builds
Tell clang to not use external (via got) references for data access.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
7ffc433c2e BaseTools: make sure the got is empty
Add ASSERT()s that .got and .got.plt sections are empty
to linker scripts for gcc and clang.

Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-06-01 10:53:35 +00:00
Gerd Hoffmann
c1e8537690 OvmfPkg/PlatformInitLib: limit phys-bits to 46.
Older linux kernels have problems with phys-bits larger than 46,
ubuntu 18.04 (kernel 4.15) has been reported to be affected.

Reduce phys-bits limit from 47 to 46.

Reported-by: Fiona Ebner <f.ebner@proxmox.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 09:00:00 +00:00
Gerd Hoffmann
578a715cfc OvmfPkg/QemuFlashFvbServicesRuntimeDxe: refine flash detection
Flash can be write-protected in qemu (which is usually the case for
code).  In case the variable store flash block is configured read-only
ovmf wouldn't be able to store EFI variables there, so not setting up
fvb in that case (and fallhack to emulation) is the better option.
It'll avoid problems later due to flash writes failing.

The patch tries to write back the original value read earlier, so flash
content doesn't change in case the write succeeds.  But the status we
read back after the attempt to write will tell us whenever flash is
writable or not.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 09:00:00 +00:00
Gerd Hoffmann
4e5a804222 OvmfPkg/VirtioSerialDxe: use TPL_NOTIFY
Apparently TPL_CALLBACK is too low, code runs into an ASSERT
complaining the new TPL is lower than the old TPL.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2023-06-01 09:00:00 +00:00
Zhihao Li
9f12d6b6ec UefiCpuPkg/PiSmmCpuDxeSmm:add Ap Rendezvous check in PerformRemainingTasks.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4424

In Relaxed-AP Sync Mode, BSP will not wait for all Aps arrive. However,
PerformRemainingTasks() needs to wait all Aps arrive before calling
SetMemMapAttributes and ConfigSmmCodeAccessCheck() when mSmmReadyToLock
is true. In SetMemMapAttributes(), SmmSetMemoryAttributesEx() will call
FlushTlbForAll() that need to start up the aps. So it need to let all
aps arrive. Same as SetMemMapAttributes(), ConfigSmmCodeAccessCheck()
also will start up the aps.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Zhihao Li <zhihao.li@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 09:23:01 +00:00
Zhihao Li
5bb7bfbe81 UefiCpuPkg/CpuService.c:check cpu sync mode in SmmCpuRendezvous()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4431

In Ap relaxed mode, some SMI handlers should call SmmWaitForApArrival() to let all ap arrive in SmmCpuRendezvous(). But in traditional mode, these SMI handlers don't need to call SmmWaitForApArrival() again. So it need to be check cpu sync mode before calling SmmWaitForApArrival().

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Zhihao Li <zhihao.li@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 09:23:01 +00:00
Abner Chang
d15d2667d5 RedfishPkg: Use DEBUG_MANAGEABILITY
Use debug print level DEBUG_MANAGEABILITY in
RedfishPkg.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
2023-05-31 08:42:58 +00:00
Jiaxin Wu
d8e5d35ede UefiPayloadPkg: Add CpuPageTableLib required by SecCore & CpuMpPei
Add CpuPageTableLib required by SecCore & CpuMpPei in UefiPayloadPkg.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
2023-05-31 04:48:36 +00:00
Jiaxin Wu
55bee4a9de OvmfPkg: Add CpuPageTableLib required by SecCore & CpuMpPei
Add CpuPageTableLib required by SecCore & CpuMpPei in OvmfPkg.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 04:48:36 +00:00
Jiaxin Wu
0d382976c2 MdeModulePkg/DxeIpl: Align Page table Level setting with previous level.
System paging 5 level enabled or not can be checked via CR4.LA57, system
preferred Page table Level (PcdUse5LevelPageTable) must align with previous
level for 64bit long mode.

This patch is to do the wise check:
If cpu has already run in 64bit long mode PEI, Page table Level in DXE
must align with previous level.
If cpu runs in 32bit protected mode PEI, Page table Level in DXE is decided
by PCD and feature capability.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 04:48:36 +00:00
Jiaxin Wu
56ad09ba75 UefiCpuPkg/CpuMpPei: Conditionally enable PAE paging in 32bit mode
Some security features depend on the page table enabling. So, This
patch is to enable paging if it is not enabled (32bit mode)"

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 04:48:36 +00:00
Jiaxin Wu
b4d3b77973 UefiCpuPkg/SecCore: Migrate page table to permanent memory
Background:
For arch X64, system will enable the page table in SPI to cover 0-512G
range via CR4.PAE & MSR.LME & CR0.PG & CR3 setting (see ResetVector code).
Existing code doesn't cover the higher address access above 512G before
memory-discovered callback. That will be potential problem if system
access the higher address after the transition from temporary RAM to
permanent MEM RAM.

Solution:
This patch is to migrate page table to permanent memory to map entire physical
address space if CR0.PG is set during temporary RAM Done.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-31 04:48:36 +00:00
Zhiguang Liu
0f9283429d UefiCpuPkg/ResetVector: Support 5 level page table in ResetVector
Add a macro USE_5_LEVEL_PAGE_TABLE to determine whether to create
5 level page table.
If macro USE_5_LEVEL_PAGE_TABLE is defined, PML5Table is created
at (4G-12K), while PML4Table is at (4G-16K). In runtime check, if
5level paging is supported, use PML5Table, otherwise, use PML4Table.
If macro USE_5_LEVEL_PAGE_TABLE is not defined, to save space, 5level
paging is not created, and 4level paging is at (4G-12K) and be used.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-05-30 05:55:44 +00:00
Liu, Zhiguang
d064a6f790 UefiCpuPkg/ResetVector: Modify Page Table in ResetVector
In ResetVector, if create page table, its highest address is fixed
because after page table, code layout is fixed(4K for normal code,
and another 4K only contains reset vector code).
Today's implementation organizes the page table as following if 1G
page table is used:
  4G-16K: PML4 page (PML4[0] points to 4G-12K)
  4G-12K: PDP page
  CR3 is set to 4G-16K
When 2M page table is used, the layout is as following:
  4G-32K: PML4 page (PML4[0] points to 4G-28K)
  4G-28K: PDP page (PDP entries point to PD pages)
  4G-24K: PD page mapping 0-1G
  4G-20K: PD page mapping 1-2G
  4G-16K: PD page mapping 2-3G
  4G-12K: PD page mapping 3-4G
  CR3 is set to 4G-32K
CR3 doesn't point to a fixed location which is a bit hard to debug at
runtime.

The new page table layout will always put PML4 in highest address
When 1G page table is used, the layout is as following:
  4G-16K: PDP page
  4G-12K: PML4 page (PML4[0] points to 4G-16K)
When 2M page table is used, the layout is as following:
  4G-32K: PD page mapping 0-1G
  4G-28K: PD page mapping 1-2G
  4G-24K: PD page mapping 2-3G
  4G-20K: PD page mapping 3-4G
  4G-16K: PDP page (PDP entries point to PD pages)
  4G-12K: PML4 page (PML4[0] points to 4G-16K)
CR3 is always set to 4G-12K
So, this patch can improve debuggability by make sure the init
CR3 pointing to a fixed address(4G-12K).

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-05-30 05:55:44 +00:00
Liu, Zhiguang
0fba57da65 UefiCpuPkg/ResetVector: Combine PageTables1G.asm and PageTables2M.asm
Combine PageTables1G.asm and PageTables2M.asm to reuse code.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-05-30 05:55:44 +00:00
Liu, Zhiguang
c19e3f578f UefiCpuPkg/ResetVector: Simplify page table creation in ResetVector
Currently, page table creation has many hard-code values about the
offset to the start of page table. To simplify it, add Labels such
as Pml4, Pdp and Pd, so that we can remove many hard-code values

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-05-30 05:55:44 +00:00
Liu, Zhiguang
cc62b85a4a UefiCpuPkg/ResetVector: Rename macros about page table.
This patch only renames macro, with no code logic impacted.
Two purpose to rename macro:
1. Align some macro name in PageTables1G.asm and PageTables2M.asm, so
that these two files can be easily combined later.
2. Some Macro names such as PDP are not accurate, since 4 level page
entry also uses this macro. PAGE_NLE (no leaf entry) is better

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2023-05-30 05:55:44 +00:00
Ranbir Singh
48c53994e6 IntelFsp2Pkg/Library/BaseFspCommonLib: Fix OVERRUN Coverity issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4200

FspData->PerfIdx is getting increased for every call unconditionally
in the function SetFspMeasurePoint and hence memory access can happen
for out of bound FspData->PerfData[] array entries also.

Example -
   FspData->PerfData is an array of 32 UINT64 entries. Assume a call
   is made to SetFspMeasurePoint function when the FspData->PerfIdx
   last value is 31. It gets incremented to 32 at line 400.
   Any subsequent call to SetFspMeasurePoint functions leads to
   FspData->PerfData[32] getting accessed which is out of the PerfData
   array as well as the FSP_GLOBAL_DATA structure boundary.

Hence keep array access and index increment inside if block only and
return invalid performance timestamp when PerfIdx is invalid.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com>
Acked-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2023-05-30 05:13:36 +00:00
Tan, Ming
69e10f0211 IntelFsp2WrapperPkg: Fix ASSERT when FSP-S/M use FFS3.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4458

Original code call PeiServicesInstallFvInfoPpi() with NULL for the
FvFormat parameter, then PeiServicesInstallFvInfoPpi() will assume it
use FFS2, then ASSERT if FSP-S/M use FFS3.
Now set the FvFormat to the info got from FvHeader.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Signed-off-by: Ming Tan <ming.tan@intel.com>
Reviewed-by: S Ashraf Ali <ashraf.ali.s@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2023-05-30 03:56:58 +00:00
Nickle Wang
9d9761af50 RedfishPkg/RedfishPlatformConfigDxe: fix value type issue.
Fix incorrect value type issue for checked-box op-code.
When the variable for checked-box is defined as UINT8 in
varstore structure, IFR compiler assign its value type to
EFI_IFR_TYPE_NUM_SIZE_8 instead of EFI_IFR_TYPE_BOOLEAN.
However, the value type for checked-box is boolean value.
Redfish service may return error because of incorrect value
type passed to BIOS attribute registry.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
2023-05-30 03:12:47 +00:00
Ard Biesheuvel
1034d223f8 ArmPkg/CpuDxe: Perform preliminary NX remap of free memory
The DXE core implementation of PcdDxeNxMemoryProtectionPolicy already
contains an assertion that EfiConventionalMemory and EfiBootServicesData
are subjected to the same policy when it comes to the use of NX
permissions. The reason for this is that we may otherwise end up with
unbounded recursion in the page table code, given that allocating a page
table would then involve a permission attribute change, and this could
result in the need for a block entry to be split, which would trigger
the allocation of a page table recursively.

For the same reason, a shortcut exists in ApplyMemoryProtectionPolicy()
where, instead of setting the memory attributes unconditionally, we
compare the NX policies and avoid touching the page tables if they are
the same for the old and the new memory types. Without this shortcut, we
may end up in a situation where, as the CPU arch protocol DXE driver is
ramping up, the same unbounded recursion is triggered, due to the fact
that the NX policy for EfiConventionalMemory has not been applied yet.

To break this cycle, let's remap all EfiConventionalMemory regions
according to the NX policy for EfiBootServicesData before exposing the
CPU arch protocol to the DXE core and other drivers. This ensures that
creating EfiBootServicesData allocations does not result in memory
attribute changes, and therefore no recursion.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-05-29 16:51:01 +00:00
Ard Biesheuvel
03663c4319 ArmVirtPkg/ArmVirtQemu: Use read-only memory region type for code flash
Map the code flash with read-only attributes so we can execute from it
even under a memory protection regime that enables WXN, making all
writable memory regions non-executable by default.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2023-05-29 16:51:01 +00:00
Sami Mujawar
8e934ab956 ArmVirtPkg: Dispatch variable service if variable emulation is enabled
The VariableRuntimeDxe links with NvVarStoreFormattedLib which is
required to establish the dependency on OvmfPkg\VirtNorFlashDxe.
The VirtNorFlashDxe installs the gEdkiiNvVarStoreFormattedGuid to
indicate it has finished initialising the flash variable storage
and that the variable service can be dispatched.

However, the kvmtool guest firmware dynamically detects if CFI
flash is absent and sets PcdEmuVariableNvModeEnable to TRUE
indicating emulated runtime variable must be used. Therefore,
in this scenario install the gEdkiiNvVarStoreFormattedGuid so
that the variable service can be dispatched.

Also link the NorFlashKvmtoolLib as a NULL library so that
it can discover if the CFI flash is absent and setup the PCD
PcdEmuVariableNvModeEnable. This is required in case the
NorFlashDxe is not yet dispatched.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 15:14:00 +00:00
Sami Mujawar
84d0b21d18 ArmVirtPkg: Fallback to variable emulation if no CFI is found
The kvmtool option '--flash <flash filename>' is used to launch
a guests VM with a CFI flash device that maps the flash file
specified at the command line.
However, kvmtool allows guest VMs to be launched without a CFI
flash device. In such scenarios the firmware can utilize the
emulated variable storage for UEFI variables. To support this
the PCD gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
must be set to TRUE.

Therefore, update the NorFlashKvmtoolLib to fallback to variable
emulation if a CFI device is not detected. Also improve the error
logging.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 15:14:00 +00:00
Sami Mujawar
0e5aecfed1 ArmVirtPkg: Define variables for emulating runtime variables
Kvmtool allows guest VMs to be launched with or without a
CFI flash device.

When the kvmtool option '--flash <flash filename>' is used to
launch a guest VM a CFI flash device maps the flash file that
was specified at the command line. The NorFlash driver uses
this flash as the variable storage backend.

However, when the above option is not specified, a CFI flash
device is not present. In such cases, the firmware can fallback
to use emulated runtime variables (which uses the VMs DRAM as
the storage backend).

Therefore, define the PCD PcdEmuVariableNvModeEnable required
to enable the emulated runtime variable support, but do not
enable it by default.

The firmware is expected to dynamically discover if the CFI
flash is present and subsequently enable NorFlash or emulate
the runtime variables.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 15:14:00 +00:00
Sami Mujawar
86cc274941 ArmPkg: Configure PcdEmuVariableNvModeEnable as a dynamic PCD
The PCD gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
indicates if a variable driver will emulate the variable NV mode.
This PCD is defined as [PcdsFixedAtBuild, PcdsPatchableInModule,
PcdsDynamic, PcdsDynamicEx].

Some firmware builds may define this PCD as a dynamic PCD and
initialise the value at runtime. Therefore, move the PCD declaration
from the [FixedPcd] section to the [Pcd] section in the platform
boot manager library file PlatformBootManagerLib.inf. Without this
change the build would not succeed.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 15:14:00 +00:00
Sami Mujawar
0b4263a2c2 ArmVirtPkg/PrePi: Allocate separate stack for Dxe phase
The patch "f07a9df9af60 ArmVirtPkg: Enable stack guard"
enabled stack overflow detection for ArmVirtPkg. Following
this patch, running UEFI shell command 'dmpstore' resulted
in a crash indicating a stack overflow. Invoking 'dmpstore'
results in recursive calls to CascadeProcessVariables ()
which apparently consumes the available stack space and
overflows.

Normally, SEC and PEI run off the initial stack, and the
DxeIpl PEIM is in charge of launching the DxeCore with a
full-sized stack and remapping it non-executable as well.

PrePi platforms take some shortcuts and the DXE and BDS
run off the initial stack which is relatively small. It
is therefore desirable to allocate 128 KiB worth of boot
services data memory as the stack for the Dxe phase.

The PrePiMain () in ArmVirtPkg/PrePi/PrePi.c invokes the
LoadDxeCoreFromFv () to load the Dxe core and transfers
control. The second parameter to LoadDxeCoreFromFv () is
the stack size, which is currently set to 0.
LoadDxeCoreFromFv () is implemented in PrePiLib and if the
stack size is 0, it continues to use the initial stack.
However, if a stack size is specified in the call to
LoadDxeCoreFromFv (), memory is allocated for a new stack
and the stack is switched to use the newly allocated stack
for the Dxe phase.

Therefore, specify 128 KiB as the stack size in the call to
LoadDxeCoreFromFv () so that a separate stack is allocated
and used for the Dxe phase.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 15:14:00 +00:00
Oliver Smith-Denny
647cd40cf6 ArmPkg/CpuDxe AARCH64: Report Memory Protection Attributes To GCD
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4463

When the AARCH64 CpuDxe attempts to SyncCacheConfig() with the GCD, it
collects the page attributes as:

  EntryAttribute = Entry & TT_ATTR_INDX_MASK

However, TT_ATTR_INDX_MASK only masks the cacheability attributes and
drops the memory protections attributes. Importantly, it also drops the
TT_AF (access flag) which is now wired up in EDK2 to represent
EFI_MEMORY_RP, so by default all SystemMem pages will report as
EFI_MEMORY_RP to the GCD. The GCD currently drops that silently, because
the Capabilities field in the GCD does not support EFI_MEMORY_RP by
default.

However, some ranges may support EFI_MEMORY_RP and incorrectly mark
those ranges as read protected. In conjunction with another change on
the mailing list (see: https://edk2.groups.io/g/devel/topic/98505340),
this causes an access flag fault incorrectly. See the linked BZ below
for full details.

This patch exposes all memory protections attributes to the GCD layer so
it can correctly set pages as EFI_MEMORY[RP|XP|RO] when it initially
syncs.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Taylor Beebe <t@taylorbeebe.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
2023-05-29 15:14:00 +00:00
Gerd Hoffmann
04c5b3023e OvmfPkg/MicrovmX64: enable 1G pages
Reduces the memory footprint and speeds up booting.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 11:19:51 +00:00
Gerd Hoffmann
b63e17d746 OvmfPkg/OvmfPkgIa32X64: enable 1G pages
Reduces the memory footprint and speeds up booting.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 11:19:51 +00:00
Gerd Hoffmann
d4d24001f7 OvmfPkg/PlatformInitLib: check PcdUse1GPageTable
If PcdUse1GPageTable is not enabled restrict the physical address space
used to 1TB, to limit the amount of memory needed for identity mapping
page tables.

The same already happens in case the processor has no support for
gigabyte pages.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 11:19:51 +00:00
Gerd Hoffmann
27727338b2 OvmfPkg/PciHotPlugInitDxe: Do not reserve IO ports by default.
Flip the default for IO address space reservations for PCI(e) bridges
and root ports with hotplug support from TRUE to FALSE.

PCI(e) bridges will still get IO address space assigned in case:

  (a) Downstream devices actually need IO address space, or
  (b) Explicit configuration, using "qemu -device
      pcie-root-port,io-reserve=<size>".

In case IO address space is exhausted edk2 will stop assigning resources
to PCI(e) bridges.  This is not limited to IO resources, the affected
bridges will not get any memory resources assigned either.

This patch solves this issue by not handing out the scarce IO address
space, which is not needed in most cases anyway.  Result is a more
consistent PCI configuration in virtual machine configurations with many
PCie root ports.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 11:19:51 +00:00
Gerd Hoffmann
9181782c30 OvmfPkg/Bhyve/PlatformPei: drop S3Verification()
Drop S3Verification () which is dead code.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2023-05-29 11:19:51 +00:00
Gerd Hoffmann
098c557023 OvmfPkg/PlatformPei: drop S3Verification()
Not needed any more, SMM + 64-bit PEI + S3 suspend works now.

Fixed by commits:
 - 8bd2028f9a ("MdeModulePkg: Supporting S3 in 64bit PEI")
 - 6acf72901a ("UefiCpuPkg: Supporting S3 in 64bit PEI")
See also https://bugzilla.tianocore.org/show_bug.cgi?id=4195

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-29 11:19:51 +00:00
Michael D Kinney
c0bce66068 OvmfPkg/VirtIoSerialDxe: Update for VS2015x86 compatibility
Move initialization of local variable structure from declaration
to statements to fix VS2015x86 build break.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
2023-05-29 06:40:12 +00:00
Giri Mudusuru
e1f5c6249a MdeModulePkg SdMmcPciHcDxe: SD/MMC capability debug print is incorrect
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4394

Fix DumpCapabilityReg() debug log to print 64 bit capability instead of
32 bit pointer

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Andrew Fish <afish@apple.com>
Signed-off-by: Giri Mudusuru <girim@apple.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2023-05-29 04:37:03 +00:00
Nickle Wang
5258c4186f RedfishPkg/RedfishPlatformConfigDxe: Fix string assert issue
When calling SetValue() with string type input, there is
assertion of providing zero string ID to HII string function.
Fix this issue by creating string ID for input string buffer.
Fix Unicode and Ascii code convert issue together.
Add text op-code support

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
2023-05-29 03:28:18 +00:00
Gua Guo
ba2300f97b PcAtChipsetPkg: RTC Runtime unable to get correct IO port by PCD
RTC runtime is unable to get dynamic PCD value after booting to
OS using runtime services.

Resolution: Cache the dynamic PCD value in RTC driver entry point

Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2023-05-29 02:34:35 +00:00
Gua Guo
0f8323b44b BaseTools: toolsetup.bat always execute PYTHON_HOME
Ideally behavior is like below order that can support one local build
machine, clone multiple Edk2, some of edk2 repo use old tag and
some of edk2 repo use new tag, they can both support on one machine.

1. if defined PYTHON_COMMAND only
   - use PYTHON_COMMAND = user assigned
2. if not defined PYTHON_COMMAND, auto detect py -3
   - use PYTHON_COMMAND = py -3
3. if defined PYTHON_COMMAND and PYTHON_HOME, use PYTHON_COMMAND
   - use PYTHON_COMMAND = user assigned
4. if defined PYTHON_HOME only,
   - use PYTHON_COMMAND = %PYTHON_HOME%/python.exe

SCRIPT_ERROR should return for paraent batch file to consume
for error handle.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
2023-05-29 01:34:28 +00:00
909 changed files with 266098 additions and 58857 deletions

View File

@@ -27,7 +27,7 @@ steps:
- task: UsePythonVersion@0
inputs:
versionSpec: '>=3.10.6'
versionSpec: '3.12'
architecture: 'x64'
- script: |

View File

@@ -8,5 +8,5 @@
##
variables:
default_python_version: ">=3.10.6"
default_linux_image: "ghcr.io/tianocore/containers/fedora-37-test:3b3eb8f"
default_python_version: "3.12"
default_linux_image: "ghcr.io/tianocore/containers/fedora-37-test:a0dd931"

31
.editorconfig Normal file
View File

@@ -0,0 +1,31 @@
# EditorConfig file: https://EditorConfig.org
root = true
[*]
charset = latin1
end_of_line = crlf
indent_style = space
indent_size = 2
insert_final_newline = true
trim_trailing_whitespace = true
[*.py]
charset = utf-8
indent_style = space
indent_size = 4
[*.sh]
end_of_line = lf
[.gitattributes]
end_of_line = lf
[.mailmap]
charset = utf-8
[Maintainers.txt]
charset = utf-8
[Makefile,GNUmakefile]
indent_style = tab

View File

@@ -1,29 +0,0 @@
## @file
# CodeQL configuration file for edk2.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
name: "CodeQL config"
# The following line disables the default queries. This is used because we want to enable on query at a time by
# explicitly specifying each query in a "queries" array as they are enabled.
#
# See the following for more information about adding custom queries:
# https://docs.github.com/en/code-security/code-scanning/automatically-scanning-your-code-for-vulnerabilities-and-errors/configuring-code-scanning#using-a-custom-configuration-file
#disable-default-queries: true
queries:
- name: EDK2 CodeQL Query List
uses: ./.github/codeql/edk2.qls
# We must specify a query for CodeQL to run. Until the first query is enabled, enable the security query suite but
# exclude all problem levels from impacting the results. After the first query is enabled, this filter can be relaxed
# to find the level of problems desired from the query.
query-filters:
- exclude:
problem.severity:
- warning
- recommendation

View File

@@ -1,24 +0,0 @@
---
- description: EDK2 (C++) queries
# Bring in all queries from the official cpp-queries suite so individual queries can be explicitly enabled.
- queries: '.'
from: codeql/cpp-queries
# Enable individual queries below.
- include:
id: cpp/conditionallyuninitializedvariable
- include:
id: cpp/infinite-loop-with-unsatisfiable-exit-condition
- include:
id: cpp/overflow-buffer
- include:
id: cpp/overrunning-write
- include:
id: cpp/overrunning-write-with-float
- include:
id: cpp/pointer-overflow-check
- include:
id: cpp/very-likely-overrunning-write

View File

@@ -1,118 +0,0 @@
# @file
# GitHub Workflow for CodeQL Analysis
#
# Copyright (c) Microsoft Corporation.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
name: "CodeQL"
on:
push:
branches:
- master
pull_request:
branches:
- master
paths-ignore:
- '**/*.bat'
- '**/*.md'
- '**/*.py'
- '**/*.rst'
- '**/*.sh'
- '**/*.txt'
schedule:
# https://crontab.guru/#20_23_*_*_4
- cron: '20 23 * * 4'
jobs:
analyze:
name: Analyze
runs-on: windows-2019
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: false
matrix:
include:
- Package: "ArmPkg"
ArchList: "IA32,X64"
- Package: "CryptoPkg"
ArchList: "IA32"
- Package: "CryptoPkg"
ArchList: "X64"
- Package: "DynamicTablesPkg"
ArchList: "IA32,X64"
- Package: "FatPkg"
ArchList: "IA32,X64"
- Package: "FmpDevicePkg"
ArchList: "IA32,X64"
- Package: "IntelFsp2Pkg"
ArchList: "IA32,X64"
- Package: "IntelFsp2WrapperPkg"
ArchList: "IA32,X64"
- Package: "MdeModulePkg"
ArchList: "IA32"
- Package: "MdeModulePkg"
ArchList: "X64"
- Package: "MdePkg"
ArchList: "IA32,X64"
- Package: "PcAtChipsetPkg"
ArchList: "IA32,X64"
- Package: "PrmPkg"
ArchList: "IA32,X64"
- Package: "SecurityPkg"
ArchList: "IA32,X64"
- Package: "ShellPkg"
ArchList: "IA32,X64"
- Package: "SourceLevelDebugPkg"
ArchList: "IA32,X64"
- Package: "StandaloneMmPkg"
ArchList: "IA32,X64"
- Package: "UefiCpuPkg"
ArchList: "IA32,X64"
- Package: "UnitTestFrameworkPkg"
ArchList: "IA32,X64"
steps:
- name: Checkout repository
uses: actions/checkout@v3
- name: Install Python
uses: actions/setup-python@v4
with:
python-version: '3.10.6'
cache: 'pip'
cache-dependency-path: 'pip-requirements.txt'
# Initializes the CodeQL tools for scanning.
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
with:
languages: 'cpp'
# CodeQL supports [ 'cpp', 'csharp', 'go', 'java', 'javascript', 'python', 'ruby' ]
# Learn more about CodeQL language support at https://codeql.github.com/docs/codeql-overview/supported-languages-and-frameworks/
config-file: ./.github/codeql/codeql-config.yml
# Note: Add new queries to codeql-config.yml file as they are enabled.
- name: Install/Upgrade pip Modules
run: pip install -r pip-requirements.txt --upgrade
- name: Setup
run: stuart_setup -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Update
run: stuart_update -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Build Tools From Source
run: python BaseTools/Edk2ToolsBuild.py -t VS2019
- name: CI Build
run: stuart_ci_build -c .pytool/CISettings.py -p ${{ matrix.Package }} -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2

338
.github/workflows/codeql.yml vendored Normal file
View File

@@ -0,0 +1,338 @@
# This workflow runs CodeQL against the repository.
#
# Results are uploaded to GitHub Code Scanning.
#
# Due to a known issue with the CodeQL extractor when building the edk2
# codebase on Linux systems, only Windows agents are used for build with
# the VS toolchain.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
name: "CodeQL"
on:
push:
branches:
- master
pull_request:
branches:
- master
paths-ignore:
- '!**.c'
- '!**.h'
jobs:
analyze:
name: Analyze
runs-on: windows-2019
permissions:
actions: read
contents: read
security-events: write
strategy:
fail-fast: false
matrix:
include:
- Package: "ArmPkg"
ArchList: "IA32,X64"
- Package: "CryptoPkg"
ArchList: "IA32"
- Package: "CryptoPkg"
ArchList: "X64"
- Package: "DynamicTablesPkg"
ArchList: "IA32,X64"
- Package: "FatPkg"
ArchList: "IA32,X64"
- Package: "FmpDevicePkg"
ArchList: "IA32,X64"
- Package: "IntelFsp2Pkg"
ArchList: "IA32,X64"
- Package: "IntelFsp2WrapperPkg"
ArchList: "IA32,X64"
- Package: "MdeModulePkg"
ArchList: "IA32"
- Package: "MdeModulePkg"
ArchList: "X64"
- Package: "MdePkg"
ArchList: "IA32,X64"
- Package: "PcAtChipsetPkg"
ArchList: "IA32,X64"
- Package: "PrmPkg"
ArchList: "IA32,X64"
- Package: "SecurityPkg"
ArchList: "IA32,X64"
- Package: "ShellPkg"
ArchList: "IA32,X64"
- Package: "SourceLevelDebugPkg"
ArchList: "IA32,X64"
- Package: "StandaloneMmPkg"
ArchList: "IA32,X64"
- Package: "UefiCpuPkg"
ArchList: "IA32,X64"
- Package: "UnitTestFrameworkPkg"
ArchList: "IA32,X64"
steps:
- name: Checkout repository
uses: actions/checkout@v4
- name: Install Python
uses: actions/setup-python@v4
with:
python-version: '3.11'
cache: 'pip'
cache-dependency-path: 'pip-requirements.txt'
- name: Use Git Long Paths on Windows
if: runner.os == 'Windows'
shell: pwsh
run: |
git config --system core.longpaths true
- name: Install/Upgrade pip Modules
run: pip install -r pip-requirements.txt --upgrade requests
- name: Determine CI Settings File Supported Operations
id: get_ci_file_operations
shell: python
run: |
import importlib
import os
import sys
from pathlib import Path
from edk2toolext.invocables.edk2_ci_setup import CiSetupSettingsManager
from edk2toolext.invocables.edk2_setup import SetupSettingsManager
# Find the repo CI Settings file
ci_settings_file = list(Path(os.environ['GITHUB_WORKSPACE']).rglob('.pytool/CISettings.py'))
# Note: At this point, submodules have not been pulled, only one CI Settings file should exist
if len(ci_settings_file) != 1 or not ci_settings_file[0].is_file():
print("::error title=Workspace Error!::Failed to find CI Settings file!")
sys.exit(1)
ci_settings_file = ci_settings_file[0]
# Try Finding the Settings class in the file
module_name = 'ci_settings'
spec = importlib.util.spec_from_file_location(module_name, ci_settings_file)
module = importlib.util.module_from_spec(spec)
spec.loader.exec_module(module)
try:
settings = getattr(module, 'Settings')
except AttributeError:
print("::error title=Workspace Error!::Failed to find Settings class in CI Settings file!")
sys.exit(1)
# Determine Which Operations Are Supported by the Settings Class
ci_setup_supported = issubclass(settings, CiSetupSettingsManager)
setup_supported = issubclass(settings, SetupSettingsManager)
with open(os.environ['GITHUB_OUTPUT'], 'a') as fh:
print(f'ci_setup_supported={str(ci_setup_supported).lower()}', file=fh)
print(f'setup_supported={str(setup_supported).lower()}', file=fh)
- name: Setup
if: steps.get_ci_file_operations.outputs.setup_supported == 'true'
run: stuart_setup -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload Setup Log As An Artifact
uses: actions/upload-artifact@v3
if: (success() || failure()) && steps.get_ci_file_operations.outputs.setup_supported == 'true'
with:
name: ${{ matrix.Package }}-Logs
path: |
**/SETUPLOG.txt
retention-days: 7
if-no-files-found: ignore
- name: CI Setup
if: steps.get_ci_file_operations.outputs.ci_setup_supported == 'true'
run: stuart_ci_setup -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload CI Setup Log As An Artifact
uses: actions/upload-artifact@v3
if: (success() || failure()) && steps.get_ci_file_operations.outputs.ci_setup_supported == 'true'
with:
name: ${{ matrix.Package }}-Logs
path: |
**/CISETUP.txt
retention-days: 7
if-no-files-found: ignore
- name: Update
run: stuart_update -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload Update Log As An Artifact
uses: actions/upload-artifact@v3
if: success() || failure()
with:
name: ${{ matrix.Package }}-Logs
path: |
**/UPDATE_LOG.txt
retention-days: 7
if-no-files-found: ignore
- name: Build Tools From Source
run: python BaseTools/Edk2ToolsBuild.py -t VS2019
- name: Find CodeQL Plugin Directory
id: find_dir
shell: python
run: |
import os
import sys
from pathlib import Path
# Find the plugin directory that contains the CodeQL plugin
plugin_dir = list(Path(os.environ['GITHUB_WORKSPACE']).rglob('BaseTools/Plugin/CodeQL'))
# This should only be found once
if len(plugin_dir) == 1:
plugin_dir = str(plugin_dir[0])
with open(os.environ['GITHUB_OUTPUT'], 'a') as fh:
print(f'codeql_plugin_dir={plugin_dir}', file=fh)
else:
print("::error title=Workspace Error!::Failed to find CodeQL plugin directory!")
sys.exit(1)
- name: Get CodeQL CLI Cache Data
id: cache_key_gen
env:
CODEQL_PLUGIN_DIR: ${{ steps.find_dir.outputs.codeql_plugin_dir }}
shell: python
run: |
import os
import yaml
codeql_cli_ext_dep_name = 'codeqlcli_windows_ext_dep'
codeql_plugin_file = os.path.join(os.environ['CODEQL_PLUGIN_DIR'], codeql_cli_ext_dep_name + '.yaml')
with open (codeql_plugin_file) as pf:
codeql_cli_ext_dep = yaml.safe_load(pf)
cache_key_name = codeql_cli_ext_dep['name']
cache_key_version = codeql_cli_ext_dep['version']
cache_key = f'{cache_key_name}-{cache_key_version}'
codeql_plugin_cli_ext_dep_dir = os.path.join(os.environ['CODEQL_PLUGIN_DIR'], codeql_cli_ext_dep['name'].strip() + '_extdep')
with open(os.environ['GITHUB_OUTPUT'], 'a') as fh:
print(f'codeql_cli_cache_key={cache_key}', file=fh)
print(f'codeql_cli_ext_dep_dir={codeql_plugin_cli_ext_dep_dir}', file=fh)
- name: Attempt to Load CodeQL CLI From Cache
id: codeqlcli_cache
uses: actions/cache@v3
with:
path: ${{ steps.cache_key_gen.outputs.codeql_cli_ext_dep_dir }}
key: ${{ steps.cache_key_gen.outputs.codeql_cli_cache_key }}
- name: Download CodeQL CLI
if: steps.codeqlcli_cache.outputs.cache-hit != 'true'
run: stuart_update -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019 --codeql
- name: Remove CI Plugins Irrelevant to CodeQL
shell: python
env:
CODEQL_PLUGIN_DIR: ${{ steps.find_dir.outputs.codeql_plugin_dir }}
run: |
import os
import shutil
from pathlib import Path
# Only these two plugins are needed for CodeQL
plugins_to_keep = ['CompilerPlugin']
plugin_dir = Path('.pytool/Plugin').absolute()
if plugin_dir.is_dir():
for dir in plugin_dir.iterdir():
if str(dir.stem) not in plugins_to_keep:
shutil.rmtree(str(dir.absolute()), ignore_errors=True)
- name: CI Build
env:
STUART_CODEQL_PATH: ${{ steps.cache_key_gen.outputs.codeql_cli_ext_dep_dir }}
run: stuart_ci_build -c .pytool/CISettings.py -t DEBUG -p ${{ matrix.Package }} -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019 --codeql
- name: Build Cleanup
id: build_cleanup
shell: python
run: |
import os
import shutil
from pathlib import Path
dirs_to_delete = ['ia32', 'x64', 'arm', 'aarch64']
def delete_dirs(path: Path):
if path.exists() and path.is_dir():
if path.name.lower() in dirs_to_delete:
print(f'Removed {str(path)}')
shutil.rmtree(path)
return
for child_dir in path.iterdir():
delete_dirs(child_dir)
build_path = Path(os.environ['GITHUB_WORKSPACE'], 'Build')
delete_dirs(build_path)
- name: Upload Build Logs As An Artifact
uses: actions/upload-artifact@v3
if: success() || failure()
with:
name: ${{ matrix.Package }}-Logs
path: |
**/BUILD_REPORT.TXT
**/OVERRIDELOG.TXT
**/BUILDLOG_*.md
**/BUILDLOG_*.txt
**/CI_*.md
**/CI_*.txt
retention-days: 7
if-no-files-found: ignore
- name: Prepare Env Data for CodeQL Upload
id: env_data
env:
PACKAGE_NAME: ${{ matrix.Package }}
shell: python
run: |
import os
package = os.environ['PACKAGE_NAME'].strip().lower()
directory_name = 'codeql-analysis-' + package + '-debug'
file_name = 'codeql-db-' + package + '-debug-0.sarif'
sarif_path = os.path.join('Build', directory_name, file_name)
with open(os.environ['GITHUB_OUTPUT'], 'a') as fh:
if os.path.isfile(sarif_path):
print(f'upload_sarif_file=true', file=fh)
print(f'sarif_file_path={sarif_path}', file=fh)
else:
print(f'upload_sarif_file=false', file=fh)
- name: Upload CodeQL Results (SARIF) As An Artifact
uses: actions/upload-artifact@v3
if: steps.env_data.outputs.upload_sarif_file == 'true'
with:
name: ${{ matrix.Package }}-CodeQL-SARIF
path: ${{ steps.env_data.outputs.sarif_file_path }}
retention-days: 14
if-no-files-found: warn
- name: Upload CodeQL Results (SARIF) To GitHub Code Scanning
uses: github/codeql-action/upload-sarif@v2
if: steps.env_data.outputs.upload_sarif_file == 'true'
with:
# Path to SARIF file relative to the root of the repository.
sarif_file: ${{ steps.env_data.outputs.sarif_file_path }}
# Optional category for the results. Used to differentiate multiple results for one commit.
# Each package is a separate category.
category: ${{ matrix.Package }}

44
.github/workflows/stale.yml vendored Normal file
View File

@@ -0,0 +1,44 @@
# This workflow warns and then closes issues and PRs that have had no activity
# for a specified amount of time.
#
# For more information, see:
# https://github.com/actions/stale
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
name: Stale Check
on:
schedule:
# At 23:35 on every day-of-week from Sunday through Saturday
# https://crontab.guru/#35_23_*_*_0-6
- cron: '35 23 * * 0-6'
workflow_dispatch:
jobs:
stale:
name: Stale
runs-on: ubuntu-latest
permissions:
issues: write
pull-requests: write
steps:
- name: Check for Stale Items
uses: actions/stale@v8
with:
days-before-issue-close: -1
days-before-issue-stale: -1
days-before-pr-stale: 60
days-before-pr-close: 7
stale-pr-message: >
This PR has been automatically marked as stale because it has not had
activity in 60 days. It will be closed if no further activity occurs within
7 days. Thank you for your contributions.
close-pr-message: >
This pull request has been automatically been closed because it did not have any
activity in 60 days and no follow up within 7 days after being marked stale.
Thank you for your contributions.
stale-pr-label: stale

3
.gitmodules vendored
View File

@@ -32,3 +32,6 @@
[submodule "MdePkg/Library/MipiSysTLib/mipisyst"]
path = MdePkg/Library/MipiSysTLib/mipisyst
url = https://github.com/MIPI-Alliance/public-mipi-sys-t.git
[submodule "CryptoPkg/Library/MbedTlsLib/mbedtls"]
path = CryptoPkg/Library/MbedTlsLib/mbedtls
url = https://github.com/ARMmbed/mbedtls

View File

@@ -7,12 +7,27 @@
##
import os
import logging
import sys
from edk2toolext.environment import shell_environment
from edk2toolext.invocables.edk2_ci_build import CiBuildSettingsManager
from edk2toolext.invocables.edk2_setup import SetupSettingsManager, RequiredSubmodule
from edk2toolext.invocables.edk2_update import UpdateSettingsManager
from edk2toolext.invocables.edk2_pr_eval import PrEvalSettingsManager
from edk2toollib.utility_functions import GetHostInfo
from pathlib import Path
try:
# Temporarily needed until edk2 can update to the latest edk2-pytools
# that has the CodeQL helpers.
#
# May not be present until submodules are populated.
#
root = Path(__file__).parent.parent.resolve()
sys.path.append(str(root/'BaseTools'/'Plugin'/'CodeQL'/'integration'))
import stuart_codeql as codeql_helpers
except ImportError:
pass
class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManager, PrEvalSettingsManager):
@@ -34,6 +49,11 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
group.add_argument("-force_piptools", "--fpt", dest="force_piptools", action="store_true", default=False, help="Force the system to use pip tools")
group.add_argument("-no_piptools", "--npt", dest="no_piptools", action="store_true", default=False, help="Force the system to not use pip tools")
try:
codeql_helpers.add_command_line_option(parserObj)
except NameError:
pass
def RetrieveCommandLineOptions(self, args):
super().RetrieveCommandLineOptions(args)
if args.force_piptools:
@@ -41,6 +61,11 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
if args.no_piptools:
self.UseBuiltInBaseTools = False
try:
self.codeql = codeql_helpers.is_codeql_enabled_on_command_line(args)
except NameError:
pass
# ####################################################################################### #
# Default Support for this Ci Build #
# ####################################################################################### #
@@ -169,6 +194,17 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
else:
logging.warning("Falling back to using in-tree BaseTools")
try:
scopes += codeql_helpers.get_scopes(self.codeql)
if self.codeql:
shell_environment.GetBuildVars().SetValue(
"STUART_CODEQL_AUDIT_ONLY",
"TRUE",
"Set in CISettings.py")
except NameError:
pass
self.ActualScopes = scopes
return self.ActualScopes
@@ -199,6 +235,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"MdePkg/Library/BaseFdtLib/libfdt", False))
rs.append(RequiredSubmodule(
"MdePkg/Library/MipiSysTLib/mipisyst", False))
rs.append(RequiredSubmodule(
"CryptoPkg/Library/MbedTlsLib/mbedtls", False))
return rs
def GetName(self):

View File

@@ -93,9 +93,7 @@ class CharEncodingCheck(ICiBuildPlugin):
files = [Edk2pathObj.GetAbsolutePathOnThisSystemFromEdk2RelativePath(x) for x in files]
for a in files:
files_tested += 1
if(self.TestEncodingOk(a, enc)):
logging.debug("File {0} Passed Encoding Check {1}".format(a, enc))
else:
if not self.TestEncodingOk(a, enc):
tc.LogStdError("Encoding Failure in {0}. Not {1}".format(a, enc))
overall_status += 1

View File

@@ -10,7 +10,7 @@ import logging
import os
from edk2toolext.environment.plugintypes.ci_build_plugin import ICiBuildPlugin
from edk2toollib.uefi.edk2.parsers.dsc_parser import DscParser
from edk2toollib.uefi.edk2.parsers.inf_parser import InfParser
from edk2toollib.uefi.edk2.parsers.inf_parser import InfParser, AllPhases
from edk2toolext.environment.var_dict import VarDict
@@ -116,8 +116,9 @@ class HostUnitTestDscCompleteCheck(ICiBuildPlugin):
# should compile test a library that is declared type HOST_APPLICATION
pass
elif len(infp.SupportedPhases) > 0 and \
"HOST_APPLICATION" in infp.SupportedPhases:
elif (len(infp.SupportedPhases) > 0 and
"HOST_APPLICATION" in infp.SupportedPhases and
infp.SupportedPhases != AllPhases):
# should compile test a library that supports HOST_APPLICATION but
# require it to be an explicit opt-in
pass

View File

@@ -110,7 +110,7 @@ class UncrustifyCheck(ICiBuildPlugin):
# A package can add any additional paths with "AdditionalIncludePaths"
# A package can remove any of these paths with "IgnoreStandardPaths"
#
STANDARD_PLUGIN_DEFINED_PATHS = ("*.c", "*.h")
STANDARD_PLUGIN_DEFINED_PATHS = ("*.c", "*.h", "*.cpp")
#
# The Uncrustify application path should set in this environment variable
@@ -299,7 +299,7 @@ class UncrustifyCheck(ICiBuildPlugin):
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
logging.warning(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
@@ -325,7 +325,7 @@ class UncrustifyCheck(ICiBuildPlugin):
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
logging.warning(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
@@ -372,9 +372,9 @@ class UncrustifyCheck(ICiBuildPlugin):
file_template_path = pathlib.Path(os.path.join(self._plugin_path, file_template_name))
self._file_template_contents = file_template_path.read_text()
except KeyError:
logging.warn("A file header template is not specified in the config file.")
logging.warning("A file header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified file header template file was not found.")
logging.warning("The specified file header template file was not found.")
try:
func_template_name = parser["dummy_section"]["cmt_insert_func_header"]
@@ -384,9 +384,9 @@ class UncrustifyCheck(ICiBuildPlugin):
func_template_path = pathlib.Path(os.path.join(self._plugin_path, func_template_name))
self._func_template_contents = func_template_path.read_text()
except KeyError:
logging.warn("A function header template is not specified in the config file.")
logging.warning("A function header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified function header template file was not found.")
logging.warning("The specified function header template file was not found.")
def _initialize_app_info(self) -> None:
"""

View File

@@ -215,7 +215,7 @@ indent_braces = false
indent_braces_no_class = false
indent_braces_no_func = true
indent_braces_no_struct = false
indent_class = false
indent_class = true
indent_class_colon = false
indent_cmt_with_tabs = false # Whether to indent comments that are not at a brace level with tabs on
# a tabstop. Requires indent_with_tabs=2. If false, will use spaces.
@@ -223,7 +223,7 @@ indent_col1_comment = true
indent_col1_multi_string_literal= true
indent_comma_paren = true
indent_else_if = true
indent_extern = false
indent_extern = true
indent_first_bool_expr = true
indent_func_def_param_paren_pos_threshold = 0

File diff suppressed because it is too large Load Diff

View File

@@ -1,31 +0,0 @@
## @file
# Application to present AArch64 cpu information.
#
# Based on HelloWorld:
# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2023, Linaro Ltd. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = ArmCpuInfo
FILE_GUID = b3134491-6502-4faf-a9da-007184e32163
MODULE_TYPE = UEFI_APPLICATION
VERSION_STRING = 1.0
ENTRY_POINT = UefiMain
[Sources]
ArmCpuInfo.c
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
ArmLib
UefiApplicationEntryPoint
UefiLib

View File

@@ -239,5 +239,10 @@
],
"AdditionalIncludePaths": [] # Additional paths to spell check
# (wildcards supported)
},
# options defined in .pytool/Plugin/UncrustifyCheck
"UncrustifyCheck": {
"AuditOnly": True
}
}

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@@ -144,6 +144,11 @@
# If PcdMonitorConduitHvc = TRUE, conduit = HVC
gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047
# Whether to remap all unused memory NX before installing the CPU arch
# protocol driver. This is needed on platforms that map all DRAM with RWX
# attributes initially, and can be disabled otherwise.
gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx|TRUE|BOOLEAN|0x00000048
[PcdsFeatureFlag.ARM]
# Whether to map normal memory as non-shareable. FALSE is the safe choice, but
# TRUE may be appropriate to fix performance problems if you don't care about
@@ -323,6 +328,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|28|UINT32|0x0000004A
#
# ARM Generic Watchdog

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@@ -162,11 +162,12 @@
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
ArmPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf
[Components.AARCH64]
ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.inf
[Components.AARCH64, Components.ARM]
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf

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@@ -1,6 +1,6 @@
/*++
Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2013-2023, Arm Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -8,20 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "ArmGicDxe.h"
VOID
EFIAPI
IrqInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_SYSTEM_CONTEXT SystemContext
);
VOID
EFIAPI
ExitBootServicesEvent (
IN EFI_EVENT Event,
IN VOID *Context
);
// Making this global saves a few bytes in image size
EFI_HANDLE gHardwareInterruptHandle = NULL;
@@ -61,7 +47,7 @@ GicGetDistributorIcfgBaseAndBit (
RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
*RegAddress = PcdGet64 (PcdGicDistributorBase)
*RegAddress = (UINTN)PcdGet64 (PcdGicDistributorBase)
+ ARM_GIC_ICDICFR
+ (ARM_GIC_ICDICFR_BYTES * RegIndex);
*Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -104,10 +104,17 @@ GicGetCpuRedistributorBase (
return 0;
}
UINTN
/**
Return the GIC CPU Interrupt Interface ID.
@param GicInterruptInterfaceBase Base address of the GIC Interrupt Interface.
@retval CPU Interface Identification information.
**/
UINT32
EFIAPI
ArmGicGetInterfaceIdentification (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
// Read the GIC Identification Register
@@ -117,7 +124,7 @@ ArmGicGetInterfaceIdentification (
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
)
{
UINTN ItLines;
@@ -133,15 +140,17 @@ ArmGicGetMaxNumInterrupts (
VOID
EFIAPI
ArmGicSendSgiTo (
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
IN UINTN GicDistributorBase,
IN UINT8 TargetListFilter,
IN UINT8 CPUTargetList,
IN UINT8 SgiId
)
{
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDSGIR,
((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId
((TargetListFilter & 0x3) << 24) |
((CPUTargetList & 0xFF) << 16) |
(SgiId & 0xF)
);
}
@@ -167,19 +176,17 @@ ArmGicAcknowledgeInterrupt (
)
{
UINTN Value;
UINTN IntId;
ARM_GIC_ARCH_REVISION Revision;
ASSERT (InterruptId != NULL);
Revision = ArmGicGetSupportedArchRevision ();
if (Revision == ARM_GIC_ARCH_REVISION_2) {
Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase);
// InterruptId is required for the caller to know if a valid or spurious
// interrupt has been read
ASSERT (InterruptId != NULL);
if (InterruptId != NULL) {
*InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID;
}
IntId = Value & ARM_GIC_ICCIAR_ACKINTID;
} else if (Revision == ARM_GIC_ARCH_REVISION_3) {
Value = ArmGicV3AcknowledgeInterrupt ();
IntId = Value;
} else {
ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
// Report Spurious interrupt which is what the above controllers would
@@ -187,6 +194,12 @@ ArmGicAcknowledgeInterrupt (
Value = 1023;
}
if (InterruptId != NULL) {
// InterruptId is required for the caller to know if a valid or spurious
// interrupt has been read
*InterruptId = IntId;
}
return Value;
}
@@ -219,13 +232,13 @@ ArmGicSetInterruptPriority (
)
{
UINT32 RegOffset;
UINTN RegShift;
UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate register offset and bit position
RegOffset = Source / 4;
RegShift = (Source % 4) * 8;
RegOffset = (UINT32)(Source / 4);
RegShift = (UINT8)((Source % 4) * 8);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -263,13 +276,13 @@ ArmGicEnableInterrupt (
)
{
UINT32 RegOffset;
UINTN RegShift;
UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegOffset = (UINT32)(Source / 32);
RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -308,13 +321,13 @@ ArmGicDisableInterrupt (
)
{
UINT32 RegOffset;
UINTN RegShift;
UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegOffset = (UINT32)(Source / 32);
RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -352,14 +365,14 @@ ArmGicIsInterruptEnabled (
)
{
UINT32 RegOffset;
UINTN RegShift;
UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 Interrupts;
// Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
RegOffset = (UINT32)(Source / 32);
RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -390,7 +403,7 @@ ArmGicIsInterruptEnabled (
VOID
EFIAPI
ArmGicDisableDistributor (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
)
{
// Disable Gic Distributor
@@ -400,7 +413,7 @@ ArmGicDisableDistributor (
VOID
EFIAPI
ArmGicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;
@@ -418,7 +431,7 @@ ArmGicEnableInterruptInterface (
VOID
EFIAPI
ArmGicDisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -13,10 +13,11 @@
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
)
{
ARM_GIC_ARCH_REVISION Revision;
UINT32 GicDistributorCtl;
/*
* Enable GIC distributor in Non-Secure world.
@@ -26,7 +27,8 @@ ArmGicEnableDistributor (
if (Revision == ARM_GIC_ARCH_REVISION_2) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
} else {
if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
GicDistributorCtl = MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR);
if ((GicDistributorCtl & ARM_GIC_ICDDCR_ARE) != 0) {
MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
} else {
MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);

View File

@@ -2,7 +2,7 @@
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
Portions copyright (c) 2011-2023, Arm Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -25,8 +25,8 @@ Abstract:
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;
STATIC UINT32 mGicInterruptInterfaceBase;
STATIC UINT32 mGicDistributorBase;
STATIC UINTN mGicInterruptInterfaceBase;
STATIC UINTN mGicDistributorBase;
/**
Enable interrupt source Source.
@@ -162,7 +162,7 @@ GicV2IrqInterruptHandler (
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
UINT32 GicInterrupt;
UINTN GicInterrupt;
HARDWARE_INTERRUPT_HANDLER InterruptHandler;
GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
@@ -179,7 +179,7 @@ GicV2IrqInterruptHandler (
// Call the registered interrupt handler.
InterruptHandler (GicInterrupt, SystemContext);
} else {
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", (UINT32)GicInterrupt));
GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
}
}
@@ -349,8 +349,8 @@ GicV2ExitBootServicesEvent (
IN VOID *Context
)
{
UINTN Index;
UINT32 GicInterrupt;
UINTN Index;
UINTN GicInterrupt;
// Disable all the interrupts
for (Index = 0; Index < mGicNumInterrupts; Index++) {
@@ -393,23 +393,26 @@ GicV2DxeInitialize (
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
UINTN RegShift;
UINT8 RegShift;
UINT32 CpuTarget;
// Make sure the Interrupt Controller Protocol is not already installed in
// the system.
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
ASSERT (PcdGet64 (PcdGicInterruptInterfaceBase) <= MAX_UINTN);
ASSERT (PcdGet64 (PcdGicDistributorBase) <= MAX_UINTN);
mGicInterruptInterfaceBase = (UINTN)PcdGet64 (PcdGicInterruptInterfaceBase);
mGicDistributorBase = (UINTN)PcdGet64 (PcdGicDistributorBase);
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
// Set Priority
RegOffset = Index / 4;
RegShift = (Index % 4) * 8;
RegOffset = (UINT32)(Index / 4);
RegShift = (UINT8)((Index % 4) * 8);
MmioAndThenOr32 (
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),

View File

@@ -1,12 +1,13 @@
/** @file
*
* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
* Copyright (c) 2013-2023, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Library/ArmGicLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
UINTN
@@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt (
IN UINTN Source
)
{
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
ASSERT (Source <= MAX_UINT32);
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
}

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -13,7 +13,7 @@
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
/*
@@ -26,7 +26,7 @@ ArmGicV2EnableInterruptInterface (
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
)
{
// Disable Gic Interface

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -156,7 +156,7 @@ GicV3IrqInterruptHandler (
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
UINT32 GicInterrupt;
UINTN GicInterrupt;
HARDWARE_INTERRUPT_HANDLER InterruptHandler;
GicInterrupt = ArmGicV3AcknowledgeInterrupt ();
@@ -173,7 +173,7 @@ GicV3IrqInterruptHandler (
// Call the registered interrupt handler.
InterruptHandler (GicInterrupt, SystemContext);
} else {
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", (UINT32)GicInterrupt));
GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt);
}
}
@@ -381,7 +381,7 @@ GicV3DxeInitialize (
// the system.
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
mGicDistributorBase = (UINTN)PcdGet64 (PcdGicDistributorBase);
mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);

View File

@@ -103,7 +103,9 @@ DispatchCpu (
ArmCallSmc (&Args);
if (Args.Arg0 != ARM_SMC_PSCI_RET_SUCCESS) {
if (Args.Arg0 == ARM_SMC_PSCI_RET_ALREADY_ON) {
Status = EFI_NOT_READY;
} else if (Args.Arg0 != ARM_SMC_PSCI_RET_SUCCESS) {
DEBUG ((DEBUG_ERROR, "PSCI_CPU_ON call failed: %d\n", Args.Arg0));
Status = EFI_DEVICE_ERROR;
}

View File

@@ -18,6 +18,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define MIN_T0SZ 16
#define BITS_PER_LEVEL 9
/**
Parses T0SZ to determine the level and number of entries at the root
of the translation table.
@param T0SZ The T0SZ value to be parsed.
@param RootTableLevel The level of the root table.
@param RootTableEntryCount The number of entries in the root table.
**/
STATIC
VOID
GetRootTranslationTableInfo (
@@ -30,6 +38,13 @@ GetRootTranslationTableInfo (
*RootTableEntryCount = TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL;
}
/**
Converts ARM translation table attributes to GCD attributes.
@param PageAttributes The translation table attributes to be converted.
@retval The analogous GCD attributes.
**/
STATIC
UINT64
PageAttributeToGcdAttribute (
@@ -100,6 +115,14 @@ RegionAttributeToGcdAttribute (
return PageAttributeToGcdAttribute (PageAttributes);
}
/**
Retrieves the attribute of the first page entry in the translation table.
@param[in] FirstLevelTableAddress The base address of the translation table.
@param[in] TableLevel The current level being traversed.
@retval The attributes of the first page entry found, or INVALID_ENTRY.
**/
STATIC
UINT64
GetFirstPageAttribute (
@@ -120,12 +143,25 @@ GetFirstPageAttribute (
} else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
return FirstEntry & TT_ATTR_INDX_MASK;
return FirstEntry & TT_ATTRIBUTES_MASK;
} else {
return INVALID_ENTRY;
}
}
/**
This function recursively traverses the translation table heirarchy to
synchronise the GCD with the translation table.
@param[in] TableAddress The address of the table being processed.
@param[in] EntryCount The number of entries in the current level of the table.
@param[in] TableLevel The current level of the memory table being processed.
@param[in] BaseAddress The starting address of the region.
@param[in, out] PrevEntryAttribute The attributes of the previous region.
@param[in, out] StartGcdRegion The start of the GCD region.
@retval The address at the end of the last region processed.
**/
STATIC
UINT64
GetNextEntryAttribute (
@@ -148,17 +184,19 @@ GetNextEntryAttribute (
// Get the memory space map from GCD
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// We cannot get more than 3-level page table
ASSERT (TableLevel <= 3);
if (EFI_ERROR (Status) || (TableLevel > 3)) {
ASSERT_EFI_ERROR (Status);
ASSERT (TableLevel <= 3);
return 0;
}
// While the top level table might not contain TT_ENTRY_COUNT entries;
// the subsequent ones should be filled up
for (Index = 0; Index < EntryCount; Index++) {
Entry = TableAddress[Index];
EntryType = Entry & TT_TYPE_MASK;
EntryAttribute = Entry & TT_ATTR_INDX_MASK;
EntryAttribute = Entry & TT_ATTRIBUTES_MASK;
// If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
@@ -218,6 +256,15 @@ GetNextEntryAttribute (
return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL (TableLevel));
}
/**
Sync the GCD memory space attributes with the translation table.
@param[in] CpuProtocol The CPU architectural protocol instance.
@retval EFI_SUCCESS The GCD memory space attributes are synced with
the MMU page table.
@retval Others The return value of GetMemorySpaceMap().
**/
EFI_STATUS
SyncCacheConfig (
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
@@ -243,7 +290,11 @@ SyncCacheConfig (
//
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
return Status;
}
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
@@ -277,7 +328,7 @@ SyncCacheConfig (
);
// Update GCD with the last region if valid
if (PageAttribute != INVALID_ENTRY) {
if ((PageAttribute != INVALID_ENTRY) && (EndAddressGcdRegion > BaseAddressGcdRegion)) {
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
@@ -292,6 +343,13 @@ SyncCacheConfig (
return EFI_SUCCESS;
}
/**
Convert EFI memory attributes to ARM translation table attributes.
@param[in] EfiAttributes EFI memory attributes.
@retval The analogous translation table attributes.
**/
UINT64
EfiAttributeToArmAttribute (
IN UINT64 EfiAttributes
@@ -339,8 +397,25 @@ EfiAttributeToArmAttribute (
return ArmAttributes;
}
// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
// And then the function will identify the size of the region that has the same page table attribute.
/**
This function returns the attributes of the memory region containing the
specified address.
RegionLength and RegionAttributes are only valid if the result is EFI_SUCCESS.
@param[in] TranslationTable The translation table base address.
@param[in] TableLevel The level of the translation table.
@param[in] LastBlockEntry The last block address of the table level.
@param[in, out] BaseAddress The base address of the memory region.
@param[out] RegionLength The length of the memory region.
@param[out] RegionAttributes The attributes of the memory region.
@retval EFI_SUCCESS The attributes of the memory region were
returned successfully.
@retval EFI_NOT_FOUND The memory region was not found.
@retval EFI_NO_MAPPING The translation table entry associated with
BaseAddress is invalid.
**/
EFI_STATUS
GetMemoryRegionRec (
IN UINT64 *TranslationTable,
@@ -380,10 +455,10 @@ GetMemoryRegionRec (
RegionAttributes
);
// In case of 'Success', it means the end of the block region has been found into the upper
// level translation table
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
// EFI_SUCCESS: The end of the end of the region was found.
// EFI_NO_MAPPING: The translation entry associated with BaseAddress is invalid.
if (Status != EFI_NOT_FOUND) {
return Status;
}
// Now we processed the table move to the next entry
@@ -395,12 +470,13 @@ GetMemoryRegionRec (
*RegionLength = 0;
*RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
} else {
// We have an 'Invalid' entry
return EFI_UNSUPPORTED;
return EFI_NO_MAPPING;
}
while (BlockEntry <= LastBlockEntry) {
if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
if (((*BlockEntry & TT_TYPE_MASK) == BlockEntryType) &&
((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes))
{
*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL (TableLevel);
} else {
// In case we have found the end of the region we return success
@@ -412,10 +488,29 @@ GetMemoryRegionRec (
// If we have reached the end of the TranslationTable and we have not found the end of the region then
// we return EFI_NOT_FOUND.
// The caller will continue to look for the memory region at its level
// The caller will continue to look for the memory region at its level.
return EFI_NOT_FOUND;
}
/**
Retrieves a memory region from a given base address.
This function retrieves a memory region starting from a given base address.
@param[in, out] BaseAddress The base address from which to retrieve
the memory region. On successful return, this is
updated to the end address of the retrieved region.
@param[out] RegionLength The length of the retrieved memory region.
@param[out] RegionAttributes The attributes of the retrieved memory region.
@retval EFI_STATUS Returns EFI_SUCCESS if the memory region is
retrieved successfully, or the status of the
recursive call to GetMemoryRegionRec.
@retval EFI_NOT_FOUND The memory region was not found.
@retval EFI_NO_MAPPING The translation table entry associated with
BaseAddress is invalid.
@retval EFI_INVALID_PARAMETER One of the input parameters was NULL.
**/
EFI_STATUS
GetMemoryRegion (
IN OUT UINTN *BaseAddress,
@@ -429,10 +524,18 @@ GetMemoryRegion (
UINTN EntryCount;
UINTN T0SZ;
ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
if ((BaseAddress == NULL) || (RegionLength == NULL) || (RegionAttributes == NULL)) {
ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
return EFI_INVALID_PARAMETER;
}
TranslationTable = ArmGetTTBR0BaseAddress ();
// Initialize the output parameters. These paramaters are only valid if the
// result is EFI_SUCCESS.
*RegionLength = 0;
*RegionAttributes = 0;
T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
// Get the Table info from T0SZ
GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
@@ -447,10 +550,10 @@ GetMemoryRegion (
);
// If the region continues up to the end of the root table then GetMemoryRegionRec()
// will return EFI_NOT_FOUND
if (Status == EFI_NOT_FOUND) {
// will return EFI_NOT_FOUND. Check if the region length was updated.
if ((Status == EFI_NOT_FOUND) && (*RegionLength > 0)) {
return EFI_SUCCESS;
} else {
return Status;
}
return Status;
}

View File

@@ -17,9 +17,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
Convert a set of ARM short descriptor section attributes into a mask
of EFI_MEMORY_xx constants.
@param SectionAttributes The set of page attributes.
@param GcdAttributes Pointer to the return value.
@param[in] SectionAttributes The set of page attributes.
@param[out] GcdAttributes Pointer to the return value.
@retval EFI_SUCCESS The attributes were converted successfully.
@retval EFI_UNSUPPORTED The section attributes did not have a
GCD transation.
**/
STATIC
EFI_STATUS
@@ -87,10 +90,11 @@ SectionToGcdAttributes (
Convert an arch specific set of page attributes into a mask
of EFI_MEMORY_xx constants.
@param PageAttributes The set of page attributes.
@retval The mask of EFI_MEMORY_xx constants.
@param[in] PageAttributes The set of page attributes.
@retval EFI_SUCCESS The attributes were converted successfully.
@retval EFI_UNSUPPORTED The section attributes did not have a
GCD transation.
**/
UINT64
RegionAttributeToGcdAttribute (
@@ -107,9 +111,11 @@ RegionAttributeToGcdAttribute (
Convert a set of ARM short descriptor page attributes into a mask
of EFI_MEMORY_xx constants.
@param PageAttributes The set of page attributes.
@param GcdAttributes Pointer to the return value.
@param[in] PageAttributes The set of page attributes.
@param[out] GcdAttributes Pointer to the return value.
@retval EFI_SUCCESS The attributes were converted successfully.
@retval EFI_UNSUPPORTED The page attributes did not have a GCD transation.
**/
STATIC
EFI_STATUS
@@ -173,6 +179,23 @@ PageToGcdAttributes (
return EFI_SUCCESS;
}
/**
Synchronizes the GCD with the translation table for a specified page.
This function synchronizes cache configuration for a given page based on its section index
and the first level descriptor. It traverses the second level table entries of the page and
updates the GCD attributes accordingly for each entry.
@param[in] SectionIndex The index of the section where the page resides.
@param[in] FirstLevelDescriptor The first translation table level of the page.
@param[in] NumberOfDescriptors The number of descriptors in the GCD memory space map.
@param[in] MemorySpaceMap The GCD memory space descriptor.
@param[in, out] NextRegionBase The next region base address.
@param[in, out] NextRegionLength The next region length.
@param[in, out] NextSectionAttributes The next section attributes.
@retval EFI_STATUS Always return success
**/
EFI_STATUS
SyncCacheConfigPage (
IN UINT32 SectionIndex,
@@ -217,7 +240,10 @@ SyncCacheConfigPage (
} else if (PageAttributes != NextPageAttributes) {
// Convert Section Attributes into GCD Attributes
Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
GcdAttributes = 0;
}
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
@@ -230,7 +256,10 @@ SyncCacheConfigPage (
} else if (NextPageAttributes != 0) {
// Convert Page Attributes into GCD Attributes
Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
GcdAttributes = 0;
}
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
@@ -252,6 +281,14 @@ SyncCacheConfigPage (
return EFI_SUCCESS;
}
/**
Sync the GCD memory space attributes with the translation table.
@param[in] CpuProtocol The CPU architectural protocol instance.
@retval EFI_SUCCESS The GCD memory space attributes are synced with the MMU page table.
@retval Others The return value of GetMemorySpaceMap().
**/
EFI_STATUS
SyncCacheConfig (
IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
@@ -278,7 +315,12 @@ SyncCacheConfig (
//
MemorySpaceMap = NULL;
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SyncCacheConfig - GetMemorySpaceMap() failed! Status: %r\n", Status));
ASSERT_EFI_ERROR (Status);
return Status;
}
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
@@ -307,7 +349,12 @@ SyncCacheConfig (
} else if (SectionAttributes != NextSectionAttributes) {
// Convert Section Attributes into GCD Attributes
Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
ASSERT_EFI_ERROR (Status);
GcdAttributes = 0;
}
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -343,7 +390,11 @@ SyncCacheConfig (
if (NextSectionAttributes != 0) {
// Convert Section Attributes into GCD Attributes
Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
ASSERT_EFI_ERROR (Status);
GcdAttributes = 0;
}
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -360,7 +411,11 @@ SyncCacheConfig (
if (NextSectionAttributes != 0) {
// Convert Section Attributes into GCD Attributes
Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SyncCacheConfig - SectionToGcdAttributes() failed! Status: %r\n", Status));
ASSERT_EFI_ERROR (Status);
GcdAttributes = 0;
}
// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
@@ -371,6 +426,13 @@ SyncCacheConfig (
return EFI_SUCCESS;
}
/**
Convert EFI memory attributes to ARM translation table attributes.
@param[in] EfiAttributes EFI memory attributes.
@retval The analogous translation table attributes.
**/
UINT64
EfiAttributeToArmAttribute (
IN UINT64 EfiAttributes
@@ -424,20 +486,39 @@ EfiAttributeToArmAttribute (
return ArmAttributes;
}
/**
This function finds the end of a memory region in a translation table. A
memory region is defined as a contiguous set of pages with the same attributes.
@param[in] PageTable The translation table to traverse.
@param[in] BaseAddress The address from which to start the search
@param[in] RegionAttributes The attributes of the start of the region.
@param[out] RegionLength The length of the region found.
@retval EFI_SUCCESS The region was found.
@retval EFI_NOT_FOUND The end of the region was not found.
@retval EFI_NO_MAPPING The region specified by BaseAddress is not mapped
in the input translation table.
@retval EFI_UNSUPPORTED Large pages are not supported.
**/
STATIC
EFI_STATUS
GetMemoryRegionPage (
IN UINT32 *PageTable,
IN OUT UINTN *BaseAddress,
OUT UINTN *RegionLength,
OUT UINTN *RegionAttributes
IN UINTN *BaseAddress,
IN UINTN *RegionAttributes,
OUT UINTN *RegionLength
)
{
UINT32 PageAttributes;
UINT32 TableIndex;
UINT32 PageDescriptor;
UINT32 PageAttributes;
UINT32 TableIndex;
UINT32 PageDescriptor;
EFI_STATUS Status;
// Convert the section attributes into page attributes
PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes);
Status = EFI_NOT_FOUND;
*RegionLength = 0;
// Calculate index into first level translation table for start of modification
TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@@ -449,25 +530,44 @@ GetMemoryRegionPage (
PageDescriptor = PageTable[TableIndex];
if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
// Case: End of the boundary of the region
return EFI_SUCCESS;
Status = (*RegionLength > 0) ? EFI_SUCCESS : EFI_NO_MAPPING;
break;
} else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
*RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
} else {
// Case: End of the boundary of the region
return EFI_SUCCESS;
if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) != PageAttributes) {
Status = EFI_SUCCESS;
break;
}
*RegionLength += TT_DESCRIPTOR_PAGE_SIZE;
} else {
// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
// Large pages are unsupported.
Status = EFI_UNSUPPORTED;
ASSERT (0);
return EFI_SUCCESS;
break;
}
}
return EFI_NOT_FOUND;
return Status;
}
/**
Get the memory region that contains the specified address. A memory region is defined
as a contiguous set of pages with the same attributes.
RegionLength and RegionAttributes are only valid if EFI_SUCCESS is returned.
@param[in, out] BaseAddress On input, the address to search for.
On output, the base address of the region found.
@param[out] RegionLength The length of the region found.
@param[out] RegionAttributes The attributes of the region found.
@retval EFI_SUCCESS Region found
@retval EFI_NOT_FOUND Region not found
@retval EFI_UNSUPPORTED Large pages are unsupported
@retval EFI_NO_MAPPING The page specified by BaseAddress is unmapped
@retval EFI_INVALID_PARAMETER The BaseAddress exceeds the addressable range of
the translation table.
**/
EFI_STATUS
GetMemoryRegion (
IN OUT UINTN *BaseAddress,
@@ -482,6 +582,7 @@ GetMemoryRegion (
UINT32 SectionDescriptor;
ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
UINT32 *PageTable;
UINTN Length;
// Initialize the arguments
*RegionLength = 0;
@@ -491,7 +592,11 @@ GetMemoryRegion (
// Calculate index into first level translation table for start of modification
TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
if (TableIndex >= TRANSLATION_TABLE_SECTION_COUNT) {
ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
return EFI_INVALID_PARAMETER;
}
// Get the section at the given index
SectionDescriptor = FirstLevelTable[TableIndex];
@@ -524,6 +629,8 @@ GetMemoryRegion (
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
}
Status = EFI_NOT_FOUND;
for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
// Get the section at the given index
SectionDescriptor = FirstLevelTable[TableIndex];
@@ -532,15 +639,18 @@ GetMemoryRegion (
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
// Extract the page table location from the descriptor
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
Length = 0;
// Scan the page table to find the end of the region.
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
ASSERT (*RegionLength > 0);
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionAttributes, &Length);
*RegionLength += Length;
// If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
if (Status == EFI_SUCCESS) {
break;
// Status == EFI_NOT_FOUND implies we have not reached the end of the region.
if ((Status == EFI_NOT_FOUND) && (Length > 0)) {
continue;
}
break;
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
{
@@ -556,5 +666,10 @@ GetMemoryRegion (
}
}
return EFI_SUCCESS;
// Check if the region length was updated.
if (*RegionLength > 0) {
Status = EFI_SUCCESS;
}
return Status;
}

View File

@@ -11,6 +11,8 @@
#include <Guid/IdleLoopEvent.h>
#include <Library/MemoryAllocationLib.h>
BOOLEAN mIsFlushingGCD;
/**
@@ -227,6 +229,77 @@ InitializeDma (
CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
}
/**
Map all EfiConventionalMemory regions in the memory map with NX
attributes so that allocating or freeing EfiBootServicesData regions
does not result in changes to memory permission attributes.
**/
STATIC
VOID
RemapUnusedMemoryNx (
VOID
)
{
UINT64 TestBit;
UINTN MemoryMapSize;
UINTN MapKey;
UINTN DescriptorSize;
UINT32 DescriptorVersion;
EFI_MEMORY_DESCRIPTOR *MemoryMap;
EFI_MEMORY_DESCRIPTOR *MemoryMapEntry;
EFI_MEMORY_DESCRIPTOR *MemoryMapEnd;
EFI_STATUS Status;
TestBit = LShiftU64 (1, EfiBootServicesData);
if ((PcdGet64 (PcdDxeNxMemoryProtectionPolicy) & TestBit) == 0) {
return;
}
MemoryMapSize = 0;
MemoryMap = NULL;
Status = gBS->GetMemoryMap (
&MemoryMapSize,
MemoryMap,
&MapKey,
&DescriptorSize,
&DescriptorVersion
);
ASSERT (Status == EFI_BUFFER_TOO_SMALL);
do {
MemoryMap = (EFI_MEMORY_DESCRIPTOR *)AllocatePool (MemoryMapSize);
ASSERT (MemoryMap != NULL);
Status = gBS->GetMemoryMap (
&MemoryMapSize,
MemoryMap,
&MapKey,
&DescriptorSize,
&DescriptorVersion
);
if (EFI_ERROR (Status)) {
FreePool (MemoryMap);
}
} while (Status == EFI_BUFFER_TOO_SMALL);
ASSERT_EFI_ERROR (Status);
MemoryMapEntry = MemoryMap;
MemoryMapEnd = (EFI_MEMORY_DESCRIPTOR *)((UINT8 *)MemoryMap + MemoryMapSize);
while ((UINTN)MemoryMapEntry < (UINTN)MemoryMapEnd) {
if (MemoryMapEntry->Type == EfiConventionalMemory) {
ArmSetMemoryAttributes (
MemoryMapEntry->PhysicalStart,
EFI_PAGES_TO_SIZE (MemoryMapEntry->NumberOfPages),
EFI_MEMORY_XP,
EFI_MEMORY_XP
);
}
MemoryMapEntry = NEXT_MEMORY_DESCRIPTOR (MemoryMapEntry, DescriptorSize);
}
}
EFI_STATUS
CpuDxeInitialize (
IN EFI_HANDLE ImageHandle,
@@ -240,6 +313,20 @@ CpuDxeInitialize (
InitializeDma (&mCpu);
//
// Once we install the CPU arch protocol, the DXE core's memory
// protection routines will invoke them to manage the permissions of page
// allocations as they are created. Given that this includes pages
// allocated for page tables by this driver, we must ensure that unused
// memory is mapped with the same permissions as boot services data
// regions. Otherwise, we may end up with unbounded recursion, due to the
// fact that updating permissions on a newly allocated page table may trigger
// a block entry split, which triggers a page table allocation, etc etc
//
if (FeaturePcdGet (PcdRemapUnusedMemoryNx)) {
RemapUnusedMemoryNx ();
}
Status = gBS->InstallMultipleProtocolInterfaces (
&mCpuHandle,
&gEfiCpuArchProtocolGuid,

View File

@@ -48,6 +48,7 @@
DefaultExceptionHandlerLib
DxeServicesTableLib
HobLib
MemoryAllocationLib
PeCoffGetEntryPointLib
UefiDriverEntryPoint
UefiLib
@@ -64,9 +65,11 @@
[Pcd.common]
gArmTokenSpaceGuid.PcdVFPEnabled
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy
[FeaturePcd.common]
gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
gArmTokenSpaceGuid.PcdRemapUnusedMemoryNx
[Depex]
gHardwareInterruptProtocolGuid OR gHardwareInterrupt2ProtocolGuid

View File

@@ -217,7 +217,7 @@ CpuSetMemoryAttributes (
if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) ||
((BaseAddress + Length) > (RegionBaseAddress + RegionLength)))
{
return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes);
return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes, 0);
} else {
return EFI_SUCCESS;
}

View File

@@ -183,8 +183,6 @@ SetMemoryAttributes (
IN UINT64 Attributes
)
{
EFI_STATUS Status;
DEBUG ((
DEBUG_INFO,
"%a: BaseAddress == 0x%lx, Length == 0x%lx, Attributes == 0x%lx\n",
@@ -204,28 +202,7 @@ SetMemoryAttributes (
return EFI_UNSUPPORTED;
}
if ((Attributes & EFI_MEMORY_RP) != 0) {
Status = ArmSetMemoryRegionNoAccess (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
if ((Attributes & EFI_MEMORY_RO) != 0) {
Status = ArmSetMemoryRegionReadOnly (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
if ((Attributes & EFI_MEMORY_XP) != 0) {
Status = ArmSetMemoryRegionNoExec (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
return EFI_SUCCESS;
return ArmSetMemoryAttributes (BaseAddress, Length, Attributes, Attributes);
}
/**
@@ -267,8 +244,6 @@ ClearMemoryAttributes (
IN UINT64 Attributes
)
{
EFI_STATUS Status;
DEBUG ((
DEBUG_INFO,
"%a: BaseAddress == 0x%lx, Length == 0x%lx, Attributes == 0x%lx\n",
@@ -288,28 +263,7 @@ ClearMemoryAttributes (
return EFI_UNSUPPORTED;
}
if ((Attributes & EFI_MEMORY_RP) != 0) {
Status = ArmClearMemoryRegionNoAccess (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
if ((Attributes & EFI_MEMORY_RO) != 0) {
Status = ArmClearMemoryRegionReadOnly (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
if ((Attributes & EFI_MEMORY_XP) != 0) {
Status = ArmClearMemoryRegionNoExec (BaseAddress, Length);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
}
return EFI_SUCCESS;
return ArmSetMemoryAttributes (BaseAddress, Length, 0, Attributes);
}
EFI_MEMORY_ATTRIBUTE_PROTOCOL mMemoryAttribute = {

View File

@@ -3,6 +3,7 @@
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
Copyright (c) 2023, Google, LLC. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -24,6 +25,7 @@ Abstract:
// The protocols, PPI and GUID definitions for this module
//
#include <Ppi/ArmMpCoreInfo.h>
#include <Ppi/MemoryAttribute.h>
//
// The Library classes this module consumes
@@ -34,6 +36,77 @@ Abstract:
#include <Library/PcdLib.h>
#include <Library/HobLib.h>
#include <Library/ArmLib.h>
#include <Library/ArmMmuLib.h>
/**
Set the requested memory permission attributes on a region of memory.
BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
Attributes must contain a combination of EFI_MEMORY_RP, EFI_MEMORY_RO and
EFI_MEMORY_XP, and specifies the attributes that must be set for the
region in question. Attributes that are omitted will be cleared from the
region only if they are set in AttributeMask.
AttributeMask must contain a combination of EFI_MEMORY_RP, EFI_MEMORY_RO and
EFI_MEMORY_XP, and specifies the attributes that the call will operate on.
AttributeMask must not be 0x0, and must contain at least the bits set in
Attributes.
@param[in] This The protocol instance pointer.
@param[in] BaseAddress The physical address that is the start address
of a memory region.
@param[in] Length The size in bytes of the memory region.
@param[in] Attributes Memory attributes to set or clear.
@param[in] AttributeMask Mask of memory attributes to operate on.
@retval EFI_SUCCESS The attributes were set for the memory region.
@retval EFI_INVALID_PARAMETER Length is zero.
AttributeMask is zero.
AttributeMask lacks bits set in Attributes.
BaseAddress or Length is not suitably aligned.
@retval EFI_UNSUPPORTED The processor does not support one or more
bytes of the memory resource range specified
by BaseAddress and Length.
The bit mask of attributes is not supported for
the memory resource range specified by
BaseAddress and Length.
@retval EFI_OUT_OF_RESOURCES Requested attributes cannot be applied due to
lack of system resources.
**/
STATIC
EFI_STATUS
EFIAPI
SetMemoryPermissions (
IN EDKII_MEMORY_ATTRIBUTE_PPI *This,
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes,
IN UINT64 AttributeMask
)
{
if ((Length == 0) ||
(AttributeMask == 0) ||
((AttributeMask & (EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP)) == 0) ||
((Attributes & ~AttributeMask) != 0) ||
(((BaseAddress | Length) & EFI_PAGE_MASK) != 0))
{
return EFI_INVALID_PARAMETER;
}
return ArmSetMemoryAttributes (BaseAddress, Length, Attributes, AttributeMask);
}
STATIC CONST EDKII_MEMORY_ATTRIBUTE_PPI mMemoryAttributePpi = {
SetMemoryPermissions
};
STATIC CONST EFI_PEI_PPI_DESCRIPTOR mMemoryAttributePpiDesc = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEdkiiMemoryAttributePpiGuid,
(VOID *)&mMemoryAttributePpi
};
/*++
@@ -79,5 +152,8 @@ InitializeCpuPeim (
}
}
Status = PeiServicesInstallPpi (&mMemoryAttributePpiDesc);
ASSERT_EFI_ERROR (Status);
return EFI_SUCCESS;
}

View File

@@ -3,6 +3,7 @@
#
# This module provides platform specific function to detect boot mode.
# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2023, Google, LLC. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -28,6 +29,7 @@
CpuPei.c
[Packages]
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
@@ -37,9 +39,11 @@
DebugLib
HobLib
ArmLib
ArmMmuLib
[Ppis]
gArmMpCoreInfoPpiGuid
gEdkiiMemoryAttributePpiGuid
[Guids]
gArmMpCoreInfoGuid

View File

@@ -0,0 +1,221 @@
/** @file -- MmCommunicationPei.c
Provides an interface to send MM request in PEI
Copyright (c) 2016-2021, Arm Limited. All rights reserved.<BR>
Copyright (c) Microsoft Corporation.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiPei.h>
#include <IndustryStandard/ArmStdSmc.h>
#include <Protocol/MmCommunication.h>
#include <Ppi/MmCommunication.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/ArmSmcLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/PeiServicesLib.h>
/**
MmCommunicationPeim
Communicates with a registered handler.
This function provides a service to send and receive messages from a registered UEFI service during PEI.
@param[in] This The EFI_PEI_MM_COMMUNICATION_PPI instance.
@param[in, out] CommBuffer Pointer to the data buffer
@param[in, out] CommSize The size of the data buffer being passed in. On exit, the
size of data being returned. Zero if the handler does not
wish to reply with any data.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER CommBuffer or CommSize was NULL, or *CommSize does not
match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER).
@retval EFI_BAD_BUFFER_SIZE The buffer is too large for the MM implementation.
If this error is returned, the MessageLength field
in the CommBuffer header or the integer pointed by
CommSize, are updated to reflect the maximum payload
size the implementation can accommodate.
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter or CommSize parameter,
if not omitted, are in address range that cannot be
accessed by the MM environment.
**/
STATIC
EFI_STATUS
EFIAPI
MmCommunicationPeim (
IN CONST EFI_PEI_MM_COMMUNICATION_PPI *This,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommSize
)
{
EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
EFI_MM_COMMUNICATE_HEADER *TempCommHeader;
ARM_SMC_ARGS CommunicateSmcArgs;
EFI_STATUS Status;
UINTN BufferSize;
ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
// Check that our static buffer is looking good.
// We are using PcdMmBufferBase to transfer variable data.
// We are not using the full size of the buffer since there is a cost
// of copying data between Normal and Secure World.
if ((PcdGet64 (PcdMmBufferBase) == 0) || (PcdGet64 (PcdMmBufferSize) == 0)) {
ASSERT (PcdGet64 (PcdMmBufferSize) > 0);
ASSERT (PcdGet64 (PcdMmBufferBase) != 0);
return EFI_UNSUPPORTED;
}
//
// Check parameters
//
if ((CommBuffer == NULL) || (CommSize == NULL)) {
ASSERT (CommBuffer != NULL);
ASSERT (CommSize != NULL);
return EFI_INVALID_PARAMETER;
}
// If the length of the CommBuffer is 0 then return the expected length.
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) || (*CommSize > (UINTN)PcdGet64 (PcdMmBufferSize))) {
DEBUG ((
DEBUG_ERROR,
"%a Invalid CommSize value 0x%llx!\n",
__func__,
*CommSize
));
*CommSize = (UINTN)PcdGet64 (PcdMmBufferSize);
return EFI_BAD_BUFFER_SIZE;
}
// Given CommBuffer is not NULL here, we use it to test the legitimacy of CommSize.
TempCommHeader = (EFI_MM_COMMUNICATE_HEADER *)(UINTN)CommBuffer;
// CommBuffer is a mandatory parameter. Hence, Rely on
// MessageLength + Header to ascertain the
// total size of the communication payload rather than
// rely on optional CommSize parameter
BufferSize = TempCommHeader->MessageLength +
sizeof (TempCommHeader->HeaderGuid) +
sizeof (TempCommHeader->MessageLength);
//
// If CommSize is supplied it must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
//
if (*CommSize != BufferSize) {
DEBUG ((
DEBUG_ERROR,
"%a Unexpected CommSize value, has: 0x%llx vs. expected: 0x%llx!\n",
__func__,
*CommSize,
BufferSize
));
return EFI_INVALID_PARAMETER;
}
// Now we know that the size is something we can handle, copy it over to the designated comm buffer.
CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)(UINTN)(PcdGet64 (PcdMmBufferBase));
CopyMem (CommunicateHeader, CommBuffer, *CommSize);
// SMC Function ID
CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
// Cookie
CommunicateSmcArgs.Arg1 = 0;
// comm_buffer_address (64-bit physical address)
CommunicateSmcArgs.Arg2 = (UINTN)CommunicateHeader;
// comm_size_address (not used, indicated by setting to zero)
CommunicateSmcArgs.Arg3 = 0;
// Call the Standalone MM environment.
ArmCallSmc (&CommunicateSmcArgs);
switch (CommunicateSmcArgs.Arg0) {
case ARM_SMC_MM_RET_SUCCESS:
// On successful return, the size of data being returned is inferred from
// MessageLength + Header.
BufferSize = CommunicateHeader->MessageLength +
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
if (BufferSize > (UINTN)PcdGet64 (PcdMmBufferSize)) {
// Something bad has happened, we should have landed in ARM_SMC_MM_RET_NO_MEMORY
DEBUG ((
DEBUG_ERROR,
"%a Returned buffer exceeds communication buffer limit. Has: 0x%llx vs. max: 0x%llx!\n",
__func__,
BufferSize,
(UINTN)PcdGet64 (PcdMmBufferSize)
));
Status = EFI_BAD_BUFFER_SIZE;
break;
}
CopyMem (CommBuffer, CommunicateHeader, BufferSize);
*CommSize = BufferSize;
Status = EFI_SUCCESS;
break;
case ARM_SMC_MM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SMC_MM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SMC_MM_RET_NO_MEMORY:
// Unexpected error since the CommSize was checked for zero length
// prior to issuing the SMC
Status = EFI_OUT_OF_RESOURCES;
ASSERT (0);
break;
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
break;
}
return Status;
}
//
// Module globals for the MM Communication PPI
//
STATIC CONST EFI_PEI_MM_COMMUNICATION_PPI mPeiMmCommunication = {
MmCommunicationPeim
};
STATIC CONST EFI_PEI_PPI_DESCRIPTOR mPeiMmCommunicationPpi = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiMmCommunicationPpiGuid,
(VOID *)&mPeiMmCommunication
};
/**
Entry point of PEI MM Communication driver
@param FileHandle Handle of the file being invoked.
Type EFI_PEI_FILE_HANDLE is defined in FfsFindNextFile().
@param PeiServices General purpose services available to every PEIM.
@retval EFI_SUCCESS If the interface could be successfully installed
@retval Others Returned from PeiServicesInstallPpi()
**/
EFI_STATUS
EFIAPI
MmCommunicationPeiInitialize (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
return PeiServicesInstallPpi (&mPeiMmCommunicationPpi);
}

View File

@@ -0,0 +1,40 @@
## @file -- MmCommunicationPei.inf
# PEI MM Communicate driver
#
# Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.<BR>
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
[Defines]
INF_VERSION = 0x0001001B
BASE_NAME = MmCommunicationPei
FILE_GUID = 58FFB346-1B75-42C7-AD69-37C652423C1A
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = MmCommunicationPeiInitialize
[Sources]
MmCommunicationPei.c
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
ArmPkg/ArmPkg.dec
[LibraryClasses]
DebugLib
ArmSmcLib
PeimEntryPoint
PeiServicesLib
HobLib
[Pcd]
gArmTokenSpaceGuid.PcdMmBufferBase
gArmTokenSpaceGuid.PcdMmBufferSize
[Ppis]
gEfiPeiMmCommunicationPpiGuid ## PRODUCES
[Depex]
TRUE

View File

@@ -24,10 +24,17 @@
// Coprocessor Trap Register (CPTR)
#define AARCH64_CPTR_TFP (1 << 10)
// ID_AA64MMFR1 - AArch64 Memory Model Feature Register 0 definitions
#define AARCH64_MMFR1_VH (0xF << 8)
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
#define AARCH64_PFR0_FP (0xF << 16)
#define AARCH64_PFR0_GIC (0xF << 24)
// ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions
#define AARCH64_DFR0_TRACEVER (0xFULL << 4)
#define AARCH64_DFR0_TRBE (0xFULL << 44)
// SCR - Secure Configuration Register definitions
#define SCR_NS (1 << 0)
#define SCR_IRQ (1 << 1)

View File

@@ -244,4 +244,13 @@
#define TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)
#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)
/*
* SMC64 SiP Service Calls
*/
#define SMC_FASTCALL 0x80000000
#define SMC64_FUNCTION (SMC_FASTCALL | 0x40000000)
#define SMC_SIP_FUNCTION (SMC64_FUNCTION | 0x02000000)
#define SMC_SIP_FUNCTION_ID(n) (SMC_SIP_FUNCTION | (n))
#endif // ARM_STD_SMC_H_

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.<BR>
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -110,10 +110,10 @@
// Bit Mask for
#define ARM_GIC_ICCIAR_ACKINTID 0x3FF
UINTN
UINT32
EFIAPI
ArmGicGetInterfaceIdentification (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
// GIC Secure interfaces
@@ -121,8 +121,8 @@ VOID
EFIAPI
ArmGicSetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
IN UINTN GicDistributorBase,
IN UINTN GicInterruptInterfaceBase
);
VOID
@@ -136,40 +136,40 @@ ArmGicSetSecureInterrupts (
VOID
EFIAPI
ArmGicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicDisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicEnableDistributor (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
);
VOID
EFIAPI
ArmGicDisableDistributor (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
);
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
IN INTN GicDistributorBase
IN UINTN GicDistributorBase
);
VOID
EFIAPI
ArmGicSendSgiTo (
IN INTN GicDistributorBase,
IN INTN TargetListFilter,
IN INTN CPUTargetList,
IN INTN SgiId
IN UINTN GicDistributorBase,
IN UINT8 TargetListFilter,
IN UINT8 CPUTargetList,
IN UINT8 SgiId
);
/*
@@ -203,8 +203,8 @@ ArmGicEndOfInterrupt (
UINTN
EFIAPI
ArmGicSetPriorityMask (
IN INTN GicInterruptInterfaceBase,
IN INTN PriorityMask
IN UINTN GicInterruptInterfaceBase,
IN INTN PriorityMask
);
VOID
@@ -251,20 +251,20 @@ VOID
EFIAPI
ArmGicV2SetupNonSecure (
IN UINTN MpId,
IN INTN GicDistributorBase,
IN INTN GicInterruptInterfaceBase
IN UINTN GicDistributorBase,
IN UINTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
IN INTN GicInterruptInterfaceBase
IN UINTN GicInterruptInterfaceBase
);
UINTN

View File

@@ -45,8 +45,6 @@ typedef enum {
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
} ARM_MEMORY_REGION_ATTRIBUTES;
#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1)
typedef struct {
EFI_PHYSICAL_ADDRESS PhysicalBase;
EFI_VIRTUAL_ADDRESS VirtualBase;
@@ -766,6 +764,49 @@ ArmHasCcidx (
VOID
);
#ifdef MDE_CPU_AARCH64
///
/// AArch64-only ID Register Helper functions
///
/**
Checks whether the CPU implements the Virtualization Host Extensions.
@retval TRUE FEAT_VHE is implemented.
@retval FALSE FEAT_VHE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasVhe (
VOID
);
/**
Checks whether the CPU implements the Trace Buffer Extension.
@retval TRUE FEAT_TRBE is implemented.
@retval FALSE FEAT_TRBE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasTrbe (
VOID
);
/**
Checks whether the CPU implements the Embedded Trace Extension.
@retval TRUE FEAT_ETE is implemented.
@retval FALSE FEAT_ETE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasEte (
VOID
);
#endif // MDE_CPU_AARCH64
#ifdef MDE_CPU_ARM
///
/// AArch32-only ID Register Helper functions

View File

@@ -21,68 +21,6 @@ ArmConfigureMmu (
OUT UINTN *TranslationTableSize OPTIONAL
);
/**
Convert a region of memory to read-protected, by clearing the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
EFIAPI
ArmSetMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
/**
Convert a region of memory to read-enabled, by setting the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
EFIAPI
ArmClearMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
EFIAPI
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
VOID
EFIAPI
ArmReplaceLiveTranslationEntry (
@@ -92,11 +30,45 @@ ArmReplaceLiveTranslationEntry (
IN BOOLEAN DisableMmu
);
/**
Set the requested memory permission attributes on a region of memory.
BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
region is mapped according to this memory type, and additional memory
permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
discarding any permission attributes that are currently set for the region.
AttributeMask is ignored in this case, and must be set to 0x0.
If Attributes contains only a combination of memory permission attributes
(EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
memory type, even if it is not uniformly set across the region. In this case,
AttributesMask may be set to a mask of permission attributes, and memory
permissions omitted from this mask will not be updated for any page in the
region. All attributes appearing in Attributes must appear in AttributeMask
as well. (Attributes & ~AttributeMask must produce 0x0)
@param[in] BaseAddress The physical address that is the start address of
a memory region.
@param[in] Length The size in bytes of the memory region.
@param[in] Attributes Mask of memory attributes to set.
@param[in] AttributeMask Mask of memory attributes to take into account.
@retval EFI_SUCCESS The attributes were set for the memory region.
@retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
Invalid combination of Attributes and
AttributeMask.
@retval EFI_OUT_OF_RESOURCES Requested attributes cannot be applied due to
lack of system resources.
**/
EFI_STATUS
ArmSetMemoryAttributes (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN UINT64 Attributes,
IN UINT64 AttributeMask
);
#endif // ARM_MMU_LIB_H_

View File

@@ -104,3 +104,49 @@ ArmHasCcidx (
Mmfr2 = ArmReadIdAA64Mmfr2 ();
return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
}
/**
Checks whether the CPU implements the Virtualization Host Extensions.
@retval TRUE FEAT_VHE is implemented.
@retval FALSE FEAT_VHE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasVhe (
VOID
)
{
return ((ArmReadIdAA64Mmfr1 () & AARCH64_MMFR1_VH) != 0);
}
/**
Checks whether the CPU implements the Trace Buffer Extension.
@retval TRUE FEAT_TRBE is implemented.
@retval FALSE FEAT_TRBE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasTrbe (
VOID
)
{
return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRBE) != 0);
}
/**
Checks whether the CPU implements the Embedded Trace Extension.
@retval TRUE FEAT_ETE is implemented.
@retval FALSE FEAT_ETE is not mplemented.
**/
BOOLEAN
EFIAPI
ArmHasEte (
VOID
)
{
// The ID_AA64DFR0_EL1.TraceVer field identifies the presence of FEAT_ETE.
return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRACEVER) != 0);
}

View File

@@ -469,11 +469,45 @@ GcdAttributeToPageAttribute (
return PageAttributes;
}
/**
Set the requested memory permission attributes on a region of memory.
BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
region is mapped according to this memory type, and additional memory
permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
discarding any permission attributes that are currently set for the region.
AttributeMask is ignored in this case, and must be set to 0x0.
If Attributes contains only a combination of memory permission attributes
(EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
memory type, even if it is not uniformly set across the region. In this case,
AttributesMask may be set to a mask of permission attributes, and memory
permissions omitted from this mask will not be updated for any page in the
region. All attributes appearing in Attributes must appear in AttributeMask
as well. (Attributes & ~AttributeMask must produce 0x0)
@param[in] BaseAddress The physical address that is the start address of
a memory region.
@param[in] Length The size in bytes of the memory region.
@param[in] Attributes Mask of memory attributes to set.
@param[in] AttributeMask Mask of memory attributes to take into account.
@retval EFI_SUCCESS The attributes were set for the memory region.
@retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
Invalid combination of Attributes and
AttributeMask.
@retval EFI_OUT_OF_RESOURCES Requested attributes cannot be applied due to
lack of system resources.
**/
EFI_STATUS
ArmSetMemoryAttributes (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN UINT64 Attributes,
IN UINT64 AttributeMask
)
{
UINT64 PageAttributes;
@@ -490,6 +524,22 @@ ArmSetMemoryAttributes (
PageAttributes &= TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK | TT_AF;
PageAttributeMask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK |
TT_PXN_MASK | TT_XN_MASK | TT_AF);
if (AttributeMask != 0) {
if (((AttributeMask & ~(UINT64)(EFI_MEMORY_RP|EFI_MEMORY_RO|EFI_MEMORY_XP)) != 0) ||
((Attributes & ~AttributeMask) != 0))
{
return EFI_INVALID_PARAMETER;
}
// Add attributes omitted from AttributeMask to the set of attributes to preserve
PageAttributeMask |= GcdAttributeToPageAttribute (~AttributeMask) &
(TT_AP_MASK | TT_UXN_MASK | TT_PXN_MASK | TT_AF);
}
} else {
ASSERT (AttributeMask == 0);
if (AttributeMask != 0) {
return EFI_INVALID_PARAMETER;
}
}
return UpdateRegionMapping (
@@ -502,142 +552,6 @@ ArmSetMemoryAttributes (
);
}
STATIC
EFI_STATUS
SetMemoryRegionAttribute (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes,
IN UINT64 BlockEntryMask
)
{
return UpdateRegionMapping (
BaseAddress,
Length,
Attributes,
BlockEntryMask,
ArmGetTTBR0BaseAddress (),
TRUE
);
}
EFI_STATUS
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
UINT64 Val;
if (ArmReadCurrentEL () == AARCH64_EL1) {
Val = TT_PXN_MASK | TT_UXN_MASK;
} else {
Val = TT_XN_MASK;
}
return SetMemoryRegionAttribute (
BaseAddress,
Length,
Val,
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
UINT64 Mask;
// XN maps to UXN in the EL1&0 translation regime
Mask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_PXN_MASK | TT_XN_MASK);
return SetMemoryRegionAttribute (
BaseAddress,
Length,
0,
Mask
);
}
/**
Convert a region of memory to read-protected, by clearing the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
ArmSetMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryRegionAttribute (
BaseAddress,
Length,
0,
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AF)
);
}
/**
Convert a region of memory to read-enabled, by setting the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
ArmClearMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryRegionAttribute (
BaseAddress,
Length,
TT_AF,
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryRegionAttribute (
BaseAddress,
Length,
TT_AP_NO_RO,
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryRegionAttribute (
BaseAddress,
Length,
TT_AP_NO_RW,
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)
);
}
EFI_STATUS
EFIAPI
ArmConfigureMmu (

View File

@@ -169,7 +169,6 @@ PopulateLevel2PageTable (
// Overwrite the section entry to point to the new Level2 Translation Table
*SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
} else {
// We do not support the other section type (16MB Section)
@@ -192,7 +191,6 @@ PopulateLevel2PageTable (
ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
*SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
}

View File

@@ -10,6 +10,7 @@
#include <Uefi.h>
#include <Library/ArmLib.h>
#include <Library/ArmMmuLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
@@ -451,134 +452,95 @@ SetMemoryAttributes (
}
/**
Update the permission or memory type attributes on a range of memory.
Set the requested memory permission attributes on a region of memory.
@param BaseAddress The start of the region.
@param Length The size of the region.
@param Attributes A mask of EFI_MEMORY_xx constants.
BaseAddress and Length must be aligned to EFI_PAGE_SIZE.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
If Attributes contains a memory type attribute (EFI_MEMORY_UC/WC/WT/WB), the
region is mapped according to this memory type, and additional memory
permission attributes (EFI_MEMORY_RP/RO/XP) are taken into account as well,
discarding any permission attributes that are currently set for the region.
AttributeMask is ignored in this case, and must be set to 0x0.
If Attributes contains only a combination of memory permission attributes
(EFI_MEMORY_RP/RO/XP), each page in the region will retain its existing
memory type, even if it is not uniformly set across the region. In this case,
AttributesMask may be set to a mask of permission attributes, and memory
permissions omitted from this mask will not be updated for any page in the
region. All attributes appearing in Attributes must appear in AttributeMask
as well. (Attributes & ~AttributeMask must produce 0x0)
@param[in] BaseAddress The physical address that is the start address of
a memory region.
@param[in] Length The size in bytes of the memory region.
@param[in] Attributes Mask of memory attributes to set.
@param[in] AttributeMask Mask of memory attributes to take into account.
@retval EFI_SUCCESS The attributes were set for the memory region.
@retval EFI_INVALID_PARAMETER BaseAddress or Length is not suitably aligned.
Invalid combination of Attributes and
AttributeMask.
@retval EFI_OUT_OF_RESOURCES Requested attributes cannot be applied due to
lack of system resources.
**/
EFI_STATUS
ArmSetMemoryAttributes (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT64 Attributes
IN UINT64 Attributes,
IN UINT64 AttributeMask
)
{
UINT32 TtEntryMask;
if (((BaseAddress | Length) & EFI_PAGE_MASK) != 0) {
return EFI_INVALID_PARAMETER;
}
if ((Attributes & EFI_MEMORY_CACHETYPE_MASK) == 0) {
//
// No memory type was set in Attributes, so we are going to update the
// permissions only.
//
if (AttributeMask != 0) {
if (((AttributeMask & ~(UINT64)(EFI_MEMORY_RP|EFI_MEMORY_RO|EFI_MEMORY_XP)) != 0) ||
((Attributes & ~AttributeMask) != 0))
{
return EFI_INVALID_PARAMETER;
}
} else {
AttributeMask = EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP;
}
TtEntryMask = 0;
if ((AttributeMask & EFI_MEMORY_RP) != 0) {
TtEntryMask |= TT_DESCRIPTOR_SECTION_AF;
}
if ((AttributeMask & EFI_MEMORY_RO) != 0) {
TtEntryMask |= TT_DESCRIPTOR_SECTION_AP_MASK;
}
if ((AttributeMask & EFI_MEMORY_XP) != 0) {
TtEntryMask |= TT_DESCRIPTOR_SECTION_XN_MASK;
}
} else {
ASSERT (AttributeMask == 0);
if (AttributeMask != 0) {
return EFI_INVALID_PARAMETER;
}
TtEntryMask = TT_DESCRIPTOR_SECTION_TYPE_MASK |
TT_DESCRIPTOR_SECTION_XN_MASK |
TT_DESCRIPTOR_SECTION_AP_MASK |
TT_DESCRIPTOR_SECTION_AF;
}
return SetMemoryAttributes (
BaseAddress,
Length,
Attributes,
TT_DESCRIPTOR_SECTION_TYPE_MASK |
TT_DESCRIPTOR_SECTION_XN_MASK |
TT_DESCRIPTOR_SECTION_AP_MASK |
TT_DESCRIPTOR_SECTION_AF
);
}
EFI_STATUS
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
EFI_MEMORY_XP,
TT_DESCRIPTOR_SECTION_XN_MASK
);
}
EFI_STATUS
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
0,
TT_DESCRIPTOR_SECTION_XN_MASK
);
}
EFI_STATUS
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
EFI_MEMORY_RO,
TT_DESCRIPTOR_SECTION_AP_MASK
);
}
EFI_STATUS
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
0,
TT_DESCRIPTOR_SECTION_AP_MASK
);
}
/**
Convert a region of memory to read-protected, by clearing the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
ArmSetMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
EFI_MEMORY_RP,
TT_DESCRIPTOR_SECTION_AF
);
}
/**
Convert a region of memory to read-enabled, by setting the access flag.
@param BaseAddress The start of the region.
@param Length The size of the region.
@retval EFI_SUCCESS The attributes were set successfully.
@retval EFI_OUT_OF_RESOURCES The operation failed due to insufficient memory.
**/
EFI_STATUS
ArmClearMemoryRegionNoAccess (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
return SetMemoryAttributes (
BaseAddress,
Length,
0,
TT_DESCRIPTOR_SECTION_AF
TtEntryMask
);
}

View File

@@ -22,6 +22,12 @@
#include <Protocol/DebugSupport.h>
#include <Protocol/LoadedImage.h>
//
// Maximum number of characters to print to serial (UINT8s) and to console if
// available (as UINT16s)
//
#define MAX_PRINT_CHARS 100
STATIC CHAR8 *gExceptionTypeString[] = {
"Synchronous",
"IRQ",
@@ -188,18 +194,14 @@ DefaultExceptionHandler (
IN OUT EFI_SYSTEM_CONTEXT SystemContext
)
{
CHAR8 Buffer[100];
UINTN CharCount;
INT32 Offset;
CHAR8 Buffer[MAX_PRINT_CHARS];
CHAR16 UnicodeBuffer[MAX_PRINT_CHARS];
UINTN CharCount;
INT32 Offset;
if (mRecursiveException) {
STATIC CHAR8 CONST Message[] = "\nRecursive exception occurred while dumping the CPU state\n";
SerialPortWrite ((UINT8 *)Message, sizeof Message - 1);
if (gST->ConOut != NULL) {
AsciiPrint (Message);
}
CpuDeadLoop ();
}
@@ -207,9 +209,10 @@ DefaultExceptionHandler (
CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
SerialPortWrite ((UINT8 *)Buffer, CharCount);
if (gST->ConOut != NULL) {
AsciiPrint (Buffer);
}
// Prepare a unicode buffer for ConOut, if applicable, in case the buffer
// gets reused.
UnicodeSPrintAsciiFormat (UnicodeBuffer, MAX_PRINT_CHARS, Buffer);
DEBUG_CODE_BEGIN ();
CHAR8 *Pdb, *PrevPdb;
@@ -330,6 +333,13 @@ DefaultExceptionHandler (
));
}
// Attempt to print that we had a synchronous exception to ConOut. We do
// this after the serial logging as ConOut's logging is more complex and we
// aren't guaranteed to succeed.
if (gST->ConOut != NULL) {
gST->ConOut->OutputString (gST->ConOut, UnicodeBuffer);
}
ASSERT (FALSE);
CpuDeadLoop ();
}

View File

@@ -23,6 +23,12 @@
#include <Protocol/DebugSupport.h>
#include <Library/DefaultExceptionHandlerLib.h>
//
// Maximum number of characters to print to serial (UINT8s) and to console if
// available (as UINT16s)
//
#define MAX_PRINT_CHARS 100
//
// The number of elements in a CHAR8 array, including the terminating NUL, that
// is meant to hold the string rendering of the CPSR.
@@ -198,7 +204,8 @@ DefaultExceptionHandler (
IN OUT EFI_SYSTEM_CONTEXT SystemContext
)
{
CHAR8 Buffer[100];
CHAR8 Buffer[MAX_PRINT_CHARS];
CHAR16 UnicodeBuffer[MAX_PRINT_CHARS];
UINTN CharCount;
UINT32 DfsrStatus;
UINT32 IfsrStatus;
@@ -216,9 +223,10 @@ DefaultExceptionHandler (
SystemContext.SystemContextArm->CPSR
);
SerialPortWrite ((UINT8 *)Buffer, CharCount);
if (gST->ConOut != NULL) {
AsciiPrint (Buffer);
}
// Prepare a unicode buffer for ConOut, if applicable, as Buffer is used
// below.
UnicodeSPrintAsciiFormat (UnicodeBuffer, MAX_PRINT_CHARS, Buffer);
DEBUG_CODE_BEGIN ();
CHAR8 *Pdb;
@@ -289,6 +297,14 @@ DefaultExceptionHandler (
}
DEBUG ((DEBUG_ERROR, "\n"));
// Attempt to print that we had a synchronous exception to ConOut. We do
// this after the serial logging as ConOut's logging is more complex and we
// aren't guaranteed to succeed.
if (gST->ConOut != NULL) {
gST->ConOut->OutputString (gST->ConOut, UnicodeBuffer);
}
ASSERT (FALSE);
CpuDeadLoop (); // may return if executing under a debugger

View File

@@ -86,7 +86,12 @@ OpteeSharedMemoryRemap (
return EFI_BUFFER_TOO_SMALL;
}
Status = ArmSetMemoryAttributes (PhysicalAddress, Size, EFI_MEMORY_WB);
Status = ArmSetMemoryAttributes (
PhysicalAddress,
Size,
EFI_MEMORY_WB | EFI_MEMORY_XP,
0
);
if (EFI_ERROR (Status)) {
return Status;
}

View File

@@ -57,7 +57,6 @@
[FixedPcd]
gArmTokenSpaceGuid.PcdUefiShellDefaultBootEnable
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
@@ -68,6 +67,7 @@
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
gEfiMdeModulePkgTokenSpaceGuid.PcdBootDiscoveryPolicy
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
[Guids]
gBootDiscoveryPolicyMgrFormsetGuid

View File

@@ -185,7 +185,7 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {
UINTN VendorStrLen;
UINTN VerStrLen;
UINTN DateStrLen;
UINTN BiosPhysicalSize;
UINT64 BiosPhysicalSize;
CHAR16 *Vendor;
CHAR16 *Version;
CHAR16 *ReleaseDate;

View File

@@ -27,8 +27,6 @@
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/UefiRuntimeLib.h>
#include <Protocol/RealTimeClock.h>
#include "PL031RealTimeClock.h"
STATIC BOOLEAN mPL031Initialized = FALSE;
@@ -274,9 +272,10 @@ LibSetWakeupTime (
@param[in] Event The Event that is being processed
@param[in] Context Event Context
**/
STATIC
VOID
EFIAPI
LibRtcVirtualNotifyEvent (
VirtualNotifyEvent (
IN EFI_EVENT Event,
IN VOID *Context
)
@@ -309,7 +308,6 @@ LibRtcInitialize (
)
{
EFI_STATUS Status;
EFI_HANDLE Handle;
// Initialize RTC Base Address
mPL031RtcBase = PcdGet32 (PcdPL031RtcBase);
@@ -330,23 +328,13 @@ LibRtcInitialize (
return Status;
}
// Install the protocol
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiRealTimeClockArchProtocolGuid,
NULL,
NULL
);
ASSERT_EFI_ERROR (Status);
//
// Register for the virtual address change event
//
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_NOTIFY,
LibRtcVirtualNotifyEvent,
VirtualNotifyEvent,
NULL,
&gEfiEventVirtualAddressChangeGuid,
&mRtcVirtualAddrChangeEvent

View File

@@ -37,7 +37,7 @@
!if $(TARGET) == RELEASE
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
!else
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DebugLibFdtPL011UartRam.inf
!endif
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
@@ -121,6 +121,7 @@
# ARM PL011 UART Driver
PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf
FdtSerialPortAddressLib|ArmVirtPkg/Library/FdtSerialPortAddressLib/FdtSerialPortAddressLib.inf
PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
#PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
@@ -154,7 +155,7 @@
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
!endif
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
RngLib|MdeModulePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
#
# Secure Boot dependencies
@@ -188,6 +189,9 @@
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
!if $(TARGET) != RELEASE
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DebugLibFdtPL011UartFlash.inf
!endif
[LibraryClasses.common.PEI_CORE]
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
@@ -203,6 +207,9 @@
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
!if $(TARGET) != RELEASE
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DebugLibFdtPL011UartFlash.inf
!endif
[LibraryClasses.common.PEIM]
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
@@ -218,6 +225,9 @@
PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
SerialPortLib|ArmVirtPkg/Library/FdtPL011SerialPortLib/EarlyFdtPL011SerialPortLib.inf
!if $(TARGET) != RELEASE
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DebugLibFdtPL011UartFlash.inf
!endif
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
@@ -245,7 +255,7 @@
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
DebugLib|ArmVirtPkg/Library/DebugLibFdtPL011Uart/DxeRuntimeDebugLibFdtPL011Uart.inf
!endif
VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
@@ -383,6 +393,10 @@
<PcdsFixedAtBuild>
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
}
ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf {
<PcdsFixedAtBuild>
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
}
OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf {
<PcdsFixedAtBuild>
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE

View File

@@ -178,6 +178,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|0x0
#
# ARM General Interrupt Controller

View File

@@ -169,6 +169,7 @@ READ_LOCK_STATUS = TRUE
INF ShellPkg/Application/Shell/Shell.inf
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf
INF ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf
INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf
#

View File

@@ -1,7 +1,7 @@
# @file
# Workspace file for KVMTool virtual platform.
#
# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -77,6 +77,9 @@
PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
PlatformHookLib|ArmVirtPkg/Library/Fdt16550SerialPortHookLib/Fdt16550SerialPortHookLib.inf
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
HwInfoParserLib|DynamicTablesPkg/Library/FdtHwInfoParserLib/FdtHwInfoParserLib.inf
DynamicPlatRepoLib|DynamicTablesPkg/Library/Common/DynamicPlatRepoLib/DynamicPlatRepoLib.inf
@@ -88,6 +91,14 @@
PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
PlatformHookLib|ArmVirtPkg/Library/Fdt16550SerialPortHookLib/EarlyFdt16550SerialPortHookLib.inf
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
[LibraryClasses.common.DXE_RUNTIME_DRIVER]
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
!endif
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
@@ -183,6 +194,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|0x0
#
# ARM General Interrupt Controller
@@ -219,6 +231,10 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x40000
# Define PCD for emulating Runtime Variable storage when
# CFI flash is absent.
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|FALSE
## RTC Register address in MMIO space.
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0
@@ -307,7 +323,10 @@
#
# Platform Driver
#
ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf {
<LibraryClasses>
NULL|ArmVirtPkg/Library/NorFlashKvmtoolLib/NorFlashKvmtoolLib.inf
}
OvmfPkg/Fdt/VirtioFdtDxe/VirtioFdtDxe.inf
EmbeddedPkg/Drivers/FdtClientDxe/FdtClientDxe.inf
OvmfPkg/Fdt/HighMemDxe/HighMemDxe.inf

View File

@@ -125,5 +125,13 @@
], # words to extend to the dictionary for this package
"IgnoreStandardPaths": [], # Standard Plugin defined paths that should be ignore
"AdditionalIncludePaths": [] # Additional paths to spell check (wildcards supported)
},
"DebugMacroCheck": {
"StringSubstitutions": {
# DynamicTablesPkg/Include/ConfigurationManagerObject.h
# Reason: Expansion of macro that contains a print specifier.
"FMT_CM_OBJECT_ID": "0x%lx"
}
}
}

View File

@@ -27,6 +27,7 @@
[LibraryClasses]
ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h
FdtSerialPortAddressLib|Include/Library/FdtSerialPortAddressLib.h
[Guids.common]
gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }

View File

@@ -111,6 +111,7 @@
ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
[LibraryClasses.common.DXE_DRIVER]
AcpiPlatformLib|OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
!if $(TPM2_ENABLE) == TRUE
@@ -252,6 +253,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|0x0
#
# ARM General Interrupt Controller
@@ -448,6 +450,7 @@
OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
OvmfPkg/VirtioNetDxe/VirtioNet.inf
OvmfPkg/VirtioRngDxe/VirtioRng.inf
OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs

View File

@@ -98,10 +98,12 @@ READ_LOCK_STATUS = TRUE
INF OvmfPkg/VirtioNetDxe/VirtioNet.inf
INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
INF OvmfPkg/VirtioRngDxe/VirtioRng.inf
INF OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
INF ShellPkg/Application/Shell/Shell.inf
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf
INF ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf
INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf
#

View File

@@ -83,6 +83,7 @@
TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf
[LibraryClasses.common.DXE_DRIVER]
AcpiPlatformLib|OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
[LibraryClasses.common.UEFI_DRIVER]
@@ -213,6 +214,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|0x0
#
# ARM General Interrupt Controller
@@ -353,6 +355,7 @@
OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
OvmfPkg/VirtioNetDxe/VirtioNet.inf
OvmfPkg/VirtioRngDxe/VirtioRng.inf
OvmfPkg/VirtioSerialDxe/VirtioSerial.inf
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs

View File

@@ -29,6 +29,9 @@
[LibraryClasses]
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
RealTimeClockLib|OvmfPkg/Library/XenRealTimeClockLib/XenRealTimeClockLib.inf
XenHypercallLib|OvmfPkg/Library/XenHypercallLib/XenHypercallLib.inf
@@ -52,6 +55,11 @@
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
TpmPlatformHierarchyLib|SecurityPkg/Library/PeiDxeTpmPlatformHierarchyLibNull/PeiDxeTpmPlatformHierarchyLib.inf
[LibraryClasses.common.DXE_RUNTIME_DRIVER]
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
!endif
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
@@ -118,6 +126,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|0x0
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum|0x0
#
# ARM General Interrupt Controller
@@ -146,6 +155,9 @@
PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
!if $(TARGET) != RELEASE
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
!endif
}
#

View File

@@ -180,6 +180,7 @@ READ_LOCK_STATUS = TRUE
INF ShellPkg/Application/Shell/Shell.inf
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
INF ShellPkg/DynamicCommand/HttpDynamicCommand/HttpDynamicCommand.inf
INF ShellPkg/DynamicCommand/VariablePolicyDynamicCommand/VariablePolicyDynamicCommand.inf
INF OvmfPkg/LinuxInitrdDynamicShellCommand/LinuxInitrdDynamicShellCommand.inf
#

View File

@@ -1,6 +1,6 @@
/** @file
GUID for the HOB that caches the base address of the PL011 serial port, for
when PCD access is not available.
GUID for the HOB that caches the base address(es) of the PL011 serial port(s),
for when PCD access is not available.
Copyright (C) 2014, Red Hat, Inc.
@@ -18,4 +18,15 @@
extern EFI_GUID gEarlyPL011BaseAddressGuid;
typedef struct {
//
// for SerialPortLib and console IO
//
UINT64 ConsoleAddress;
//
// for DebugLib; may equal ConsoleAddress if there's only one PL011 UART
//
UINT64 DebugAddress;
} EARLY_PL011_BASE_ADDRESS;
#endif

View File

@@ -0,0 +1,83 @@
/** @file
Determine the base addresses of serial ports from the Device Tree.
Copyright (C) Red Hat
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef FDT_SERIAL_PORT_ADDRESS_LIB_H_
#define FDT_SERIAL_PORT_ADDRESS_LIB_H_
#include <Base.h>
typedef struct {
UINTN NumberOfPorts;
UINT64 BaseAddress[2];
} FDT_SERIAL_PORTS;
/**
Collect the first ARRAY_SIZE (Ports->BaseAddress) serial ports into Ports from
DeviceTree.
@param[in] DeviceTree The flat device tree (FDT) to scan.
@param[in] Compatible Look for Compatible in the "compatible" property of the
scanned nodes.
@param[out] Ports On successful return, Ports->NumberOfPorts contains the
number of serial ports found; it is (a) positive and
(b) at most ARRAY_SIZE (Ports->BaseAddress). If the FDT
had more serial ports, those are not reported. On
error, the contents of Ports are indeterminate.
@retval RETURN_INVALID_PARAMETER DeviceTree does not point to a valid FDT
header.
@retval RETURN_NOT_FOUND No compatible and enabled serial port has
been found.
@retval RETURN_SUCCESS At least one compatible and enabled serial
port has been found; Ports has been filled
in.
**/
RETURN_STATUS
EFIAPI
FdtSerialGetPorts (
IN CONST VOID *DeviceTree,
IN CONST CHAR8 *Compatible,
OUT FDT_SERIAL_PORTS *Ports
);
/**
Fetch the base address of the serial port identified in the "stdout-path"
property of the "/chosen" node in DeviceTree.
@param[in] DeviceTree The flat device tree (FDT) to scan.
@param[out] BaseAddress On success, the base address of the preferred serial
port (to be used as console). On error, BaseAddress
is not modified.
@retval RETURN_INVALID_PARAMETER DeviceTree does not point to a valid FDT
header.
@retval RETURN_NOT_FOUND No enabled console port has been found.
@retval RETURN_PROTOCOL_ERROR The first (or only) node path in the
"stdout-path" property is an empty string.
@retval RETURN_PROTOCOL_ERROR The console port has been found in the FDT,
but its base address is not correctly
represented.
@retval RETURN_SUCCESS BaseAddress has been populated.
**/
RETURN_STATUS
EFIAPI
FdtSerialGetConsolePort (
IN CONST VOID *DeviceTree,
OUT UINT64 *BaseAddress
);
#endif

View File

@@ -4,7 +4,7 @@
- It decides if the firmware should expose ACPI or Device Tree-based
hardware description to the operating system.
Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -75,6 +75,17 @@ KvmtoolPlatformDxeEntryPoint (
{
EFI_STATUS Status;
if (PcdGetBool (PcdEmuVariableNvModeEnable)) {
// The driver implementing the variable service can now be dispatched.
Status = gBS->InstallProtocolInterface (
&gImageHandle,
&gEdkiiNvVarStoreFormattedGuid,
EFI_NATIVE_INTERFACE,
NULL
);
ASSERT_EFI_ERROR (Status);
}
Status = PlatformHasAcpiDt (ImageHandle);
ASSERT_EFI_ERROR (Status);

View File

@@ -3,7 +3,7 @@
# - It decides if the firmware should expose ACPI or Device Tree-based
# hardware description to the operating system.
#
# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -33,10 +33,12 @@
UefiDriverEntryPoint
[Guids]
gEdkiiNvVarStoreFormattedGuid ## SOMETIMES_PRODUCES ## PROTOCOL
gEdkiiPlatformHasAcpiGuid ## SOMETIMES_PRODUCES ## PROTOCOL
gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
[Depex]

View File

@@ -35,6 +35,7 @@ ArmVirtTimerFdtClientLibConstructor (
CONST INTERRUPT_PROPERTY *InterruptProp;
UINT32 PropSize;
INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum;
INT32 HypVirtIntrNum;
RETURN_STATUS PcdStatus;
Status = gBS->LocateProtocol (
@@ -66,10 +67,10 @@ ArmVirtTimerFdtClientLibConstructor (
}
//
// - interrupts : Interrupt list for secure, non-secure, virtual and
// hypervisor timers, in that order.
// - interrupts : Interrupt list for secure, non-secure, virtual,
// hypervisor and hypervisor virtual timers, in that order.
//
ASSERT (PropSize == 36 || PropSize == 48);
ASSERT (PropSize >= 36);
SecIntrNum = SwapBytes32 (InterruptProp[0].Number)
+ (InterruptProp[0].Type ? 16 : 0);
@@ -79,6 +80,8 @@ ArmVirtTimerFdtClientLibConstructor (
+ (InterruptProp[2].Type ? 16 : 0);
HypIntrNum = PropSize < 48 ? 0 : SwapBytes32 (InterruptProp[3].Number)
+ (InterruptProp[3].Type ? 16 : 0);
HypVirtIntrNum = PropSize < 60 ? 0 : SwapBytes32 (InterruptProp[4].Number)
+ (InterruptProp[4].Type ? 16 : 0);
DEBUG ((
DEBUG_INFO,
@@ -97,6 +100,8 @@ ArmVirtTimerFdtClientLibConstructor (
ASSERT_RETURN_ERROR (PcdStatus);
PcdStatus = PcdSet32S (PcdArmArchTimerHypIntrNum, HypIntrNum);
ASSERT_RETURN_ERROR (PcdStatus);
PcdStatus = PcdSet32S (PcdArmArchTimerHypVirtIntrNum, HypVirtIntrNum);
ASSERT_RETURN_ERROR (PcdStatus);
return EFI_SUCCESS;
}

View File

@@ -40,6 +40,7 @@
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypVirtIntrNum
[Depex]
gFdtClientProtocolGuid

View File

@@ -0,0 +1,355 @@
/** @file
Originally copied from "MdePkg/Library/BaseDebugLibSerialPort/DebugLib.c" at
commit f36e1ec1f0a5, and customized for:
- RAM vs. flash dependent PL011 UART initialization,
- direct PL011 UART access, with the base address taken from the device tree
such that the debug output be separate from the SerialPortLib / UEFI console
traffic.
Both of these customizations are hidden behind DebugLibFdtPL011UartWrite(),
which replaces SerialPortWrite().
Copyright (C) Red Hat
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
#include <Library/DebugLib.h>
#include <Library/BaseLib.h>
#include <Library/PrintLib.h>
#include <Library/PcdLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugPrintErrorLevelLib.h>
#include "Write.h"
//
// Define the maximum debug and assert message length that this library supports
//
#define MAX_DEBUG_MESSAGE_LENGTH 0x100
//
// VA_LIST can not initialize to NULL for all compiler, so we use this to
// indicate a null VA_LIST
//
VA_LIST mVaListNull;
/**
Prints a debug message to the debug output device if the specified error level is enabled.
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
GetDebugPrintErrorLevel (), then print the message specified by Format and the
associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
@param ... Variable argument list whose contents are accessed
based on the format string specified by Format.
**/
VOID
EFIAPI
DebugPrint (
IN UINTN ErrorLevel,
IN CONST CHAR8 *Format,
...
)
{
VA_LIST Marker;
VA_START (Marker, Format);
DebugVPrint (ErrorLevel, Format, Marker);
VA_END (Marker);
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled base on Null-terminated format string and a
VA_LIST argument list or a BASE_LIST argument list.
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
GetDebugPrintErrorLevel (), then print the message specified by Format and
the associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
@param VaListMarker VA_LIST marker for the variable argument list.
@param BaseListMarker BASE_LIST marker for the variable argument list.
**/
VOID
DebugPrintMarker (
IN UINTN ErrorLevel,
IN CONST CHAR8 *Format,
IN VA_LIST VaListMarker,
IN BASE_LIST BaseListMarker
)
{
CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
//
// If Format is NULL, then ASSERT().
//
ASSERT (Format != NULL);
//
// Check driver debug mask value and global mask
//
if ((ErrorLevel & GetDebugPrintErrorLevel ()) == 0) {
return;
}
//
// Convert the DEBUG() message to an ASCII String
//
if (BaseListMarker == NULL) {
AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker);
} else {
AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker);
}
//
// Send the print string to a Serial Port
//
DebugLibFdtPL011UartWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled.
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
GetDebugPrintErrorLevel (), then print the message specified by Format and
the associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
@param VaListMarker VA_LIST marker for the variable argument list.
**/
VOID
EFIAPI
DebugVPrint (
IN UINTN ErrorLevel,
IN CONST CHAR8 *Format,
IN VA_LIST VaListMarker
)
{
DebugPrintMarker (ErrorLevel, Format, VaListMarker, NULL);
}
/**
Prints a debug message to the debug output device if the specified
error level is enabled.
This function use BASE_LIST which would provide a more compatible
service than VA_LIST.
If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib function
GetDebugPrintErrorLevel (), then print the message specified by Format and
the associated variable argument list to the debug output device.
If Format is NULL, then ASSERT().
@param ErrorLevel The error level of the debug message.
@param Format Format string for the debug message to print.
@param BaseListMarker BASE_LIST marker for the variable argument list.
**/
VOID
EFIAPI
DebugBPrint (
IN UINTN ErrorLevel,
IN CONST CHAR8 *Format,
IN BASE_LIST BaseListMarker
)
{
DebugPrintMarker (ErrorLevel, Format, mVaListNull, BaseListMarker);
}
/**
Prints an assert message containing a filename, line number, and description.
This may be followed by a breakpoint or a dead loop.
Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"
to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
CpuDeadLoop() is called. If neither of these bits are set, then this function
returns immediately after the message is printed to the debug output device.
DebugAssert() must actively prevent recursion. If DebugAssert() is called while
processing another DebugAssert(), then DebugAssert() must return immediately.
If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.
If Description is NULL, then a <Description> string of "(NULL) Description" is printed.
@param FileName The pointer to the name of the source file that generated the assert condition.
@param LineNumber The line number in the source file that generated the assert condition
@param Description The pointer to the description of the assert condition.
**/
VOID
EFIAPI
DebugAssert (
IN CONST CHAR8 *FileName,
IN UINTN LineNumber,
IN CONST CHAR8 *Description
)
{
CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
//
// Generate the ASSERT() message in Ascii format
//
AsciiSPrint (Buffer, sizeof (Buffer), "ASSERT [%a] %a(%d): %a\n", gEfiCallerBaseName, FileName, LineNumber, Description);
//
// Send the print string to the Console Output device
//
DebugLibFdtPL011UartWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
//
// Generate a Breakpoint, DeadLoop, or NOP based on PCD settings
//
if ((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED) != 0) {
CpuBreakpoint ();
} else if ((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED) != 0) {
CpuDeadLoop ();
}
}
/**
Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
This function fills Length bytes of Buffer with the value specified by
PcdDebugClearMemoryValue, and returns Buffer.
If Buffer is NULL, then ASSERT().
If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
@param Buffer The pointer to the target buffer to be filled with PcdDebugClearMemoryValue.
@param Length The number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
@return Buffer The pointer to the target buffer filled with PcdDebugClearMemoryValue.
**/
VOID *
EFIAPI
DebugClearMemory (
OUT VOID *Buffer,
IN UINTN Length
)
{
//
// If Buffer is NULL, then ASSERT().
//
ASSERT (Buffer != NULL);
//
// SetMem() checks for the the ASSERT() condition on Length and returns Buffer
//
return SetMem (Buffer, Length, PcdGet8 (PcdDebugClearMemoryValue));
}
/**
Returns TRUE if ASSERT() macros are enabled.
This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
@retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
**/
BOOLEAN
EFIAPI
DebugAssertEnabled (
VOID
)
{
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG() macros are enabled.
This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
@retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
**/
BOOLEAN
EFIAPI
DebugPrintEnabled (
VOID
)
{
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG_CODE() macros are enabled.
This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
@retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
**/
BOOLEAN
EFIAPI
DebugCodeEnabled (
VOID
)
{
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
}
/**
Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of
PcdDebugProperyMask is set. Otherwise FALSE is returned.
@retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
@retval FALSE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
**/
BOOLEAN
EFIAPI
DebugClearMemoryEnabled (
VOID
)
{
return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
}
/**
Returns TRUE if any one of the bit is set both in ErrorLevel and PcdFixedDebugPrintErrorLevel.
This function compares the bit mask of ErrorLevel and PcdFixedDebugPrintErrorLevel.
@retval TRUE Current ErrorLevel is supported.
@retval FALSE Current ErrorLevel is not supported.
**/
BOOLEAN
EFIAPI
DebugPrintLevelEnabled (
IN CONST UINTN ErrorLevel
)
{
return (BOOLEAN)((ErrorLevel & PcdGet32 (PcdFixedDebugPrintErrorLevel)) != 0);
}

View File

@@ -0,0 +1,54 @@
## @file
# DebugLib instance that produces debug output directly via PL011UartLib.
#
# If there are at least two PL011 UARTs in the device tree, and the /chosen
# node's "stdout-path" property references one PL011 UART, then both raw
# SerialPortLib IO, and -- via SerialDxe -- UEFI console IO, will occur on that
# UART; and this DebugLib instance will produce output on a *different* UART.
#
# This instance is suitable for modules that may run from flash or RAM.
#
# Copyright (C) Red Hat
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
[Defines]
INF_VERSION = 1.27
BASE_NAME = DebugLibFdtPL011UartFlash
FILE_GUID = 43A4C56B-D071-4CE0-A157-9D59E6161DEC
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = DebugLib|SEC PEI_CORE PEIM
[Sources]
DebugLib.c
Flash.c
Write.h
[Packages]
ArmPlatformPkg/ArmPlatformPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugPrintErrorLevelLib
FdtSerialPortAddressLib # Flash.c
PL011UartLib
PcdLib
PrintLib
[Pcd]
gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress # Flash.c
gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel
[FixedPcd]
gArmPlatformTokenSpaceGuid.PL011UartClkInHz
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits

View File

@@ -0,0 +1,60 @@
## @file
# DebugLib instance that produces debug output directly via PL011UartLib.
#
# If there are at least two PL011 UARTs in the device tree, and the /chosen
# node's "stdout-path" property references one PL011 UART, then both raw
# SerialPortLib IO, and -- via SerialDxe -- UEFI console IO, will occur on that
# UART; and this DebugLib instance will produce output on a *different* UART.
#
# This instance is suitable for modules that can only run from RAM (except
# DXE_RUNTIME_DRIVER).
#
# Copyright (C) Red Hat
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
[Defines]
INF_VERSION = 1.27
BASE_NAME = DebugLibFdtPL011UartRam
FILE_GUID = 0584DE55-9C4C-49C1-ADA0-F62C9C1F3600
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = DebugLib|DXE_CORE SMM_CORE MM_CORE_STANDALONE DXE_DRIVER DXE_SMM_DRIVER SMM_DRIVER MM_STANDALONE UEFI_DRIVER UEFI_APPLICATION
CONSTRUCTOR = DebugLibFdtPL011UartRamConstructor
[Sources]
DebugLib.c
Ram.c
Ram.h
RamNonRuntime.c
Write.h
[Packages]
ArmPlatformPkg/ArmPlatformPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugPrintErrorLevelLib
HobLib # Ram.c
PL011UartLib
PcdLib
PrintLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel
[FixedPcd]
gArmPlatformTokenSpaceGuid.PL011UartClkInHz
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
[Guids]
gEarlyPL011BaseAddressGuid # Ram.c

View File

@@ -0,0 +1,61 @@
## @file
# DebugLib instance that produces debug output directly via PL011UartLib.
#
# If there are at least two PL011 UARTs in the device tree, and the /chosen
# node's "stdout-path" property references one PL011 UART, then both raw
# SerialPortLib IO, and -- via SerialDxe -- UEFI console IO, will occur on that
# UART; and this DebugLib instance will produce output on a *different* UART.
#
# This instance is suitable for DXE_RUNTIME_DRIVER modules. When exiting boot
# services, UART access is stopped.
#
# Copyright (C) Red Hat
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
[Defines]
INF_VERSION = 1.27
BASE_NAME = DxeRuntimeDebugLibFdtPL011Uart
FILE_GUID = 8A6E0972-81B5-4FF4-BB24-A07748415947
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = DebugLib|DXE_RUNTIME_DRIVER
CONSTRUCTOR = DxeRuntimeDebugLibFdtPL011UartConstructor
DESTRUCTOR = DxeRuntimeDebugLibFdtPL011UartDestructor
[Sources]
DebugLib.c
Ram.c
Ram.h
Runtime.c
Write.h
[Packages]
ArmPlatformPkg/ArmPlatformPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugPrintErrorLevelLib
HobLib # Ram.c
PL011UartLib
PcdLib
PrintLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask
gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel
[FixedPcd]
gArmPlatformTokenSpaceGuid.PL011UartClkInHz
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
[Guids]
gEarlyPL011BaseAddressGuid # Ram.c

View File

@@ -0,0 +1,107 @@
/** @file
Define DebugLibFdtPL011UartWrite() for modules that may run from flash or RAM.
Copyright (C) Red Hat
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/FdtSerialPortAddressLib.h>
#include <Library/PL011UartLib.h>
#include <Library/PcdLib.h>
#include "Write.h"
/**
(Copied from SerialPortWrite() in "MdePkg/Include/Library/SerialPortLib.h" at
commit c4547aefb3d0, with the Buffer non-nullity assertion removed:)
Write data from buffer to serial device.
Writes NumberOfBytes data bytes from Buffer to the serial device.
The number of bytes actually written to the serial device is returned.
If the return value is less than NumberOfBytes, then the write operation failed.
If NumberOfBytes is zero, then return 0.
@param Buffer Pointer to the data buffer to be written.
@param NumberOfBytes Number of bytes to written to the serial device.
@retval 0 NumberOfBytes is 0.
@retval >0 The number of bytes written to the serial device.
If this value is less than NumberOfBytes, then the write operation failed.
**/
UINTN
DebugLibFdtPL011UartWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
CONST VOID *DeviceTree;
RETURN_STATUS Status;
FDT_SERIAL_PORTS Ports;
UINT64 DebugAddress;
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
DeviceTree = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
if (DeviceTree == NULL) {
return 0;
}
Status = FdtSerialGetPorts (DeviceTree, "arm,pl011", &Ports);
if (RETURN_ERROR (Status)) {
return 0;
}
if (Ports.NumberOfPorts == 1) {
//
// Just one UART; direct DebugLib to it.
//
DebugAddress = Ports.BaseAddress[0];
} else {
UINT64 ConsoleAddress;
Status = FdtSerialGetConsolePort (DeviceTree, &ConsoleAddress);
if (EFI_ERROR (Status)) {
//
// At least two UARTs; but failed to get the console preference. Use the
// second UART for DebugLib.
//
DebugAddress = Ports.BaseAddress[1];
} else {
//
// At least two UARTs; and console preference available. Use the first
// such UART for DebugLib that *differs* from ConsoleAddress.
//
if (ConsoleAddress == Ports.BaseAddress[0]) {
DebugAddress = Ports.BaseAddress[1];
} else {
DebugAddress = Ports.BaseAddress[0];
}
}
}
BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits);
Status = PL011UartInitializePort (
(UINTN)DebugAddress,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
if (RETURN_ERROR (Status)) {
return 0;
}
return PL011UartWrite ((UINTN)DebugAddress, Buffer, NumberOfBytes);
}

View File

@@ -0,0 +1,124 @@
/** @file
Define DebugLibFdtPL011UartWrite() for modules that can only run from RAM.
Copyright (C) Red Hat
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
#include <Uefi/UefiMultiPhase.h>
#include <Pi/PiBootMode.h>
#include <Pi/PiHob.h>
#include <Library/HobLib.h>
#include <Library/PL011UartLib.h>
#include <Library/PcdLib.h>
#include <Guid/EarlyPL011BaseAddress.h>
#include "Ram.h"
#include "Write.h"
UINTN mDebugLibFdtPL011UartAddress;
RETURN_STATUS mDebugLibFdtPL011UartPermanentStatus = RETURN_SUCCESS;
/**
Statefully initialize both the library instance and the debug PL011 UART.
**/
STATIC
RETURN_STATUS
Initialize (
VOID
)
{
CONST VOID *Hob;
CONST EARLY_PL011_BASE_ADDRESS *UartBase;
RETURN_STATUS Status;
UINTN DebugAddress;
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
if (mDebugLibFdtPL011UartAddress != 0) {
return RETURN_SUCCESS;
}
if (RETURN_ERROR (mDebugLibFdtPL011UartPermanentStatus)) {
return mDebugLibFdtPL011UartPermanentStatus;
}
Hob = GetFirstGuidHob (&gEarlyPL011BaseAddressGuid);
if ((Hob == NULL) || (GET_GUID_HOB_DATA_SIZE (Hob) != sizeof *UartBase)) {
Status = RETURN_NOT_FOUND;
goto Failed;
}
UartBase = GET_GUID_HOB_DATA (Hob);
DebugAddress = (UINTN)UartBase->DebugAddress;
if (DebugAddress == 0) {
Status = RETURN_NOT_FOUND;
goto Failed;
}
BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);
DataBits = PcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE)PcdGet8 (PcdUartDefaultStopBits);
Status = PL011UartInitializePort (
DebugAddress,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
if (RETURN_ERROR (Status)) {
goto Failed;
}
mDebugLibFdtPL011UartAddress = DebugAddress;
return RETURN_SUCCESS;
Failed:
mDebugLibFdtPL011UartPermanentStatus = Status;
return Status;
}
/**
(Copied from SerialPortWrite() in "MdePkg/Include/Library/SerialPortLib.h" at
commit c4547aefb3d0, with the Buffer non-nullity assertion removed:)
Write data from buffer to serial device.
Writes NumberOfBytes data bytes from Buffer to the serial device.
The number of bytes actually written to the serial device is returned.
If the return value is less than NumberOfBytes, then the write operation failed.
If NumberOfBytes is zero, then return 0.
@param Buffer Pointer to the data buffer to be written.
@param NumberOfBytes Number of bytes to written to the serial device.
@retval 0 NumberOfBytes is 0.
@retval >0 The number of bytes written to the serial device.
If this value is less than NumberOfBytes, then the write operation failed.
**/
UINTN
DebugLibFdtPL011UartWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
RETURN_STATUS Status;
Status = Initialize ();
if (RETURN_ERROR (Status)) {
return 0;
}
return PL011UartWrite (mDebugLibFdtPL011UartAddress, Buffer, NumberOfBytes);
}

View File

@@ -0,0 +1,18 @@
/** @file
Declare the variables that modules that can only run from RAM use for
remembering initialization status.
Copyright (C) Red Hat
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef DEBUG_LIB_FDT_PL011_UART_RAM_H_
#define DEBUG_LIB_FDT_PL011_UART_RAM_H_
#include <Base.h>
extern UINTN mDebugLibFdtPL011UartAddress;
extern RETURN_STATUS mDebugLibFdtPL011UartPermanentStatus;
#endif

View File

@@ -0,0 +1,27 @@
/** @file
Provide an empty lib instance constructor for modules that can only run from
RAM but are not DXE_RUNTIME_DRIVER modules.
This ensures that e.g. any HobLib constructor is ordered correctly. (The
DXE_CORE calls constructors late, but the DXE_CORE HobLib instance needs no
construction anyway.)
Copyright (C) Red Hat
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
/**
Empty library instance constructor, only for ensuring the connectivity of the
constructor dependency graph.
**/
RETURN_STATUS
EFIAPI
DebugLibFdtPL011UartRamConstructor (
VOID
)
{
return RETURN_SUCCESS;
}

View File

@@ -0,0 +1,88 @@
/** @file
Permanently disable the library instance in DXE_RUNTIME_DRIVER modules when
exiting boot services.
Copyright (C) Red Hat
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiSpec.h>
#include "Ram.h"
STATIC EFI_EVENT mExitBootServicesEvent;
/**
Notification function that is triggered when the boot service
ExitBootServices() is called.
@param[in] Event Event whose notification function is being invoked. Here,
unused.
@param[in] Context The pointer to the notification function's context, which
is implementation-dependent. Here, unused.
**/
STATIC
VOID
EFIAPI
ExitBootServicesNotify (
IN EFI_EVENT Event,
IN VOID *Context
)
{
mDebugLibFdtPL011UartAddress = 0;
mDebugLibFdtPL011UartPermanentStatus = RETURN_ABORTED;
}
/**
Library instance constructor, registering ExitBootServicesNotify().
@param[in] ImageHandle The firmware-allocated handle for the EFI image.
@param[in] SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The operation completed successfully.
@return Error codes propagated from CreateEvent(); the
registration of ExitBootServicesNotify() failed.
**/
EFI_STATUS
EFIAPI
DxeRuntimeDebugLibFdtPL011UartConstructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return SystemTable->BootServices->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_CALLBACK,
ExitBootServicesNotify,
NULL /* NotifyContext */,
&mExitBootServicesEvent
);
}
/**
Library instance destructor, deregistering ExitBootServicesNotify().
@param[in] ImageHandle The firmware-allocated handle for the EFI image.
@param[in] SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS Library instance tear-down complete.
@return Error codes propagated from CloseEvent(); the
deregistration of ExitBootServicesNotify() failed.
**/
EFI_STATUS
EFIAPI
DxeRuntimeDebugLibFdtPL011UartDestructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
return SystemTable->BootServices->CloseEvent (mExitBootServicesEvent);
}

View File

@@ -0,0 +1,39 @@
/** @file
Declare DebugLibFdtPL011UartWrite(), for abstracting PL011 UART initialization
differences between flash- vs. RAM-based modules.
Copyright (C) Red Hat
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2012 - 2014, ARM Ltd. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef DEBUG_LIB_FDT_PL011_UART_WRITE_H_
#define DEBUG_LIB_FDT_PL011_UART_WRITE_H_
/**
(Copied from SerialPortWrite() in "MdePkg/Include/Library/SerialPortLib.h" at
commit c4547aefb3d0, with the Buffer non-nullity assertion removed:)
Write data from buffer to serial device.
Writes NumberOfBytes data bytes from Buffer to the serial device.
The number of bytes actually written to the serial device is returned.
If the return value is less than NumberOfBytes, then the write operation failed.
If NumberOfBytes is zero, then return 0.
@param Buffer Pointer to the data buffer to be written.
@param NumberOfBytes Number of bytes to written to the serial device.
@retval 0 NumberOfBytes is 0.
@retval >0 The number of bytes written to the serial device.
If this value is less than NumberOfBytes, then the write operation failed.
**/
UINTN
DebugLibFdtPL011UartWrite (
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
);
#endif

View File

@@ -17,90 +17,7 @@
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/PlatformHookLib.h>
#include <libfdt.h>
/** Get the UART base address of the console serial-port from the DT.
This function fetches the node referenced in the "stdout-path"
property of the "chosen" node and returns the base address of
the console UART.
@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
@param [out] SerialConsoleAddress If success, contains the base address
of the console serial-port.
@retval EFI_SUCCESS The function completed successfully.
@retval EFI_NOT_FOUND Console serial-port info not found in DT.
@retval EFI_INVALID_PARAMETER Invalid parameter.
**/
STATIC
EFI_STATUS
EFIAPI
GetSerialConsolePortAddress (
IN CONST VOID *Fdt,
OUT UINT64 *SerialConsoleAddress
)
{
CONST CHAR8 *Prop;
INT32 PropSize;
CONST CHAR8 *Path;
INT32 PathLen;
INT32 ChosenNode;
INT32 SerialConsoleNode;
INT32 Len;
CONST CHAR8 *NodeStatus;
CONST UINT64 *RegProperty;
if ((Fdt == NULL) || (fdt_check_header (Fdt) != 0)) {
return EFI_INVALID_PARAMETER;
}
// The "chosen" node resides at the root of the DT. Fetch it.
ChosenNode = fdt_path_offset (Fdt, "/chosen");
if (ChosenNode < 0) {
return EFI_NOT_FOUND;
}
Prop = fdt_getprop (Fdt, ChosenNode, "stdout-path", &PropSize);
if (PropSize < 0) {
return EFI_NOT_FOUND;
}
// Determine the actual path length, as a colon terminates the path.
Path = ScanMem8 (Prop, PropSize, ':');
if (Path == NULL) {
PathLen = AsciiStrLen (Prop);
} else {
PathLen = Path - Prop;
}
// Aliases cannot start with a '/', so it must be the actual path.
if (Prop[0] == '/') {
SerialConsoleNode = fdt_path_offset_namelen (Fdt, Prop, PathLen);
} else {
// Lookup the alias, as this contains the actual path.
Path = fdt_get_alias_namelen (Fdt, Prop, PathLen);
if (Path == NULL) {
return EFI_NOT_FOUND;
}
SerialConsoleNode = fdt_path_offset (Fdt, Path);
}
NodeStatus = fdt_getprop (Fdt, SerialConsoleNode, "status", &Len);
if ((NodeStatus != NULL) && (AsciiStrCmp (NodeStatus, "okay") != 0)) {
return EFI_NOT_FOUND;
}
RegProperty = fdt_getprop (Fdt, SerialConsoleNode, "reg", &Len);
if (Len != 16) {
return EFI_INVALID_PARAMETER;
}
*SerialConsoleAddress = fdt64_to_cpu (ReadUnaligned64 (RegProperty));
return EFI_SUCCESS;
}
#include <Library/FdtSerialPortAddressLib.h>
/** Platform hook to retrieve the 16550 UART base address from the platform
Device tree and store it in PcdSerialRegisterBase.
@@ -108,6 +25,7 @@ GetSerialConsolePortAddress (
@retval RETURN_SUCCESS Success.
@retval RETURN_INVALID_PARAMETER A parameter was invalid.
@retval RETURN_NOT_FOUND Serial port information not found.
@retval RETURN_PROTOCOL_ERROR Invalid information in the Device Tree.
**/
RETURN_STATUS
@@ -129,7 +47,7 @@ PlatformHookSerialPortInitialize (
return RETURN_NOT_FOUND;
}
Status = GetSerialConsolePortAddress (DeviceTreeBase, &SerialConsoleAddress);
Status = FdtSerialGetConsolePort (DeviceTreeBase, &SerialConsoleAddress);
if (RETURN_ERROR (Status)) {
return Status;
}

View File

@@ -22,12 +22,11 @@
[LibraryClasses]
BaseLib
PcdLib
FdtLib
FdtSerialPortAddressLib
HobLib
[Packages]
ArmVirtPkg/ArmVirtPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec

View File

@@ -15,7 +15,7 @@
#include <Library/PcdLib.h>
#include <Library/PL011UartLib.h>
#include <Library/SerialPortLib.h>
#include <libfdt.h>
#include <Library/FdtSerialPortAddressLib.h>
RETURN_STATUS
EFIAPI
@@ -56,74 +56,48 @@ SerialPortGetBaseAddress (
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
VOID *DeviceTreeBase;
INT32 Node, Prev;
INT32 Len;
CONST CHAR8 *Compatible;
CONST CHAR8 *NodeStatus;
CONST CHAR8 *CompatibleItem;
CONST UINT64 *RegProperty;
UINTN UartBase;
FDT_SERIAL_PORTS Ports;
UINT64 UartBase;
RETURN_STATUS Status;
DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
if ((DeviceTreeBase == NULL) || (fdt_check_header (DeviceTreeBase) != 0)) {
if (DeviceTreeBase == NULL) {
return 0;
}
Status = FdtSerialGetPorts (DeviceTreeBase, "arm,pl011", &Ports);
if (RETURN_ERROR (Status)) {
return 0;
}
//
// Enumerate all FDT nodes looking for a PL011 and capture its base address
// Default to the first port found, but (if there are multiple ports) allow
// the "/chosen" node to override it. Note that if FdtSerialGetConsolePort()
// fails, it does not modify UartBase.
//
for (Prev = 0; ; Prev = Node) {
Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
if (Node < 0) {
break;
}
UartBase = Ports.BaseAddress[0];
if (Ports.NumberOfPorts > 1) {
FdtSerialGetConsolePort (DeviceTreeBase, &UartBase);
}
Compatible = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
if (Compatible == NULL) {
continue;
}
BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits);
//
// Iterate over the NULL-separated items in the compatible string
//
for (CompatibleItem = Compatible; CompatibleItem < Compatible + Len;
CompatibleItem += 1 + AsciiStrLen (CompatibleItem))
{
if (AsciiStrCmp (CompatibleItem, "arm,pl011") == 0) {
NodeStatus = fdt_getprop (DeviceTreeBase, Node, "status", &Len);
if ((NodeStatus != NULL) && (AsciiStrCmp (NodeStatus, "okay") != 0)) {
continue;
}
RegProperty = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
if (Len != 16) {
return 0;
}
UartBase = (UINTN)fdt64_to_cpu (ReadUnaligned64 (RegProperty));
BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
ReceiveFifoDepth = 0; // Use the default value for Fifo depth
Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits);
Status = PL011UartInitializePort (
UartBase,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
if (!EFI_ERROR (Status)) {
return UartBase;
}
}
}
Status = PL011UartInitializePort (
UartBase,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
if (!RETURN_ERROR (Status)) {
return UartBase;
}
return 0;

View File

@@ -22,11 +22,10 @@
[LibraryClasses]
PL011UartLib
PcdLib
FdtLib
FdtSerialPortAddressLib
[Packages]
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmVirtPkg/ArmVirtPkg.dec

View File

@@ -23,49 +23,57 @@
#include <Library/HobLib.h>
#include <Guid/EarlyPL011BaseAddress.h>
STATIC UINTN mSerialBaseAddress;
STATIC UINTN mSerialBaseAddress;
STATIC RETURN_STATUS mPermanentStatus = RETURN_SUCCESS;
/**
Program hardware of Serial port
@retval RETURN_SUCCESS If the serial port was initialized successfully by
this call, or an earlier call, to
SerialPortInitialize().
@retval RETURN_NOT_FOUND If no PL011 base address could be found.
@return Error codes forwarded from
PL011UartInitializePort().
**/
RETURN_STATUS
EFIAPI
SerialPortInitialize (
VOID
)
{
return RETURN_SUCCESS;
}
VOID *Hob;
RETURN_STATUS Status;
CONST EARLY_PL011_BASE_ADDRESS *UartBase;
UINTN SerialBaseAddress;
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
/**
if (mSerialBaseAddress != 0) {
return RETURN_SUCCESS;
}
Program hardware of Serial port
@return RETURN_NOT_FOUND if no PL011 base address could be found
Otherwise, result of PL011UartInitializePort () is returned
**/
RETURN_STATUS
EFIAPI
FdtPL011SerialPortLibInitialize (
VOID
)
{
VOID *Hob;
CONST UINT64 *UartBase;
UINT64 BaudRate;
UINT32 ReceiveFifoDepth;
EFI_PARITY_TYPE Parity;
UINT8 DataBits;
EFI_STOP_BITS_TYPE StopBits;
if (RETURN_ERROR (mPermanentStatus)) {
return mPermanentStatus;
}
Hob = GetFirstGuidHob (&gEarlyPL011BaseAddressGuid);
if ((Hob == NULL) || (GET_GUID_HOB_DATA_SIZE (Hob) != sizeof *UartBase)) {
return RETURN_NOT_FOUND;
Status = RETURN_NOT_FOUND;
goto Failed;
}
UartBase = GET_GUID_HOB_DATA (Hob);
mSerialBaseAddress = (UINTN)*UartBase;
if (mSerialBaseAddress == 0) {
return RETURN_NOT_FOUND;
SerialBaseAddress = (UINTN)UartBase->ConsoleAddress;
if (SerialBaseAddress == 0) {
Status = RETURN_NOT_FOUND;
goto Failed;
}
BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);
@@ -74,15 +82,25 @@ FdtPL011SerialPortLibInitialize (
DataBits = PcdGet8 (PcdUartDefaultDataBits);
StopBits = (EFI_STOP_BITS_TYPE)PcdGet8 (PcdUartDefaultStopBits);
return PL011UartInitializePort (
mSerialBaseAddress,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
Status = PL011UartInitializePort (
SerialBaseAddress,
FixedPcdGet32 (PL011UartClkInHz),
&BaudRate,
&ReceiveFifoDepth,
&Parity,
&DataBits,
&StopBits
);
if (RETURN_ERROR (Status)) {
goto Failed;
}
mSerialBaseAddress = SerialBaseAddress;
return RETURN_SUCCESS;
Failed:
mPermanentStatus = Status;
return Status;
}
/**
@@ -102,7 +120,7 @@ SerialPortWrite (
IN UINTN NumberOfBytes
)
{
if (mSerialBaseAddress != 0) {
if (!RETURN_ERROR (SerialPortInitialize ())) {
return PL011UartWrite (mSerialBaseAddress, Buffer, NumberOfBytes);
}
@@ -126,7 +144,7 @@ SerialPortRead (
IN UINTN NumberOfBytes
)
{
if (mSerialBaseAddress != 0) {
if (!RETURN_ERROR (SerialPortInitialize ())) {
return PL011UartRead (mSerialBaseAddress, Buffer, NumberOfBytes);
}
@@ -146,7 +164,7 @@ SerialPortPoll (
VOID
)
{
if (mSerialBaseAddress != 0) {
if (!RETURN_ERROR (SerialPortInitialize ())) {
return PL011UartPoll (mSerialBaseAddress);
}
@@ -199,7 +217,7 @@ SerialPortSetAttributes (
{
RETURN_STATUS Status;
if (mSerialBaseAddress == 0) {
if (RETURN_ERROR (SerialPortInitialize ())) {
Status = RETURN_UNSUPPORTED;
} else {
Status = PL011UartInitializePort (
@@ -234,7 +252,7 @@ SerialPortSetControl (
{
RETURN_STATUS Status;
if (mSerialBaseAddress == 0) {
if (RETURN_ERROR (SerialPortInitialize ())) {
Status = RETURN_UNSUPPORTED;
} else {
Status = PL011UartSetControl (mSerialBaseAddress, Control);
@@ -261,7 +279,7 @@ SerialPortGetControl (
{
RETURN_STATUS Status;
if (mSerialBaseAddress == 0) {
if (RETURN_ERROR (SerialPortInitialize ())) {
Status = RETURN_UNSUPPORTED;
} else {
Status = PL011UartGetControl (mSerialBaseAddress, Control);

View File

@@ -15,7 +15,7 @@
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib|DXE_CORE DXE_DRIVER UEFI_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION
CONSTRUCTOR = FdtPL011SerialPortLibInitialize
CONSTRUCTOR = SerialPortInitialize
[Sources.common]
FdtPL011SerialPortLib.c

View File

@@ -0,0 +1,256 @@
/** @file
Determine the base addresses of serial ports from the Device Tree.
Copyright (C) Red Hat
Copyright (c) 2011 - 2023, Arm Ltd. All rights reserved.<BR>
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2014 - 2020, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/BaseLib.h>
#include <Library/FdtSerialPortAddressLib.h>
#include <libfdt.h>
/**
Read the "reg" property of Node in DeviceTree as a UINT64 base address.
@param[in] DeviceTree The flat device tree (FDT) to scan.
@param[in] Node The node to read the "reg" property of.
@param[out] BaseAddress On success, the base address read out of Node's "reg"
property. On error, not modified.
@retval RETURN_DEVICE_ERROR Node has a "status" property with value
different from "okay".
@retval RETURN_NOT_FOUND Node does not have a "reg" property.
@retval RETURN_BAD_BUFFER_SIZE The size of Node's "reg" property is not 16
bytes.
@retval RETURN_SUCCESS BaseAddress has been populated.
**/
STATIC
RETURN_STATUS
GetBaseAddress (
IN CONST VOID *DeviceTree,
IN INT32 Node,
OUT UINT64 *BaseAddress
)
{
CONST CHAR8 *NodeStatus;
CONST VOID *RegProp;
INT32 PropSize;
NodeStatus = fdt_getprop (DeviceTree, Node, "status", NULL);
if ((NodeStatus != NULL) && (AsciiStrCmp (NodeStatus, "okay") != 0)) {
return RETURN_DEVICE_ERROR;
}
RegProp = fdt_getprop (DeviceTree, Node, "reg", &PropSize);
if (RegProp == NULL) {
return RETURN_NOT_FOUND;
}
if (PropSize != 16) {
return RETURN_BAD_BUFFER_SIZE;
}
*BaseAddress = fdt64_to_cpu (ReadUnaligned64 (RegProp));
return RETURN_SUCCESS;
}
/**
Collect the first ARRAY_SIZE (Ports->BaseAddress) serial ports into Ports from
DeviceTree.
@param[in] DeviceTree The flat device tree (FDT) to scan.
@param[in] Compatible Look for Compatible in the "compatible" property of the
scanned nodes.
@param[out] Ports On successful return, Ports->NumberOfPorts contains the
number of serial ports found; it is (a) positive and
(b) at most ARRAY_SIZE (Ports->BaseAddress). If the FDT
had more serial ports, those are not reported. On
error, the contents of Ports are indeterminate.
@retval RETURN_INVALID_PARAMETER DeviceTree does not point to a valid FDT
header.
@retval RETURN_NOT_FOUND No compatible and enabled serial port has
been found.
@retval RETURN_SUCCESS At least one compatible and enabled serial
port has been found; Ports has been filled
in.
**/
RETURN_STATUS
EFIAPI
FdtSerialGetPorts (
IN CONST VOID *DeviceTree,
IN CONST CHAR8 *Compatible,
OUT FDT_SERIAL_PORTS *Ports
)
{
INT32 Node;
if (fdt_check_header (DeviceTree) != 0) {
return RETURN_INVALID_PARAMETER;
}
Ports->NumberOfPorts = 0;
Node = fdt_next_node (DeviceTree, 0, NULL);
while ((Node > 0) &&
(Ports->NumberOfPorts < ARRAY_SIZE (Ports->BaseAddress)))
{
CONST CHAR8 *CompatProp;
INT32 PropSize;
CompatProp = fdt_getprop (DeviceTree, Node, "compatible", &PropSize);
if (CompatProp != NULL) {
CONST CHAR8 *CompatItem;
CompatItem = CompatProp;
while ((CompatItem < CompatProp + PropSize) &&
(AsciiStrCmp (CompatItem, Compatible) != 0))
{
CompatItem += AsciiStrLen (CompatItem) + 1;
}
if (CompatItem < CompatProp + PropSize) {
RETURN_STATUS Status;
UINT64 BaseAddress;
Status = GetBaseAddress (DeviceTree, Node, &BaseAddress);
if (!RETURN_ERROR (Status)) {
Ports->BaseAddress[Ports->NumberOfPorts++] = BaseAddress;
}
}
}
Node = fdt_next_node (DeviceTree, Node, NULL);
}
return Ports->NumberOfPorts > 0 ? RETURN_SUCCESS : RETURN_NOT_FOUND;
}
/**
Fetch the base address of the serial port identified in the "stdout-path"
property of the "/chosen" node in DeviceTree.
@param[in] DeviceTree The flat device tree (FDT) to scan.
@param[out] BaseAddress On success, the base address of the preferred serial
port (to be used as console). On error, BaseAddress
is not modified.
@retval RETURN_INVALID_PARAMETER DeviceTree does not point to a valid FDT
header.
@retval RETURN_NOT_FOUND No enabled console port has been found.
@retval RETURN_PROTOCOL_ERROR The first (or only) node path in the
"stdout-path" property is an empty string.
@retval RETURN_PROTOCOL_ERROR The console port has been found in the FDT,
but its base address is not correctly
represented.
@retval RETURN_SUCCESS BaseAddress has been populated.
**/
RETURN_STATUS
EFIAPI
FdtSerialGetConsolePort (
IN CONST VOID *DeviceTree,
OUT UINT64 *BaseAddress
)
{
INT32 ChosenNode;
CONST CHAR8 *StdoutPathProp;
INT32 PropSize;
CONST CHAR8 *StdoutPathEnd;
UINTN StdoutPathLength;
INT32 ConsoleNode;
RETURN_STATUS Status;
if (fdt_check_header (DeviceTree) != 0) {
return RETURN_INVALID_PARAMETER;
}
ChosenNode = fdt_path_offset (DeviceTree, "/chosen");
if (ChosenNode < 0) {
return RETURN_NOT_FOUND;
}
StdoutPathProp = fdt_getprop (
DeviceTree,
ChosenNode,
"stdout-path",
&PropSize
);
if (StdoutPathProp == NULL) {
return RETURN_NOT_FOUND;
}
//
// If StdoutPathProp contains a colon (":"), then the colon terminates the
// path we're interested in.
//
StdoutPathEnd = AsciiStrStr (StdoutPathProp, ":");
if (StdoutPathEnd == NULL) {
StdoutPathLength = PropSize - 1;
} else {
StdoutPathLength = StdoutPathEnd - StdoutPathProp;
}
if (StdoutPathLength == 0) {
return RETURN_PROTOCOL_ERROR;
}
if (StdoutPathProp[0] == '/') {
//
// StdoutPathProp starts with an absolute node path.
//
ConsoleNode = fdt_path_offset_namelen (
DeviceTree,
StdoutPathProp,
(INT32)StdoutPathLength
);
} else {
//
// StdoutPathProp starts with an alias.
//
CONST CHAR8 *ResolvedStdoutPath;
ResolvedStdoutPath = fdt_get_alias_namelen (
DeviceTree,
StdoutPathProp,
(INT32)StdoutPathLength
);
if (ResolvedStdoutPath == NULL) {
return RETURN_NOT_FOUND;
}
ConsoleNode = fdt_path_offset (DeviceTree, ResolvedStdoutPath);
}
if (ConsoleNode < 0) {
return RETURN_NOT_FOUND;
}
Status = GetBaseAddress (DeviceTree, ConsoleNode, BaseAddress);
switch (Status) {
case RETURN_NOT_FOUND:
case RETURN_BAD_BUFFER_SIZE:
return RETURN_PROTOCOL_ERROR;
case RETURN_SUCCESS:
return RETURN_SUCCESS;
default:
return RETURN_NOT_FOUND;
}
}

View File

@@ -0,0 +1,27 @@
## @file
# Determine the base addresses of serial ports from the Device Tree.
#
# Copyright (C) Red Hat
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
[Defines]
INF_VERSION = 1.27
BASE_NAME = FdtSerialPortAddressLib
FILE_GUID = AEBE813B-25EA-40E5-95C4-2B864FE1E951
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = FdtSerialPortAddressLib
[Sources]
FdtSerialPortAddressLib.c
[Packages]
ArmVirtPkg/ArmVirtPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
FdtLib

View File

@@ -1,7 +1,7 @@
/** @file
An instance of the NorFlashPlatformLib for Kvmtool platform.
Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -228,7 +228,7 @@ NorFlashPlatformLibConstructor (
CONST CHAR8 *Label;
UINT32 LabelLen;
if (mNorFlashDeviceCount != 0) {
if ((mNorFlashDeviceCount != 0) || PcdGetBool (PcdEmuVariableNvModeEnable)) {
return EFI_SUCCESS;
}
@@ -337,9 +337,39 @@ NorFlashPlatformLibConstructor (
}
if (mNorFlashDevices[UefiVarStoreIndex].DeviceBaseAddress != 0) {
return SetupVariableStore (&mNorFlashDevices[UefiVarStoreIndex]);
Status = SetupVariableStore (&mNorFlashDevices[UefiVarStoreIndex]);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ERROR: Failed to setup variable store, Status = %r\n",
Status
));
ASSERT (0);
}
} else {
DEBUG ((
DEBUG_ERROR,
"ERROR: Invalid Flash device Base address\n"
));
ASSERT (0);
Status = EFI_NOT_FOUND;
}
} else {
// No Flash device found fallback to Runtime Variable Emulation.
DEBUG ((
DEBUG_INFO,
"INFO: No Flash device found fallback to Runtime Variable Emulation.\n"
));
Status = PcdSetBoolS (PcdEmuVariableNvModeEnable, TRUE);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"ERROR: Failed to set PcdEmuVariableNvModeEnable, Status = %r\n",
Status
));
ASSERT (0);
}
}
return EFI_NOT_FOUND;
return Status;
}

View File

@@ -1,7 +1,7 @@
## @file
# Nor Flash library for Kvmtool.
#
# Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -39,6 +39,7 @@
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase

View File

@@ -269,15 +269,16 @@ IsPciDisplay (
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
the VIRTIO_DEVICE_PROTOCOL level.
This function checks if a handle corresponds to the Virtio Device ID given
at the VIRTIO_DEVICE_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioRng (
IsVirtio (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
IN CONST CHAR16 *ReportText,
IN UINT16 VirtIoDeviceId
)
{
EFI_STATUS Status;
@@ -293,20 +294,51 @@ IsVirtioRng (
}
return (BOOLEAN)(VirtIo->SubSystemDeviceId ==
VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
VirtIoDeviceId);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
the EFI_PCI_IO_PROTOCOL level.
the VIRTIO_DEVICE_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioPciRng (
IsVirtioRng (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
return IsVirtio (Handle, ReportText, VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a Virtio serial device at
the VIRTIO_DEVICE_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioSerial (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
return IsVirtio (Handle, ReportText, VIRTIO_SUBSYSTEM_CONSOLE);
}
/**
This function checks if a handle corresponds to the Virtio Device ID given
at the EFI_PCI_IO_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioPci (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText,
IN UINT16 VirtIoDeviceId
)
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
@@ -371,11 +403,11 @@ IsVirtioPciRng (
//
// From DeviceId and RevisionId, determine whether the device is a
// modern-only Virtio 1.0 device. In case of Virtio 1.0, DeviceId can
// immediately be restricted to VIRTIO_SUBSYSTEM_ENTROPY_SOURCE, and
// immediately be restricted to VirtIoDeviceId, and
// SubsystemId will only play a sanity-check role. Otherwise, DeviceId can
// only be sanity-checked, and SubsystemId will decide.
//
if ((DeviceId == 0x1040 + VIRTIO_SUBSYSTEM_ENTROPY_SOURCE) &&
if ((DeviceId == 0x1040 + VirtIoDeviceId) &&
(RevisionId >= 0x01))
{
Virtio10 = TRUE;
@@ -403,7 +435,7 @@ IsVirtioPciRng (
return TRUE;
}
if (!Virtio10 && (SubsystemId == VIRTIO_SUBSYSTEM_ENTROPY_SOURCE)) {
if (!Virtio10 && (SubsystemId == VirtIoDeviceId)) {
return TRUE;
}
@@ -414,6 +446,36 @@ PciError:
return FALSE;
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a Virtio RNG device at
the EFI_PCI_IO_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioPciRng (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
return IsVirtioPci (Handle, ReportText, VIRTIO_SUBSYSTEM_ENTROPY_SOURCE);
}
/**
This FILTER_FUNCTION checks if a handle corresponds to a Virtio serial device at
the EFI_PCI_IO_PROTOCOL level.
**/
STATIC
BOOLEAN
EFIAPI
IsVirtioPciSerial (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
return IsVirtioPci (Handle, ReportText, VIRTIO_SUBSYSTEM_CONSOLE);
}
/**
This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
the matching driver to produce all first-level child handles.
@@ -502,6 +564,147 @@ AddOutput (
));
}
/**
This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from
the handle, appends serial, uart and terminal nodes, finally updates
ConIn, ConOut and ErrOut.
**/
STATIC
VOID
EFIAPI
SetupVirtioSerial (
IN EFI_HANDLE Handle,
IN CONST CHAR16 *ReportText
)
{
STATIC CONST ACPI_HID_DEVICE_PATH SerialNode = {
{
ACPI_DEVICE_PATH,
ACPI_DP,
{
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
(UINT8)((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
},
},
EISA_PNP_ID (0x0501),
0
};
STATIC CONST UART_DEVICE_PATH UartNode = {
{
MESSAGING_DEVICE_PATH,
MSG_UART_DP,
{
(UINT8)(sizeof (UART_DEVICE_PATH)),
(UINT8)((sizeof (UART_DEVICE_PATH)) >> 8)
},
},
0,
115200,
8,
1,
1
};
STATIC VENDOR_DEVICE_PATH TerminalNode = {
{
MESSAGING_DEVICE_PATH,
MSG_VENDOR_DP,
{
(UINT8)(sizeof (VENDOR_DEVICE_PATH)),
(UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
},
},
// copy from PcdTerminalTypeGuidBuffer
};
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *DevicePath, *OldDevicePath;
DevicePath = DevicePathFromHandle (Handle);
if (DevicePath == NULL) {
DEBUG ((
DEBUG_ERROR,
"%a: %s: handle %p: device path not found\n",
__func__,
ReportText,
Handle
));
return;
}
CopyGuid (
&TerminalNode.Guid,
PcdGetPtr (PcdTerminalTypeGuidBuffer)
);
DevicePath = AppendDevicePathNode (
DevicePath,
&SerialNode.Header
);
OldDevicePath = DevicePath;
DevicePath = AppendDevicePathNode (
DevicePath,
&UartNode.Header
);
FreePool (OldDevicePath);
OldDevicePath = DevicePath;
DevicePath = AppendDevicePathNode (
DevicePath,
&TerminalNode.Header
);
FreePool (OldDevicePath);
Status = EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"%a: %s: adding to ConIn: %r\n",
__func__,
ReportText,
Status
));
return;
}
Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"%a: %s: adding to ConOut: %r\n",
__func__,
ReportText,
Status
));
return;
}
Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"%a: %s: adding to ErrOut: %r\n",
__func__,
ReportText,
Status
));
return;
}
FreePool (DevicePath);
DEBUG ((
DEBUG_VERBOSE,
"%a: %s: added to ConIn, ConOut and ErrOut\n",
__func__,
ReportText
));
}
STATIC
VOID
PlatformRegisterFvBootOption (
@@ -900,6 +1103,12 @@ PlatformBootManagerBeforeConsole (
// instances on Virtio PCI RNG devices.
//
FilterAndProcess (&gEfiPciIoProtocolGuid, IsVirtioPciRng, Connect);
//
// Register Virtio serial devices as console.
//
FilterAndProcess (&gVirtioDeviceProtocolGuid, IsVirtioSerial, SetupVirtioSerial);
FilterAndProcess (&gEfiPciIoProtocolGuid, IsVirtioPciSerial, SetupVirtioSerial);
}
/**

View File

@@ -9,11 +9,13 @@
#include <PiPei.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/PeiServicesLib.h>
#include <Library/FdtSerialPortAddressLib.h>
#include <libfdt.h>
#include <Guid/EarlyPL011BaseAddress.h>
@@ -37,25 +39,23 @@ PlatformPeim (
VOID
)
{
VOID *Base;
VOID *NewBase;
UINTN FdtSize;
UINTN FdtPages;
UINT64 *FdtHobData;
UINT64 *UartHobData;
INT32 Node, Prev;
INT32 Parent, Depth;
CONST CHAR8 *Compatible;
CONST CHAR8 *CompItem;
CONST CHAR8 *NodeStatus;
INT32 Len;
INT32 RangesLen;
INT32 StatusLen;
CONST UINT64 *RegProp;
CONST UINT32 *RangesProp;
UINT64 UartBase;
UINT64 TpmBase;
EFI_STATUS Status;
VOID *Base;
VOID *NewBase;
UINTN FdtSize;
UINTN FdtPages;
UINT64 *FdtHobData;
EARLY_PL011_BASE_ADDRESS *UartHobData;
FDT_SERIAL_PORTS Ports;
INT32 Node, Prev;
INT32 Parent, Depth;
CONST CHAR8 *Compatible;
CONST CHAR8 *CompItem;
INT32 Len;
INT32 RangesLen;
CONST UINT64 *RegProp;
CONST UINT32 *RangesProp;
UINT64 TpmBase;
EFI_STATUS Status;
Base = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
ASSERT (Base != NULL);
@@ -73,7 +73,56 @@ PlatformPeim (
UartHobData = BuildGuidHob (&gEarlyPL011BaseAddressGuid, sizeof *UartHobData);
ASSERT (UartHobData != NULL);
*UartHobData = 0;
SetMem (UartHobData, sizeof *UartHobData, 0);
Status = FdtSerialGetPorts (Base, "arm,pl011", &Ports);
if (!EFI_ERROR (Status)) {
if (Ports.NumberOfPorts == 1) {
//
// Just one UART; direct both SerialPortLib+console and DebugLib to it.
//
UartHobData->ConsoleAddress = Ports.BaseAddress[0];
UartHobData->DebugAddress = Ports.BaseAddress[0];
} else {
UINT64 ConsoleAddress;
Status = FdtSerialGetConsolePort (Base, &ConsoleAddress);
if (EFI_ERROR (Status)) {
//
// At least two UARTs; but failed to get the console preference. Use the
// first UART for SerialPortLib+console, and the second one for
// DebugLib.
//
UartHobData->ConsoleAddress = Ports.BaseAddress[0];
UartHobData->DebugAddress = Ports.BaseAddress[1];
} else {
//
// At least two UARTs; and console preference available. Use the
// preferred UART for SerialPortLib+console, and *another* UART for
// DebugLib.
//
UartHobData->ConsoleAddress = ConsoleAddress;
if (ConsoleAddress == Ports.BaseAddress[0]) {
UartHobData->DebugAddress = Ports.BaseAddress[1];
} else {
UartHobData->DebugAddress = Ports.BaseAddress[0];
}
}
}
DEBUG ((
DEBUG_INFO,
"%a: PL011 UART (console) @ 0x%lx\n",
__func__,
UartHobData->ConsoleAddress
));
DEBUG ((
DEBUG_INFO,
"%a: PL011 UART (debug) @ 0x%lx\n",
__func__,
UartHobData->DebugAddress
));
}
TpmBase = 0;
@@ -100,23 +149,8 @@ PlatformPeim (
for (CompItem = Compatible; CompItem != NULL && CompItem < Compatible + Len;
CompItem += 1 + AsciiStrLen (CompItem))
{
if (AsciiStrCmp (CompItem, "arm,pl011") == 0) {
NodeStatus = fdt_getprop (Base, Node, "status", &StatusLen);
if ((NodeStatus != NULL) && (AsciiStrCmp (NodeStatus, "okay") != 0)) {
continue;
}
RegProp = fdt_getprop (Base, Node, "reg", &Len);
ASSERT (Len == 16);
UartBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));
DEBUG ((DEBUG_INFO, "%a: PL011 UART @ 0x%lx\n", __func__, UartBase));
*UartHobData = UartBase;
break;
} else if (FeaturePcdGet (PcdTpm2SupportEnabled) &&
(AsciiStrCmp (CompItem, "tcg,tpm-tis-mmio") == 0))
if (FeaturePcdGet (PcdTpm2SupportEnabled) &&
(AsciiStrCmp (CompItem, "tcg,tpm-tis-mmio") == 0))
{
RegProp = fdt_getprop (Base, Node, "reg", &Len);
ASSERT (Len == 8 || Len == 16);

View File

@@ -31,9 +31,11 @@
gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled
[LibraryClasses]
BaseMemoryLib
DebugLib
HobLib
FdtLib
FdtSerialPortAddressLib
PcdLib
PeiServicesLib

View File

@@ -115,7 +115,7 @@ ArmVirtGetMemoryMap (
VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress);
VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase;
VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFvSize);
VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO;
// End of Table
ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));

View File

@@ -244,6 +244,11 @@ class PlatformBuilder(UefiBuilder, BuildSettingsManager):
# Conditional Args
if (self.env.GetValue("QEMU_HEADLESS").upper() == "TRUE"):
args += " -display none" # no graphics
else:
args += " -device virtio-gpu-pci" # add recommended QEMU graphics device
args += " -device qemu-xhci,id=usb" # add USB support for below devices
args += " -device usb-tablet,id=input0,bus=usb.0,port=1" # add a usb mouse
args += " -device usb-kbd,id=input1,bus=usb.0,port=2" # add a usb keyboard
if (self.env.GetValue("MAKE_STARTUP_NSH").upper() == "TRUE"):
f = open(os.path.join(VirtualDrive, "startup.nsh"), "w")

View File

@@ -5,28 +5,43 @@ to use the same Pytools based build infrastructure locally.
## Supported Configuration Details
This solution for building and running ArmVirtPkg has only been validated with Ubuntu
18.04 and the GCC5 toolchain. Two different firmware builds are supported and are
described below.
This solution for building and running ArmVirtPkg has been validated with Fedora
37 Linux and the GCC5 toolchain. The following different firmware builds are
supported.
| Configuration name | Architecture | DSC File |Additional Flags |
| :---------- | :----- | :----- | :---- |
| AARCH64 | AARCH64 | ArmVirtQemu.dsc | None |
| ARM | ARM | ArmVirtQemu.dsc | None |
| Configuration name | Architecture | DSC File | Additional Flags |
| :---------- | :----- | :----- | :---- |
| AARCH64 - KVM Cloud HV | AARCH64 | ArmVirtCloudHv.dsc | None |
| ARM - KVM Cloud HV | ARM | ArmVirtCloudHv.dsc | None |
| AARCH64 - kvmtool | AARCH64 | ArmVirtKvmTool.dsc | None |
| ARM - kvmtool | ARM | ArmVirtKvmTool.dsc | None |
| AARCH64 - QEMU | AARCH64 | ArmVirtQemu.dsc | None |
| ARM - QEMU | ARM | ArmVirtQemu.dsc | None |
| AARCH64 - QEMU Kernel | AARCH64 | ArmVirtQemuKernel.dsc | None |
| ARM - QEMU Kernel | ARM | ArmVirtQemuKernel.dsc | None |
| AARCH64 - Xen HV | AARCH64 | ArmVirtXen.dsc | None |
| ARM - Xen HV | ARM | ArmVirtXen.dsc | None |
## EDK2 Developer environment
- [Python 3.8.x - Download & Install](https://www.python.org/downloads/)
- [Python 3.12.x - Download & Install](https://www.python.org/downloads/)
- [GIT - Download & Install](https://git-scm.com/download/)
- [QEMU - Download, Install, and add to your path](https://www.qemu.org/download/)
- [Edk2 Source](https://github.com/tianocore/edk2)
- Additional packages found necessary for Ubuntu 18.04
- apt-get install gcc g++ make uuid-dev
- Additional packages found necessary for Fedora Linux 37
- dnf install gcc g++ make libuuid-devel
Note: edksetup, Submodule initialization and manual installation of NASM, iASL, or
the required cross-compiler toolchains are **not** required, this is handled by the
Pytools build system.
The code is built in CI using a container. The latest Fedora Linux 37 container is
available in this GitHub container registry feed
[fedora-37-test](https://github.com/tianocore/containers/pkgs/container/containers%2Ffedora-37-test).
The exact container version tested in CI is maintained in this file
[edk2/.azurepipelines/templates/default.yml](https://github.com/tianocore/edk2/blob/HEAD/.azurepipelines/templates/defaults.yml).
## Building with Pytools for ArmVirtPkg
If you are unfamiliar with Pytools, it is recommended to first read through
@@ -57,16 +72,16 @@ the generic set of edk2 [Build Instructions](https://github.com/tianocore/tianoc
pip install --upgrade -r pip-requirements.txt
```
4. Initialize & Update Submodules - only when submodules updated
4. Initialize & Update Submodules - only when submodules updated (QEMU build example)
``` bash
stuart_setup -c ArmVirtPkg/PlatformCI/PlatformBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
stuart_setup -c ArmVirtPkg/PlatformCI/QemuBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
```
5. Initialize & Update Dependencies - only as needed when ext_deps change
5. Initialize & Update Dependencies - only as needed when ext_deps change (QEMU build example)
``` bash
stuart_update -c ArmVirtPkg/PlatformCI/PlatformBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
stuart_update -c ArmVirtPkg/PlatformCI/QemuBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
```
6. Compile the basetools if necessary - only when basetools C source files change
@@ -75,13 +90,13 @@ the generic set of edk2 [Build Instructions](https://github.com/tianocore/tianoc
python BaseTools/Edk2ToolsBuild.py -t <ToolChainTag>
```
7. Compile Firmware
7. Compile Firmware (QEMU build example)
``` bash
stuart_build -c ArmVirtPkg/PlatformCI/PlatformBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
stuart_build -c ArmVirtPkg/PlatformCI/QemuBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH>
```
- use `stuart_build -c ArmVirtPkg/PlatformCI/PlatformBuild.py -h` option to see additional
- use `stuart_build -c ArmVirtPkg/PlatformCI/QemuBuild.py -h` option to see additional
options like `--clean`
8. Running Emulator
@@ -90,7 +105,7 @@ the generic set of edk2 [Build Instructions](https://github.com/tianocore/tianoc
- or use the `--FlashOnly` feature to just run the emulator.
``` bash
stuart_build -c ArmVirtPkg/PlatformCI/PlatformBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH> --FlashOnly
stuart_build -c ArmVirtPkg/PlatformCI/QemuBuild.py TOOL_CHAIN_TAG=<TOOL_CHAIN_TAG> -a <TARGET_ARCH> --FlashOnly
```
### Notes
@@ -120,7 +135,7 @@ command-line. _stuart_build_ currently requires values to be assigned, so add an
For example, to enable the TPM2 support, instead of the traditional "-D TPM2_ENABLE=TRUE", the stuart_build
command-line would be:
`stuart_build -c ArmVirtPkg/PlatformCI/PlatformBuild.py BLD_*_TPM2_ENABLE=TRUE`
`stuart_build -c ArmVirtPkg/PlatformCI/QemuBuild.py BLD_*_TPM2_ENABLE=TRUE`
## References

View File

@@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2011-2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -101,7 +101,7 @@ PrePiMain (
ASSERT_EFI_ERROR (Status);
// Load the DXE Core and transfer control to it
Status = LoadDxeCoreFromFv (NULL, 0);
Status = LoadDxeCoreFromFv (NULL, SIZE_128KB);
ASSERT_EFI_ERROR (Status);
}

View File

@@ -745,6 +745,7 @@ DEFINE GCC_LOONGARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d -fno-asyn
DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie -ffixed-x18
DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
DEFINE GCC_RISCV64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie
DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
@@ -858,7 +859,7 @@ DEFINE GCC5_RISCV_OPENSBI_TYPES = -DOPENSBI_EXTERNAL_SBI_TYPES
DEFINE GCC5_RISCV64_ARCH = rv64gc
DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC5_RISCV_ALL_DLINK_COMMON) -Wl,--entry,ReferenceAcpiTable -u ReferenceAcpiTable
DEFINE GCC5_RISCV64_CC_FLAGS = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
DEFINE GCC5_RISCV64_CC_FLAGS = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
DEFINE GCC5_RISCV64_DLINK_FLAGS = DEF(GCC5_RISCV_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
DEFINE GCC5_RISCV64_DLINK2_FLAGS = DEF(GCC5_RISCV_ALL_DLINK2_FLAGS)
DEFINE GCC5_RISCV64_ASM_FLAGS = DEF(GCC5_RISCV_ALL_ASM_FLAGS) -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
@@ -1858,7 +1859,7 @@ DEFINE CLANGDWARF_X64_DLINK2_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0x22
DEFINE CLANGDWARF_IA32_TARGET = -target i686-pc-linux-gnu
DEFINE CLANGDWARF_X64_TARGET = -target x86_64-pc-linux-gnu
DEFINE CLANGDWARF_WARNING_OVERRIDES = -Wno-parentheses-equality -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare -Wno-empty-body -Wno-unused-const-variable -Wno-varargs -Wno-unknown-warning-option -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-unaligned-access -Wno-unneeded-internal-declaration
DEFINE CLANGDWARF_WARNING_OVERRIDES = -Wno-parentheses-equality -Wno-empty-body -Wno-unused-const-variable -Wno-varargs -Wno-unknown-warning-option -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-unaligned-access -Wno-unneeded-internal-declaration
DEFINE CLANGDWARF_ALL_CC_FLAGS = DEF(GCC48_ALL_CC_FLAGS) DEF(CLANGDWARF_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -msoft-float -mno-implicit-float -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -funsigned-char -fno-ms-extensions -Wno-null-dereference
###########################
@@ -1921,15 +1922,15 @@ NOOPT_CLANGDWARF_IA32_DLINK2_FLAGS = DEF(CLANGDWARF_IA32_DLINK2_FLAGS) -O0 -
*_CLANGDWARF_X64_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_X64_TARGET)
*_CLANGDWARF_X64_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_X64_TARGET)
DEBUG_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -Oz -flto DEF(CLANGDWARF_X64_TARGET) -g
DEBUG_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -Oz -flto DEF(CLANGDWARF_X64_TARGET) -g
DEBUG_CLANGDWARF_X64_DLINK_FLAGS = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -flto -Wl,-O3 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
DEBUG_CLANGDWARF_X64_DLINK2_FLAGS = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O3 -fuse-ld=lld
RELEASE_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -Oz -flto DEF(CLANGDWARF_X64_TARGET)
RELEASE_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -Oz -flto DEF(CLANGDWARF_X64_TARGET)
RELEASE_CLANGDWARF_X64_DLINK_FLAGS = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -flto -Wl,-O3 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
RELEASE_CLANGDWARF_X64_DLINK2_FLAGS = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O3 -fuse-ld=lld
NOOPT_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -O0 DEF(CLANGDWARF_X64_TARGET) -g
NOOPT_CLANGDWARF_X64_CC_FLAGS = DEF(CLANGDWARF_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -fpie -fdirect-access-external-data -O0 DEF(CLANGDWARF_X64_TARGET) -g
NOOPT_CLANGDWARF_X64_DLINK_FLAGS = DEF(CLANGDWARF_IA32_X64_DLINK_FLAGS) -Wl,-O0 -Wl,-melf_x86_64 -Wl,--oformat,elf64-x86-64 -Wl,-pie -mcmodel=small -Wl,--apply-dynamic-relocs
NOOPT_CLANGDWARF_X64_DLINK2_FLAGS = DEF(CLANGDWARF_X64_DLINK2_FLAGS) -O0 -fuse-ld=lld
@@ -2014,7 +2015,7 @@ DEFINE CLANGDWARF_AARCH64_DLINK_FLAGS = DEF(CLANGDWARF_AARCH64_TARGET) DEF(GCC_
*_CLANGDWARF_AARCH64_RC_FLAGS = DEF(GCC_AARCH64_RC_FLAGS) DEF(GCC_AARCH64_RC_BTI_FLAGS)
*_CLANGDWARF_AARCH64_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_AARCH64_TARGET) $(PLATFORM_FLAGS)
*_CLANGDWARF_AARCH64_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_AARCH64_TARGET)
*_CLANGDWARF_AARCH64_CC_XIPFLAGS = DEF(GCC_AARCH64_CC_XIPFLAGS)
*_CLANGDWARF_AARCH64_CC_XIPFLAGS = -mstrict-align
DEBUG_CLANGDWARF_AARCH64_CC_FLAGS = DEF(CLANGDWARF_AARCH64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
DEBUG_CLANGDWARF_AARCH64_DLINK_FLAGS = DEF(CLANGDWARF_AARCH64_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=lld -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wl,--no-pie,--no-relax
@@ -2023,6 +2024,58 @@ DEFINE CLANGDWARF_AARCH64_DLINK_FLAGS = DEF(CLANGDWARF_AARCH64_TARGET) DEF(GCC_
RELEASE_CLANGDWARF_AARCH64_CC_FLAGS = DEF(CLANGDWARF_AARCH64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
RELEASE_CLANGDWARF_AARCH64_DLINK_FLAGS = DEF(CLANGDWARF_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wl,--no-pie,--no-relax
##################
# CLANGDWARF RISCV64 definitions
##################
DEFINE CLANGDWARF_RISCV64_TARGET = -target riscv64-linux-gnu
DEFINE CLANGDWARF_RISCV64_CC_COMMON = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE) DEF(GCC5_RISCV_OPENSBI_TYPES) -march=DEF(GCC5_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8 -mcmodel=medany -mabi=lp64 -mno-relax
DEFINE CLANGDWARF_RISCV64_CC_FLAGS = DEF(CLANGDWARF_RISCV64_CC_COMMON) DEF(CLANGDWARF_RISCV64_TARGET) DEF(CLANGDWARF_WARNING_OVERRIDES)
# This is similar to GCC flags but without -n
DEFINE CLANGDWARF_RISCV64_ALL_DLINK_COMMON = -nostdlib -Wl,-q,--gc-sections -z common-page-size=0x40
DEFINE CLANGDWARF_RISCV64_ALL_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_ALL_DLINK_COMMON) -Wl,--entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Wl,-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
DEFINE CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_TARGET) DEF(CLANGDWARF_RISCV64_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
*_CLANGDWARF_RISCV64_PP_FLAGS = DEF(GCC_PP_FLAGS)
*_CLANGDWARF_RISCV64_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
*_CLANGDWARF_RISCV64_APP_FLAGS =
*_CLANGDWARF_RISCV64_ASL_FLAGS = DEF(IASL_FLAGS)
*_CLANGDWARF_RISCV64_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
*_CLANGDWARF_RISCV64_DTCPP_FLAGS = DEF(GCC_DTCPP_FLAGS)
*_CLANGDWARF_RISCV64_DEPS_FLAGS = DEF(GCC_DEPS_FLAGS)
*_CLANGDWARF_RISCV64_CC_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_ASM_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_PP_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_VFRPP_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_ASLCC_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_ASLPP_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_DLINK_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_ASLDLINK_PATH = ENV(CLANGDWARF_BIN)clang
*_CLANGDWARF_RISCV64_SLINK_PATH = ENV(CLANGDWARF_BIN)llvm-ar
*_CLANGDWARF_RISCV64_RC_PATH = ENV(CLANGDWARF_BIN)llvm-objcopy
*_CLANGDWARF_RISCV64_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -fno-lto
*_CLANGDWARF_RISCV64_ASLDLINK_FLAGS = DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS)
*_CLANGDWARF_RISCV64_ASM_FLAGS = DEF(GCC_ASM_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS) -Qunused-arguments -mabi=lp64 -mno-relax
*_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV64_DLINK_FLAGS)
*_CLANGDWARF_RISCV64_DLINK_XIPFLAGS = -z common-page-size=0x20
*_CLANGDWARF_RISCV64_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x240
*_CLANGDWARF_RISCV64_PLATFORM_FLAGS =
*_CLANGDWARF_RISCV64_PP_FLAGS = DEF(GCC_PP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
*_CLANGDWARF_RISCV64_RC_FLAGS = DEF(GCC_RISCV64_RC_FLAGS)
*_CLANGDWARF_RISCV64_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
*_CLANGDWARF_RISCV64_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET)
*_CLANGDWARF_RISCV64_CC_XIPFLAGS = DEF(GCC_RISCV64_CC_XIPFLAGS)
DEBUG_CLANGDWARF_RISCV64_CC_FLAGS = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
DEBUG_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=lld -Wl,--no-pie,--no-relax
NOOPT_CLANGDWARF_RISCV64_CC_FLAGS = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -O0
NOOPT_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -fuse-ld=lld -Wl,--no-pie,--no-relax
RELEASE_CLANGDWARF_RISCV64_CC_FLAGS = DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
RELEASE_CLANGDWARF_RISCV64_DLINK_FLAGS = DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld -Wl,--no-pie,--no-relax
#
#
# XCODE5 support

View File

@@ -133,8 +133,13 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
shell_env.insert_path(self.OutputDir)
# Actually build the tools.
output_stream = edk2_logging.create_output_stream()
ret = RunCmd('nmake.exe', None,
workingdir=shell_env.get_shell_var("EDK_TOOLS_PATH"))
edk2_logging.remove_output_stream(output_stream)
problems = edk2_logging.scan_compiler_output(output_stream)
for level, problem in problems:
logging.log(level, problem)
if ret != 0:
raise Exception("Failed to build.")
@@ -143,7 +148,13 @@ class Edk2ToolsBuild(BaseAbstractInvocable):
elif self.tool_chain_tag.lower().startswith("gcc"):
cpu_count = self.GetCpuThreads()
output_stream = edk2_logging.create_output_stream()
ret = RunCmd("make", f"-C . -j {cpu_count}", workingdir=shell_env.get_shell_var("EDK_TOOLS_PATH"))
edk2_logging.remove_output_stream(output_stream)
problems = edk2_logging.scan_compiler_output(output_stream)
for level, problem in problems:
logging.log(level, problem)
if ret != 0:
raise Exception("Failed to build.")

View File

@@ -0,0 +1,222 @@
# @file CodeQAnalyzePlugin.py
#
# A build plugin that analyzes a CodeQL database.
#
# Copyright (c) Microsoft Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import json
import logging
import os
import yaml
from analyze import analyze_filter
from common import codeql_plugin
from edk2toolext import edk2_logging
from edk2toolext.environment.plugintypes.uefi_build_plugin import \
IUefiBuildPlugin
from edk2toolext.environment.uefi_build import UefiBuilder
from edk2toollib.uefi.edk2.path_utilities import Edk2Path
from edk2toollib.utility_functions import RunCmd
from pathlib import Path
class CodeQlAnalyzePlugin(IUefiBuildPlugin):
def do_post_build(self, builder: UefiBuilder) -> int:
"""CodeQL analysis post-build functionality.
Args:
builder (UefiBuilder): A UEFI builder object for this build.
Returns:
int: The number of CodeQL errors found. Zero indicates that
AuditOnly mode is enabled or no failures were found.
"""
self.builder = builder
self.package = builder.edk2path.GetContainingPackage(
builder.edk2path.GetAbsolutePathOnThisSystemFromEdk2RelativePath(
builder.env.GetValue("ACTIVE_PLATFORM")
)
)
self.package_path = Path(
builder.edk2path.GetAbsolutePathOnThisSystemFromEdk2RelativePath(
self.package
)
)
self.target = builder.env.GetValue("TARGET")
self.codeql_db_path = codeql_plugin.get_codeql_db_path(
builder.ws, self.package, self.target,
new_path=False)
self.codeql_path = codeql_plugin.get_codeql_cli_path()
if not self.codeql_path:
logging.critical("CodeQL build enabled but CodeQL CLI application "
"not found.")
return -1
codeql_sarif_dir_path = self.codeql_db_path[
:self.codeql_db_path.rindex('-')]
codeql_sarif_dir_path = codeql_sarif_dir_path.replace(
"-db-", "-analysis-")
self.codeql_sarif_path = os.path.join(
codeql_sarif_dir_path,
(os.path.basename(
self.codeql_db_path) +
".sarif"))
edk2_logging.log_progress(f"Analyzing {self.package} ({self.target}) "
f"CodeQL database at:\n"
f" {self.codeql_db_path}")
edk2_logging.log_progress(f"Results will be written to:\n"
f" {self.codeql_sarif_path}")
# Packages are allowed to specify package-specific query specifiers
# in the package CI YAML file that override the global query specifier.
audit_only = False
query_specifiers = None
package_config_file = Path(os.path.join(
self.package_path, self.package + ".ci.yaml"))
plugin_data = None
if package_config_file.is_file():
with open(package_config_file, 'r') as cf:
package_config_file_data = yaml.safe_load(cf)
if "CodeQlAnalyze" in package_config_file_data:
plugin_data = package_config_file_data["CodeQlAnalyze"]
if "AuditOnly" in plugin_data:
audit_only = plugin_data["AuditOnly"]
if "QuerySpecifiers" in plugin_data:
logging.debug(f"Loading CodeQL query specifiers in "
f"{str(package_config_file)}")
query_specifiers = plugin_data["QuerySpecifiers"]
global_audit_only = builder.env.GetValue("STUART_CODEQL_AUDIT_ONLY")
if global_audit_only:
if global_audit_only.strip().lower() == "true":
audit_only = True
if audit_only:
logging.info(f"CodeQL Analyze plugin is in audit only mode for "
f"{self.package} ({self.target}).")
# Builds can override the query specifiers defined in this plugin
# by setting the value in the STUART_CODEQL_QUERY_SPECIFIERS
# environment variable.
if not query_specifiers:
query_specifiers = builder.env.GetValue(
"STUART_CODEQL_QUERY_SPECIFIERS")
# Use this plugins query set file as the default fallback if it is
# not overridden. It is possible the file is not present if modified
# locally. In that case, skip the plugin.
plugin_query_set = Path(Path(__file__).parent, "CodeQlQueries.qls")
if not query_specifiers and plugin_query_set.is_file():
query_specifiers = str(plugin_query_set.resolve())
if not query_specifiers:
logging.warning("Skipping CodeQL analysis since no CodeQL query "
"specifiers were provided.")
return 0
codeql_params = (f'database analyze {self.codeql_db_path} '
f'{query_specifiers} --format=sarifv2.1.0 '
f'--output={self.codeql_sarif_path} --download '
f'--threads=0')
# CodeQL requires the sarif file parent directory to exist already.
Path(self.codeql_sarif_path).parent.mkdir(exist_ok=True, parents=True)
cmd_ret = RunCmd(self.codeql_path, codeql_params)
if cmd_ret != 0:
logging.critical(f"CodeQL CLI analysis failed with return code "
f"{cmd_ret}.")
if not os.path.isfile(self.codeql_sarif_path):
logging.critical(f"The sarif file {self.codeql_sarif_path} was "
f"not created. Analysis cannot continue.")
return -1
filter_pattern_data = []
global_filter_file_value = builder.env.GetValue(
"STUART_CODEQL_FILTER_FILES")
if global_filter_file_value:
global_filter_files = global_filter_file_value.strip().split(',')
global_filter_files = [Path(f) for f in global_filter_files]
for global_filter_file in global_filter_files:
if global_filter_file.is_file():
with open(global_filter_file, 'r') as ff:
global_filter_file_data = yaml.safe_load(ff)
if "Filters" in global_filter_file_data:
current_pattern_data = \
global_filter_file_data["Filters"]
if type(current_pattern_data) is not list:
logging.critical(
f"CodeQL pattern data must be a list of "
f"strings. Data in "
f"{str(global_filter_file.resolve())} is "
f"invalid. CodeQL analysis is incomplete.")
return -1
filter_pattern_data += current_pattern_data
else:
logging.critical(
f"CodeQL global filter file "
f"{str(global_filter_file.resolve())} is "
f"malformed. Missing Filters section. CodeQL "
f"analysis is incomplete.")
return -1
else:
logging.critical(
f"CodeQL global filter file "
f"{str(global_filter_file.resolve())} was not found. "
f"CodeQL analysis is incomplete.")
return -1
if plugin_data and "Filters" in plugin_data:
if type(plugin_data["Filters"]) is not list:
logging.critical(
"CodeQL pattern data must be a list of strings. "
"CodeQL analysis is incomplete.")
return -1
filter_pattern_data.extend(plugin_data["Filters"])
if filter_pattern_data:
logging.info("Applying CodeQL SARIF result filters.")
analyze_filter.filter_sarif(
self.codeql_sarif_path,
self.codeql_sarif_path,
filter_pattern_data,
split_lines=False)
with open(self.codeql_sarif_path, 'r') as sf:
sarif_file_data = json.load(sf)
try:
# Perform minimal JSON parsing to find the number of errors.
total_errors = 0
for run in sarif_file_data['runs']:
total_errors += len(run['results'])
except KeyError:
logging.critical("Sarif file does not contain expected data. "
"Analysis cannot continue.")
return -1
if total_errors > 0:
if audit_only:
# Show a warning message so CodeQL analysis is not forgotten.
# If the repo owners truly do not want to fix CodeQL issues,
# analysis should be disabled entirely.
logging.warning(f"{self.package} ({self.target}) CodeQL "
f"analysis ignored {total_errors} errors due "
f"to audit mode being enabled.")
return 0
else:
logging.error(f"{self.package} ({self.target}) CodeQL "
f"analysis failed with {total_errors} errors.")
return total_errors

View File

@@ -0,0 +1,13 @@
## @file CodeQlAnalyze_plug_in.py
#
# Build plugin used to analyze CodeQL results.
#
# Copyright (c) Microsoft Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"scope": "codeql-analyze",
"name": "CodeQL Analyze Plugin",
"module": "CodeQlAnalyzePlugin"
}

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