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system76-c
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vUDK2017
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3
.gitmodules
vendored
3
.gitmodules
vendored
@ -1,3 +0,0 @@
|
||||
[submodule "CryptoPkg/Library/OpensslLib/openssl"]
|
||||
path = CryptoPkg/Library/OpensslLib/openssl
|
||||
url = https://github.com/openssl/openssl
|
@ -7,7 +7,7 @@
|
||||
# for important information about configuring this package for your
|
||||
# environment.
|
||||
#
|
||||
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -40,6 +40,8 @@
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|$(DEBUG_PROPERTY_MASK)
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|$(DEBUG_PRINT_ERROR_LEVEL)
|
||||
|
||||
[PcdsFixedAtBuild.IPF]
|
||||
|
||||
[LibraryClasses]
|
||||
#
|
||||
# Entry Point Libraries
|
||||
|
@ -9,7 +9,7 @@
|
||||
# NOTE: Improvements gratefully received. Please mention the version.
|
||||
# "http://www.cwi.nl/~steven/enquire.html"
|
||||
#
|
||||
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -29,7 +29,7 @@
|
||||
ENTRY_POINT = ShellCEntryLib
|
||||
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# A simple, basic, EDK II native, "hello" application.
|
||||
#
|
||||
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -21,7 +21,7 @@
|
||||
ENTRY_POINT = ShellCEntryLib
|
||||
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -3,7 +3,7 @@
|
||||
# from the standard input, and writing results to the standard output.
|
||||
#
|
||||
# Copyright (C) 2014, Red Hat, Inc.
|
||||
# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials are licensed and made available
|
||||
# under the terms and conditions of the BSD License which accompanies this
|
||||
@ -24,7 +24,7 @@
|
||||
ENTRY_POINT = ShellCEntryLib
|
||||
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
1262
AppPkg/Applications/Python/Ipf/pyconfig.h
Normal file
1262
AppPkg/Applications/Python/Ipf/pyconfig.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -1289,7 +1289,7 @@ The file must be an open file object such as sys.stdout or returned by\n\
|
||||
open() or os.popen(). It must be opened in binary mode ('wb' or 'w+b').\n\
|
||||
\n\
|
||||
If the value has (or contains an object that has) an unsupported type, a\n\
|
||||
ValueError exception is raised - but garbage data will also be written\n\
|
||||
ValueError exception is raised — but garbage data will also be written\n\
|
||||
to the file. The object will not be properly read back by load()\n\
|
||||
\n\
|
||||
New in version 2.4: The version argument indicates the data format that\n\
|
||||
@ -1317,7 +1317,7 @@ PyDoc_STRVAR(load_doc,
|
||||
"load(file)\n\
|
||||
\n\
|
||||
Read one value from the open file and return it. If no valid value is\n\
|
||||
read (e.g. because the data has a different Python version's\n\
|
||||
read (e.g. because the data has a different Python version’s\n\
|
||||
incompatible marshal format), raise EOFError, ValueError or TypeError.\n\
|
||||
The file must be an open file object opened in binary mode ('rb' or\n\
|
||||
'r+b').\n\
|
||||
|
@ -2,7 +2,7 @@
|
||||
# PythonCore.inf
|
||||
#
|
||||
# Copyright (c) 2015, Daryl McDaniel. All rights reserved.<BR>
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
DEFINE PYTHON_VERSION = 2.7.2
|
||||
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||
#
|
||||
|
||||
[Packages]
|
||||
@ -252,3 +252,4 @@
|
||||
MSFT:*_*_X64_CC_FLAGS = /Oi- /wd4018 /wd4054 /wd4055 /wd4101 /wd4131 /wd4152 /wd4204 /wd4210 /wd4244 /wd4267 /wd4305 /wd4310 /wd4389 /wd4701 /wd4702 /wd4706 /I$(WORKSPACE)\AppPkg\Applications\Python\X64 /I$(WORKSPACE)\AppPkg\Applications\Python\Efi /I$(WORKSPACE)\AppPkg\Applications\Python\Python-$(PYTHON_VERSION)\Include /DHAVE_MEMMOVE /DUSE_PYEXPAT_CAPI /DXML_STATIC
|
||||
GCC:*_*_IA32_CC_FLAGS = -fno-builtin -Wno-format -I$(WORKSPACE)/AppPkg/Applications/Python/Ia32 -I$(WORKSPACE)/AppPkg/Applications/Python/Python-$(PYTHON_VERSION)/Include -DHAVE_MEMMOVE -DUSE_PYEXPAT_CAPI -DXML_STATIC
|
||||
GCC:*_*_X64_CC_FLAGS = -Wno-format -I$(WORKSPACE)/AppPkg/Applications/Python/X64 -I$(WORKSPACE)/AppPkg/Applications/Python/Python-$(PYTHON_VERSION)/Include -DHAVE_MEMMOVE -DUSE_PYEXPAT_CAPI -DXML_STATIC
|
||||
GCC:*_*_IPF_SYMRENAME_FLAGS = --redefine-syms=$(WORKSPACE)/StdLib/GccSymRename.txt
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# DataSink Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# DataSource Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetAddrInfo Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetHostByAddr Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetHostByDns Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetHostByName Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetNameInfo Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetNetByAddr Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetNetByName Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetServByName Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# GetServByPort Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# OobRx Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# OobTx Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# RawIp4 Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# RawIp4Tx Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# Receive Datagram Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# SetHostName Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# SetHostName Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# TFTP Server Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
@ -146,12 +146,12 @@ MemoryTypeRegistersPage (
|
||||
{
|
||||
UINT64 Addr;
|
||||
BOOLEAN bValid;
|
||||
MSR_IA32_MTRRCAP_REGISTER Capabilities;
|
||||
UINT64 Capabilities;
|
||||
UINTN Count;
|
||||
MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;
|
||||
UINT64 DefType;
|
||||
UINTN Index;
|
||||
UINT64 Mask;
|
||||
|
||||
UINT64 MaxMtrrs;
|
||||
CONST UINT64 mFixedAddresses [( 8 * MTRR_NUMBER_OF_FIXED_MTRR ) + 1 ] = {
|
||||
0ULL,
|
||||
0x10000ULL,
|
||||
@ -302,8 +302,8 @@ MemoryTypeRegistersPage (
|
||||
//
|
||||
// Get the capabilities
|
||||
//
|
||||
Capabilities.Uint64 = AsmReadMsr64 ( MSR_IA32_MTRRCAP );
|
||||
DefType.Uint64 = AsmReadMsr64 ( MSR_IA32_MTRR_DEF_TYPE );
|
||||
Capabilities = AsmReadMsr64 ( MTRR_LIB_IA32_MTRR_CAP );
|
||||
DefType = AsmReadMsr64 ( MTRR_LIB_IA32_MTRR_DEF_TYPE );
|
||||
|
||||
//
|
||||
// Display the capabilities
|
||||
@ -316,7 +316,7 @@ MemoryTypeRegistersPage (
|
||||
}
|
||||
Status = HttpSendHexValue ( SocketFD,
|
||||
pPort,
|
||||
Capabilities.Uint64 );
|
||||
Capabilities );
|
||||
if ( EFI_ERROR ( Status )) {
|
||||
break;
|
||||
}
|
||||
@ -338,7 +338,7 @@ MemoryTypeRegistersPage (
|
||||
}
|
||||
Status = HttpSendHexValue ( SocketFD,
|
||||
pPort,
|
||||
DefType.Uint64);
|
||||
DefType );
|
||||
if ( EFI_ERROR ( Status )) {
|
||||
break;
|
||||
}
|
||||
@ -350,7 +350,7 @@ MemoryTypeRegistersPage (
|
||||
}
|
||||
Status = HttpSendAnsiString ( SocketFD,
|
||||
pPort,
|
||||
( 0 != DefType.Bits.E )
|
||||
( 0 != ( DefType & MTRR_LIB_CACHE_MTRR_ENABLED ))
|
||||
? "Enabled"
|
||||
: "Disabled" );
|
||||
if ( EFI_ERROR ( Status )) {
|
||||
@ -364,7 +364,7 @@ MemoryTypeRegistersPage (
|
||||
}
|
||||
Status = HttpSendAnsiString ( SocketFD,
|
||||
pPort,
|
||||
( 0 != DefType.Bits.FE )
|
||||
( 0 != ( DefType & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED ))
|
||||
? "Enabled"
|
||||
: "Disabled" );
|
||||
if ( EFI_ERROR ( Status )) {
|
||||
@ -376,7 +376,7 @@ MemoryTypeRegistersPage (
|
||||
if ( EFI_ERROR ( Status )) {
|
||||
break;
|
||||
}
|
||||
Type = DefType.Uint64 & 0xff;
|
||||
Type = DefType & 0xff;
|
||||
Status = HttpSendAnsiString ( SocketFD,
|
||||
pPort,
|
||||
( DIM ( mMemoryType ) > Type )
|
||||
@ -395,7 +395,7 @@ MemoryTypeRegistersPage (
|
||||
//
|
||||
// Determine if MTRRs are enabled
|
||||
//
|
||||
if ( 0 == DefType.Bits.E ) {
|
||||
if ( 0 == ( DefType & MTRR_LIB_CACHE_MTRR_ENABLED )) {
|
||||
Status = HttpSendAnsiString ( SocketFD,
|
||||
pPort,
|
||||
"<p>All memory is uncached!</p>\r\n" );
|
||||
@ -412,8 +412,8 @@ MemoryTypeRegistersPage (
|
||||
//
|
||||
// Determine if the fixed MTRRs are supported
|
||||
//
|
||||
if (( 0 != Capabilities.Bits.FIX )
|
||||
&& ( 0 != DefType.Bits.FE)) {
|
||||
if (( 0 != ( Capabilities & 0x100 ))
|
||||
&& ( 0 != ( DefType & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED ))) {
|
||||
|
||||
//
|
||||
// Beginning of table
|
||||
@ -615,7 +615,8 @@ MemoryTypeRegistersPage (
|
||||
//
|
||||
// Determine if the variable MTRRs are supported
|
||||
//
|
||||
if ( 0 < Capabilities.Bits.VCNT ) {
|
||||
MaxMtrrs = Capabilities & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK;
|
||||
if ( 0 < MaxMtrrs ) {
|
||||
//
|
||||
// Beginning of table
|
||||
//
|
||||
@ -631,7 +632,7 @@ MemoryTypeRegistersPage (
|
||||
//
|
||||
// Display the variable MTRRs
|
||||
//
|
||||
for ( Count = 0; Capabilities.Bits.VCNT > Count; Count++ ) {
|
||||
for ( Count = 0; MaxMtrrs > Count; Count++ ) {
|
||||
//
|
||||
// Start the row
|
||||
//
|
||||
|
@ -20,7 +20,6 @@
|
||||
|
||||
#include <Guid/EventGroup.h>
|
||||
|
||||
#include <Register/Msr.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
|
@ -1,7 +1,7 @@
|
||||
## @file
|
||||
# Web Server Application
|
||||
#
|
||||
# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2011-2012, Intel Corporation
|
||||
# All rights reserved. This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
@ -24,7 +24,7 @@
|
||||
#
|
||||
# The following information is for reference only and not required by the build tools.
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC
|
||||
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
|
||||
#
|
||||
|
||||
[Sources]
|
||||
|
218
AppPkg/Contributions.txt
Normal file
218
AppPkg/Contributions.txt
Normal file
@ -0,0 +1,218 @@
|
||||
|
||||
======================
|
||||
= Code Contributions =
|
||||
======================
|
||||
|
||||
To make a contribution to a TianoCore project, follow these steps.
|
||||
1. Create a change description in the format specified below to
|
||||
use in the source control commit log.
|
||||
2. Your commit message must include your "Signed-off-by" signature,
|
||||
and "Contributed-under" message.
|
||||
3. Your "Contributed-under" message explicitly states that the
|
||||
contribution is made under the terms of the specified
|
||||
contribution agreement. Your "Contributed-under" message
|
||||
must include the name of contribution agreement and version.
|
||||
For example: Contributed-under: TianoCore Contribution Agreement 1.0
|
||||
The "TianoCore Contribution Agreement" is included below in
|
||||
this document.
|
||||
4. Submit your code to the TianoCore project using the process
|
||||
that the project documents on its web page. If the process is
|
||||
not documented, then submit the code on development email list
|
||||
for the project.
|
||||
5. It is preferred that contributions are submitted using the same
|
||||
copyright license as the base project. When that is not possible,
|
||||
then contributions using the following licenses can be accepted:
|
||||
* BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
|
||||
* BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
|
||||
* MIT: http://opensource.org/licenses/MIT
|
||||
* Python-2.0: http://opensource.org/licenses/Python-2.0
|
||||
* Zlib: http://opensource.org/licenses/Zlib
|
||||
|
||||
Contributions of code put into the public domain can also be
|
||||
accepted.
|
||||
|
||||
Contributions using other licenses might be accepted, but further
|
||||
review will be required.
|
||||
|
||||
=====================================================
|
||||
= Change Description / Commit Message / Patch Email =
|
||||
=====================================================
|
||||
|
||||
Your change description should use the standard format for a
|
||||
commit message, and must include your "Signed-off-by" signature
|
||||
and the "Contributed-under" message.
|
||||
|
||||
== Sample Change Description / Commit Message =
|
||||
|
||||
=== Start of sample patch email message ===
|
||||
|
||||
From: Contributor Name <contributor@example.com>
|
||||
Subject: [PATCH] CodeModule: Brief-single-line-summary
|
||||
|
||||
Full-commit-message
|
||||
|
||||
Contributed-under: TianoCore Contribution Agreement 1.0
|
||||
Signed-off-by: Contributor Name <contributor@example.com>
|
||||
---
|
||||
|
||||
An extra message for the patch email which will not be considered part
|
||||
of the commit message can be added here.
|
||||
|
||||
Patch content inline or attached
|
||||
|
||||
=== End of sample patch email message ===
|
||||
|
||||
=== Notes for sample patch email ===
|
||||
|
||||
* The first line of commit message is taken from the email's subject
|
||||
line following [PATCH]. The remaining portion of the commit message
|
||||
is the email's content until the '---' line.
|
||||
* git format-patch is one way to create this format
|
||||
|
||||
=== Definitions for sample patch email ===
|
||||
|
||||
* "CodeModule" is a short idenfier for the affected code. For
|
||||
example MdePkg, or MdeModulePkg UsbBusDxe.
|
||||
* "Brief-single-line-summary" is a short summary of the change.
|
||||
* The entire first line should be less than ~70 characters.
|
||||
* "Full-commit-message" a verbose multiple line comment describing
|
||||
the change. Each line should be less than ~70 characters.
|
||||
* "Contributed-under" explicitely states that the contribution is
|
||||
made under the terms of the contribtion agreement. This
|
||||
agreement is included below in this document.
|
||||
* "Signed-off-by" is the contributor's signature identifying them
|
||||
by their real/legal name and their email address.
|
||||
|
||||
========================================
|
||||
= TianoCore Contribution Agreement 1.0 =
|
||||
========================================
|
||||
|
||||
INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
|
||||
INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
|
||||
PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
|
||||
TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
|
||||
TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
|
||||
REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
|
||||
CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
|
||||
OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
|
||||
BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
|
||||
AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
|
||||
AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
|
||||
USE THE CONTENT.
|
||||
|
||||
Unless otherwise indicated, all Content made available on the TianoCore
|
||||
site is provided to you under the terms and conditions of the BSD
|
||||
License ("BSD"). A copy of the BSD License is available at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
or when applicable, in the associated License.txt file.
|
||||
|
||||
Certain other content may be made available under other licenses as
|
||||
indicated in or with such Content. (For example, in a License.txt file.)
|
||||
|
||||
You accept and agree to the following terms and conditions for Your
|
||||
present and future Contributions submitted to TianoCore site. Except
|
||||
for the license granted to Intel hereunder, You reserve all right,
|
||||
title, and interest in and to Your Contributions.
|
||||
|
||||
== SECTION 1: Definitions ==
|
||||
* "You" or "Contributor" shall mean the copyright owner or legal
|
||||
entity authorized by the copyright owner that is making a
|
||||
Contribution hereunder. All other entities that control, are
|
||||
controlled by, or are under common control with that entity are
|
||||
considered to be a single Contributor. For the purposes of this
|
||||
definition, "control" means (i) the power, direct or indirect, to
|
||||
cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%)
|
||||
or more of the outstanding shares, or (iii) beneficial ownership
|
||||
of such entity.
|
||||
* "Contribution" shall mean any original work of authorship,
|
||||
including any modifications or additions to an existing work,
|
||||
that is intentionally submitted by You to the TinaoCore site for
|
||||
inclusion in, or documentation of, any of the Content. For the
|
||||
purposes of this definition, "submitted" means any form of
|
||||
electronic, verbal, or written communication sent to the
|
||||
TianoCore site or its representatives, including but not limited
|
||||
to communication on electronic mailing lists, source code
|
||||
control systems, and issue tracking systems that are managed by,
|
||||
or on behalf of, the TianoCore site for the purpose of
|
||||
discussing and improving the Content, but excluding
|
||||
communication that is conspicuously marked or otherwise
|
||||
designated in writing by You as "Not a Contribution."
|
||||
|
||||
== SECTION 2: License for Contributions ==
|
||||
* Contributor hereby agrees that redistribution and use of the
|
||||
Contribution in source and binary forms, with or without
|
||||
modification, are permitted provided that the following
|
||||
conditions are met:
|
||||
** Redistributions of source code must retain the Contributor's
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer.
|
||||
** Redistributions in binary form must reproduce the Contributor's
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer in the documentation and/or other materials provided
|
||||
with the distribution.
|
||||
* Disclaimer. None of the names of Contributor, Intel, or the names
|
||||
of their respective contributors may be used to endorse or
|
||||
promote products derived from this software without specific
|
||||
prior written permission.
|
||||
* Contributor grants a license (with the right to sublicense) under
|
||||
claims of Contributor's patents that Contributor can license that
|
||||
are infringed by the Contribution (as delivered by Contributor) to
|
||||
make, use, distribute, sell, offer for sale, and import the
|
||||
Contribution and derivative works thereof solely to the minimum
|
||||
extent necessary for licensee to exercise the granted copyright
|
||||
license; this patent license applies solely to those portions of
|
||||
the Contribution that are unmodified. No hardware per se is
|
||||
licensed.
|
||||
* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
|
||||
CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
|
||||
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
|
||||
CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
|
||||
DAMAGE.
|
||||
|
||||
== SECTION 3: Representations ==
|
||||
* You represent that You are legally entitled to grant the above
|
||||
license. If your employer(s) has rights to intellectual property
|
||||
that You create that includes Your Contributions, You represent
|
||||
that You have received permission to make Contributions on behalf
|
||||
of that employer, that Your employer has waived such rights for
|
||||
Your Contributions.
|
||||
* You represent that each of Your Contributions is Your original
|
||||
creation (see Section 4 for submissions on behalf of others).
|
||||
You represent that Your Contribution submissions include complete
|
||||
details of any third-party license or other restriction
|
||||
(including, but not limited to, related patents and trademarks)
|
||||
of which You are personally aware and which are associated with
|
||||
any part of Your Contributions.
|
||||
|
||||
== SECTION 4: Third Party Contributions ==
|
||||
* Should You wish to submit work that is not Your original creation,
|
||||
You may submit it to TianoCore site separately from any
|
||||
Contribution, identifying the complete details of its source
|
||||
and of any license or other restriction (including, but not
|
||||
limited to, related patents, trademarks, and license agreements)
|
||||
of which You are personally aware, and conspicuously marking the
|
||||
work as "Submitted on behalf of a third-party: [named here]".
|
||||
|
||||
== SECTION 5: Miscellaneous ==
|
||||
* Applicable Laws. Any claims arising under or relating to this
|
||||
Agreement shall be governed by the internal substantive laws of
|
||||
the State of Delaware or federal courts located in Delaware,
|
||||
without regard to principles of conflict of laws.
|
||||
* Language. This Agreement is in the English language only, which
|
||||
language shall be controlling in all respects, and all versions
|
||||
of this Agreement in any other language shall be for accommodation
|
||||
only and shall not be binding. All communications and notices made
|
||||
or given pursuant to this Agreement, and all documentation and
|
||||
support to be provided, unless otherwise noted, shall be in the
|
||||
English language.
|
||||
|
25
AppPkg/License.txt
Normal file
25
AppPkg/License.txt
Normal file
@ -0,0 +1,25 @@
|
||||
Copyright (c) 2012, Intel Corporation. All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions
|
||||
are met:
|
||||
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
@ -2,7 +2,7 @@
|
||||
# ARM processor package.
|
||||
#
|
||||
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -36,13 +36,10 @@
|
||||
ArmLib|Include/Library/ArmLib.h
|
||||
ArmMmuLib|Include/Library/ArmMmuLib.h
|
||||
SemihostLib|Include/Library/Semihosting.h
|
||||
UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
|
||||
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
|
||||
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
|
||||
ArmGicArchLib|Include/Library/ArmGicArchLib.h
|
||||
ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
|
||||
ArmSvcLib|Include/Library/ArmSvcLib.h
|
||||
OpteeLib|Include/Library/OpteeLib.h
|
||||
StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
|
||||
|
||||
[Guids.common]
|
||||
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
|
||||
@ -51,20 +48,6 @@
|
||||
# Include/Guid/ArmMpCoreInfo.h
|
||||
gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
|
||||
|
||||
[Protocols.common]
|
||||
## Arm System Control and Management Interface(SCMI) Base protocol
|
||||
## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
|
||||
gArmScmiBaseProtocolGuid = { 0xd7e5abe9, 0x33ab, 0x418e, { 0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f } }
|
||||
|
||||
## Arm System Control and Management Interface(SCMI) Clock management protocol
|
||||
## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
|
||||
gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }
|
||||
gArmScmiClock2ProtocolGuid = { 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } }
|
||||
|
||||
## Arm System Control and Management Interface(SCMI) Clock management protocol
|
||||
## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
|
||||
gArmScmiPerformanceProtocolGuid = { 0x9b8ba84, 0x3dd3, 0x49a6, { 0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad } }
|
||||
|
||||
[Ppis]
|
||||
## Include/Ppi/ArmMpCoreInfo.h
|
||||
gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
|
||||
@ -81,13 +64,13 @@
|
||||
# it has been configured by the CPU DXE
|
||||
gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
|
||||
|
||||
# Define if the spin-table mechanism is used by the secondary cores when booting
|
||||
# Linux (instead of PSCI)
|
||||
gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033
|
||||
|
||||
# Define if the GICv3 controller should use the GICv2 legacy
|
||||
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
|
||||
|
||||
# Whether to implement warm reboot for capsule update using a jump back to the
|
||||
# PEI entry point with caches and interrupts disabled.
|
||||
gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x0000001F
|
||||
|
||||
[PcdsFeatureFlag.ARM]
|
||||
# Whether to map normal memory as non-shareable. FALSE is the safe choice, but
|
||||
# TRUE may be appropriate to fix performance problems if you don't care about
|
||||
@ -101,6 +84,9 @@
|
||||
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
|
||||
|
||||
# This PCD will free the unallocated buffers if their size reach this threshold.
|
||||
# We set the default value to 512MB.
|
||||
gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003
|
||||
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004
|
||||
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
|
||||
|
||||
@ -130,6 +116,14 @@
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
|
||||
|
||||
#
|
||||
# BdsLib
|
||||
#
|
||||
# The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory
|
||||
gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F
|
||||
# Maximum file size for TFTP servers that do not support 'tsize' extension
|
||||
gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000
|
||||
|
||||
#
|
||||
# ARM Normal (or Non Secure) Firmware PCDs
|
||||
#
|
||||
@ -170,6 +164,16 @@
|
||||
# By default we do not do a transition to non-secure mode
|
||||
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
|
||||
|
||||
# The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory
|
||||
gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020
|
||||
|
||||
# If the fixed FDT address is not available, then it should be loaded below the kernel.
|
||||
# The recommendation from the Linux kernel is to have the FDT below 16KB.
|
||||
# (see the kernel doc: Documentation/arm/Booting)
|
||||
gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023
|
||||
# The FDT blob must be loaded at a 64bit aligned address.
|
||||
gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026
|
||||
|
||||
# Non Secure Access Control Register
|
||||
# - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
|
||||
# - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
|
||||
@ -208,6 +212,12 @@
|
||||
# Other modes include using SP0 or switching to Aarch32, but these are
|
||||
# not currently supported.
|
||||
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
|
||||
# If the fixed FDT address is not available, then it should be loaded above the kernel.
|
||||
# The recommendation from the AArch64 Linux kernel is to have the FDT below 512MB.
|
||||
# (see the kernel doc: Documentation/arm64/booting.txt)
|
||||
gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023
|
||||
# The FDT blob must be loaded at a 2MB aligned address.
|
||||
gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026
|
||||
|
||||
|
||||
#
|
||||
@ -217,14 +227,11 @@
|
||||
[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common]
|
||||
|
||||
# System Memory (DRAM): These PCDs define the region of in-built system memory
|
||||
# Some platforms can get DRAM extensions, these additional regions may be
|
||||
# declared to UEFI using separate resource descriptor HOBs
|
||||
# Some platforms can get DRAM extensions, these additional regions will be declared
|
||||
# to UEFI by ArmPlatformLib
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
|
||||
|
||||
gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045
|
||||
gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046
|
||||
|
||||
[PcdsFixedAtBuild.common, PcdsDynamic.common]
|
||||
#
|
||||
# ARM Architectural Timer
|
||||
|
@ -2,7 +2,7 @@
|
||||
# ARM processor package.
|
||||
#
|
||||
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.<BR>
|
||||
# Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>
|
||||
# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
@ -27,10 +27,15 @@
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/Arm
|
||||
SUPPORTED_ARCHITECTURES = ARM|AARCH64
|
||||
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
|
||||
[BuildOptions]
|
||||
XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
|
||||
GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon
|
||||
# We use A15 to get the Secure and Virtualization extensions
|
||||
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15
|
||||
|
||||
RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
|
||||
*_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
|
||||
|
||||
@ -38,7 +43,6 @@
|
||||
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
|
||||
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
|
||||
CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
|
||||
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
|
||||
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
|
||||
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
|
||||
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
|
||||
@ -58,6 +62,7 @@
|
||||
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
|
||||
|
||||
SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
|
||||
UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
|
||||
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
|
||||
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
|
||||
CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
|
||||
@ -68,12 +73,13 @@
|
||||
ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
|
||||
ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
|
||||
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
|
||||
OpteeLib|ArmPkg/Library/OpteeLib/OpteeLib.inf
|
||||
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
|
||||
|
||||
UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
|
||||
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
|
||||
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
|
||||
|
||||
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
|
||||
FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
|
||||
|
||||
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
|
||||
@ -85,8 +91,6 @@
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
|
||||
ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
|
||||
|
||||
ArmMtlLib|ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf
|
||||
|
||||
[LibraryClasses.common.PEIM]
|
||||
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
|
||||
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
|
||||
@ -103,6 +107,8 @@
|
||||
[Components.common]
|
||||
ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
|
||||
ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
|
||||
ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
|
||||
ArmPkg/Library/BdsLib/BdsLib.inf
|
||||
ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
|
||||
ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
|
||||
ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
|
||||
@ -111,6 +117,7 @@
|
||||
ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf
|
||||
ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf
|
||||
ArmPkg/Library/SemihostLib/SemihostLib.inf
|
||||
ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
|
||||
ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
|
||||
ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
|
||||
ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf
|
||||
@ -119,6 +126,7 @@
|
||||
ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
|
||||
ArmPkg/Drivers/ArmGic/ArmGicLib.inf
|
||||
ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
|
||||
ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
|
||||
@ -128,8 +136,6 @@
|
||||
ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
|
||||
ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
|
||||
ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
|
||||
ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf
|
||||
ArmPkg/Library/OpteeLib/OpteeLib.inf
|
||||
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
@ -145,8 +151,5 @@
|
||||
ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
|
||||
ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
|
||||
|
||||
ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
|
||||
|
||||
[Components.AARCH64]
|
||||
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
|
||||
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
|
||||
|
218
ArmPkg/Contributions.txt
Normal file
218
ArmPkg/Contributions.txt
Normal file
@ -0,0 +1,218 @@
|
||||
|
||||
======================
|
||||
= Code Contributions =
|
||||
======================
|
||||
|
||||
To make a contribution to a TianoCore project, follow these steps.
|
||||
1. Create a change description in the format specified below to
|
||||
use in the source control commit log.
|
||||
2. Your commit message must include your "Signed-off-by" signature,
|
||||
and "Contributed-under" message.
|
||||
3. Your "Contributed-under" message explicitly states that the
|
||||
contribution is made under the terms of the specified
|
||||
contribution agreement. Your "Contributed-under" message
|
||||
must include the name of contribution agreement and version.
|
||||
For example: Contributed-under: TianoCore Contribution Agreement 1.0
|
||||
The "TianoCore Contribution Agreement" is included below in
|
||||
this document.
|
||||
4. Submit your code to the TianoCore project using the process
|
||||
that the project documents on its web page. If the process is
|
||||
not documented, then submit the code on development email list
|
||||
for the project.
|
||||
5. It is preferred that contributions are submitted using the same
|
||||
copyright license as the base project. When that is not possible,
|
||||
then contributions using the following licenses can be accepted:
|
||||
* BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
|
||||
* BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
|
||||
* MIT: http://opensource.org/licenses/MIT
|
||||
* Python-2.0: http://opensource.org/licenses/Python-2.0
|
||||
* Zlib: http://opensource.org/licenses/Zlib
|
||||
|
||||
Contributions of code put into the public domain can also be
|
||||
accepted.
|
||||
|
||||
Contributions using other licenses might be accepted, but further
|
||||
review will be required.
|
||||
|
||||
=====================================================
|
||||
= Change Description / Commit Message / Patch Email =
|
||||
=====================================================
|
||||
|
||||
Your change description should use the standard format for a
|
||||
commit message, and must include your "Signed-off-by" signature
|
||||
and the "Contributed-under" message.
|
||||
|
||||
== Sample Change Description / Commit Message =
|
||||
|
||||
=== Start of sample patch email message ===
|
||||
|
||||
From: Contributor Name <contributor@example.com>
|
||||
Subject: [PATCH] CodeModule: Brief-single-line-summary
|
||||
|
||||
Full-commit-message
|
||||
|
||||
Contributed-under: TianoCore Contribution Agreement 1.0
|
||||
Signed-off-by: Contributor Name <contributor@example.com>
|
||||
---
|
||||
|
||||
An extra message for the patch email which will not be considered part
|
||||
of the commit message can be added here.
|
||||
|
||||
Patch content inline or attached
|
||||
|
||||
=== End of sample patch email message ===
|
||||
|
||||
=== Notes for sample patch email ===
|
||||
|
||||
* The first line of commit message is taken from the email's subject
|
||||
line following [PATCH]. The remaining portion of the commit message
|
||||
is the email's content until the '---' line.
|
||||
* git format-patch is one way to create this format
|
||||
|
||||
=== Definitions for sample patch email ===
|
||||
|
||||
* "CodeModule" is a short idenfier for the affected code. For
|
||||
example MdePkg, or MdeModulePkg UsbBusDxe.
|
||||
* "Brief-single-line-summary" is a short summary of the change.
|
||||
* The entire first line should be less than ~70 characters.
|
||||
* "Full-commit-message" a verbose multiple line comment describing
|
||||
the change. Each line should be less than ~70 characters.
|
||||
* "Contributed-under" explicitely states that the contribution is
|
||||
made under the terms of the contribtion agreement. This
|
||||
agreement is included below in this document.
|
||||
* "Signed-off-by" is the contributor's signature identifying them
|
||||
by their real/legal name and their email address.
|
||||
|
||||
========================================
|
||||
= TianoCore Contribution Agreement 1.0 =
|
||||
========================================
|
||||
|
||||
INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
|
||||
INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
|
||||
PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
|
||||
TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
|
||||
TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
|
||||
REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
|
||||
CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
|
||||
OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
|
||||
BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
|
||||
AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
|
||||
AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
|
||||
USE THE CONTENT.
|
||||
|
||||
Unless otherwise indicated, all Content made available on the TianoCore
|
||||
site is provided to you under the terms and conditions of the BSD
|
||||
License ("BSD"). A copy of the BSD License is available at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
or when applicable, in the associated License.txt file.
|
||||
|
||||
Certain other content may be made available under other licenses as
|
||||
indicated in or with such Content. (For example, in a License.txt file.)
|
||||
|
||||
You accept and agree to the following terms and conditions for Your
|
||||
present and future Contributions submitted to TianoCore site. Except
|
||||
for the license granted to Intel hereunder, You reserve all right,
|
||||
title, and interest in and to Your Contributions.
|
||||
|
||||
== SECTION 1: Definitions ==
|
||||
* "You" or "Contributor" shall mean the copyright owner or legal
|
||||
entity authorized by the copyright owner that is making a
|
||||
Contribution hereunder. All other entities that control, are
|
||||
controlled by, or are under common control with that entity are
|
||||
considered to be a single Contributor. For the purposes of this
|
||||
definition, "control" means (i) the power, direct or indirect, to
|
||||
cause the direction or management of such entity, whether by
|
||||
contract or otherwise, or (ii) ownership of fifty percent (50%)
|
||||
or more of the outstanding shares, or (iii) beneficial ownership
|
||||
of such entity.
|
||||
* "Contribution" shall mean any original work of authorship,
|
||||
including any modifications or additions to an existing work,
|
||||
that is intentionally submitted by You to the TinaoCore site for
|
||||
inclusion in, or documentation of, any of the Content. For the
|
||||
purposes of this definition, "submitted" means any form of
|
||||
electronic, verbal, or written communication sent to the
|
||||
TianoCore site or its representatives, including but not limited
|
||||
to communication on electronic mailing lists, source code
|
||||
control systems, and issue tracking systems that are managed by,
|
||||
or on behalf of, the TianoCore site for the purpose of
|
||||
discussing and improving the Content, but excluding
|
||||
communication that is conspicuously marked or otherwise
|
||||
designated in writing by You as "Not a Contribution."
|
||||
|
||||
== SECTION 2: License for Contributions ==
|
||||
* Contributor hereby agrees that redistribution and use of the
|
||||
Contribution in source and binary forms, with or without
|
||||
modification, are permitted provided that the following
|
||||
conditions are met:
|
||||
** Redistributions of source code must retain the Contributor's
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer.
|
||||
** Redistributions in binary form must reproduce the Contributor's
|
||||
copyright notice, this list of conditions and the following
|
||||
disclaimer in the documentation and/or other materials provided
|
||||
with the distribution.
|
||||
* Disclaimer. None of the names of Contributor, Intel, or the names
|
||||
of their respective contributors may be used to endorse or
|
||||
promote products derived from this software without specific
|
||||
prior written permission.
|
||||
* Contributor grants a license (with the right to sublicense) under
|
||||
claims of Contributor's patents that Contributor can license that
|
||||
are infringed by the Contribution (as delivered by Contributor) to
|
||||
make, use, distribute, sell, offer for sale, and import the
|
||||
Contribution and derivative works thereof solely to the minimum
|
||||
extent necessary for licensee to exercise the granted copyright
|
||||
license; this patent license applies solely to those portions of
|
||||
the Contribution that are unmodified. No hardware per se is
|
||||
licensed.
|
||||
* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
|
||||
CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
|
||||
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
||||
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
||||
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
|
||||
CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
|
||||
DAMAGE.
|
||||
|
||||
== SECTION 3: Representations ==
|
||||
* You represent that You are legally entitled to grant the above
|
||||
license. If your employer(s) has rights to intellectual property
|
||||
that You create that includes Your Contributions, You represent
|
||||
that You have received permission to make Contributions on behalf
|
||||
of that employer, that Your employer has waived such rights for
|
||||
Your Contributions.
|
||||
* You represent that each of Your Contributions is Your original
|
||||
creation (see Section 4 for submissions on behalf of others).
|
||||
You represent that Your Contribution submissions include complete
|
||||
details of any third-party license or other restriction
|
||||
(including, but not limited to, related patents and trademarks)
|
||||
of which You are personally aware and which are associated with
|
||||
any part of Your Contributions.
|
||||
|
||||
== SECTION 4: Third Party Contributions ==
|
||||
* Should You wish to submit work that is not Your original creation,
|
||||
You may submit it to TianoCore site separately from any
|
||||
Contribution, identifying the complete details of its source
|
||||
and of any license or other restriction (including, but not
|
||||
limited to, related patents, trademarks, and license agreements)
|
||||
of which You are personally aware, and conspicuously marking the
|
||||
work as "Submitted on behalf of a third-party: [named here]".
|
||||
|
||||
== SECTION 5: Miscellaneous ==
|
||||
* Applicable Laws. Any claims arising under or relating to this
|
||||
Agreement shall be governed by the internal substantive laws of
|
||||
the State of Delaware or federal courts located in Delaware,
|
||||
without regard to principles of conflict of laws.
|
||||
* Language. This Agreement is in the English language only, which
|
||||
language shall be controlling in all respects, and all versions
|
||||
of this Agreement in any other language shall be for accommodation
|
||||
only and shall not be binding. All communications and notices made
|
||||
or given pursuant to this Agreement, and all documentation and
|
||||
support to be provided, unless otherwise noted, shall be in the
|
||||
English language.
|
||||
|
@ -1,38 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <PiDxe.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/DefaultExceptionHandlerLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Protocol/Cpu.h>
|
||||
|
||||
STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
ArmCrashDumpDxeInitialize (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
return mCpu->RegisterInterruptHandler (mCpu,
|
||||
EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
|
||||
&DefaultExceptionHandler);
|
||||
}
|
@ -1,56 +0,0 @@
|
||||
#/** @file
|
||||
#
|
||||
# Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#**/
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmCrashDumpDxe
|
||||
PLATFORM_GUID = 8dc3c2f8-988e-4e32-8fb7-0df43f6d0d8a
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010019
|
||||
OUTPUT_DIRECTORY = Build/ArmCrashDumpDxe
|
||||
SUPPORTED_ARCHITECTURES = AARCH64
|
||||
BUILD_TARGETS = DEBUG
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
|
||||
[PcdsFixedAtBuild]
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
|
||||
|
||||
[LibraryClasses]
|
||||
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
|
||||
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
|
||||
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
|
||||
DebugLib|MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf
|
||||
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
|
||||
DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
|
||||
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
|
||||
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
|
||||
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
|
||||
SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
|
||||
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
|
||||
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
|
||||
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
|
||||
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
|
||||
|
||||
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
|
||||
NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
|
||||
|
||||
[Components.common]
|
||||
ArmPkg/Drivers/ArmCrashDumpDxe/ArmCrashDumpDxe.inf
|
@ -1,40 +0,0 @@
|
||||
#/** @file
|
||||
#
|
||||
# Copyright (c) 2017, Linaro, Ltd. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010018
|
||||
BASE_NAME = ArmCrashDumpDxe
|
||||
FILE_GUID = 0bda00b0-05d6-4bb8-bfc7-058ad13615cf
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
ENTRY_POINT = ArmCrashDumpDxeInitialize
|
||||
|
||||
[Sources]
|
||||
ArmCrashDumpDxe.c
|
||||
|
||||
[Packages]
|
||||
ArmPkg/ArmPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
DebugLib
|
||||
DefaultExceptionHandlerLib
|
||||
UefiBootServicesTableLib
|
||||
UefiDriverEntryPoint
|
||||
|
||||
[Protocols]
|
||||
gEfiCpuArchProtocolGuid
|
||||
|
||||
[Depex]
|
||||
gEfiCpuArchProtocolGuid
|
@ -1,6 +1,6 @@
|
||||
/*++
|
||||
|
||||
Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -28,10 +28,14 @@ ExitBootServicesEvent (
|
||||
IN VOID *Context
|
||||
);
|
||||
|
||||
//
|
||||
// Making this global saves a few bytes in image size
|
||||
//
|
||||
EFI_HANDLE gHardwareInterruptHandle = NULL;
|
||||
|
||||
//
|
||||
// Notifications
|
||||
//
|
||||
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
|
||||
|
||||
// Maximum Number of Interrupts
|
||||
@ -39,46 +43,6 @@ UINTN mGicNumInterrupts = 0;
|
||||
|
||||
HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
|
||||
|
||||
|
||||
/**
|
||||
Calculate GICD_ICFGRn base address and corresponding bit
|
||||
field Int_config[1] of the GIC distributor register.
|
||||
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param RegAddress Corresponding GICD_ICFGRn base address.
|
||||
@param Config1Bit Bit number of F Int_config[1] bit in the register.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
EFI_STATUS
|
||||
GicGetDistributorIcfgBaseAndBit (
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
OUT UINTN *RegAddress,
|
||||
OUT UINTN *Config1Bit
|
||||
)
|
||||
{
|
||||
UINTN RegIndex;
|
||||
UINTN Field;
|
||||
|
||||
if (Source >= mGicNumInterrupts) {
|
||||
ASSERT(Source < mGicNumInterrupts);
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
|
||||
Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
|
||||
*RegAddress = PcdGet64 (PcdGicDistributorBase)
|
||||
+ ARM_GIC_ICDICFR
|
||||
+ (ARM_GIC_ICDICFR_BYTES * RegIndex);
|
||||
*Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)
|
||||
+ ARM_GIC_ICDICFR_F_CONFIG1_BIT);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**
|
||||
Register Handler for the specified interrupt source.
|
||||
|
||||
@ -121,68 +85,25 @@ RegisterInterruptSource (
|
||||
}
|
||||
}
|
||||
|
||||
STATIC VOID *mCpuArchProtocolNotifyEventRegistration;
|
||||
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
CpuArchEventProtocolNotify (
|
||||
IN EFI_EVENT Event,
|
||||
IN VOID *Context
|
||||
)
|
||||
{
|
||||
EFI_CPU_ARCH_PROTOCOL *Cpu;
|
||||
EFI_STATUS Status;
|
||||
|
||||
// Get the CPU protocol that this driver requires.
|
||||
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Unregister the default exception handler.
|
||||
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
|
||||
if (EFI_ERROR (Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
|
||||
__FUNCTION__, Status));
|
||||
return;
|
||||
}
|
||||
|
||||
// Register to receive interrupts
|
||||
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
|
||||
Context);
|
||||
if (EFI_ERROR (Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
|
||||
__FUNCTION__, Status));
|
||||
}
|
||||
|
||||
gBS->CloseEvent (Event);
|
||||
}
|
||||
|
||||
EFI_STATUS
|
||||
InstallAndRegisterInterruptService (
|
||||
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
|
||||
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
|
||||
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
CONST UINTN RihArraySize =
|
||||
(sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
|
||||
EFI_CPU_ARCH_PROTOCOL *Cpu;
|
||||
|
||||
// Initialize the array for the Interrupt Handlers
|
||||
gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
|
||||
gRegisteredInterruptHandlers = (HARDWARE_INTERRUPT_HANDLER*)AllocateZeroPool (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
|
||||
if (gRegisteredInterruptHandlers == NULL) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
Status = gBS->InstallMultipleProtocolInterfaces (
|
||||
&gHardwareInterruptHandle,
|
||||
&gHardwareInterruptProtocolGuid,
|
||||
InterruptProtocol,
|
||||
&gHardwareInterrupt2ProtocolGuid,
|
||||
Interrupt2Protocol,
|
||||
&gHardwareInterruptProtocolGuid, InterruptProtocol,
|
||||
NULL
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
@ -190,23 +111,31 @@ InstallAndRegisterInterruptService (
|
||||
}
|
||||
|
||||
//
|
||||
// Install the interrupt handler as soon as the CPU arch protocol appears.
|
||||
// Get the CPU protocol that this driver requires.
|
||||
//
|
||||
EfiCreateProtocolNotifyEvent (
|
||||
&gEfiCpuArchProtocolGuid,
|
||||
TPL_CALLBACK,
|
||||
CpuArchEventProtocolNotify,
|
||||
InterruptHandler,
|
||||
&mCpuArchProtocolNotifyEventRegistration);
|
||||
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// Unregister the default exception handler.
|
||||
//
|
||||
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// Register to receive interrupts
|
||||
//
|
||||
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, InterruptHandler);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Register for an ExitBootServicesEvent
|
||||
Status = gBS->CreateEvent (
|
||||
EVT_SIGNAL_EXIT_BOOT_SERVICES,
|
||||
TPL_NOTIFY,
|
||||
ExitBootServicesEvent,
|
||||
NULL,
|
||||
&EfiExitBootServicesEvent
|
||||
);
|
||||
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
@ -1,6 +1,6 @@
|
||||
/*++
|
||||
|
||||
Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -21,20 +21,19 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Library/UefiLib.h>
|
||||
|
||||
#include <Protocol/Cpu.h>
|
||||
#include <Protocol/HardwareInterrupt.h>
|
||||
#include <Protocol/HardwareInterrupt2.h>
|
||||
|
||||
extern UINTN mGicNumInterrupts;
|
||||
extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
|
||||
|
||||
//
|
||||
// Common API
|
||||
//
|
||||
EFI_STATUS
|
||||
InstallAndRegisterInterruptService (
|
||||
IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
|
||||
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
|
||||
IN EFI_EVENT_NOTIFY ExitBootServicesEvent
|
||||
);
|
||||
@ -47,39 +46,22 @@ RegisterInterruptSource (
|
||||
IN HARDWARE_INTERRUPT_HANDLER Handler
|
||||
);
|
||||
|
||||
//
|
||||
// GicV2 API
|
||||
//
|
||||
EFI_STATUS
|
||||
GicV2DxeInitialize (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
);
|
||||
|
||||
//
|
||||
// GicV3 API
|
||||
//
|
||||
EFI_STATUS
|
||||
GicV3DxeInitialize (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
);
|
||||
|
||||
|
||||
// Shared code
|
||||
|
||||
/**
|
||||
Calculate GICD_ICFGRn base address and corresponding bit
|
||||
field Int_config[1] of the GIC distributor register.
|
||||
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param RegAddress Corresponding GICD_ICFGRn base address.
|
||||
@param Config1Bit Bit number of F Int_config[1] bit in the register.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
EFI_STATUS
|
||||
GicGetDistributorIcfgBaseAndBit (
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
OUT UINTN *RegAddress,
|
||||
OUT UINTN *Config1Bit
|
||||
);
|
||||
|
||||
#endif
|
||||
|
@ -1,7 +1,7 @@
|
||||
#/** @file
|
||||
#
|
||||
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
# Copyright (c) 2012 - 2017, ARM Ltd. All rights reserved.<BR>
|
||||
# Copyright (c) 2012 - 2015, ARM Ltd. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -45,12 +45,10 @@
|
||||
UefiDriverEntryPoint
|
||||
IoLib
|
||||
PcdLib
|
||||
UefiLib
|
||||
|
||||
[Protocols]
|
||||
gHardwareInterruptProtocolGuid ## PRODUCES
|
||||
gHardwareInterrupt2ProtocolGuid ## PRODUCES
|
||||
gEfiCpuArchProtocolGuid ## CONSUMES ## NOTIFY
|
||||
gHardwareInterruptProtocolGuid
|
||||
gEfiCpuArchProtocolGuid
|
||||
|
||||
[Pcd.common]
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase
|
||||
@ -59,4 +57,4 @@
|
||||
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
|
||||
|
||||
[Depex]
|
||||
TRUE
|
||||
gEfiCpuArchProtocolGuid
|
||||
|
@ -1,6 +1,6 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -19,23 +19,6 @@
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
// In GICv3, there are 2 x 64KB frames:
|
||||
// Redistributor control frame + SGI Control & Generation frame
|
||||
#define GIC_V3_REDISTRIBUTOR_GRANULARITY (ARM_GICR_CTLR_FRAME_SIZE \
|
||||
+ ARM_GICR_SGI_PPI_FRAME_SIZE)
|
||||
|
||||
// In GICv4, there are 2 additional 64KB frames:
|
||||
// VLPI frame + Reserved page frame
|
||||
#define GIC_V4_REDISTRIBUTOR_GRANULARITY (GIC_V3_REDISTRIBUTOR_GRANULARITY \
|
||||
+ ARM_GICR_SGI_VLPI_FRAME_SIZE \
|
||||
+ ARM_GICR_SGI_RESERVED_FRAME_SIZE)
|
||||
|
||||
#define ISENABLER_ADDRESS(base,offset) ((base) + \
|
||||
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * offset))
|
||||
|
||||
#define ICENABLER_ADDRESS(base,offset) ((base) + \
|
||||
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * offset))
|
||||
|
||||
/**
|
||||
*
|
||||
* Return whether the Source interrupt index refers to a shared interrupt (SPI)
|
||||
@ -64,43 +47,37 @@ GicGetCpuRedistributorBase (
|
||||
IN ARM_GIC_ARCH_REVISION Revision
|
||||
)
|
||||
{
|
||||
UINTN Index;
|
||||
UINTN MpId;
|
||||
UINTN CpuAffinity;
|
||||
UINTN Affinity;
|
||||
UINTN GicRedistributorGranularity;
|
||||
UINTN GicCpuRedistributorBase;
|
||||
UINT64 TypeRegister;
|
||||
|
||||
MpId = ArmReadMpidr ();
|
||||
// Define CPU affinity as:
|
||||
// Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32]
|
||||
// Define CPU affinity as Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32]
|
||||
// whereas Affinity3 is defined at [32:39] in MPIDR
|
||||
CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) |
|
||||
((MpId & ARM_CORE_AFF3) >> 8);
|
||||
CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) | ((MpId & ARM_CORE_AFF3) >> 8);
|
||||
|
||||
if (Revision < ARM_GIC_ARCH_REVISION_3) {
|
||||
if (Revision == ARM_GIC_ARCH_REVISION_3) {
|
||||
// 2 x 64KB frame: Redistributor control frame + SGI Control & Generation frame
|
||||
GicRedistributorGranularity = ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_SGI_PPI_FRAME_SIZE;
|
||||
} else {
|
||||
ASSERT_EFI_ERROR (EFI_UNSUPPORTED);
|
||||
return 0;
|
||||
}
|
||||
|
||||
GicCpuRedistributorBase = GicRedistributorBase;
|
||||
|
||||
do {
|
||||
TypeRegister = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER);
|
||||
Affinity = ARM_GICR_TYPER_GET_AFFINITY (TypeRegister);
|
||||
for (Index = 0; Index < PcdGet32 (PcdCoreCount); Index++) {
|
||||
Affinity = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER) >> 32;
|
||||
if (Affinity == CpuAffinity) {
|
||||
return GicCpuRedistributorBase;
|
||||
}
|
||||
|
||||
// Move to the next GIC Redistributor frame.
|
||||
// The GIC specification does not forbid a mixture of redistributors
|
||||
// with or without support for virtual LPIs, so we test Virtual LPIs
|
||||
// Support (VLPIS) bit for each frame to decide the granularity.
|
||||
// Note: The assumption here is that the redistributors are adjacent
|
||||
// for all CPUs. However this may not be the case for NUMA systems.
|
||||
GicCpuRedistributorBase += (((ARM_GICR_TYPER_VLPIS & TypeRegister) != 0)
|
||||
? GIC_V4_REDISTRIBUTOR_GRANULARITY
|
||||
: GIC_V3_REDISTRIBUTOR_GRANULARITY);
|
||||
} while ((TypeRegister & ARM_GICR_TYPER_LAST) == 0);
|
||||
// Move to the next GIC Redistributor frame
|
||||
GicCpuRedistributorBase += GicRedistributorGranularity;
|
||||
}
|
||||
|
||||
// The Redistributor has not been found for the current CPU
|
||||
ASSERT_EFI_ERROR (EFI_NOT_FOUND);
|
||||
@ -135,10 +112,7 @@ ArmGicSendSgiTo (
|
||||
IN INTN SgiId
|
||||
)
|
||||
{
|
||||
MmioWrite32 (
|
||||
GicDistributorBase + ARM_GIC_ICDSGIR,
|
||||
((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId
|
||||
);
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -149,8 +123,7 @@ ArmGicSendSgiTo (
|
||||
* in the GICv3 the register value is only the InterruptId.
|
||||
*
|
||||
* @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
|
||||
* @param InterruptId InterruptId read from the Interrupt
|
||||
* Acknowledge Register
|
||||
* @param InterruptId InterruptId read from the Interrupt Acknowledge Register
|
||||
*
|
||||
* @retval value returned by the Interrupt Acknowledge Register
|
||||
*
|
||||
@ -227,25 +200,16 @@ ArmGicEnableInterrupt (
|
||||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
|
||||
SourceIsSpi (Source)) {
|
||||
// Write set-enable register
|
||||
MmioWrite32 (
|
||||
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
|
||||
1 << RegShift
|
||||
);
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), 1 << RegShift);
|
||||
} else {
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
|
||||
GicRedistributorBase,
|
||||
Revision
|
||||
);
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
|
||||
if (GicCpuRedistributorBase == 0) {
|
||||
ASSERT_EFI_ERROR (EFI_NOT_FOUND);
|
||||
return;
|
||||
}
|
||||
|
||||
// Write set-enable register
|
||||
MmioWrite32 (
|
||||
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
|
||||
1 << RegShift
|
||||
);
|
||||
MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset), 1 << RegShift);
|
||||
}
|
||||
}
|
||||
|
||||
@ -271,24 +235,15 @@ ArmGicDisableInterrupt (
|
||||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
|
||||
SourceIsSpi (Source)) {
|
||||
// Write clear-enable register
|
||||
MmioWrite32 (
|
||||
GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
|
||||
1 << RegShift
|
||||
);
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), 1 << RegShift);
|
||||
} else {
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
|
||||
GicRedistributorBase,
|
||||
Revision
|
||||
);
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
|
||||
if (GicCpuRedistributorBase == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Write clear-enable register
|
||||
MmioWrite32 (
|
||||
ICENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
|
||||
1 << RegShift
|
||||
);
|
||||
MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * RegOffset), 1 << RegShift);
|
||||
}
|
||||
}
|
||||
|
||||
@ -314,23 +269,15 @@ ArmGicIsInterruptEnabled (
|
||||
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
|
||||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
|
||||
SourceIsSpi (Source)) {
|
||||
Interrupts = ((MmioRead32 (
|
||||
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
|
||||
)
|
||||
& (1 << RegShift)) != 0);
|
||||
Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShift)) != 0);
|
||||
} else {
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (
|
||||
GicRedistributorBase,
|
||||
Revision
|
||||
);
|
||||
GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision);
|
||||
if (GicCpuRedistributorBase == 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Read set-enable register
|
||||
Interrupts = MmioRead32 (
|
||||
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset)
|
||||
);
|
||||
Interrupts = MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset));
|
||||
}
|
||||
|
||||
return ((Interrupts & (1 << RegShift)) != 0);
|
||||
|
@ -1,5 +1,5 @@
|
||||
#/* @file
|
||||
# Copyright (c) 2011-2018, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -44,5 +44,8 @@
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
[Pcd]
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount
|
||||
|
||||
[FeaturePcd]
|
||||
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
|
||||
|
52
ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
Normal file
52
ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf
Normal file
@ -0,0 +1,52 @@
|
||||
#/* @file
|
||||
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#*/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = ArmGicSecLib
|
||||
FILE_GUID = 85f3cf80-b5f4-11df-9855-0002a5d5c51b
|
||||
MODULE_TYPE = SEC
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = ArmGicLib
|
||||
|
||||
[Sources]
|
||||
ArmGicLib.c
|
||||
ArmGicSecLib.c
|
||||
|
||||
GicV2/ArmGicV2Lib.c
|
||||
GicV2/ArmGicV2SecLib.c
|
||||
|
||||
[Sources.ARM]
|
||||
GicV3/Arm/ArmGicV3.S | GCC
|
||||
GicV3/Arm/ArmGicV3.asm | RVCT
|
||||
|
||||
[Sources.AARCH64]
|
||||
GicV3/AArch64/ArmGicV3.S
|
||||
|
||||
[Packages]
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
ArmLib
|
||||
DebugLib
|
||||
IoLib
|
||||
ArmGicArchLib
|
||||
|
||||
[Pcd]
|
||||
gArmPlatformTokenSpaceGuid.PcdCoreCount
|
||||
|
||||
[FeaturePcd]
|
||||
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy
|
@ -2,7 +2,7 @@
|
||||
|
||||
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
|
||||
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -29,7 +29,6 @@ Abstract:
|
||||
#define ARM_GIC_DEFAULT_PRIORITY 0x80
|
||||
|
||||
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
|
||||
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol;
|
||||
|
||||
STATIC UINT32 mGicInterruptInterfaceBase;
|
||||
STATIC UINT32 mGicDistributorBase;
|
||||
@ -44,7 +43,6 @@ STATIC UINT32 mGicDistributorBase;
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2EnableInterruptSource (
|
||||
@ -72,7 +70,6 @@ GicV2EnableInterruptSource (
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2DisableInterruptSource (
|
||||
@ -101,7 +98,6 @@ GicV2DisableInterruptSource (
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2GetInterruptSourceState (
|
||||
@ -131,7 +127,6 @@ GicV2GetInterruptSourceState (
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2EndOfInterrupt (
|
||||
@ -152,15 +147,13 @@ GicV2EndOfInterrupt (
|
||||
EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
|
||||
|
||||
@param InterruptType Defines the type of interrupt or exception that
|
||||
occurred on the processor.This parameter is
|
||||
processor architecture specific.
|
||||
occurred on the processor.This parameter is processor architecture specific.
|
||||
@param SystemContext A pointer to the processor context when
|
||||
the interrupt occurred on the processor.
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
GicV2IrqInterruptHandler (
|
||||
@ -173,10 +166,9 @@ GicV2IrqInterruptHandler (
|
||||
|
||||
GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
|
||||
|
||||
// Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the
|
||||
// number of interrupt (ie: Spurious interrupt).
|
||||
// Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the number of interrupt (ie: Spurious interrupt).
|
||||
if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) {
|
||||
// The special interrupts do not need to be acknowledged
|
||||
// The special interrupt do not need to be acknowledge
|
||||
return;
|
||||
}
|
||||
|
||||
@ -185,12 +177,14 @@ GicV2IrqInterruptHandler (
|
||||
// Call the registered interrupt handler.
|
||||
InterruptHandler (GicInterrupt, SystemContext);
|
||||
} else {
|
||||
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
|
||||
DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
|
||||
GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// The protocol instance produced by this driver
|
||||
//
|
||||
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
|
||||
RegisterInterruptSource,
|
||||
GicV2EnableInterruptSource,
|
||||
@ -199,151 +193,15 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = {
|
||||
GicV2EndOfInterrupt
|
||||
};
|
||||
|
||||
/**
|
||||
Get interrupt trigger type of an interrupt
|
||||
|
||||
@param This Instance pointer for this protocol
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param TriggerType Returns interrupt trigger type.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2GetTriggerType (
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
|
||||
)
|
||||
{
|
||||
UINTN RegAddress;
|
||||
UINTN Config1Bit;
|
||||
EFI_STATUS Status;
|
||||
|
||||
Status = GicGetDistributorIcfgBaseAndBit (
|
||||
Source,
|
||||
&RegAddress,
|
||||
&Config1Bit
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
|
||||
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
|
||||
} else {
|
||||
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Set interrupt trigger type of an interrupt
|
||||
|
||||
@param This Instance pointer for this protocol
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param TriggerType Interrupt trigger type.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV2SetTriggerType (
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
|
||||
)
|
||||
{
|
||||
UINTN RegAddress;
|
||||
UINTN Config1Bit;
|
||||
UINT32 Value;
|
||||
EFI_STATUS Status;
|
||||
BOOLEAN SourceEnabled;
|
||||
|
||||
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
|
||||
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
|
||||
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
|
||||
TriggerType));
|
||||
ASSERT (FALSE);
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
Status = GicGetDistributorIcfgBaseAndBit (
|
||||
Source,
|
||||
&RegAddress,
|
||||
&Config1Bit
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = GicV2GetInterruptSourceState (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source,
|
||||
&SourceEnabled
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Value = (TriggerType == EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
|
||||
? ARM_GIC_ICDICFR_EDGE_TRIGGERED
|
||||
: ARM_GIC_ICDICFR_LEVEL_TRIGGERED;
|
||||
|
||||
// Before changing the value, we must disable the interrupt,
|
||||
// otherwise GIC behavior is UNPREDICTABLE.
|
||||
if (SourceEnabled) {
|
||||
GicV2DisableInterruptSource (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source
|
||||
);
|
||||
}
|
||||
|
||||
MmioAndThenOr32 (
|
||||
RegAddress,
|
||||
~(0x1 << Config1Bit),
|
||||
Value << Config1Bit
|
||||
);
|
||||
|
||||
// Restore interrupt state
|
||||
if (SourceEnabled) {
|
||||
GicV2EnableInterruptSource (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source
|
||||
);
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = {
|
||||
(HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_ENABLE)GicV2EnableInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_DISABLE)GicV2DisableInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV2GetInterruptSourceState,
|
||||
(HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV2EndOfInterrupt,
|
||||
GicV2GetTriggerType,
|
||||
GicV2SetTriggerType
|
||||
};
|
||||
|
||||
/**
|
||||
Shutdown our hardware
|
||||
|
||||
DXE Core will disable interrupts and turn off the timer and disable
|
||||
interrupts after all the event handlers have run.
|
||||
DXE Core will disable interrupts and turn off the timer and disable interrupts
|
||||
after all the event handlers have run.
|
||||
|
||||
@param[in] Event The Event that is being processed
|
||||
@param[in] Context Event Context
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
GicV2ExitBootServicesEvent (
|
||||
@ -398,8 +256,7 @@ GicV2DxeInitialize (
|
||||
UINTN RegShift;
|
||||
UINT32 CpuTarget;
|
||||
|
||||
// Make sure the Interrupt Controller Protocol is not already installed in
|
||||
// the system.
|
||||
// Make sure the Interrupt Controller Protocol is not already installed in the system.
|
||||
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
|
||||
|
||||
mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);
|
||||
@ -419,27 +276,25 @@ GicV2DxeInitialize (
|
||||
);
|
||||
}
|
||||
|
||||
//
|
||||
// Targets the interrupts to the Primary Cpu
|
||||
//
|
||||
|
||||
// Only Primary CPU will run this code. We can identify our GIC CPU ID by
|
||||
// reading the GIC Distributor Target register. The 8 first GICD_ITARGETSRn
|
||||
// are banked to each connected CPU. These 8 registers hold the CPU targets
|
||||
// fields for interrupts 0-31. More Info in the GIC Specification about
|
||||
// "Interrupt Processor Targets Registers"
|
||||
|
||||
// Read the first Interrupt Processor Targets Register (that corresponds to
|
||||
// the 4 first SGIs)
|
||||
// Only Primary CPU will run this code. We can identify our GIC CPU ID by reading
|
||||
// the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each
|
||||
// connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31.
|
||||
// More Info in the GIC Specification about "Interrupt Processor Targets Registers"
|
||||
//
|
||||
// Read the first Interrupt Processor Targets Register (that corresponds to the 4
|
||||
// first SGIs)
|
||||
CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
|
||||
|
||||
// The CPU target is a bit field mapping each CPU to a GIC CPU Interface.
|
||||
// This value is 0 when we run on a uniprocessor platform.
|
||||
// The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value
|
||||
// is 0 when we run on a uniprocessor platform.
|
||||
if (CpuTarget != 0) {
|
||||
// The 8 first Interrupt Processor Targets Registers are read-only
|
||||
for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
|
||||
MmioWrite32 (
|
||||
mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4),
|
||||
CpuTarget
|
||||
);
|
||||
MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget);
|
||||
}
|
||||
}
|
||||
|
||||
@ -456,11 +311,7 @@ GicV2DxeInitialize (
|
||||
ArmGicEnableDistributor (mGicDistributorBase);
|
||||
|
||||
Status = InstallAndRegisterInterruptService (
|
||||
&gHardwareInterruptV2Protocol,
|
||||
&gHardwareInterrupt2V2Protocol,
|
||||
GicV2IrqInterruptHandler,
|
||||
GicV2ExitBootServicesEvent
|
||||
);
|
||||
&gHardwareInterruptV2Protocol, GicV2IrqInterruptHandler, GicV2ExitBootServicesEvent);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
100
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c
Normal file
100
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c
Normal file
@ -0,0 +1,100 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Base.h>
|
||||
#include <Library/ArmLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/ArmGicLib.h>
|
||||
|
||||
/*
|
||||
* This function configures the all interrupts to be Non-secure.
|
||||
*
|
||||
*/
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicV2SetupNonSecure (
|
||||
IN UINTN MpId,
|
||||
IN INTN GicDistributorBase,
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
UINTN InterruptId;
|
||||
UINTN CachedPriorityMask;
|
||||
UINTN Index;
|
||||
UINTN MaxInterrupts;
|
||||
|
||||
CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
|
||||
|
||||
// Set priority Mask so that no interrupts get through to CPU
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0);
|
||||
|
||||
InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
|
||||
MaxInterrupts = ArmGicGetMaxNumInterrupts (GicDistributorBase);
|
||||
|
||||
// Only try to clear valid interrupts. Ignore spurious interrupts.
|
||||
while ((InterruptId & 0x3FF) < MaxInterrupts) {
|
||||
// Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
|
||||
ArmGicEndOfInterrupt (GicInterruptInterfaceBase, InterruptId);
|
||||
|
||||
// Next
|
||||
InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
|
||||
}
|
||||
|
||||
// Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
|
||||
if (ArmPlatformIsPrimaryCore (MpId)) {
|
||||
// Ensure all GIC interrupts are Non-Secure
|
||||
for (Index = 0; Index < (MaxInterrupts / 32); Index++) {
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
|
||||
}
|
||||
} else {
|
||||
// The secondary cores only set the Non Secure bit to their banked PPIs
|
||||
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff);
|
||||
}
|
||||
|
||||
// Ensure all interrupts can get through the priority mask
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicV2EnableInterruptInterface (
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
// Set Priority Mask to allow interrupts
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF);
|
||||
|
||||
// Enable CPU interface in Secure world
|
||||
// Enable CPU interface in Non-secure World
|
||||
// Signal Secure Interrupts to CPU using FIQ line *
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,
|
||||
ARM_GIC_ICCICR_ENABLE_SECURE |
|
||||
ARM_GIC_ICCICR_ENABLE_NS |
|
||||
ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicV2DisableInterruptInterface (
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
)
|
||||
{
|
||||
UINT32 ControlValue;
|
||||
|
||||
// Disable CPU interface in Secure world and Non-secure World
|
||||
ControlValue = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR);
|
||||
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, ControlValue & ~(ARM_GIC_ICCICR_ENABLE_SECURE | ARM_GIC_ICCICR_ENABLE_NS));
|
||||
}
|
@ -66,7 +66,7 @@ ASM_FUNC(ArmGicV3EndOfInterrupt)
|
||||
// VOID
|
||||
// );
|
||||
ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
|
||||
mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
|
||||
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
|
||||
bx lr
|
||||
|
||||
//VOID
|
||||
|
@ -66,7 +66,7 @@
|
||||
// VOID
|
||||
// );
|
||||
RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt
|
||||
mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
|
||||
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
|
||||
bx lr
|
||||
|
||||
//VOID
|
||||
|
@ -1,6 +1,6 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2017, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2011-2016, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -19,7 +19,6 @@
|
||||
#define ARM_GIC_DEFAULT_PRIORITY 0x80
|
||||
|
||||
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
|
||||
extern EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol;
|
||||
|
||||
STATIC UINTN mGicDistributorBase;
|
||||
STATIC UINTN mGicRedistributorsBase;
|
||||
@ -34,7 +33,6 @@ STATIC UINTN mGicRedistributorsBase;
|
||||
@retval EFI_DEVICE_ERROR Hardware could not be programmed.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3EnableInterruptSource (
|
||||
@ -62,7 +60,6 @@ GicV3EnableInterruptSource (
|
||||
@retval EFI_DEVICE_ERROR Hardware could not be programmed.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3DisableInterruptSource (
|
||||
@ -91,7 +88,6 @@ GicV3DisableInterruptSource (
|
||||
@retval EFI_DEVICE_ERROR InterruptState is not valid
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3GetInterruptSourceState (
|
||||
@ -105,11 +101,7 @@ GicV3GetInterruptSourceState (
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
*InterruptState = ArmGicIsInterruptEnabled (
|
||||
mGicDistributorBase,
|
||||
mGicRedistributorsBase,
|
||||
Source
|
||||
);
|
||||
*InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, mGicRedistributorsBase, Source);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
@ -125,7 +117,6 @@ GicV3GetInterruptSourceState (
|
||||
@retval EFI_DEVICE_ERROR Hardware could not be programmed.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3EndOfInterrupt (
|
||||
@ -146,15 +137,13 @@ GicV3EndOfInterrupt (
|
||||
EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
|
||||
|
||||
@param InterruptType Defines the type of interrupt or exception that
|
||||
occurred on the processor. This parameter is
|
||||
processor architecture specific.
|
||||
occurred on the processor.This parameter is processor architecture specific.
|
||||
@param SystemContext A pointer to the processor context when
|
||||
the interrupt occurred on the processor.
|
||||
|
||||
@return None
|
||||
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
GicV3IrqInterruptHandler (
|
||||
@ -179,12 +168,14 @@ GicV3IrqInterruptHandler (
|
||||
// Call the registered interrupt handler.
|
||||
InterruptHandler (GicInterrupt, SystemContext);
|
||||
} else {
|
||||
DEBUG ((DEBUG_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
|
||||
DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt));
|
||||
GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// The protocol instance produced by this driver
|
||||
//
|
||||
EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
|
||||
RegisterInterruptSource,
|
||||
GicV3EnableInterruptSource,
|
||||
@ -193,140 +184,6 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = {
|
||||
GicV3EndOfInterrupt
|
||||
};
|
||||
|
||||
/**
|
||||
Get interrupt trigger type of an interrupt
|
||||
|
||||
@param This Instance pointer for this protocol
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param TriggerType Returns interrupt trigger type.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3GetTriggerType (
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType
|
||||
)
|
||||
{
|
||||
UINTN RegAddress;
|
||||
UINTN Config1Bit;
|
||||
EFI_STATUS Status;
|
||||
|
||||
Status = GicGetDistributorIcfgBaseAndBit (
|
||||
Source,
|
||||
&RegAddress,
|
||||
&Config1Bit
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
if ((MmioRead32 (RegAddress) & (1 << Config1Bit)) == 0) {
|
||||
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH;
|
||||
} else {
|
||||
*TriggerType = EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING;
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
Set interrupt trigger type of an interrupt
|
||||
|
||||
@param This Instance pointer for this protocol
|
||||
@param Source Hardware source of the interrupt.
|
||||
@param TriggerType Interrupt trigger type.
|
||||
|
||||
@retval EFI_SUCCESS Source interrupt supported.
|
||||
@retval EFI_UNSUPPORTED Source interrupt is not supported.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GicV3SetTriggerType (
|
||||
IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This,
|
||||
IN HARDWARE_INTERRUPT_SOURCE Source,
|
||||
IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType
|
||||
)
|
||||
{
|
||||
UINTN RegAddress;
|
||||
UINTN Config1Bit;
|
||||
UINT32 Value;
|
||||
EFI_STATUS Status;
|
||||
BOOLEAN SourceEnabled;
|
||||
|
||||
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
|
||||
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
|
||||
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
|
||||
TriggerType));
|
||||
ASSERT (FALSE);
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
Status = GicGetDistributorIcfgBaseAndBit (
|
||||
Source,
|
||||
&RegAddress,
|
||||
&Config1Bit
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = GicV3GetInterruptSourceState (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source,
|
||||
&SourceEnabled
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Value = (TriggerType == EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
|
||||
? ARM_GIC_ICDICFR_EDGE_TRIGGERED
|
||||
: ARM_GIC_ICDICFR_LEVEL_TRIGGERED;
|
||||
|
||||
// Before changing the value, we must disable the interrupt,
|
||||
// otherwise GIC behavior is UNPREDICTABLE.
|
||||
if (SourceEnabled) {
|
||||
GicV3DisableInterruptSource (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source
|
||||
);
|
||||
}
|
||||
|
||||
MmioAndThenOr32 (
|
||||
RegAddress,
|
||||
~(0x1 << Config1Bit),
|
||||
Value << Config1Bit
|
||||
);
|
||||
// Restore interrupt state
|
||||
if (SourceEnabled) {
|
||||
GicV3EnableInterruptSource (
|
||||
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
|
||||
Source
|
||||
);
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol = {
|
||||
(HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_ENABLE)GicV3EnableInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_DISABLE)GicV3DisableInterruptSource,
|
||||
(HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV3GetInterruptSourceState,
|
||||
(HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV3EndOfInterrupt,
|
||||
GicV3GetTriggerType,
|
||||
GicV3SetTriggerType
|
||||
};
|
||||
|
||||
/**
|
||||
Shutdown our hardware
|
||||
|
||||
@ -385,16 +242,17 @@ GicV3DxeInitialize (
|
||||
UINT64 CpuTarget;
|
||||
UINT64 MpId;
|
||||
|
||||
// Make sure the Interrupt Controller Protocol is not already installed in
|
||||
// the system.
|
||||
// Make sure the Interrupt Controller Protocol is not already installed in the system.
|
||||
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
|
||||
|
||||
mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);
|
||||
mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);
|
||||
mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
|
||||
|
||||
//
|
||||
// We will be driving this GIC in native v3 mode, i.e., with Affinity
|
||||
// Routing enabled. So ensure that the ARE bit is set.
|
||||
//
|
||||
if (!FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
|
||||
MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE);
|
||||
}
|
||||
@ -412,65 +270,51 @@ GicV3DxeInitialize (
|
||||
);
|
||||
}
|
||||
|
||||
//
|
||||
// Targets the interrupts to the Primary Cpu
|
||||
//
|
||||
|
||||
if (FeaturePcdGet (PcdArmGicV3WithV2Legacy)) {
|
||||
// Only Primary CPU will run this code. We can identify our GIC CPU ID by
|
||||
// reading the GIC Distributor Target register. The 8 first
|
||||
// GICD_ITARGETSRn are banked to each connected CPU. These 8 registers
|
||||
// hold the CPU targets fields for interrupts 0-31. More Info in the GIC
|
||||
// Specification about "Interrupt Processor Targets Registers"
|
||||
|
||||
// Read the first Interrupt Processor Targets Register (that corresponds
|
||||
// to the 4 first SGIs)
|
||||
// Only Primary CPU will run this code. We can identify our GIC CPU ID by reading
|
||||
// the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each
|
||||
// connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31.
|
||||
// More Info in the GIC Specification about "Interrupt Processor Targets Registers"
|
||||
//
|
||||
// Read the first Interrupt Processor Targets Register (that corresponds to the 4
|
||||
// first SGIs)
|
||||
CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR);
|
||||
|
||||
// The CPU target is a bit field mapping each CPU to a GIC CPU Interface.
|
||||
// This value is 0 when we run on a uniprocessor platform.
|
||||
// The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value
|
||||
// is 0 when we run on a uniprocessor platform.
|
||||
if (CpuTarget != 0) {
|
||||
// The 8 first Interrupt Processor Targets Registers are read-only
|
||||
for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) {
|
||||
MmioWrite32 (
|
||||
mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4),
|
||||
CpuTarget
|
||||
);
|
||||
MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
MpId = ArmReadMpidr ();
|
||||
CpuTarget = MpId &
|
||||
(ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
|
||||
|
||||
if ((MmioRead32 (
|
||||
mGicDistributorBase + ARM_GIC_ICDDCR
|
||||
) & ARM_GIC_ICDDCR_DS) != 0) {
|
||||
CpuTarget = MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3);
|
||||
|
||||
if ((MmioRead32 (mGicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_DS) != 0) {
|
||||
//
|
||||
// If the Disable Security (DS) control bit is set, we are dealing with a
|
||||
// GIC that has only one security state. In this case, let's assume we are
|
||||
// executing in non-secure state (which is appropriate for DXE modules)
|
||||
// and that no other firmware has performed any configuration on the GIC.
|
||||
// This means we need to reconfigure all interrupts to non-secure Group 1
|
||||
// first.
|
||||
|
||||
MmioWrite32 (
|
||||
mGicRedistributorsBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDISR,
|
||||
0xffffffff
|
||||
);
|
||||
//
|
||||
MmioWrite32 (mGicRedistributorsBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDISR, 0xffffffff);
|
||||
|
||||
for (Index = 32; Index < mGicNumInterrupts; Index += 32) {
|
||||
MmioWrite32 (
|
||||
mGicDistributorBase + ARM_GIC_ICDISR + Index / 8,
|
||||
0xffffffff
|
||||
);
|
||||
MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDISR + Index / 8, 0xffffffff);
|
||||
}
|
||||
}
|
||||
|
||||
// Route the SPIs to the primary CPU. SPIs start at the INTID 32
|
||||
for (Index = 0; Index < (mGicNumInterrupts - 32); Index++) {
|
||||
MmioWrite32 (
|
||||
mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8),
|
||||
CpuTarget
|
||||
);
|
||||
MmioWrite32 (mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8), CpuTarget | ARM_GICD_IROUTER_IRM);
|
||||
}
|
||||
}
|
||||
|
||||
@ -487,11 +331,7 @@ GicV3DxeInitialize (
|
||||
ArmGicEnableDistributor (mGicDistributorBase);
|
||||
|
||||
Status = InstallAndRegisterInterruptService (
|
||||
&gHardwareInterruptV3Protocol,
|
||||
&gHardwareInterrupt2V3Protocol,
|
||||
GicV3IrqInterruptHandler,
|
||||
GicV3ExitBootServicesEvent
|
||||
);
|
||||
&gHardwareInterruptV3Protocol, GicV3IrqInterruptHandler, GicV3ExitBootServicesEvent);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
@ -1,46 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_
|
||||
#define ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_
|
||||
|
||||
// Return values of BASE_DISCOVER_LIST_PROTOCOLS command.
|
||||
typedef struct {
|
||||
UINT32 NumProtocols;
|
||||
|
||||
// Array of four protocols in each element
|
||||
// Total elements = 1 + (NumProtocols-1)/4
|
||||
|
||||
// NOTE: Since EDK2 does not allow flexible array member [] we declare
|
||||
// here array of 1 element length. However below is used as a variable
|
||||
// length array.
|
||||
UINT8 Protocols[1];
|
||||
} BASE_DISCOVER_LIST;
|
||||
|
||||
/** Initialize Base protocol and install protocol on a given handle.
|
||||
|
||||
@param[in] Handle Handle to install Base protocol.
|
||||
|
||||
@retval EFI_SUCCESS Base protocol interface installed
|
||||
successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiBaseProtocolInit (
|
||||
IN OUT EFI_HANDLE* Handle
|
||||
);
|
||||
|
||||
#endif /* ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_ */
|
@ -1,91 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_
|
||||
#define ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
// Clock rate in two 32bit words.
|
||||
typedef struct {
|
||||
UINT32 Low;
|
||||
UINT32 High;
|
||||
} CLOCK_RATE_DWORD;
|
||||
|
||||
// Format of the returned rate array. Linear or Non-linear,.RatesFlag Bit[12]
|
||||
#define RATE_FORMAT_SHIFT 12
|
||||
#define RATE_FORMAT_MASK 0x0001
|
||||
#define RATE_FORMAT(RatesFlags) ((RatesFlags >> RATE_FORMAT_SHIFT) \
|
||||
& RATE_FORMAT_MASK)
|
||||
|
||||
// Number of remaining rates after a call to the SCP, RatesFlag Bits[31:16]
|
||||
#define NUM_REMAIN_RATES_SHIFT 16
|
||||
#define NUM_REMAIN_RATES(RatesFlags) ((RatesFlags >> NUM_REMAIN_RATES_SHIFT))
|
||||
|
||||
// Number of rates that are returned by a call.to the SCP, RatesFlag Bits[11:0]
|
||||
#define NUM_RATES_MASK 0x0FFF
|
||||
#define NUM_RATES(RatesFlags) (RatesFlags & NUM_RATES_MASK)
|
||||
|
||||
// Return values for the CLOCK_DESCRIBER_RATE command.
|
||||
typedef struct {
|
||||
UINT32 NumRatesFlags;
|
||||
|
||||
// NOTE: Since EDK2 does not allow flexible array member [] we declare
|
||||
// here array of 1 element length. However below is used as a variable
|
||||
// length array.
|
||||
CLOCK_RATE_DWORD Rates[1];
|
||||
} CLOCK_DESCRIBE_RATES;
|
||||
|
||||
#define CLOCK_SET_DEFAULT_FLAGS 0
|
||||
|
||||
// Message parameters for CLOCK_RATE_SET command.
|
||||
typedef struct {
|
||||
UINT32 Flags;
|
||||
UINT32 ClockId;
|
||||
CLOCK_RATE_DWORD Rate;
|
||||
} CLOCK_RATE_SET_ATTRIBUTES;
|
||||
|
||||
|
||||
// Message parameters for CLOCK_CONFIG_SET command.
|
||||
typedef struct {
|
||||
UINT32 ClockId;
|
||||
UINT32 Attributes;
|
||||
} CLOCK_CONFIG_SET_ATTRIBUTES;
|
||||
|
||||
// if ClockAttr Bit[0] is set then clock device is enabled.
|
||||
#define CLOCK_ENABLE_MASK 0x1
|
||||
#define CLOCK_ENABLED(ClockAttr) ((ClockAttr & CLOCK_ENABLE_MASK) == 1)
|
||||
|
||||
typedef struct {
|
||||
UINT32 Attributes;
|
||||
UINT8 ClockName[SCMI_MAX_STR_LEN];
|
||||
} CLOCK_ATTRIBUTES;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/** Initialize clock management protocol and install protocol on a given handle.
|
||||
|
||||
@param[in] Handle Handle to install clock management protocol.
|
||||
|
||||
@retval EFI_SUCCESS Clock protocol interface installed successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiClockProtocolInit (
|
||||
IN EFI_HANDLE *Handle
|
||||
);
|
||||
|
||||
#endif /* ARM_SCMI_CLOCK_PROTOCOL_PRIVATE_H_ */
|
@ -1,54 +0,0 @@
|
||||
#/** @file
|
||||
#
|
||||
# Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
# System Control and Management Interface V1.0
|
||||
# http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
# DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
#**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010019
|
||||
BASE_NAME = ArmScmiDxe
|
||||
FILE_GUID = 9585984C-F027-45E9-AFDF-ADAA6DFAAAC7
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
ENTRY_POINT = ArmScmiDxeEntryPoint
|
||||
|
||||
[Sources.common]
|
||||
Scmi.c
|
||||
ScmiBaseProtocol.c
|
||||
ScmiClockProtocol.c
|
||||
ScmiDxe.c
|
||||
ScmiPerformanceProtocol.c
|
||||
|
||||
[Packages]
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
ArmLib
|
||||
ArmMtlLib
|
||||
DebugLib
|
||||
IoLib
|
||||
UefiBootServicesTableLib
|
||||
UefiDriverEntryPoint
|
||||
|
||||
[Protocols]
|
||||
gArmScmiBaseProtocolGuid
|
||||
gArmScmiClockProtocolGuid
|
||||
gArmScmiClock2ProtocolGuid
|
||||
gArmScmiPerformanceProtocolGuid
|
||||
|
||||
[Depex]
|
||||
TRUE
|
||||
|
@ -1,55 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_
|
||||
#define ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_
|
||||
|
||||
#include <Protocol/ArmScmiPerformanceProtocol.h>
|
||||
|
||||
// Number of performance levels returned by a call to the SCP, Lvls Bits[11:0]
|
||||
#define NUM_PERF_LEVELS_MASK 0x0FFF
|
||||
#define NUM_PERF_LEVELS(Lvls) (Lvls & NUM_PERF_LEVELS_MASK)
|
||||
|
||||
// Number of performance levels remaining after a call to the SCP, Lvls Bits[31:16]
|
||||
#define NUM_REMAIN_PERF_LEVELS_SHIFT 16
|
||||
#define NUM_REMAIN_PERF_LEVELS(Lvls) (Lvls >> NUM_REMAIN_PERF_LEVELS_SHIFT)
|
||||
|
||||
/** Return values for SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS command.
|
||||
SCMI Spec <20> 4.5.2.5
|
||||
**/
|
||||
typedef struct {
|
||||
UINT32 NumLevels;
|
||||
|
||||
// NOTE: Since EDK2 does not allow flexible array member [] we declare
|
||||
// here array of 1 element length. However below is used as a variable
|
||||
// length array.
|
||||
SCMI_PERFORMANCE_LEVEL PerfLevel[1]; // Offset to array of performance levels
|
||||
} PERF_DESCRIBE_LEVELS;
|
||||
|
||||
/** Initialize performance management protocol and install on a given Handle.
|
||||
|
||||
@param[in] Handle Handle to install performance management
|
||||
protocol.
|
||||
|
||||
@retval EFI_SUCCESS Performance protocol installed successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiPerformanceProtocolInit (
|
||||
IN EFI_HANDLE* Handle
|
||||
);
|
||||
|
||||
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_ */
|
@ -1,257 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#include <Library/ArmMtlLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
// Arbitrary timeout value 20ms.
|
||||
#define RESPONSE_TIMEOUT 20000
|
||||
|
||||
/** Return a pointer to the message payload.
|
||||
|
||||
@param[out] Payload Holds pointer to the message payload.
|
||||
|
||||
@retval EFI_SUCCESS Payload holds a valid message payload pointer.
|
||||
@retval EFI_TIMEOUT Time out error if MTL channel is busy.
|
||||
@retval EFI_UNSUPPORTED If MTL channel is unsupported.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiCommandGetPayload (
|
||||
OUT UINT32** Payload
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
MTL_CHANNEL *Channel;
|
||||
|
||||
// Get handle to the Channel.
|
||||
Status = MtlGetChannel (MTL_CHANNEL_TYPE_LOW, &Channel);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Payload will not be populated until channel is free.
|
||||
Status = MtlWaitUntilChannelFree (Channel, RESPONSE_TIMEOUT);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get the address of the payload.
|
||||
*Payload = MtlGetChannelPayload (Channel);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Execute a SCMI command and receive a response.
|
||||
|
||||
This function uses a MTL channel to transfer message to SCP
|
||||
and waits for a response.
|
||||
|
||||
@param[in] Command Pointer to the SCMI command (Protocol ID
|
||||
and Message ID)
|
||||
|
||||
@param[in,out] PayloadLength SCMI command message length.
|
||||
|
||||
@param[out] OPTIONAL ReturnValues Pointer to SCMI response.
|
||||
|
||||
@retval OUT EFI_SUCCESS Command sent and message received successfully.
|
||||
@retval OUT EFI_UNSUPPORTED Channel not supported.
|
||||
@retval OUT EFI_TIMEOUT Timeout on the channel.
|
||||
@retval OUT EFI_DEVICE_ERROR Channel not ready.
|
||||
@retval OUT EFI_DEVICE_ERROR Message Header corrupted.
|
||||
@retval OUT EFI_DEVICE_ERROR SCMI error.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiCommandExecute (
|
||||
IN SCMI_COMMAND *Command,
|
||||
IN OUT UINT32 *PayloadLength,
|
||||
OUT UINT32 **ReturnValues OPTIONAL
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
SCMI_MESSAGE_RESPONSE *Response;
|
||||
UINT32 MessageHeader;
|
||||
UINT32 ResponseHeader;
|
||||
MTL_CHANNEL *Channel;
|
||||
|
||||
ASSERT (PayloadLength != NULL);
|
||||
|
||||
Status = MtlGetChannel (MTL_CHANNEL_TYPE_LOW, &Channel);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Fill in message header.
|
||||
MessageHeader = SCMI_MESSAGE_HEADER (
|
||||
Command->MessageId,
|
||||
SCMI_MESSAGE_TYPE_COMMAND,
|
||||
Command->ProtocolId
|
||||
);
|
||||
|
||||
// Send payload using MTL channel.
|
||||
Status = MtlSendMessage (
|
||||
Channel,
|
||||
MessageHeader,
|
||||
*PayloadLength
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Wait for the response on the channel.
|
||||
Status = MtlReceiveMessage (Channel, &ResponseHeader, PayloadLength);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// SCMI must return MessageHeader unmodified.
|
||||
if (MessageHeader != ResponseHeader) {
|
||||
ASSERT (FALSE);
|
||||
return EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);
|
||||
|
||||
if (Response->Status != SCMI_SUCCESS) {
|
||||
DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
|
||||
Command->ProtocolId,
|
||||
Command->MessageId,
|
||||
Response->Status
|
||||
));
|
||||
|
||||
ASSERT (FALSE);
|
||||
return EFI_DEVICE_ERROR;
|
||||
}
|
||||
|
||||
if (ReturnValues != NULL) {
|
||||
*ReturnValues = Response->ReturnValues;
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Internal common function useful for common protocol discovery messages.
|
||||
|
||||
@param[in] ProtocolId Protocol Id of the the protocol.
|
||||
@param[in] MesaageId Message Id of the message.
|
||||
|
||||
@param[out] ReturnValues SCMI response return values.
|
||||
|
||||
@retval EFI_SUCCESS Success with valid return values.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ScmiProtocolDiscoveryCommon (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
IN SCMI_MESSAGE_ID MessageId,
|
||||
OUT UINT32 **ReturnValues
|
||||
)
|
||||
{
|
||||
SCMI_COMMAND Command;
|
||||
UINT32 PayloadLength = 0;
|
||||
|
||||
Command.ProtocolId = ProtocolId;
|
||||
Command.MessageId = MessageId;
|
||||
|
||||
return ScmiCommandExecute (
|
||||
&Command,
|
||||
&PayloadLength,
|
||||
ReturnValues
|
||||
);
|
||||
}
|
||||
|
||||
/** Return protocol version from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
@param[out] Version Pointer to version of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS Version holds a valid version received
|
||||
from the SCP.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolVersion (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 *Version
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *ProtocolVersion;
|
||||
|
||||
Status = ScmiProtocolDiscoveryCommon (
|
||||
ProtocolId,
|
||||
SCMI_MESSAGE_ID_PROTOCOL_VERSION,
|
||||
(UINT32**)&ProtocolVersion
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*Version = *ProtocolVersion;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return protocol attributes from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
@param[out] ReturnValues Pointer to attributes of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS ReturnValues points to protocol attributes.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolAttributes (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 **ReturnValues
|
||||
)
|
||||
{
|
||||
return ScmiProtocolDiscoveryCommon (
|
||||
ProtocolId,
|
||||
SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES,
|
||||
ReturnValues
|
||||
);
|
||||
}
|
||||
|
||||
/** Return protocol message attributes from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
@param[out] Attributes Pointer to attributes of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS ReturnValues points to protocol message attributes.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolMessageAttributes (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 **ReturnValues
|
||||
)
|
||||
{
|
||||
return ScmiProtocolDiscoveryCommon (
|
||||
ProtocolId,
|
||||
SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES,
|
||||
ReturnValues
|
||||
);
|
||||
}
|
@ -1,318 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Protocol/ArmScmiBaseProtocol.h>
|
||||
|
||||
#include "ArmScmiBaseProtocolPrivate.h"
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
/** Return version of the Base protocol supported by SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI Base protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version of the protocol is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseGetVersion (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
)
|
||||
{
|
||||
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_BASE, Version);
|
||||
}
|
||||
|
||||
/** Return total number of SCMI protocols supported by the SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] TotalProtocols Total number of SCMI protocols supported.
|
||||
|
||||
@retval EFI_SUCCESS Total number of protocols supported are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseGetTotalProtocols (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *TotalProtocols
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *ReturnValues;
|
||||
|
||||
Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_BASE, &ReturnValues);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*TotalProtocols = SCMI_TOTAL_PROTOCOLS (ReturnValues[0]);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Common function which returns vendor details.
|
||||
|
||||
@param[in] MessageId SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR
|
||||
OR
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR
|
||||
|
||||
@param[out] VendorIdentifier ASCII name of the vendor/subvendor.
|
||||
|
||||
@retval EFI_SUCCESS VendorIdentifier is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseDiscoverVendorDetails (
|
||||
IN SCMI_MESSAGE_ID_BASE MessageId,
|
||||
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *ReturnValues;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
|
||||
Cmd.MessageId = MessageId;
|
||||
|
||||
PayloadLength = 0;
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
AsciiStrCpyS (
|
||||
(CHAR8*)VendorIdentifier,
|
||||
SCMI_MAX_STR_LEN,
|
||||
(CONST CHAR8*)ReturnValues
|
||||
);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return vendor name.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] VendorIdentifier Null terminated ASCII string of up to
|
||||
16 bytes with a vendor name.
|
||||
|
||||
@retval EFI_SUCCESS VendorIdentifier is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseDiscoverVendor (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
|
||||
)
|
||||
{
|
||||
return BaseDiscoverVendorDetails (
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR,
|
||||
VendorIdentifier
|
||||
);
|
||||
}
|
||||
|
||||
/** Return sub vendor name.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] VendorIdentifier Null terminated ASCII string of up to
|
||||
16 bytes with a sub vendor name.
|
||||
|
||||
@retval EFI_SUCCESS VendorIdentifier is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
BaseDiscoverSubVendor (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
|
||||
)
|
||||
{
|
||||
return BaseDiscoverVendorDetails (
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR,
|
||||
VendorIdentifier
|
||||
);
|
||||
}
|
||||
|
||||
/** Return implementation version.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] ImplementationVersion Vendor specific implementation version.
|
||||
|
||||
@retval EFI_SUCCESS Implementation version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseDiscoverImplVersion (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *ImplementationVersion
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *ReturnValues;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION;
|
||||
|
||||
PayloadLength = 0;
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*ImplementationVersion = ReturnValues[0];
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return list of protocols.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] ProtocolListSize Size of the ProtocolList.
|
||||
|
||||
@param[out] ProtocolList Protocol list.
|
||||
|
||||
@retval EFI_SUCCESS List of protocols is returned.
|
||||
@retval EFI_BUFFER_TOO_SMALL ProtocolListSize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
BaseDiscoverListProtocols (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
IN OUT UINT32 *ProtocolListSize,
|
||||
OUT UINT8 *ProtocolList
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 TotalProtocols;
|
||||
UINT32 *MessageParams;
|
||||
BASE_DISCOVER_LIST *DiscoverList;
|
||||
UINT32 Skip;
|
||||
UINT32 Index;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
UINT32 RequiredSize;
|
||||
|
||||
Status = BaseGetTotalProtocols (This, &TotalProtocols);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
RequiredSize = sizeof (UINT8) * TotalProtocols;
|
||||
if (*ProtocolListSize < RequiredSize) {
|
||||
*ProtocolListSize = RequiredSize;
|
||||
return EFI_BUFFER_TOO_SMALL;
|
||||
}
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_BASE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS;
|
||||
|
||||
Skip = 0;
|
||||
|
||||
while (Skip < TotalProtocols) {
|
||||
|
||||
*MessageParams = Skip;
|
||||
|
||||
// Note PayloadLength is a IN/OUT parameter.
|
||||
PayloadLength = sizeof (Skip);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&DiscoverList
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
for (Index = 0; Index < DiscoverList->NumProtocols; Index++) {
|
||||
ProtocolList[Skip++] = DiscoverList->Protocols[Index];
|
||||
}
|
||||
}
|
||||
|
||||
*ProtocolListSize = RequiredSize;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
// Instance of the SCMI Base protocol.
|
||||
STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
|
||||
BaseGetVersion,
|
||||
BaseGetTotalProtocols,
|
||||
BaseDiscoverVendor,
|
||||
BaseDiscoverSubVendor,
|
||||
BaseDiscoverImplVersion,
|
||||
BaseDiscoverListProtocols
|
||||
};
|
||||
|
||||
/** Initialize Base protocol and install protocol on a given handle.
|
||||
|
||||
@param[in] Handle Handle to install Base protocol.
|
||||
|
||||
@retval EFI_SUCCESS Base protocol interface installed
|
||||
successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiBaseProtocolInit (
|
||||
IN OUT EFI_HANDLE* Handle
|
||||
)
|
||||
{
|
||||
return gBS->InstallMultipleProtocolInterfaces (
|
||||
Handle,
|
||||
&gArmScmiBaseProtocolGuid,
|
||||
&BaseProtocol,
|
||||
NULL
|
||||
);
|
||||
}
|
@ -1,480 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Protocol/ArmScmiClockProtocol.h>
|
||||
#include <Protocol/ArmScmiClock2Protocol.h>
|
||||
|
||||
#include "ArmScmiClockProtocolPrivate.h"
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
/** Convert to 64 bit value from two 32 bit words.
|
||||
|
||||
@param[in] Low Lower 32 bits.
|
||||
@param[in] High Higher 32 bits.
|
||||
|
||||
@retval UINT64 64 bit value.
|
||||
**/
|
||||
STATIC
|
||||
UINT64
|
||||
ConvertTo64Bit (
|
||||
IN UINT32 Low,
|
||||
IN UINT32 High
|
||||
)
|
||||
{
|
||||
return (Low | ((UINT64)High << 32));
|
||||
}
|
||||
|
||||
/** Return version of the clock management protocol supported by SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI Clock management protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockGetVersion (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
)
|
||||
{
|
||||
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_CLOCK, Version);
|
||||
}
|
||||
|
||||
/** Return total number of clock devices supported by the clock management
|
||||
protocol.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
|
||||
@param[out] TotalClocks Total number of clocks supported.
|
||||
|
||||
@retval EFI_SUCCESS Total number of clocks supported is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockGetTotalClocks (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
OUT UINT32 *TotalClocks
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *ReturnValues;
|
||||
|
||||
Status = ScmiGetProtocolAttributes (SCMI_PROTOCOL_ID_CLOCK, &ReturnValues);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*TotalClocks = SCMI_CLOCK_PROTOCOL_TOTAL_CLKS (ReturnValues[0]);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return attributes of a clock device.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Enabled If TRUE, the clock device is enabled.
|
||||
@param[out] ClockAsciiName A NULL terminated ASCII string with the clock
|
||||
name, of up to 16 bytes.
|
||||
|
||||
@retval EFI_SUCCESS Clock device attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockGetClockAttributes (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT BOOLEAN *Enabled,
|
||||
OUT CHAR8 *ClockAsciiName
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
UINT32 *MessageParams;
|
||||
CLOCK_ATTRIBUTES *ClockAttributes;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams = ClockId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES;
|
||||
|
||||
PayloadLength = sizeof (ClockId);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&ClockAttributes
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
// TRUE if bit 0 of ClockAttributes->Attributes is set.
|
||||
*Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
|
||||
|
||||
AsciiStrCpyS (
|
||||
ClockAsciiName,
|
||||
SCMI_MAX_STR_LEN,
|
||||
(CONST CHAR8*)ClockAttributes->ClockName
|
||||
);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return list of rates supported by a given clock device.
|
||||
|
||||
@param[in] This A pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
|
||||
supports range of clock rates which are non-linear.
|
||||
|
||||
SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
|
||||
range of linear clock rates from Min to Max in steps.
|
||||
|
||||
@param[out] TotalRates Total number of rates.
|
||||
|
||||
@param[in,out] RateArraySize Size of the RateArray.
|
||||
|
||||
@param[out] RateArray List of clock rates.
|
||||
|
||||
@retval EFI_SUCCESS List of clock rates is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockDescribeRates (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT SCMI_CLOCK_RATE_FORMAT *Format,
|
||||
OUT UINT32 *TotalRates,
|
||||
IN OUT UINT32 *RateArraySize,
|
||||
OUT SCMI_CLOCK_RATE *RateArray
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 *MessageParams;
|
||||
CLOCK_DESCRIBE_RATES *DescribeRates;
|
||||
CLOCK_RATE_DWORD *Rate;
|
||||
|
||||
UINT32 RequiredArraySize = 0;
|
||||
UINT32 RateIndex = 0;
|
||||
UINT32 RateNo;
|
||||
UINT32 RateOffset;
|
||||
|
||||
*TotalRates = 0;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES;
|
||||
|
||||
*MessageParams++ = ClockId;
|
||||
|
||||
do {
|
||||
|
||||
*MessageParams = RateIndex;
|
||||
|
||||
// Set Payload length, note PayloadLength is a IN/OUT parameter.
|
||||
PayloadLength = sizeof (ClockId) + sizeof (RateIndex);
|
||||
|
||||
// Execute and wait for response on a SCMI channel.
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&DescribeRates
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
if (*TotalRates == 0) {
|
||||
// In the first iteration we will get number of returned rates and number
|
||||
// of remaining rates. With this information calculate required size
|
||||
// for rate array. If provided RateArraySize is less, return an
|
||||
// error.
|
||||
|
||||
*Format = RATE_FORMAT (DescribeRates->NumRatesFlags);
|
||||
|
||||
*TotalRates = NUM_RATES (DescribeRates->NumRatesFlags)
|
||||
+ NUM_REMAIN_RATES (DescribeRates->NumRatesFlags);
|
||||
|
||||
if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
|
||||
RequiredArraySize = (*TotalRates) * sizeof (UINT64);
|
||||
} else {
|
||||
// We need to return triplet of 64 bit value for each rate
|
||||
RequiredArraySize = (*TotalRates) * 3 * sizeof (UINT64);
|
||||
}
|
||||
|
||||
if (RequiredArraySize > (*RateArraySize)) {
|
||||
*RateArraySize = RequiredArraySize;
|
||||
return EFI_BUFFER_TOO_SMALL;
|
||||
}
|
||||
}
|
||||
|
||||
RateOffset = 0;
|
||||
|
||||
if (*Format == SCMI_CLOCK_RATE_FORMAT_DISCRETE) {
|
||||
for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
|
||||
Rate = &DescribeRates->Rates[RateOffset++];
|
||||
// Non-linear discrete rates.
|
||||
RateArray[RateIndex++].Rate = ConvertTo64Bit (Rate->Low, Rate->High);
|
||||
}
|
||||
} else {
|
||||
for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {
|
||||
// Linear clock rates from minimum to maximum in steps
|
||||
// Minimum clock rate.
|
||||
Rate = &DescribeRates->Rates[RateOffset++];
|
||||
RateArray[RateIndex].Min = ConvertTo64Bit (Rate->Low, Rate->High);
|
||||
|
||||
Rate = &DescribeRates->Rates[RateOffset++];
|
||||
// Maximum clock rate.
|
||||
RateArray[RateIndex].Max = ConvertTo64Bit (Rate->Low, Rate->High);
|
||||
|
||||
Rate = &DescribeRates->Rates[RateOffset++];
|
||||
// Step.
|
||||
RateArray[RateIndex++].Step = ConvertTo64Bit (Rate->Low, Rate->High);
|
||||
}
|
||||
}
|
||||
} while (NUM_REMAIN_RATES (DescribeRates->NumRatesFlags) != 0);
|
||||
|
||||
// Update RateArraySize with RequiredArraySize.
|
||||
*RateArraySize = RequiredArraySize;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Get clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockRateGet (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT UINT64 *Rate
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
UINT32 *MessageParams;
|
||||
CLOCK_RATE_DWORD *ClockRate;
|
||||
SCMI_COMMAND Cmd;
|
||||
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Fill arguments for clock protocol command.
|
||||
*MessageParams = ClockId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_GET;
|
||||
|
||||
PayloadLength = sizeof (ClockId);
|
||||
|
||||
// Execute and wait for response on a SCMI channel.
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&ClockRate
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*Rate = ConvertTo64Bit (ClockRate->Low, ClockRate->High);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Set clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
@param[in] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate set success.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockRateSet (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
IN UINT64 Rate
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
CLOCK_RATE_SET_ATTRIBUTES *ClockRateSetAttributes;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Status = ScmiCommandGetPayload ((UINT32**)&ClockRateSetAttributes);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Fill arguments for clock protocol command.
|
||||
ClockRateSetAttributes->ClockId = ClockId;
|
||||
ClockRateSetAttributes->Flags = CLOCK_SET_DEFAULT_FLAGS;
|
||||
ClockRateSetAttributes->Rate.Low = (UINT32)Rate;
|
||||
ClockRateSetAttributes->Rate.High = (UINT32)(Rate >> 32);
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_RATE_SET;
|
||||
|
||||
PayloadLength = sizeof (CLOCK_RATE_SET_ATTRIBUTES);
|
||||
|
||||
// Execute and wait for response on a SCMI channel.
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
NULL
|
||||
);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/** Enable/Disable specified clock.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
@param[in] Enable TRUE to enable, FALSE to disable.
|
||||
|
||||
@retval EFI_SUCCESS Clock enable/disable successful.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
ClockEnable (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
IN BOOLEAN Enable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
CLOCK_CONFIG_SET_ATTRIBUTES *ClockConfigSetAttributes;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 PayloadLength;
|
||||
|
||||
Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Fill arguments for clock protocol command.
|
||||
ClockConfigSetAttributes->ClockId = ClockId;
|
||||
ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;
|
||||
|
||||
PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);
|
||||
|
||||
// Execute and wait for response on a SCMI channel.
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
NULL
|
||||
);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Instance of the SCMI clock management protocol.
|
||||
STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
|
||||
ClockGetVersion,
|
||||
ClockGetTotalClocks,
|
||||
ClockGetClockAttributes,
|
||||
ClockDescribeRates,
|
||||
ClockRateGet,
|
||||
ClockRateSet
|
||||
};
|
||||
|
||||
// Instance of the SCMI clock management protocol.
|
||||
STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
|
||||
(SCMI_CLOCK2_GET_VERSION)ClockGetVersion,
|
||||
(SCMI_CLOCK2_GET_TOTAL_CLOCKS)ClockGetTotalClocks,
|
||||
(SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)ClockGetClockAttributes,
|
||||
(SCMI_CLOCK2_DESCRIBE_RATES)ClockDescribeRates,
|
||||
(SCMI_CLOCK2_RATE_GET)ClockRateGet,
|
||||
(SCMI_CLOCK2_RATE_SET)ClockRateSet,
|
||||
SCMI_CLOCK2_PROTOCOL_VERSION,
|
||||
ClockEnable
|
||||
};
|
||||
|
||||
/** Initialize clock management protocol and install protocol on a given handle.
|
||||
|
||||
@param[in] Handle Handle to install clock management protocol.
|
||||
|
||||
@retval EFI_SUCCESS Clock protocol interface installed successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiClockProtocolInit (
|
||||
IN EFI_HANDLE* Handle
|
||||
)
|
||||
{
|
||||
return gBS->InstallMultipleProtocolInterfaces (
|
||||
Handle,
|
||||
&gArmScmiClockProtocolGuid,
|
||||
&ScmiClockProtocol,
|
||||
&gArmScmiClock2ProtocolGuid,
|
||||
&ScmiClock2Protocol,
|
||||
NULL
|
||||
);
|
||||
}
|
@ -1,153 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#include <Base.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Protocol/ArmScmiBaseProtocol.h>
|
||||
#include <Protocol/ArmScmiClockProtocol.h>
|
||||
#include <Protocol/ArmScmiPerformanceProtocol.h>
|
||||
|
||||
#include "ArmScmiBaseProtocolPrivate.h"
|
||||
#include "ArmScmiClockProtocolPrivate.h"
|
||||
#include "ArmScmiPerformanceProtocolPrivate.h"
|
||||
#include "ScmiDxe.h"
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
STATIC CONST SCMI_PROTOCOL_ENTRY Protocols[] = {
|
||||
{ SCMI_PROTOCOL_ID_BASE, ScmiBaseProtocolInit },
|
||||
{ SCMI_PROTOCOL_ID_PERFORMANCE, ScmiPerformanceProtocolInit },
|
||||
{ SCMI_PROTOCOL_ID_CLOCK, ScmiClockProtocolInit }
|
||||
};
|
||||
|
||||
/** ARM SCMI driver entry point function.
|
||||
|
||||
This function installs the SCMI Base protocol and a list of other
|
||||
protocols is queried using the Base protocol. If protocol is supported,
|
||||
driver will call each protocol init function to install the protocol on
|
||||
the ImageHandle.
|
||||
|
||||
@param[in] ImageHandle Handle to this EFI Image which will be used to
|
||||
install Base, Clock and Performance protocols.
|
||||
@param[in] SystemTable A pointer to boot time system table.
|
||||
|
||||
@retval EFI_SUCCESS Driver initalized successfully.
|
||||
@retval EFI_UNSUPPORTED If SCMI base protocol version is not supported.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
ArmScmiDxeEntryPoint (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
SCMI_BASE_PROTOCOL *BaseProtocol;
|
||||
UINT32 Version;
|
||||
UINT32 Index;
|
||||
UINT32 NumProtocols;
|
||||
UINT32 ProtocolIndex;
|
||||
UINT8 *SupportedList;
|
||||
UINT32 SupportedListSize;
|
||||
|
||||
// Every SCMI implementation must implement the base protocol.
|
||||
ASSERT (Protocols[0].Id == SCMI_PROTOCOL_ID_BASE);
|
||||
|
||||
Status = ScmiBaseProtocolInit (&ImageHandle);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = gBS->LocateProtocol (
|
||||
&gArmScmiBaseProtocolGuid,
|
||||
NULL,
|
||||
(VOID**)&BaseProtocol
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get SCMI Base protocol version.
|
||||
Status = BaseProtocol->GetVersion (BaseProtocol, &Version);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
if (Version != BASE_PROTOCOL_VERSION) {
|
||||
ASSERT (FALSE);
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
// Apart from Base protocol, SCMI may implement various other protocols,
|
||||
// query total protocols implemented by the SCP firmware.
|
||||
NumProtocols = 0;
|
||||
Status = BaseProtocol->GetTotalProtocols (BaseProtocol, &NumProtocols);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
ASSERT (NumProtocols != 0);
|
||||
|
||||
SupportedListSize = (NumProtocols * sizeof (*SupportedList));
|
||||
|
||||
Status = gBS->AllocatePool (
|
||||
EfiBootServicesData,
|
||||
SupportedListSize,
|
||||
(VOID**)&SupportedList
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Get the list of protocols supported by SCP firmware on the platform.
|
||||
Status = BaseProtocol->DiscoverListProtocols (
|
||||
BaseProtocol,
|
||||
&SupportedListSize,
|
||||
SupportedList
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
gBS->FreePool (SupportedList);
|
||||
ASSERT (FALSE);
|
||||
return Status;
|
||||
}
|
||||
|
||||
// Install supported protocol on ImageHandle.
|
||||
for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
|
||||
ProtocolIndex++) {
|
||||
for (Index = 0; Index < NumProtocols; Index++) {
|
||||
if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
|
||||
Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
|
||||
if (EFI_ERROR (Status)) {
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
return Status;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
gBS->FreePool (SupportedList);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
@ -1,42 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
#ifndef SCMI_DXE_H_
|
||||
#define SCMI_DXE_H_
|
||||
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
#define MAX_VENDOR_LEN SCMI_MAX_STR_LEN
|
||||
|
||||
/** Pointer to protocol initialization function.
|
||||
|
||||
@param[in] Handle A pointer to the EFI_HANDLE on which the protocol
|
||||
interface is to be installed.
|
||||
|
||||
@retval EFI_SUCCESS Protocol interface installed successfully.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PROTOCOL_INIT_FXN)(
|
||||
IN EFI_HANDLE *Handle
|
||||
);
|
||||
|
||||
typedef struct {
|
||||
SCMI_PROTOCOL_ID Id; // Protocol Id.
|
||||
SCMI_PROTOCOL_INIT_FXN InitFn; // Protocol init function.
|
||||
} SCMI_PROTOCOL_ENTRY;
|
||||
|
||||
#endif /* SCMI_DXE_H_ */
|
@ -1,457 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Protocol/ArmScmiPerformanceProtocol.h>
|
||||
|
||||
#include "ArmScmiPerformanceProtocolPrivate.h"
|
||||
#include "ScmiPrivate.h"
|
||||
|
||||
/** Return version of the performance management protocol supported by SCP.
|
||||
firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI performance management
|
||||
protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PerformanceGetVersion (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
)
|
||||
{
|
||||
return ScmiGetProtocolVersion (SCMI_PROTOCOL_ID_PERFORMANCE, Version);
|
||||
}
|
||||
|
||||
/** Return protocol attributes of the performance management protocol.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Attributes Protocol attributes.
|
||||
|
||||
@retval EFI_SUCCESS Protocol attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PerformanceGetAttributes (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32* ReturnValues;
|
||||
|
||||
Status = ScmiGetProtocolAttributes (
|
||||
SCMI_PROTOCOL_ID_PERFORMANCE,
|
||||
&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
CopyMem (
|
||||
Attributes,
|
||||
ReturnValues,
|
||||
sizeof (SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES)
|
||||
);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return performance domain attributes.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Attributes Performance domain attributes.
|
||||
|
||||
@retval EFI_SUCCESS Domain attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PerformanceDomainAttributes (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 *MessageParams;
|
||||
UINT32 *ReturnValues;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams = DomainId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES;
|
||||
|
||||
PayloadLength = sizeof (DomainId);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
CopyMem (
|
||||
DomainAttributes,
|
||||
ReturnValues,
|
||||
sizeof (SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES)
|
||||
);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Return list of performance domain levels of a given domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] NumLevels Total number of levels a domain can support.
|
||||
|
||||
@param[in,out] LevelArraySize Size of the performance level array.
|
||||
|
||||
@param[out] LevelArray Array of the performance levels.
|
||||
|
||||
@retval EFI_SUCCESS Domain levels are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval EFI_BUFFER_TOO_SMALL LevelArraySize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
PerformanceDescribeLevels (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT UINT32 *NumLevels,
|
||||
IN OUT UINT32 *LevelArraySize,
|
||||
OUT SCMI_PERFORMANCE_LEVEL *LevelArray
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32* MessageParams;
|
||||
UINT32 LevelIndex;
|
||||
UINT32 RequiredSize;
|
||||
UINT32 LevelNo;
|
||||
UINT32 ReturnNumLevels;
|
||||
UINT32 ReturnRemainNumLevels;
|
||||
|
||||
PERF_DESCRIBE_LEVELS *Levels;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
LevelIndex = 0;
|
||||
RequiredSize = 0;
|
||||
|
||||
*MessageParams++ = DomainId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS;
|
||||
|
||||
do {
|
||||
|
||||
*MessageParams = LevelIndex;
|
||||
|
||||
// Note, PayloadLength is an IN/OUT parameter.
|
||||
PayloadLength = sizeof (DomainId) + sizeof (LevelIndex);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&Levels
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
ReturnNumLevels = NUM_PERF_LEVELS (Levels->NumLevels);
|
||||
ReturnRemainNumLevels = NUM_REMAIN_PERF_LEVELS (Levels->NumLevels);
|
||||
|
||||
if (RequiredSize == 0) {
|
||||
*NumLevels = ReturnNumLevels + ReturnRemainNumLevels;
|
||||
|
||||
RequiredSize = (*NumLevels) * sizeof (SCMI_PERFORMANCE_LEVEL);
|
||||
if (RequiredSize > (*LevelArraySize)) {
|
||||
// Update LevelArraySize with required size.
|
||||
*LevelArraySize = RequiredSize;
|
||||
return EFI_BUFFER_TOO_SMALL;
|
||||
}
|
||||
}
|
||||
|
||||
for (LevelNo = 0; LevelNo < ReturnNumLevels; LevelNo++) {
|
||||
CopyMem (
|
||||
&LevelArray[LevelIndex++],
|
||||
&Levels->PerfLevel[LevelNo],
|
||||
sizeof (SCMI_PERFORMANCE_LEVEL)
|
||||
);
|
||||
}
|
||||
|
||||
} while (ReturnRemainNumLevels != 0);
|
||||
|
||||
*LevelArraySize = RequiredSize;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Set performance limits of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
@param[in] Limit Performance limit to set.
|
||||
|
||||
@retval EFI_SUCCESS Performance limits set successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PerformanceLimitsSet (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
IN SCMI_PERFORMANCE_LIMITS *Limits
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 *MessageParams;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams++ = DomainId;
|
||||
*MessageParams++ = Limits->RangeMax;
|
||||
*MessageParams = Limits->RangeMin;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET;
|
||||
|
||||
PayloadLength = sizeof (DomainId) + sizeof (SCMI_PERFORMANCE_LIMITS);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
NULL
|
||||
);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/** Get performance limits of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Limit Performance Limits of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance limits are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PerformanceLimitsGet (
|
||||
SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
UINT32 DomainId,
|
||||
SCMI_PERFORMANCE_LIMITS *Limits
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 *MessageParams;
|
||||
|
||||
SCMI_PERFORMANCE_LIMITS *ReturnValues;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams = DomainId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET;
|
||||
|
||||
PayloadLength = sizeof (DomainId);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
(UINT32**)&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Limits->RangeMax = ReturnValues->RangeMax;
|
||||
Limits->RangeMin = ReturnValues->RangeMin;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** Set performance level of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
@param[in] Level Performance level of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance level set successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PerformanceLevelSet (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
IN UINT32 Level
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 *MessageParams;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams++ = DomainId;
|
||||
*MessageParams = Level;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET;
|
||||
|
||||
PayloadLength = sizeof (DomainId) + sizeof (Level);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
NULL
|
||||
);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/** Get performance level of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Level Performance level of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance level got successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
PerformanceLevelGet (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT UINT32 *Level
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 PayloadLength;
|
||||
SCMI_COMMAND Cmd;
|
||||
UINT32 *ReturnValues;
|
||||
UINT32 *MessageParams;
|
||||
|
||||
Status = ScmiCommandGetPayload (&MessageParams);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*MessageParams = DomainId;
|
||||
|
||||
Cmd.ProtocolId = SCMI_PROTOCOL_ID_PERFORMANCE;
|
||||
Cmd.MessageId = SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET;
|
||||
|
||||
PayloadLength = sizeof (DomainId);
|
||||
|
||||
Status = ScmiCommandExecute (
|
||||
&Cmd,
|
||||
&PayloadLength,
|
||||
&ReturnValues
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
*Level = *ReturnValues;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
// Instance of the SCMI performance management protocol.
|
||||
STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
|
||||
PerformanceGetVersion,
|
||||
PerformanceGetAttributes,
|
||||
PerformanceDomainAttributes,
|
||||
PerformanceDescribeLevels,
|
||||
PerformanceLimitsSet,
|
||||
PerformanceLimitsGet,
|
||||
PerformanceLevelSet,
|
||||
PerformanceLevelGet
|
||||
};
|
||||
|
||||
/** Initialize performance management protocol and install on a given Handle.
|
||||
|
||||
@param[in] Handle Handle to install performance management
|
||||
protocol.
|
||||
|
||||
@retval EFI_SUCCESS Performance protocol installed successfully.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiPerformanceProtocolInit (
|
||||
IN EFI_HANDLE* Handle
|
||||
)
|
||||
{
|
||||
return gBS->InstallMultipleProtocolInterfaces (
|
||||
Handle,
|
||||
&gArmScmiPerformanceProtocolGuid,
|
||||
&PerformanceProtocol,
|
||||
NULL
|
||||
);
|
||||
}
|
@ -1,174 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
#ifndef SCMI_PRIVATE_H_
|
||||
#define SCMI_PRIVATE_H_
|
||||
|
||||
// SCMI protocol IDs.
|
||||
typedef enum {
|
||||
SCMI_PROTOCOL_ID_BASE = 0x10,
|
||||
SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
|
||||
SCMI_PROTOCOL_ID_SYSTEM_POWER = 0x12,
|
||||
SCMI_PROTOCOL_ID_PERFORMANCE = 0x13,
|
||||
SCMI_PROTOCOL_ID_CLOCK = 0x14,
|
||||
SCMI_PROTOCOL_ID_SENSOR = 0x15
|
||||
} SCMI_PROTOCOL_ID;
|
||||
|
||||
// SCMI message types.
|
||||
typedef enum {
|
||||
SCMI_MESSAGE_TYPE_COMMAND = 0,
|
||||
SCMI_MESSAGE_TYPE_DELAYED_RESPONSE = 2, // Skipping 1 is deliberate.
|
||||
SCMI_MESSAGE_TYPE_NOTIFICATION = 3
|
||||
} SCMI_MESSAGE_TYPE;
|
||||
|
||||
// SCMI response error codes.
|
||||
typedef enum {
|
||||
SCMI_SUCCESS = 0,
|
||||
SCMI_NOT_SUPPORTED = -1,
|
||||
SCMI_INVALID_PARAMETERS = -2,
|
||||
SCMI_DENIED = -3,
|
||||
SCMI_NOT_FOUND = -4,
|
||||
SCMI_OUT_OF_RANGE = -5,
|
||||
SCMI_BUSY = -6,
|
||||
SCMI_COMMS_ERROR = -7,
|
||||
SCMI_GENERIC_ERROR = -8,
|
||||
SCMI_HARDWARE_ERROR = -9,
|
||||
SCMI_PROTOCOL_ERROR = -10
|
||||
} SCMI_STATUS;
|
||||
|
||||
// SCMI message IDs common to all protocols.
|
||||
typedef enum {
|
||||
SCMI_MESSAGE_ID_PROTOCOL_VERSION = 0x0,
|
||||
SCMI_MESSAGE_ID_PROTOCOL_ATTRIBUTES = 0x1,
|
||||
SCMI_MESSAGE_ID_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2
|
||||
} SCMI_MESSAGE_ID;
|
||||
|
||||
// Not defined in SCMI specification but will help to identify a message.
|
||||
typedef struct {
|
||||
SCMI_PROTOCOL_ID ProtocolId;
|
||||
UINT32 MessageId;
|
||||
} SCMI_COMMAND;
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
// Response to a SCMI command.
|
||||
typedef struct {
|
||||
INT32 Status;
|
||||
UINT32 ReturnValues[];
|
||||
} SCMI_MESSAGE_RESPONSE;
|
||||
|
||||
// Message header. MsgId[7:0], MsgType[9:8], ProtocolId[17:10]
|
||||
#define MESSAGE_TYPE_SHIFT 8
|
||||
#define PROTOCOL_ID_SHIFT 10
|
||||
#define SCMI_MESSAGE_HEADER(MsgId, MsgType, ProtocolId) ( \
|
||||
MsgType << MESSAGE_TYPE_SHIFT | \
|
||||
ProtocolId << PROTOCOL_ID_SHIFT | \
|
||||
MsgId \
|
||||
)
|
||||
// SCMI message header.
|
||||
typedef struct {
|
||||
UINT32 MessageHeader;
|
||||
} SCMI_MESSAGE_HEADER;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/** Return a pointer to the message payload.
|
||||
|
||||
@param[out] Payload Holds pointer to the message payload.
|
||||
|
||||
@retval EFI_SUCCESS Payload holds a valid message payload pointer.
|
||||
@retval EFI_TIMEOUT Time out error if MTL channel is busy.
|
||||
@retval EFI_UNSUPPORTED If MTL channel is unsupported.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiCommandGetPayload (
|
||||
OUT UINT32** Payload
|
||||
);
|
||||
|
||||
/** Execute a SCMI command and receive a response.
|
||||
|
||||
This function uses a MTL channel to transfer message to SCP
|
||||
and waits for a response.
|
||||
|
||||
@param[in] Command Pointer to the SCMI command (Protocol ID
|
||||
and Message ID)
|
||||
|
||||
@param[in,out] PayloadLength SCMI command message length.
|
||||
|
||||
@param[out] OPTIONAL ReturnValues Pointer to SCMI response.
|
||||
|
||||
@retval OUT EFI_SUCCESS Command sent and message received successfully.
|
||||
@retval OUT EFI_UNSUPPORTED Channel not supported.
|
||||
@retval OUT EFI_TIMEOUT Timeout on the channel.
|
||||
@retval OUT EFI_DEVICE_ERROR Channel not ready.
|
||||
@retval OUT EFI_DEVICE_ERROR Message Header corrupted.
|
||||
@retval OUT EFI_DEVICE_ERROR SCMI error.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiCommandExecute (
|
||||
IN SCMI_COMMAND *Command,
|
||||
IN OUT UINT32 *PayloadLength,
|
||||
OUT UINT32 **ReturnValues OPTIONAL
|
||||
);
|
||||
|
||||
/** Return protocol version from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
@param[out] Version Pointer to version of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS Version holds a valid version received
|
||||
from the SCP.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolVersion (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 *Version
|
||||
);
|
||||
|
||||
/** Return protocol attributes from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
@param[out] ReturnValues Pointer to attributes of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS ReturnValues points to protocol attributes.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolAttributes (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 **ReturnValues
|
||||
);
|
||||
|
||||
/** Return protocol message attributes from SCP for a given protocol ID.
|
||||
|
||||
@param[in] Protocol ID Protocol ID.
|
||||
|
||||
@param[out] Attributes Pointer to attributes of the protocol.
|
||||
|
||||
@retval EFI_SUCCESS ReturnValues points to protocol message attributes.
|
||||
@retval EFI_DEVICE_ERROR SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
ScmiGetProtocolMessageAttributes (
|
||||
IN SCMI_PROTOCOL_ID ProtocolId,
|
||||
OUT UINT32 **ReturnValues
|
||||
);
|
||||
|
||||
#endif /* SCMI_PRIVATE_H_ */
|
@ -457,9 +457,6 @@ GetMemoryRegion (
|
||||
|
||||
// Get the section at the given index
|
||||
SectionDescriptor = FirstLevelTable[TableIndex];
|
||||
if (!SectionDescriptor) {
|
||||
return EFI_NOT_FOUND;
|
||||
}
|
||||
|
||||
// If 'BaseAddress' belongs to the section then round it to the section boundary
|
||||
if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
|
||||
|
@ -35,6 +35,7 @@
|
||||
#include <Guid/DebugImageInfoTable.h>
|
||||
#include <Protocol/Cpu.h>
|
||||
#include <Protocol/DebugSupport.h>
|
||||
#include <Protocol/DebugSupportPeriodicCallback.h>
|
||||
#include <Protocol/LoadedImage.h>
|
||||
|
||||
extern BOOLEAN mIsFlushingGCD;
|
||||
|
@ -60,6 +60,7 @@
|
||||
|
||||
[Protocols]
|
||||
gEfiCpuArchProtocolGuid
|
||||
gEfiDebugSupportPeriodicCallbackProtocolGuid
|
||||
|
||||
[Guids]
|
||||
gEfiDebugImageInfoTableGuid
|
||||
@ -71,7 +72,8 @@
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled
|
||||
|
||||
[FeaturePcd.common]
|
||||
gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport
|
||||
gArmTokenSpaceGuid.PcdDebuggerExceptionSupport
|
||||
|
||||
[Depex]
|
||||
gHardwareInterruptProtocolGuid OR gHardwareInterrupt2ProtocolGuid
|
||||
TRUE
|
||||
|
@ -73,7 +73,7 @@ InitializeCpuPeim (
|
||||
ArmEnableBranchPrediction ();
|
||||
|
||||
// Publish the CPU memory and io spaces sizes
|
||||
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
|
||||
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
|
||||
|
||||
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
|
||||
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
|
||||
|
@ -50,6 +50,7 @@
|
||||
gArmMpCoreInfoGuid
|
||||
|
||||
[FixedPcd]
|
||||
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
|
||||
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
|
||||
|
||||
[Depex]
|
||||
|
@ -20,8 +20,7 @@
|
||||
// Control Frame:
|
||||
#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000)
|
||||
#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008)
|
||||
#define GENERIC_WDOG_COMPARE_VALUE_REG_LOW ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
|
||||
#define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x014)
|
||||
#define GENERIC_WDOG_COMPARE_VALUE_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010)
|
||||
|
||||
// Values of bit 0 of the Control/Status Register
|
||||
#define GENERIC_WDOG_ENABLED 1
|
||||
|
@ -1,6 +1,6 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2013-2018, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD
|
||||
@ -24,67 +24,61 @@
|
||||
#include <Library/UefiLib.h>
|
||||
#include <Library/ArmGenericTimerCounterLib.h>
|
||||
|
||||
#include <Protocol/HardwareInterrupt2.h>
|
||||
#include <Protocol/WatchdogTimer.h>
|
||||
#include <Protocol/HardwareInterrupt.h>
|
||||
|
||||
#include "GenericWatchdog.h"
|
||||
|
||||
/* The number of 100ns periods (the unit of time passed to these functions)
|
||||
in a second */
|
||||
// The number of 100ns periods (the unit of time passed to these functions)
|
||||
// in a second
|
||||
#define TIME_UNITS_PER_SECOND 10000000
|
||||
|
||||
// Tick frequency of the generic timer basis of the generic watchdog.
|
||||
STATIC UINTN mTimerFrequencyHz = 0;
|
||||
// Tick frequency of the generic timer that is the basis of the generic watchdog
|
||||
UINTN mTimerFrequencyHz = 0;
|
||||
|
||||
/* In cases where the compare register was set manually, information about
|
||||
how long the watchdog was asked to wait cannot be retrieved from hardware.
|
||||
It is therefore stored here. 0 means the timer is not running. */
|
||||
STATIC UINT64 mNumTimerTicks = 0;
|
||||
// In cases where the compare register was set manually, information about
|
||||
// how long the watchdog was asked to wait cannot be retrieved from hardware.
|
||||
// It is therefore stored here. 0 means the timer is not running.
|
||||
UINT64 mNumTimerTicks = 0;
|
||||
|
||||
STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
|
||||
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
|
||||
EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterruptProtocol;
|
||||
|
||||
STATIC
|
||||
VOID
|
||||
EFI_STATUS
|
||||
WatchdogWriteOffsetRegister (
|
||||
UINT32 Value
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
|
||||
return MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
|
||||
}
|
||||
|
||||
STATIC
|
||||
VOID
|
||||
EFI_STATUS
|
||||
WatchdogWriteCompareRegister (
|
||||
UINT64 Value
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_LOW, Value & MAX_UINT32);
|
||||
MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_HIGH, (Value >> 32) & MAX_UINT32);
|
||||
return MmioWrite64 (GENERIC_WDOG_COMPARE_VALUE_REG, Value);
|
||||
}
|
||||
|
||||
STATIC
|
||||
VOID
|
||||
EFI_STATUS
|
||||
WatchdogEnable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
|
||||
return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
|
||||
}
|
||||
|
||||
STATIC
|
||||
VOID
|
||||
EFI_STATUS
|
||||
WatchdogDisable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED);
|
||||
return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED);
|
||||
}
|
||||
|
||||
/** On exiting boot services we must make sure the Watchdog Timer
|
||||
/**
|
||||
On exiting boot services we must make sure the Watchdog Timer
|
||||
is stopped.
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
WatchdogExitBootServicesEvent (
|
||||
@ -96,10 +90,10 @@ WatchdogExitBootServicesEvent (
|
||||
mNumTimerTicks = 0;
|
||||
}
|
||||
|
||||
/* This function is called when the watchdog's first signal (WS0) goes high.
|
||||
/*
|
||||
This function is called when the watchdog's first signal (WS0) goes high.
|
||||
It uses the ResetSystem Runtime Service to reset the board.
|
||||
*/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
WatchdogInterruptHandler (
|
||||
@ -108,25 +102,17 @@ WatchdogInterruptHandler (
|
||||
)
|
||||
{
|
||||
STATIC CONST CHAR16 ResetString[] = L"The generic watchdog timer ran out.";
|
||||
UINT64 TimerPeriod;
|
||||
|
||||
WatchdogDisable ();
|
||||
|
||||
mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source);
|
||||
|
||||
//
|
||||
// The notify function should be called with the elapsed number of ticks
|
||||
// since the watchdog was armed, which should exceed the timer period.
|
||||
// We don't actually know the elapsed number of ticks, so let's return
|
||||
// the timer period plus 1.
|
||||
//
|
||||
if (mWatchdogNotify != NULL) {
|
||||
TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks);
|
||||
mWatchdogNotify (TimerPeriod + 1);
|
||||
}
|
||||
|
||||
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
|
||||
(CHAR16 *)ResetString);
|
||||
gRT->ResetSystem (
|
||||
EfiResetCold,
|
||||
EFI_TIMEOUT,
|
||||
StrSize (ResetString),
|
||||
(VOID *) &ResetString
|
||||
);
|
||||
|
||||
// If we got here then the reset didn't work
|
||||
ASSERT (FALSE);
|
||||
@ -140,10 +126,10 @@ WatchdogInterruptHandler (
|
||||
then the new handler is registered and EFI_SUCCESS is returned.
|
||||
If NotifyFunction is NULL, and a handler is already registered,
|
||||
then that handler is unregistered.
|
||||
If an attempt is made to register a handler when a handler is already
|
||||
registered, then EFI_ALREADY_STARTED is returned.
|
||||
If an attempt is made to unregister a handler when a handler is not
|
||||
registered, then EFI_INVALID_PARAMETER is returned.
|
||||
If an attempt is made to register a handler when a handler is already registered,
|
||||
then EFI_ALREADY_STARTED is returned.
|
||||
If an attempt is made to unregister a handler when a handler is not registered,
|
||||
then EFI_INVALID_PARAMETER is returned.
|
||||
|
||||
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
|
||||
@param NotifyFunction The function to call when a timer interrupt fires.
|
||||
@ -153,81 +139,85 @@ WatchdogInterruptHandler (
|
||||
information is used to signal timer based events.
|
||||
NULL will unregister the handler.
|
||||
|
||||
@retval EFI_UNSUPPORTED The code does not support NotifyFunction.
|
||||
@retval EFI_SUCCESS The watchdog timer handler was registered.
|
||||
@retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
|
||||
registered.
|
||||
@retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
|
||||
previously registered.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
WatchdogRegisterHandler (
|
||||
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
|
||||
)
|
||||
{
|
||||
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
|
||||
return EFI_ALREADY_STARTED;
|
||||
}
|
||||
|
||||
mWatchdogNotify = NotifyFunction;
|
||||
return EFI_SUCCESS;
|
||||
// ERROR: This function is not supported.
|
||||
// The watchdog will reset the board
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
/**
|
||||
This function sets the amount of time to wait before firing the watchdog
|
||||
timer to TimerPeriod 100ns units. If TimerPeriod is 0, then the watchdog
|
||||
timer to TimerPeriod 100 nS units. If TimerPeriod is 0, then the watchdog
|
||||
timer is disabled.
|
||||
|
||||
@param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
|
||||
@param TimerPeriod The amount of time in 100ns units to wait before
|
||||
the watchdog timer is fired. If TimerPeriod is zero,
|
||||
then the watchdog timer is disabled.
|
||||
@param TimerPeriod The amount of time in 100 nS units to wait before the watchdog
|
||||
timer is fired. If TimerPeriod is zero, then the watchdog
|
||||
timer is disabled.
|
||||
|
||||
@retval EFI_SUCCESS The watchdog timer has been programmed to fire
|
||||
in TimerPeriod 100ns units.
|
||||
@retval EFI_SUCCESS The watchdog timer has been programmed to fire in Time
|
||||
100 nS units.
|
||||
@retval EFI_DEVICE_ERROR A watchdog timer could not be programmed due to a device
|
||||
error.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
WatchdogSetTimerPeriod (
|
||||
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN UINT64 TimerPeriod // In 100ns units
|
||||
)
|
||||
{
|
||||
UINTN SystemCount;
|
||||
EFI_STATUS Status;
|
||||
|
||||
// if TimerPeriod is 0, this is a request to stop the watchdog.
|
||||
// if TimerPerdiod is 0, this is a request to stop the watchdog.
|
||||
if (TimerPeriod == 0) {
|
||||
mNumTimerTicks = 0;
|
||||
WatchdogDisable ();
|
||||
return EFI_SUCCESS;
|
||||
return WatchdogDisable ();
|
||||
}
|
||||
|
||||
// Work out how many timer ticks will equate to TimerPeriod
|
||||
mNumTimerTicks = (mTimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND;
|
||||
|
||||
/* If the number of required ticks is greater than the max the watchdog's
|
||||
offset register (WOR) can hold, we need to manually compute and set
|
||||
the compare register (WCV) */
|
||||
//
|
||||
// If the number of required ticks is greater than the max number the
|
||||
// watchdog's offset register (WOR) can hold, we need to manually compute and
|
||||
// set the compare register (WCV)
|
||||
//
|
||||
if (mNumTimerTicks > MAX_UINT32) {
|
||||
/* We need to enable the watchdog *before* writing to the compare register,
|
||||
because enabling the watchdog causes an "explicit refresh", which
|
||||
clobbers the compare register (WCV). In order to make sure this doesn't
|
||||
trigger an interrupt, set the offset to max. */
|
||||
WatchdogWriteOffsetRegister (MAX_UINT32);
|
||||
//
|
||||
// We need to enable the watchdog *before* writing to the compare register,
|
||||
// because enabling the watchdog causes an "explicit refresh", which
|
||||
// clobbers the compare register (WCV). In order to make sure this doesn't
|
||||
// trigger an interrupt, set the offset to max.
|
||||
//
|
||||
Status = WatchdogWriteOffsetRegister (MAX_UINT32);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
WatchdogEnable ();
|
||||
SystemCount = ArmGenericTimerGetSystemCount ();
|
||||
WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
|
||||
Status = WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
|
||||
} else {
|
||||
WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks);
|
||||
Status = WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks);
|
||||
WatchdogEnable ();
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
return Status;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -237,8 +227,8 @@ WatchdogSetTimerPeriod (
|
||||
returned, then the timer is currently disabled.
|
||||
|
||||
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
|
||||
@param TimerPeriod A pointer to the timer period to retrieve in
|
||||
100ns units. If 0 is returned, then the timer is
|
||||
@param TimerPeriod A pointer to the timer period to retrieve in 100
|
||||
ns units. If 0 is returned, then the timer is
|
||||
currently disabled.
|
||||
|
||||
|
||||
@ -246,11 +236,10 @@ WatchdogSetTimerPeriod (
|
||||
@retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
WatchdogGetTimerPeriod (
|
||||
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
|
||||
OUT UINT64 *TimerPeriod
|
||||
)
|
||||
{
|
||||
@ -286,22 +275,22 @@ WatchdogGetTimerPeriod (
|
||||
this function will not have any chance of executing.
|
||||
|
||||
@param SetTimerPeriod
|
||||
Sets the period of the timer interrupt in 100ns units.
|
||||
Sets the period of the timer interrupt in 100 nS units.
|
||||
This function is optional, and may return EFI_UNSUPPORTED.
|
||||
If this function is supported, then the timer period will
|
||||
be rounded up to the nearest supported timer period.
|
||||
|
||||
@param GetTimerPeriod
|
||||
Retrieves the period of the timer interrupt in 100ns units.
|
||||
Retrieves the period of the timer interrupt in 100 nS units.
|
||||
|
||||
**/
|
||||
STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
|
||||
WatchdogRegisterHandler,
|
||||
WatchdogSetTimerPeriod,
|
||||
WatchdogGetTimerPeriod
|
||||
EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {
|
||||
(EFI_WATCHDOG_TIMER_REGISTER_HANDLER) WatchdogRegisterHandler,
|
||||
(EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) WatchdogSetTimerPeriod,
|
||||
(EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) WatchdogGetTimerPeriod
|
||||
};
|
||||
|
||||
STATIC EFI_EVENT mEfiExitBootServicesEvent;
|
||||
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
@ -313,57 +302,53 @@ GenericWatchdogEntry (
|
||||
EFI_STATUS Status;
|
||||
EFI_HANDLE Handle;
|
||||
|
||||
Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
|
||||
(VOID **)&mInterruptProtocol);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
|
||||
/* Make sure the Watchdog Timer Architectural Protocol has not been installed
|
||||
in the system yet.
|
||||
This will avoid conflicts with the universal watchdog */
|
||||
//
|
||||
// Make sure the Watchdog Timer Architectural Protocol has not been installed
|
||||
// in the system yet.
|
||||
// This will avoid conflicts with the universal watchdog
|
||||
//
|
||||
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
|
||||
|
||||
mTimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
|
||||
ASSERT (mTimerFrequencyHz != 0);
|
||||
|
||||
// Register for an ExitBootServicesEvent
|
||||
Status = gBS->CreateEvent (
|
||||
EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
|
||||
WatchdogExitBootServicesEvent, NULL, &EfiExitBootServicesEvent
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
// Install interrupt handler
|
||||
Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
|
||||
Status = gBS->LocateProtocol (
|
||||
&gHardwareInterruptProtocolGuid,
|
||||
NULL,
|
||||
(VOID **)&mInterruptProtocol
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
Status = mInterruptProtocol->RegisterInterruptSource (
|
||||
mInterruptProtocol,
|
||||
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
|
||||
WatchdogInterruptHandler);
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
|
||||
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
|
||||
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
|
||||
if (EFI_ERROR (Status)) {
|
||||
goto UnregisterHandler;
|
||||
}
|
||||
|
||||
WatchdogInterruptHandler
|
||||
);
|
||||
if (!EFI_ERROR (Status)) {
|
||||
// Install the Timer Architectural Protocol onto a new handle
|
||||
Handle = NULL;
|
||||
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
|
||||
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
|
||||
NULL);
|
||||
if (EFI_ERROR (Status)) {
|
||||
goto UnregisterHandler;
|
||||
Status = gBS->InstallMultipleProtocolInterfaces (
|
||||
&Handle,
|
||||
&gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
|
||||
NULL
|
||||
);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Register for an ExitBootServicesEvent
|
||||
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
|
||||
WatchdogExitBootServicesEvent, NULL,
|
||||
&mEfiExitBootServicesEvent);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
if (EFI_ERROR (Status)) {
|
||||
// The watchdog failed to initialize
|
||||
ASSERT (FALSE);
|
||||
}
|
||||
|
||||
mNumTimerTicks = 0;
|
||||
WatchdogDisable ();
|
||||
|
||||
return EFI_SUCCESS;
|
||||
|
||||
UnregisterHandler:
|
||||
// Unregister the handler
|
||||
mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
|
||||
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
|
||||
NULL);
|
||||
return Status;
|
||||
}
|
||||
|
@ -1,5 +1,5 @@
|
||||
#
|
||||
# Copyright (c) 2013-2017, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2013-2014, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -16,16 +16,17 @@
|
||||
FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
ENTRY_POINT = GenericWatchdogEntry
|
||||
|
||||
[Sources.common]
|
||||
GenericWatchdogDxe.c
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
ArmGenericTimerCounterLib
|
||||
@ -45,8 +46,8 @@
|
||||
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
|
||||
|
||||
[Protocols]
|
||||
gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
|
||||
gHardwareInterrupt2ProtocolGuid ## ALWAYS_CONSUMES
|
||||
gEfiWatchdogTimerArchProtocolGuid
|
||||
gHardwareInterruptProtocolGuid
|
||||
|
||||
[Depex]
|
||||
gHardwareInterrupt2ProtocolGuid
|
||||
gHardwareInterruptProtocolGuid
|
||||
|
@ -1,28 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#if !defined _MM_COMMUNICATE_H_
|
||||
#define _MM_COMMUNICATE_H_
|
||||
|
||||
#define MM_MAJOR_VER_MASK 0xEFFF0000
|
||||
#define MM_MINOR_VER_MASK 0x0000FFFF
|
||||
#define MM_MAJOR_VER_SHIFT 16
|
||||
|
||||
#define MM_MAJOR_VER(x) (((x) & MM_MAJOR_VER_MASK) >> MM_MAJOR_VER_SHIFT)
|
||||
#define MM_MINOR_VER(x) ((x) & MM_MINOR_VER_MASK)
|
||||
|
||||
#define MM_CALLER_MAJOR_VER 0x1UL
|
||||
#define MM_CALLER_MINOR_VER 0x0
|
||||
|
||||
#endif /* _MM_COMMUNICATE_H_ */
|
@ -1,372 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <Library/ArmLib.h>
|
||||
#include <Library/ArmSmcLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/DxeServicesTableLib.h>
|
||||
#include <Library/HobLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Library/UefiRuntimeServicesTableLib.h>
|
||||
|
||||
#include <Protocol/MmCommunication.h>
|
||||
|
||||
#include <IndustryStandard/ArmStdSmc.h>
|
||||
|
||||
#include "MmCommunicate.h"
|
||||
|
||||
//
|
||||
// Address, Length of the pre-allocated buffer for communication with the secure
|
||||
// world.
|
||||
//
|
||||
STATIC ARM_MEMORY_REGION_DESCRIPTOR mNsCommBuffMemRegion;
|
||||
|
||||
// Notification event when virtual address map is set.
|
||||
STATIC EFI_EVENT mSetVirtualAddressMapEvent;
|
||||
|
||||
//
|
||||
// Handle to install the MM Communication Protocol
|
||||
//
|
||||
STATIC EFI_HANDLE mMmCommunicateHandle;
|
||||
|
||||
/**
|
||||
Communicates with a registered handler.
|
||||
|
||||
This function provides an interface to send and receive messages to the
|
||||
Standalone MM environment on behalf of UEFI services. This function is part
|
||||
of the MM Communication Protocol that may be called in physical mode prior to
|
||||
SetVirtualAddressMap() and in virtual mode after SetVirtualAddressMap().
|
||||
|
||||
@param[in] This The EFI_MM_COMMUNICATION_PROTOCOL
|
||||
instance.
|
||||
@param[in, out] CommBuffer A pointer to the buffer to convey
|
||||
into MMRAM.
|
||||
@param[in, out] CommSize The size of the data buffer being
|
||||
passed in. This is optional.
|
||||
|
||||
@retval EFI_SUCCESS The message was successfully posted.
|
||||
@retval EFI_INVALID_PARAMETER The CommBuffer was NULL.
|
||||
@retval EFI_BAD_BUFFER_SIZE The buffer size is incorrect for the MM
|
||||
implementation. If this error is
|
||||
returned, the MessageLength field in
|
||||
the CommBuffer header or the integer
|
||||
pointed by CommSize are updated to reflect
|
||||
the maximum payload size the
|
||||
implementation can accommodate.
|
||||
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter
|
||||
or CommSize parameter, if not omitted,
|
||||
are in address range that cannot be
|
||||
accessed by the MM environment
|
||||
**/
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
MmCommunicationCommunicate (
|
||||
IN CONST EFI_MM_COMMUNICATION_PROTOCOL *This,
|
||||
IN OUT VOID *CommBuffer,
|
||||
IN OUT UINTN *CommSize OPTIONAL
|
||||
)
|
||||
{
|
||||
EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
|
||||
ARM_SMC_ARGS CommunicateSmcArgs;
|
||||
EFI_STATUS Status;
|
||||
UINTN BufferSize;
|
||||
|
||||
Status = EFI_ACCESS_DENIED;
|
||||
BufferSize = 0;
|
||||
|
||||
ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
|
||||
|
||||
//
|
||||
// Check parameters
|
||||
//
|
||||
if (CommBuffer == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
CommunicateHeader = CommBuffer;
|
||||
// CommBuffer is a mandatory parameter. Hence, Rely on
|
||||
// MessageLength + Header to ascertain the
|
||||
// total size of the communication payload rather than
|
||||
// rely on optional CommSize parameter
|
||||
BufferSize = CommunicateHeader->MessageLength +
|
||||
sizeof (CommunicateHeader->HeaderGuid) +
|
||||
sizeof (CommunicateHeader->MessageLength);
|
||||
|
||||
// If the length of the CommBuffer is 0 then return the expected length.
|
||||
if (CommSize) {
|
||||
// This case can be used by the consumer of this driver to find out the
|
||||
// max size that can be used for allocating CommBuffer.
|
||||
if ((*CommSize == 0) ||
|
||||
(*CommSize > mNsCommBuffMemRegion.Length)) {
|
||||
*CommSize = mNsCommBuffMemRegion.Length;
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
//
|
||||
// CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
|
||||
//
|
||||
if (*CommSize != BufferSize) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// If the buffer size is 0 or greater than what can be tolerated by the MM
|
||||
// environment then return the expected size.
|
||||
//
|
||||
if ((BufferSize == 0) ||
|
||||
(BufferSize > mNsCommBuffMemRegion.Length)) {
|
||||
CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
|
||||
sizeof (CommunicateHeader->HeaderGuid) -
|
||||
sizeof (CommunicateHeader->MessageLength);
|
||||
return EFI_BAD_BUFFER_SIZE;
|
||||
}
|
||||
|
||||
// SMC Function ID
|
||||
CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
|
||||
|
||||
// Cookie
|
||||
CommunicateSmcArgs.Arg1 = 0;
|
||||
|
||||
// Copy Communication Payload
|
||||
CopyMem ((VOID *)mNsCommBuffMemRegion.VirtualBase, CommBuffer, BufferSize);
|
||||
|
||||
// comm_buffer_address (64-bit physical address)
|
||||
CommunicateSmcArgs.Arg2 = (UINTN)mNsCommBuffMemRegion.PhysicalBase;
|
||||
|
||||
// comm_size_address (not used, indicated by setting to zero)
|
||||
CommunicateSmcArgs.Arg3 = 0;
|
||||
|
||||
// Call the Standalone MM environment.
|
||||
ArmCallSmc (&CommunicateSmcArgs);
|
||||
|
||||
switch (CommunicateSmcArgs.Arg0) {
|
||||
case ARM_SMC_MM_RET_SUCCESS:
|
||||
ZeroMem (CommBuffer, BufferSize);
|
||||
// On successful return, the size of data being returned is inferred from
|
||||
// MessageLength + Header.
|
||||
CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)mNsCommBuffMemRegion.VirtualBase;
|
||||
BufferSize = CommunicateHeader->MessageLength +
|
||||
sizeof (CommunicateHeader->HeaderGuid) +
|
||||
sizeof (CommunicateHeader->MessageLength);
|
||||
|
||||
CopyMem (
|
||||
CommBuffer,
|
||||
(VOID *)mNsCommBuffMemRegion.VirtualBase,
|
||||
BufferSize
|
||||
);
|
||||
Status = EFI_SUCCESS;
|
||||
break;
|
||||
|
||||
case ARM_SMC_MM_RET_INVALID_PARAMS:
|
||||
Status = EFI_INVALID_PARAMETER;
|
||||
break;
|
||||
|
||||
case ARM_SMC_MM_RET_DENIED:
|
||||
Status = EFI_ACCESS_DENIED;
|
||||
break;
|
||||
|
||||
case ARM_SMC_MM_RET_NO_MEMORY:
|
||||
// Unexpected error since the CommSize was checked for zero length
|
||||
// prior to issuing the SMC
|
||||
Status = EFI_OUT_OF_RESOURCES;
|
||||
ASSERT (0);
|
||||
break;
|
||||
|
||||
default:
|
||||
Status = EFI_ACCESS_DENIED;
|
||||
ASSERT (0);
|
||||
}
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// MM Communication Protocol instance
|
||||
//
|
||||
EFI_MM_COMMUNICATION_PROTOCOL mMmCommunication = {
|
||||
MmCommunicationCommunicate
|
||||
};
|
||||
|
||||
/**
|
||||
Notification callback on SetVirtualAddressMap event.
|
||||
|
||||
This function notifies the MM communication protocol interface on
|
||||
SetVirtualAddressMap event and converts pointers used in this driver
|
||||
from physical to virtual address.
|
||||
|
||||
@param Event SetVirtualAddressMap event.
|
||||
@param Context A context when the SetVirtualAddressMap triggered.
|
||||
|
||||
@retval EFI_SUCCESS The function executed successfully.
|
||||
@retval Other Some error occurred when executing this function.
|
||||
|
||||
**/
|
||||
STATIC
|
||||
VOID
|
||||
EFIAPI
|
||||
NotifySetVirtualAddressMap (
|
||||
IN EFI_EVENT Event,
|
||||
IN VOID *Context
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
Status = gRT->ConvertPointer (
|
||||
EFI_OPTIONAL_PTR,
|
||||
(VOID **)&mNsCommBuffMemRegion.VirtualBase
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
|
||||
" Unable to convert MM runtime pointer. Status:0x%r\n", Status));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
STATIC
|
||||
EFI_STATUS
|
||||
GetMmCompatibility ()
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
UINT32 MmVersion;
|
||||
ARM_SMC_ARGS MmVersionArgs;
|
||||
|
||||
// MM_VERSION uses SMC32 calling conventions
|
||||
MmVersionArgs.Arg0 = ARM_SMC_ID_MM_VERSION_AARCH32;
|
||||
|
||||
ArmCallSmc (&MmVersionArgs);
|
||||
|
||||
MmVersion = MmVersionArgs.Arg0;
|
||||
|
||||
if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
|
||||
(MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
|
||||
DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
|
||||
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
|
||||
Status = EFI_SUCCESS;
|
||||
} else {
|
||||
DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
|
||||
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
|
||||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/**
|
||||
The Entry Point for MM Communication
|
||||
|
||||
This function installs the MM communication protocol interface and finds out
|
||||
what type of buffer management will be required prior to invoking the
|
||||
communication SMC.
|
||||
|
||||
@param ImageHandle The firmware allocated handle for the EFI image.
|
||||
@param SystemTable A pointer to the EFI System Table.
|
||||
|
||||
@retval EFI_SUCCESS The entry point is executed successfully.
|
||||
@retval Other Some error occurred when executing this entry point.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
MmCommunicationInitialize (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
// Check if we can make the MM call
|
||||
Status = GetMmCompatibility ();
|
||||
if (EFI_ERROR(Status)) {
|
||||
goto ReturnErrorStatus;
|
||||
}
|
||||
|
||||
mNsCommBuffMemRegion.PhysicalBase = PcdGet64 (PcdMmBufferBase);
|
||||
// During boot , Virtual and Physical are same
|
||||
mNsCommBuffMemRegion.VirtualBase = mNsCommBuffMemRegion.PhysicalBase;
|
||||
mNsCommBuffMemRegion.Length = PcdGet64 (PcdMmBufferSize);
|
||||
|
||||
ASSERT (mNsCommBuffMemRegion.PhysicalBase != 0);
|
||||
|
||||
ASSERT (mNsCommBuffMemRegion.Length != 0);
|
||||
|
||||
Status = gDS->AddMemorySpace (
|
||||
EfiGcdMemoryTypeReserved,
|
||||
mNsCommBuffMemRegion.PhysicalBase,
|
||||
mNsCommBuffMemRegion.Length,
|
||||
EFI_MEMORY_WB |
|
||||
EFI_MEMORY_XP |
|
||||
EFI_MEMORY_RUNTIME
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
|
||||
"Failed to add MM-NS Buffer Memory Space\n"));
|
||||
goto ReturnErrorStatus;
|
||||
}
|
||||
|
||||
Status = gDS->SetMemorySpaceAttributes (
|
||||
mNsCommBuffMemRegion.PhysicalBase,
|
||||
mNsCommBuffMemRegion.Length,
|
||||
EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
|
||||
);
|
||||
if (EFI_ERROR (Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
|
||||
"Failed to set MM-NS Buffer Memory attributes\n"));
|
||||
goto CleanAddedMemorySpace;
|
||||
}
|
||||
|
||||
// Install the communication protocol
|
||||
Status = gBS->InstallProtocolInterface (
|
||||
&mMmCommunicateHandle,
|
||||
&gEfiMmCommunicationProtocolGuid,
|
||||
EFI_NATIVE_INTERFACE,
|
||||
&mMmCommunication
|
||||
);
|
||||
if (EFI_ERROR(Status)) {
|
||||
DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
|
||||
"Failed to install MM communication protocol\n"));
|
||||
goto CleanAddedMemorySpace;
|
||||
}
|
||||
|
||||
// Register notification callback when virtual address is associated
|
||||
// with the physical address.
|
||||
// Create a Set Virtual Address Map event.
|
||||
Status = gBS->CreateEvent (
|
||||
EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE,
|
||||
TPL_NOTIFY,
|
||||
NotifySetVirtualAddressMap,
|
||||
NULL,
|
||||
&mSetVirtualAddressMapEvent
|
||||
);
|
||||
if (Status == EFI_SUCCESS) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
gBS->UninstallProtocolInterface (
|
||||
mMmCommunicateHandle,
|
||||
&gEfiMmCommunicationProtocolGuid,
|
||||
&mMmCommunication
|
||||
);
|
||||
|
||||
CleanAddedMemorySpace:
|
||||
gDS->RemoveMemorySpace (
|
||||
mNsCommBuffMemRegion.PhysicalBase,
|
||||
mNsCommBuffMemRegion.Length
|
||||
);
|
||||
|
||||
ReturnErrorStatus:
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
@ -1,56 +0,0 @@
|
||||
#/** @file
|
||||
#
|
||||
# DXE MM Communicate driver
|
||||
#
|
||||
# Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x0001001A
|
||||
BASE_NAME = ArmMmCommunication
|
||||
FILE_GUID = 09EE81D3-F15E-43F4-85B4-CB9873DA5D6B
|
||||
MODULE_TYPE = DXE_RUNTIME_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
ENTRY_POINT = MmCommunicationInitialize
|
||||
|
||||
#
|
||||
# The following is for reference only and not required by
|
||||
# build tools
|
||||
#
|
||||
# VALID_ARCHITECTURES = AARCH64
|
||||
#
|
||||
|
||||
[Sources.AARCH64]
|
||||
MmCommunication.c
|
||||
|
||||
[Packages]
|
||||
ArmPkg/ArmPkg.dec
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
ArmLib
|
||||
ArmSmcLib
|
||||
BaseMemoryLib
|
||||
DebugLib
|
||||
DxeServicesTableLib
|
||||
HobLib
|
||||
UefiDriverEntryPoint
|
||||
|
||||
[Protocols]
|
||||
gEfiMmCommunicationProtocolGuid ## PRODUCES
|
||||
|
||||
[Pcd.common]
|
||||
gArmTokenSpaceGuid.PcdMmBufferBase
|
||||
gArmTokenSpaceGuid.PcdMmBufferSize
|
||||
|
||||
[Depex]
|
||||
gEfiCpuArchProtocolGuid
|
@ -306,13 +306,12 @@ TimerInterruptHandler (
|
||||
//
|
||||
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
|
||||
|
||||
// Signal end of interrupt early to help avoid losing subsequent ticks
|
||||
// from long duration handlers
|
||||
gInterrupt->EndOfInterrupt (gInterrupt, Source);
|
||||
|
||||
// Check if the timer interrupt is active
|
||||
if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
|
||||
|
||||
// Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
|
||||
gInterrupt->EndOfInterrupt (gInterrupt, Source);
|
||||
|
||||
if (mTimerNotifyFunction) {
|
||||
mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
|
||||
}
|
||||
@ -337,10 +336,12 @@ TimerInterruptHandler (
|
||||
|
||||
// Set next compare value
|
||||
ArmGenericTimerSetCompareVal (CompareValue);
|
||||
ArmGenericTimerReenableTimer ();
|
||||
ArmInstructionSynchronizationBarrier ();
|
||||
ArmGenericTimerEnableTimer ();
|
||||
}
|
||||
|
||||
// Enable timer interrupts
|
||||
gInterrupt->EnableInterruptSource (gInterrupt, Source);
|
||||
|
||||
gBS->RestoreTPL (OriginalTPL);
|
||||
}
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
Copyright (c) 2011 - 2017, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -235,14 +235,4 @@ ArmWriteCptr (
|
||||
IN UINT64 Cptr
|
||||
);
|
||||
|
||||
UINT32
|
||||
ArmReadCntHctl (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ArmWriteCntHctl (
|
||||
IN UINT32 CntHctl
|
||||
);
|
||||
|
||||
#endif // __AARCH64_H__
|
||||
|
@ -1,50 +0,0 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#ifndef __ARM_MM_SVC_H__
|
||||
#define __ARM_MM_SVC_H__
|
||||
|
||||
/*
|
||||
* SVC IDs to allow the MM secure partition to initialise itself, handle
|
||||
* delegated events and request the Secure partition manager to perform
|
||||
* privileged operations on its behalf.
|
||||
*/
|
||||
#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
|
||||
#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
|
||||
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
|
||||
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
|
||||
|
||||
#define SET_MEM_ATTR_DATA_PERM_MASK 0x3
|
||||
#define SET_MEM_ATTR_DATA_PERM_SHIFT 0
|
||||
#define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0
|
||||
#define SET_MEM_ATTR_DATA_PERM_RW 1
|
||||
#define SET_MEM_ATTR_DATA_PERM_RO 3
|
||||
|
||||
#define SET_MEM_ATTR_CODE_PERM_MASK 0x1
|
||||
#define SET_MEM_ATTR_CODE_PERM_SHIFT 2
|
||||
#define SET_MEM_ATTR_CODE_PERM_X 0
|
||||
#define SET_MEM_ATTR_CODE_PERM_XN 1
|
||||
|
||||
#define SET_MEM_ATTR_MAKE_PERM_REQUEST(d_perm, c_perm) \
|
||||
((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \
|
||||
(( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))
|
||||
|
||||
/* MM SVC Return error codes */
|
||||
#define ARM_SVC_SPM_RET_SUCCESS 0
|
||||
#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1
|
||||
#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
|
||||
#define ARM_SVC_SPM_RET_DENIED -3
|
||||
#define ARM_SVC_SPM_RET_NO_MEMORY -5
|
||||
|
||||
#endif
|
@ -1,6 +1,6 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -40,24 +40,6 @@
|
||||
#define ARM_SMC_STD_REVISION_MAJOR 0x0
|
||||
#define ARM_SMC_STD_REVISION_MINOR 0x1
|
||||
|
||||
/*
|
||||
* Management Mode (MM) calls cover a subset of the Standard Service Call range.
|
||||
* The list below is not exhaustive.
|
||||
*/
|
||||
#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
|
||||
#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
|
||||
|
||||
// Request service from secure standalone MM environment
|
||||
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
|
||||
#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
|
||||
|
||||
/* MM return error codes */
|
||||
#define ARM_SMC_MM_RET_SUCCESS 0
|
||||
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
|
||||
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
|
||||
#define ARM_SMC_MM_RET_DENIED -3
|
||||
#define ARM_SMC_MM_RET_NO_MEMORY -4
|
||||
|
||||
/*
|
||||
* Power State Coordination Interface (PSCI) calls cover a subset of the
|
||||
* Standard Service Call range.
|
||||
@ -111,12 +93,4 @@
|
||||
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
|
||||
#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2
|
||||
|
||||
/*
|
||||
* SMC function IDs for Trusted OS Service queries
|
||||
*/
|
||||
#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
|
||||
#define ARM_SMC_ID_TOS_UID 0xbf00ff01
|
||||
/* 0xbf00ff02 is reserved */
|
||||
#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
|
||||
|
||||
#endif
|
||||
|
@ -22,12 +22,6 @@ ArmGenericTimerEnableTimer (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGenericTimerReenableTimer (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGenericTimerDisableTimer (
|
||||
|
@ -1,6 +1,6 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
|
||||
* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
@ -17,7 +17,9 @@
|
||||
|
||||
#include <Library/ArmGicArchLib.h>
|
||||
|
||||
//
|
||||
// GIC Distributor
|
||||
//
|
||||
#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register
|
||||
#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register
|
||||
#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register
|
||||
@ -49,44 +51,23 @@
|
||||
#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
|
||||
#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
|
||||
|
||||
// GICD_ICDICFR bits
|
||||
#define ARM_GIC_ICDICFR_WIDTH 32 // ICDICFR is a 32 bit register
|
||||
#define ARM_GIC_ICDICFR_BYTES (ARM_GIC_ICDICFR_WIDTH / 8)
|
||||
#define ARM_GIC_ICDICFR_F_WIDTH 2 // Each F field is 2 bits
|
||||
#define ARM_GIC_ICDICFR_F_STRIDE 16 // (32/2) F fields per register
|
||||
#define ARM_GIC_ICDICFR_F_CONFIG1_BIT 1 // Bit number within F field
|
||||
#define ARM_GIC_ICDICFR_LEVEL_TRIGGERED 0x0 // Level triggered interrupt
|
||||
#define ARM_GIC_ICDICFR_EDGE_TRIGGERED 0x1 // Edge triggered interrupt
|
||||
|
||||
|
||||
//
|
||||
// GIC Redistributor
|
||||
//
|
||||
|
||||
#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
|
||||
#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
|
||||
#define ARM_GICR_SGI_VLPI_FRAME_SIZE SIZE_64KB
|
||||
#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB
|
||||
|
||||
// GIC Redistributor Control frame
|
||||
#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
|
||||
|
||||
// GIC Redistributor TYPER bit assignments
|
||||
#define ARM_GICR_TYPER_PLPIS (1 << 0) // Physical LPIs
|
||||
#define ARM_GICR_TYPER_VLPIS (1 << 1) // Virtual LPIs
|
||||
#define ARM_GICR_TYPER_DIRECTLPI (1 << 3) // Direct LPIs
|
||||
#define ARM_GICR_TYPER_LAST (1 << 4) // Last Redistributor in series
|
||||
#define ARM_GICR_TYPER_DPGS (1 << 5) // Disable Processor Group
|
||||
// Selection Support
|
||||
#define ARM_GICR_TYPER_PROCNO (0xFFFF << 8) // Processor Number
|
||||
#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24) // Common LPI Affinity
|
||||
#define ARM_GICR_TYPER_AFFINITY (0xFFFFFFFFULL << 32) // Redistributor Affinity
|
||||
|
||||
#define ARM_GICR_TYPER_GET_AFFINITY(TypeReg) (((TypeReg) & \
|
||||
ARM_GICR_TYPER_AFFINITY) >> 32)
|
||||
|
||||
// GIC SGI & PPI Redistributor frame
|
||||
#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
|
||||
#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
|
||||
|
||||
//
|
||||
// GIC Cpu interface
|
||||
//
|
||||
#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register
|
||||
#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register
|
||||
#define ARM_GIC_ICCBPR 0x08 // Binary Point Register
|
||||
@ -123,7 +104,9 @@ ArmGicGetInterfaceIdentification (
|
||||
IN INTN GicInterruptInterfaceBase
|
||||
);
|
||||
|
||||
//
|
||||
// GIC Secure interfaces
|
||||
//
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGicSetupNonSecure (
|
||||
@ -187,8 +170,7 @@ ArmGicSendSgiTo (
|
||||
* in the GICv3 the register value is only the InterruptId.
|
||||
*
|
||||
* @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface
|
||||
* @param InterruptId InterruptId read from the Interrupt
|
||||
* Acknowledge Register
|
||||
* @param InterruptId InterruptId read from the Interrupt Acknowledge Register
|
||||
*
|
||||
* @retval value returned by the Interrupt Acknowledge Register
|
||||
*
|
||||
@ -238,12 +220,12 @@ ArmGicIsInterruptEnabled (
|
||||
IN UINTN Source
|
||||
);
|
||||
|
||||
//
|
||||
// GIC revision 2 specific declarations
|
||||
//
|
||||
|
||||
// Interrupts from 1020 to 1023 are considered as special interrupts
|
||||
// (eg: spurious interrupts)
|
||||
#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) \
|
||||
(((Interrupt) >= 1020) && ((Interrupt) <= 1023))
|
||||
// Interrupts from 1020 to 1023 are considered as special interrupts (eg: spurious interrupts)
|
||||
#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
@ -278,7 +260,9 @@ ArmGicV2EndOfInterrupt (
|
||||
IN UINTN Source
|
||||
);
|
||||
|
||||
//
|
||||
// GIC revision 3 specific declarations
|
||||
//
|
||||
|
||||
#define ICC_SRE_EL2_SRE (1 << 0)
|
||||
|
||||
|
@ -41,14 +41,6 @@ typedef enum {
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED,
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK,
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK,
|
||||
|
||||
// On some platforms, memory mapped flash region is designed as not supporting
|
||||
// shareable attribute, so WRITE_BACK_NONSHAREABLE is added for such special
|
||||
// need.
|
||||
// Do NOT use below two attributes if you are not sure.
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE,
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE,
|
||||
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH,
|
||||
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
|
||||
@ -558,12 +550,6 @@ ArmReadSctlr (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmWriteSctlr (
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmReadHVBar (
|
||||
@ -733,10 +719,4 @@ ArmWriteCntvOff (
|
||||
UINT64 Val
|
||||
);
|
||||
|
||||
UINTN
|
||||
EFIAPI
|
||||
ArmGetPhysicalAddressBits (
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // __ARM_LIB__
|
||||
|
@ -1,137 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_MTL_LIB_H_
|
||||
#define ARM_MTL_LIB_H_
|
||||
|
||||
#include <Uefi/UefiBaseType.h>
|
||||
|
||||
// Ideally we don't need packed struct. However we can't rely on compilers.
|
||||
#pragma pack(1)
|
||||
|
||||
typedef struct {
|
||||
UINT32 Reserved1;
|
||||
UINT32 ChannelStatus;
|
||||
UINT64 Reserved2;
|
||||
UINT32 Flags;
|
||||
UINT32 Length;
|
||||
UINT32 MessageHeader;
|
||||
|
||||
// NOTE: Since EDK2 does not allow flexible array member [] we declare
|
||||
// here array of 1 element length. However below is used as a variable
|
||||
// length array.
|
||||
UINT32 Payload[1]; // size less object gives offset to payload.
|
||||
} MTL_MAILBOX;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
// Channel Type, Low-priority, and High-priority
|
||||
typedef enum {
|
||||
MTL_CHANNEL_TYPE_LOW = 0,
|
||||
MTL_CHANNEL_TYPE_HIGH = 1
|
||||
} MTL_CHANNEL_TYPE;
|
||||
|
||||
typedef struct {
|
||||
UINT64 PhysicalAddress;
|
||||
UINT32 ModifyMask;
|
||||
UINT32 PreserveMask;
|
||||
} MTL_DOORBELL;
|
||||
|
||||
typedef struct {
|
||||
MTL_CHANNEL_TYPE ChannelType;
|
||||
MTL_MAILBOX * CONST MailBox;
|
||||
MTL_DOORBELL DoorBell;
|
||||
} MTL_CHANNEL;
|
||||
|
||||
/** Wait until channel is free.
|
||||
|
||||
@param[in] Channel Pointer to a channel.
|
||||
@param[in] TimeOutInMicroSeconds Time out in micro seconds.
|
||||
|
||||
@retval EFI_SUCCESS Channel is free.
|
||||
@retval EFI_TIMEOUT Time out error.
|
||||
**/
|
||||
EFI_STATUS
|
||||
MtlWaitUntilChannelFree (
|
||||
IN MTL_CHANNEL *Channel,
|
||||
IN UINTN TimeOutInMicroSeconds
|
||||
);
|
||||
|
||||
/** Return the address of the message payload.
|
||||
|
||||
@param[in] Channel Pointer to a channel.
|
||||
|
||||
@retval UINT32* Pointer to the payload.
|
||||
**/
|
||||
UINT32*
|
||||
MtlGetChannelPayload (
|
||||
IN MTL_CHANNEL *Channel
|
||||
);
|
||||
|
||||
/** Return pointer to a channel for the requested channel type.
|
||||
|
||||
@param[in] ChannelType ChannelType, Low or High priority channel.
|
||||
MTL_CHANNEL_TYPE_LOW or
|
||||
MTL_CHANNEL_TYPE_HIGH
|
||||
|
||||
@param[out] Channel Holds pointer to the channel.
|
||||
|
||||
@retval EFI_SUCCESS Pointer to channel is returned.
|
||||
@retval EFI_UNSUPPORTED Requested channel type not supported.
|
||||
**/
|
||||
EFI_STATUS
|
||||
MtlGetChannel (
|
||||
IN MTL_CHANNEL_TYPE ChannelType,
|
||||
OUT MTL_CHANNEL **Channel
|
||||
);
|
||||
|
||||
/** Mark the channel busy and ring the doorbell.
|
||||
|
||||
@param[in] Channel Pointer to a channel.
|
||||
@param[in] MessageHeader Message header.
|
||||
|
||||
@param[out] PayloadLength Message length.
|
||||
|
||||
@retval EFI_SUCCESS Message sent successfully.
|
||||
@retval EFI_DEVICE_ERROR Channel is busy.
|
||||
**/
|
||||
EFI_STATUS
|
||||
MtlSendMessage (
|
||||
IN MTL_CHANNEL *Channel,
|
||||
IN UINT32 MessageHeader,
|
||||
OUT UINT32 PayloadLength
|
||||
);
|
||||
|
||||
/** Wait for a response on a channel.
|
||||
|
||||
If channel is free after sending message, it implies SCP responded
|
||||
with a response on the channel.
|
||||
|
||||
@param[in] Channel Pointer to a channel.
|
||||
|
||||
@retval EFI_SUCCESS Message received successfully.
|
||||
@retval EFI_TIMEOUT Time out error.
|
||||
**/
|
||||
EFI_STATUS
|
||||
MtlReceiveMessage (
|
||||
IN MTL_CHANNEL *Channel,
|
||||
OUT UINT32 *MessageHeader,
|
||||
OUT UINT32 *PayloadLength
|
||||
);
|
||||
|
||||
#endif /* ARM_MTL_LIB_H_ */
|
||||
|
@ -1,46 +0,0 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2016 - 2017, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#ifndef __ARM_SVC_LIB__
|
||||
#define __ARM_SVC_LIB__
|
||||
|
||||
/**
|
||||
* The size of the SVC arguments are different between AArch64 and AArch32.
|
||||
* The native size is used for the arguments.
|
||||
*/
|
||||
typedef struct {
|
||||
UINTN Arg0;
|
||||
UINTN Arg1;
|
||||
UINTN Arg2;
|
||||
UINTN Arg3;
|
||||
UINTN Arg4;
|
||||
UINTN Arg5;
|
||||
UINTN Arg6;
|
||||
UINTN Arg7;
|
||||
} ARM_SVC_ARGS;
|
||||
|
||||
/**
|
||||
Trigger an SVC call
|
||||
|
||||
SVC calls can take up to 7 arguments and return up to 4 return values.
|
||||
Therefore, the 4 first fields in the ARM_SVC_ARGS structure are used
|
||||
for both input and output values.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmCallSvc (
|
||||
IN OUT ARM_SVC_ARGS *Args
|
||||
);
|
||||
|
||||
#endif
|
209
ArmPkg/Include/Library/BdsLib.h
Normal file
209
ArmPkg/Include/Library/BdsLib.h
Normal file
@ -0,0 +1,209 @@
|
||||
/** @file
|
||||
*
|
||||
* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#ifndef __BDS_ENTRY_H__
|
||||
#define __BDS_ENTRY_H__
|
||||
|
||||
/**
|
||||
This is defined by the UEFI specs, don't change it
|
||||
**/
|
||||
typedef struct {
|
||||
UINT16 LoadOptionIndex;
|
||||
EFI_LOAD_OPTION *LoadOption;
|
||||
UINTN LoadOptionSize;
|
||||
|
||||
UINT32 Attributes;
|
||||
UINT16 FilePathListLength;
|
||||
CHAR16 *Description;
|
||||
EFI_DEVICE_PATH_PROTOCOL *FilePathList;
|
||||
|
||||
VOID* OptionalData;
|
||||
UINTN OptionalDataSize;
|
||||
} BDS_LOAD_OPTION;
|
||||
|
||||
/**
|
||||
Connect a Device Path and return the handle of the driver that support this DevicePath
|
||||
|
||||
@param DevicePath Device Path of the File to connect
|
||||
@param Handle Handle of the driver that support this DevicePath
|
||||
@param RemainingDevicePath Remaining DevicePath nodes that do not match the driver DevicePath
|
||||
|
||||
@retval EFI_SUCCESS A driver that matches the Device Path has been found
|
||||
@retval EFI_NOT_FOUND No handles match the search.
|
||||
@retval EFI_INVALID_PARAMETER DevicePath or Handle is NULL
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
BdsConnectDevicePath (
|
||||
IN EFI_DEVICE_PATH_PROTOCOL* DevicePath,
|
||||
OUT EFI_HANDLE *Handle,
|
||||
OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath
|
||||
);
|
||||
|
||||
/**
|
||||
Connect all DXE drivers
|
||||
|
||||
@retval EFI_SUCCESS All drivers have been connected
|
||||
@retval EFI_NOT_FOUND No handles match the search.
|
||||
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
BdsConnectAllDrivers (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Return the value of a global variable defined by its VariableName.
|
||||
The variable must be defined with the VendorGuid gEfiGlobalVariableGuid.
|
||||
|
||||
@param VariableName A Null-terminated string that is the name of the vendor's
|
||||
variable.
|
||||
@param DefaultValue Value returned by the function if the variable does not exist
|
||||
@param DataSize On input, the size in bytes of the return Data buffer.
|
||||
On output the size of data returned in Data.
|
||||
@param Value Value read from the UEFI Variable or copy of the default value
|
||||
if the UEFI Variable does not exist
|
||||
|
||||
@retval EFI_SUCCESS All drivers have been connected
|
||||
@retval EFI_NOT_FOUND No handles match the search.
|
||||
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
GetGlobalEnvironmentVariable (
|
||||
IN CONST CHAR16* VariableName,
|
||||
IN VOID* DefaultValue,
|
||||
IN OUT UINTN* Size,
|
||||
OUT VOID** Value
|
||||
);
|
||||
|
||||
/**
|
||||
Return the value of the variable defined by its VariableName and VendorGuid
|
||||
|
||||
@param VariableName A Null-terminated string that is the name of the vendor's
|
||||
variable.
|
||||
@param VendorGuid A unique identifier for the vendor.
|
||||
@param DefaultValue Value returned by the function if the variable does not exist
|
||||
@param DataSize On input, the size in bytes of the return Data buffer.
|
||||
On output the size of data returned in Data.
|
||||
@param Value Value read from the UEFI Variable or copy of the default value
|
||||
if the UEFI Variable does not exist
|
||||
|
||||
@retval EFI_SUCCESS All drivers have been connected
|
||||
@retval EFI_NOT_FOUND No handles match the search.
|
||||
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
GetEnvironmentVariable (
|
||||
IN CONST CHAR16* VariableName,
|
||||
IN EFI_GUID* VendorGuid,
|
||||
IN VOID* DefaultValue,
|
||||
IN OUT UINTN* Size,
|
||||
OUT VOID** Value
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
BootOptionFromLoadOptionIndex (
|
||||
IN UINT16 LoadOptionIndex,
|
||||
OUT BDS_LOAD_OPTION** BdsLoadOption
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
BootOptionFromLoadOptionVariable (
|
||||
IN CHAR16* BootVariableName,
|
||||
OUT BDS_LOAD_OPTION** BdsLoadOption
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
BootOptionToLoadOptionVariable (
|
||||
IN BDS_LOAD_OPTION* BdsLoadOption
|
||||
);
|
||||
|
||||
UINT16
|
||||
BootOptionAllocateBootIndex (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Start an EFI Application from a Device Path
|
||||
|
||||
@param ParentImageHandle Handle of the calling image
|
||||
@param DevicePath Location of the EFI Application
|
||||
|
||||
@retval EFI_SUCCESS All drivers have been connected
|
||||
@retval EFI_NOT_FOUND The Linux kernel Device Path has not been found
|
||||
@retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
BdsStartEfiApplication (
|
||||
IN EFI_HANDLE ParentImageHandle,
|
||||
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
|
||||
IN UINTN LoadOptionsSize,
|
||||
IN VOID* LoadOptions
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
BdsLoadImage (
|
||||
IN EFI_DEVICE_PATH *DevicePath,
|
||||
IN EFI_ALLOCATE_TYPE Type,
|
||||
IN OUT EFI_PHYSICAL_ADDRESS* Image,
|
||||
OUT UINTN *FileSize
|
||||
);
|
||||
|
||||
/**
|
||||
* Call BS.ExitBootServices with the appropriate Memory Map information
|
||||
*/
|
||||
EFI_STATUS
|
||||
ShutdownUefiBootServices (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Locate an EFI application in a the Firmware Volumes by its name
|
||||
|
||||
@param EfiAppGuid Guid of the EFI Application into the Firmware Volume
|
||||
@param DevicePath EFI Device Path of the EFI application
|
||||
|
||||
@return EFI_SUCCESS The function completed successfully.
|
||||
@return EFI_NOT_FOUND The protocol could not be located.
|
||||
@return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
LocateEfiApplicationInFvByName (
|
||||
IN CONST CHAR16* EfiAppName,
|
||||
OUT EFI_DEVICE_PATH **DevicePath
|
||||
);
|
||||
|
||||
/**
|
||||
Locate an EFI application in a the Firmware Volumes by its GUID
|
||||
|
||||
@param EfiAppGuid Guid of the EFI Application into the Firmware Volume
|
||||
@param DevicePath EFI Device Path of the EFI application
|
||||
|
||||
@return EFI_SUCCESS The function completed successfully.
|
||||
@return EFI_NOT_FOUND The protocol could not be located.
|
||||
@return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
LocateEfiApplicationInFvByGuid (
|
||||
IN CONST EFI_GUID *EfiAppGuid,
|
||||
OUT EFI_DEVICE_PATH **DevicePath
|
||||
);
|
||||
|
||||
#endif
|
@ -1,123 +0,0 @@
|
||||
/** @file
|
||||
OP-TEE specific header file.
|
||||
|
||||
Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _OPTEE_H_
|
||||
#define _OPTEE_H_
|
||||
|
||||
/*
|
||||
* The 'Trusted OS Call UID' is supposed to return the following UUID for
|
||||
* OP-TEE OS. This is a 128-bit value.
|
||||
*/
|
||||
#define OPTEE_OS_UID0 0x384fb3e0
|
||||
#define OPTEE_OS_UID1 0xe7f811e3
|
||||
#define OPTEE_OS_UID2 0xaf630002
|
||||
#define OPTEE_OS_UID3 0xa5d5c51b
|
||||
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_NONE 0x0
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INPUT 0x1
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_OUTPUT 0x2
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_VALUE_INOUT 0x3
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INPUT 0x9
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_OUTPUT 0xa
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MEMORY_INOUT 0xb
|
||||
|
||||
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK 0xff
|
||||
|
||||
#define OPTEE_SUCCESS 0x00000000
|
||||
#define OPTEE_ORIGIN_COMMUNICATION 0x00000002
|
||||
#define OPTEE_ERROR_COMMUNICATION 0xFFFF000E
|
||||
|
||||
typedef struct {
|
||||
UINT64 BufferAddress;
|
||||
UINT64 Size;
|
||||
UINT64 SharedMemoryReference;
|
||||
} OPTEE_MESSAGE_PARAM_MEMORY;
|
||||
|
||||
typedef struct {
|
||||
UINT64 A;
|
||||
UINT64 B;
|
||||
UINT64 C;
|
||||
} OPTEE_MESSAGE_PARAM_VALUE;
|
||||
|
||||
typedef struct {
|
||||
UINT64 Attribute;
|
||||
union {
|
||||
OPTEE_MESSAGE_PARAM_MEMORY Memory;
|
||||
OPTEE_MESSAGE_PARAM_VALUE Value;
|
||||
} Union;
|
||||
} OPTEE_MESSAGE_PARAM;
|
||||
|
||||
#define OPTEE_MAX_CALL_PARAMS 4
|
||||
|
||||
typedef struct {
|
||||
UINT32 Command;
|
||||
UINT32 Function;
|
||||
UINT32 Session;
|
||||
UINT32 CancelId;
|
||||
UINT32 Pad;
|
||||
UINT32 Return;
|
||||
UINT32 ReturnOrigin;
|
||||
UINT32 NumParams;
|
||||
|
||||
// NumParams tells the actual number of element in Params
|
||||
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS];
|
||||
} OPTEE_MESSAGE_ARG;
|
||||
|
||||
typedef struct {
|
||||
EFI_GUID Uuid; // [in] GUID/UUID of the Trusted Application
|
||||
UINT32 Session; // [out] Session id
|
||||
UINT32 Return; // [out] Return value
|
||||
UINT32 ReturnOrigin; // [out] Origin of the return value
|
||||
} OPTEE_OPEN_SESSION_ARG;
|
||||
|
||||
typedef struct {
|
||||
UINT32 Function; // [in] Trusted Application function, specific to the TA
|
||||
UINT32 Session; // [in] Session id
|
||||
UINT32 Return; // [out] Return value
|
||||
UINT32 ReturnOrigin; // [out] Origin of the return value
|
||||
OPTEE_MESSAGE_PARAM Params[OPTEE_MAX_CALL_PARAMS]; // Params for function to be invoked
|
||||
} OPTEE_INVOKE_FUNCTION_ARG;
|
||||
|
||||
BOOLEAN
|
||||
EFIAPI
|
||||
IsOpteePresent (
|
||||
VOID
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
OpteeInit (
|
||||
VOID
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
OpteeOpenSession (
|
||||
IN OUT OPTEE_OPEN_SESSION_ARG *OpenSessionArg
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
OpteeCloseSession (
|
||||
IN UINT32 Session
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
OpteeInvokeFunction (
|
||||
IN OUT OPTEE_INVOKE_FUNCTION_ARG *InvokeFunctionArg
|
||||
);
|
||||
|
||||
#endif
|
@ -1,42 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2018, ARM Ltd. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __STANDALONEMM_MMU_LIB__
|
||||
#define __STANDALONEMM_MMU_LIB__
|
||||
|
||||
EFI_STATUS
|
||||
ArmSetMemoryRegionNoExec (
|
||||
IN EFI_PHYSICAL_ADDRESS BaseAddress,
|
||||
IN UINT64 Length
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
ArmClearMemoryRegionNoExec (
|
||||
IN EFI_PHYSICAL_ADDRESS BaseAddress,
|
||||
IN UINT64 Length
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
ArmSetMemoryRegionReadOnly (
|
||||
IN EFI_PHYSICAL_ADDRESS BaseAddress,
|
||||
IN UINT64 Length
|
||||
);
|
||||
|
||||
EFI_STATUS
|
||||
ArmClearMemoryRegionReadOnly (
|
||||
IN EFI_PHYSICAL_ADDRESS BaseAddress,
|
||||
IN UINT64 Length
|
||||
);
|
||||
|
||||
#endif /* __STANDALONEMM_MMU_LIB__ */
|
665
ArmPkg/Include/Library/UncachedMemoryAllocationLib.h
Normal file
665
ArmPkg/Include/Library/UncachedMemoryAllocationLib.h
Normal file
@ -0,0 +1,665 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __UNCACHED_MEMORY_ALLOCATION_LIB_H__
|
||||
#define __UNCACHED_MEMORY_ALLOCATION_LIB_H__
|
||||
|
||||
/**
|
||||
Converts a cached or uncached address to a physical address suitable for use in SoC registers.
|
||||
|
||||
@param VirtualAddress The pointer to convert.
|
||||
|
||||
@return The physical address of the supplied virtual pointer.
|
||||
|
||||
**/
|
||||
EFI_PHYSICAL_ADDRESS
|
||||
ConvertToPhysicalAddress (
|
||||
IN VOID *VirtualAddress
|
||||
);
|
||||
|
||||
/**
|
||||
Converts a cached or uncached address to a cached address.
|
||||
|
||||
@param Address The pointer to convert.
|
||||
|
||||
@return The address of the cached memory location corresponding to the input address.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
ConvertToCachedAddress (
|
||||
IN VOID *Address
|
||||
);
|
||||
|
||||
/**
|
||||
Converts a cached or uncached address to an uncached address.
|
||||
|
||||
@param Address The pointer to convert.
|
||||
|
||||
@return The address of the uncached memory location corresponding to the input address.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
ConvertToUncachedAddress (
|
||||
IN VOID *Address
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiBootServicesData.
|
||||
|
||||
Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the
|
||||
allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
|
||||
is returned. If there is not enough memory remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocatePages (
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiRuntimeServicesData.
|
||||
|
||||
Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
|
||||
allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
|
||||
is returned. If there is not enough memory remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateRuntimePages (
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiReservedMemoryType.
|
||||
|
||||
Allocates the number of 4KB pages of type EfiReservedMemoryType and returns a pointer to the
|
||||
allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
|
||||
is returned. If there is not enough memory remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateReservedPages (
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
/**
|
||||
Frees one or more 4KB pages that were previously allocated with one of the page allocation
|
||||
functions in the Memory Allocation Library.
|
||||
|
||||
Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer
|
||||
must have been allocated on a previous call to the page allocation services of the Memory
|
||||
Allocation Library.
|
||||
If Buffer was not allocated with a page allocation function in the Memory Allocation Library,
|
||||
then ASSERT().
|
||||
If Pages is zero, then ASSERT().
|
||||
|
||||
@param Buffer Pointer to the buffer of pages to free.
|
||||
@param Pages The number of 4 KB pages to free.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
UncachedFreePages (
|
||||
IN VOID *Buffer,
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiBootServicesData at a specified alignment.
|
||||
|
||||
Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
|
||||
returned. If there is not enough memory at the specified alignment remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedPages (
|
||||
IN UINTN Pages,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiRuntimeServicesData at a specified alignment.
|
||||
|
||||
Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
|
||||
returned. If there is not enough memory at the specified alignment remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedRuntimePages (
|
||||
IN UINTN Pages,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.
|
||||
|
||||
Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is
|
||||
returned. If there is not enough memory at the specified alignment remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param Pages The number of 4 KB pages to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedReservedPages (
|
||||
IN UINTN Pages,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Frees one or more 4KB pages that were previously allocated with one of the aligned page
|
||||
allocation functions in the Memory Allocation Library.
|
||||
|
||||
Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer
|
||||
must have been allocated on a previous call to the aligned page allocation services of the Memory
|
||||
Allocation Library.
|
||||
If Buffer was not allocated with an aligned page allocation function in the Memory Allocation
|
||||
Library, then ASSERT().
|
||||
If Pages is zero, then ASSERT().
|
||||
|
||||
@param Buffer Pointer to the buffer of pages to free.
|
||||
@param Pages The number of 4 KB pages to free.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
UncachedFreeAlignedPages (
|
||||
IN VOID *Buffer,
|
||||
IN UINTN Pages
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfiBootServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData and returns a
|
||||
pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
|
||||
returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocatePool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfiRuntimeServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData and returns
|
||||
a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
|
||||
returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateRuntimePool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfieservedMemoryType.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType and returns
|
||||
a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is
|
||||
returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateReservedPool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfiBootServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the
|
||||
buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
|
||||
valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateZeroPool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfiRuntimeServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, clears the
|
||||
buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
|
||||
valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateRuntimeZeroPool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfiReservedMemoryType.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, clears the
|
||||
buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a
|
||||
valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the
|
||||
request, then NULL is returned.
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateReservedZeroPool (
|
||||
IN UINTN AllocationSize
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiBootServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, copies
|
||||
AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
If Buffer is NULL, then ASSERT().
|
||||
If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, copies
|
||||
AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
If Buffer is NULL, then ASSERT().
|
||||
If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateRuntimeCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiReservedMemoryType.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, copies
|
||||
AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory remaining to satisfy the request, then NULL is returned.
|
||||
If Buffer is NULL, then ASSERT().
|
||||
If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate and zero.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateReservedCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer
|
||||
);
|
||||
|
||||
/**
|
||||
Frees a buffer that was previously allocated with one of the pool allocation functions in the
|
||||
Memory Allocation Library.
|
||||
|
||||
Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the
|
||||
pool allocation services of the Memory Allocation Library.
|
||||
If Buffer was not allocated with a pool allocation function in the Memory Allocation Library,
|
||||
then ASSERT().
|
||||
|
||||
@param Buffer Pointer to the buffer to free.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
UncachedFreePool (
|
||||
IN VOID *Buffer
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfiBootServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedRuntimePool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates a buffer of type EfieservedMemoryType at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedReservedPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an
|
||||
alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedZeroPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an
|
||||
alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedRuntimeZeroPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Allocates and zeros a buffer of type EfieservedMemoryType at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an
|
||||
alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the
|
||||
allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there
|
||||
is not enough memory at the specified alignment remaining to satisfy the request, then NULL is
|
||||
returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedReservedZeroPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiBootServicesData type with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData type with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedRuntimeCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
|
||||
|
||||
Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType type with an
|
||||
alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,
|
||||
then a valid buffer of 0 size is returned. If there is not enough memory at the specified
|
||||
alignment remaining to satisfy the request, then NULL is returned.
|
||||
If Alignment is not a power of two and Alignment is not zero, then ASSERT().
|
||||
|
||||
@param AllocationSize The number of bytes to allocate.
|
||||
@param Buffer The buffer to copy to the allocated buffer.
|
||||
@param Alignment The requested alignment of the allocation. Must be a power of two.
|
||||
If Alignment is zero, then byte alignment is used.
|
||||
|
||||
@return A pointer to the allocated buffer or NULL if allocation fails.
|
||||
|
||||
**/
|
||||
VOID *
|
||||
EFIAPI
|
||||
UncachedAllocateAlignedReservedCopyPool (
|
||||
IN UINTN AllocationSize,
|
||||
IN CONST VOID *Buffer,
|
||||
IN UINTN Alignment
|
||||
);
|
||||
|
||||
/**
|
||||
Frees a buffer that was previously allocated with one of the aligned pool allocation functions
|
||||
in the Memory Allocation Library.
|
||||
|
||||
Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the
|
||||
aligned pool allocation services of the Memory Allocation Library.
|
||||
If Buffer was not allocated with an aligned pool allocation function in the Memory Allocation
|
||||
Library, then ASSERT().
|
||||
|
||||
@param Buffer Pointer to the buffer to free.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
UncachedFreeAlignedPool (
|
||||
IN VOID *Buffer
|
||||
);
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
UncachedSafeFreePool (
|
||||
IN VOID *Buffer
|
||||
);
|
||||
|
||||
#endif // __UNCACHED_MEMORY_ALLOCATION_LIB_H__
|
@ -1,27 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_H_
|
||||
#define ARM_SCMI_H_
|
||||
|
||||
/* As per SCMI specification, maximum allowed ASCII string length
|
||||
for various return values/parameters of a SCMI message.
|
||||
*/
|
||||
#define SCMI_MAX_STR_LEN 16
|
||||
|
||||
#endif /* ARM_SCMI_H_ */
|
||||
|
@ -1,174 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_BASE_PROTOCOL_H_
|
||||
#define ARM_SCMI_BASE_PROTOCOL_H_
|
||||
|
||||
#include <Protocol/ArmScmi.h>
|
||||
|
||||
#define BASE_PROTOCOL_VERSION 0x10000
|
||||
|
||||
#define NUM_PROTOCOL_MASK 0xFFU
|
||||
#define NUM_AGENT_MASK 0xFFU
|
||||
|
||||
#define NUM_AGENT_SHIFT 0x8
|
||||
|
||||
/** Returns total number of protocols that are
|
||||
implemented (excluding the Base protocol)
|
||||
*/
|
||||
#define SCMI_TOTAL_PROTOCOLS(Attr) (Attr & NUM_PROTOCOL_MASK)
|
||||
|
||||
// Returns total number of agents in the system.
|
||||
#define SCMI_TOTAL_AGENTS(Attr) ((Attr >> NUM_AGENT_SHIFT) & NUM_AGENT_MASK)
|
||||
|
||||
#define ARM_SCMI_BASE_PROTOCOL_GUID { \
|
||||
0xd7e5abe9, 0x33ab, 0x418e, {0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f} \
|
||||
}
|
||||
|
||||
extern EFI_GUID gArmScmiBaseProtocolGuid;
|
||||
|
||||
typedef struct _SCMI_BASE_PROTOCOL SCMI_BASE_PROTOCOL;
|
||||
|
||||
/** Return version of the Base protocol supported by SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI Base protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version of the protocol is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_GET_VERSION) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
);
|
||||
|
||||
/** Return total number of SCMI protocols supported by the SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] TotalProtocols Total number of SCMI protocols supported.
|
||||
|
||||
@retval EFI_SUCCESS Total number of protocols supported are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *TotalProtocols
|
||||
);
|
||||
|
||||
/** Return vendor name.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] VendorIdentifier Null terminated ASCII string of up to
|
||||
16 bytes with a vendor name.
|
||||
|
||||
@retval EFI_SUCCESS VendorIdentifier is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_DISCOVER_VENDOR) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
|
||||
);
|
||||
|
||||
/** Return sub vendor name.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] VendorIdentifier Null terminated ASCII string of up to
|
||||
16 bytes with a vendor name.
|
||||
|
||||
@retval EFI_SUCCESS VendorIdentifier is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
|
||||
);
|
||||
|
||||
/** Return implementation version.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] ImplementationVersion Vendor specific implementation version.
|
||||
|
||||
@retval EFI_SUCCESS Implementation version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
OUT UINT32 *ImplementationVersion
|
||||
);
|
||||
|
||||
/** Return list of protocols.
|
||||
|
||||
@param[in] This A Pointer to SCMI_BASE_PROTOCOL Instance.
|
||||
|
||||
@param[out] ProtocolListSize Size of the ProtocolList.
|
||||
|
||||
@param[out] ProtocolList Protocol list.
|
||||
|
||||
@retval EFI_SUCCESS List of protocols is returned.
|
||||
@retval EFI_BUFFER_TOO_SMALL ProtocolListSize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval EFI_DEVICE_ERROR SCP returns a SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS) (
|
||||
IN SCMI_BASE_PROTOCOL *This,
|
||||
IN OUT UINT32 *ProtocolListSize,
|
||||
OUT UINT8 *ProtocolList
|
||||
);
|
||||
|
||||
// Base protocol.
|
||||
typedef struct _SCMI_BASE_PROTOCOL {
|
||||
SCMI_BASE_GET_VERSION GetVersion;
|
||||
SCMI_BASE_GET_TOTAL_PROTOCOLS GetTotalProtocols;
|
||||
SCMI_BASE_DISCOVER_VENDOR DiscoverVendor;
|
||||
SCMI_BASE_DISCOVER_SUB_VENDOR DiscoverSubVendor;
|
||||
SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION DiscoverImplementationVersion;
|
||||
SCMI_BASE_DISCOVER_LIST_PROTOCOLS DiscoverListProtocols;
|
||||
} SCMI_BASE_PROTOCOL;
|
||||
|
||||
// SCMI Message IDs for Base protocol.
|
||||
typedef enum {
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_VENDOR = 0x3,
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_SUB_VENDOR = 0x4,
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_IMPLEMENTATION_VERSION = 0x5,
|
||||
SCMI_MESSAGE_ID_BASE_DISCOVER_LIST_PROTOCOLS = 0x6
|
||||
} SCMI_MESSAGE_ID_BASE;
|
||||
|
||||
#endif /* ARM_SCMI_BASE_PROTOCOL_H_ */
|
||||
|
@ -1,197 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_CLOCK2_PROTOCOL_H_
|
||||
#define ARM_SCMI_CLOCK2_PROTOCOL_H_
|
||||
|
||||
#include <Protocol/ArmScmi.h>
|
||||
#include <Protocol/ArmScmiClockProtocol.h>
|
||||
|
||||
#define ARM_SCMI_CLOCK2_PROTOCOL_GUID { \
|
||||
0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } \
|
||||
}
|
||||
|
||||
extern EFI_GUID gArmScmiClock2ProtocolGuid;
|
||||
|
||||
#define SCMI_CLOCK2_PROTOCOL_VERSION 1
|
||||
|
||||
typedef struct _SCMI_CLOCK2_PROTOCOL SCMI_CLOCK2_PROTOCOL;
|
||||
|
||||
// Protocol Interface functions.
|
||||
|
||||
/** Return version of the clock management protocol supported by SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI Clock management protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_GET_VERSION) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
);
|
||||
|
||||
/** Return total number of clock devices supported by the clock management
|
||||
protocol.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
|
||||
@param[out] TotalClocks Total number of clocks supported.
|
||||
|
||||
@retval EFI_SUCCESS Total number of clocks supported is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
OUT UINT32 *TotalClocks
|
||||
);
|
||||
|
||||
/** Return attributes of a clock device.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Enabled If TRUE, the clock device is enabled.
|
||||
@param[out] ClockAsciiName A NULL terminated ASCII string with the clock
|
||||
name, of up to 16 bytes.
|
||||
|
||||
@retval EFI_SUCCESS Clock device attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT BOOLEAN *Enabled,
|
||||
OUT CHAR8 *ClockAsciiName
|
||||
);
|
||||
|
||||
/** Return list of rates supported by a given clock device.
|
||||
|
||||
@param[in] This A pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
|
||||
supports range of clock rates which are non-linear.
|
||||
|
||||
SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
|
||||
range of linear clock rates from Min to Max in steps.
|
||||
|
||||
@param[out] TotalRates Total number of rates.
|
||||
|
||||
@param[in,out] RateArraySize Size of the RateArray.
|
||||
|
||||
@param[out] RateArray List of clock rates.
|
||||
|
||||
@retval EFI_SUCCESS List of clock rates are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT SCMI_CLOCK_RATE_FORMAT *Format,
|
||||
OUT UINT32 *TotalRates,
|
||||
IN OUT UINT32 *RateArraySize,
|
||||
OUT SCMI_CLOCK_RATE *RateArray
|
||||
);
|
||||
|
||||
/** Get clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_RATE_GET) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT UINT64 *Rate
|
||||
);
|
||||
|
||||
/** Set clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
@param[in] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate set success.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_RATE_SET) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
IN UINT64 Rate
|
||||
);
|
||||
|
||||
/** Enable/Disable specified clock.
|
||||
Function is only available under gArmScmiClock2ProtocolGuid
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
@param[in] Enable TRUE to enable, FALSE to disable.
|
||||
|
||||
@retval EFI_SUCCESS Clock enable/disable successful.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK2_ENABLE) (
|
||||
IN SCMI_CLOCK2_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
IN BOOLEAN Enable
|
||||
);
|
||||
|
||||
typedef struct _SCMI_CLOCK2_PROTOCOL {
|
||||
SCMI_CLOCK2_GET_VERSION GetVersion;
|
||||
SCMI_CLOCK2_GET_TOTAL_CLOCKS GetTotalClocks;
|
||||
SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES GetClockAttributes;
|
||||
SCMI_CLOCK2_DESCRIBE_RATES DescribeRates;
|
||||
SCMI_CLOCK2_RATE_GET RateGet;
|
||||
SCMI_CLOCK2_RATE_SET RateSet;
|
||||
|
||||
// Extension to original ClockProtocol, added here so SCMI_CLOCK2_PROTOCOL
|
||||
// can be cast to SCMI_CLOCK_PROTOCOL
|
||||
UINTN Version; // For future expandability
|
||||
SCMI_CLOCK2_ENABLE Enable;
|
||||
} SCMI_CLOCK2_PROTOCOL;
|
||||
|
||||
#endif /* ARM_SCMI_CLOCK2_PROTOCOL_H_ */
|
@ -1,218 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_CLOCK_PROTOCOL_H_
|
||||
#define ARM_SCMI_CLOCK_PROTOCOL_H_
|
||||
|
||||
#include <Protocol/ArmScmi.h>
|
||||
|
||||
#define ARM_SCMI_CLOCK_PROTOCOL_GUID { \
|
||||
0x91ce67a8, 0xe0aa, 0x4012, {0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa} \
|
||||
}
|
||||
|
||||
extern EFI_GUID gArmScmiClockProtocolGuid;
|
||||
|
||||
// Message Type for clock management protocol.
|
||||
typedef enum {
|
||||
SCMI_MESSAGE_ID_CLOCK_ATTRIBUTES = 0x3,
|
||||
SCMI_MESSAGE_ID_CLOCK_DESCRIBE_RATES = 0x4,
|
||||
SCMI_MESSAGE_ID_CLOCK_RATE_SET = 0x5,
|
||||
SCMI_MESSAGE_ID_CLOCK_RATE_GET = 0x6,
|
||||
SCMI_MESSAGE_ID_CLOCK_CONFIG_SET = 0x7
|
||||
} SCMI_MESSAGE_ID_CLOCK;
|
||||
|
||||
typedef enum {
|
||||
SCMI_CLOCK_RATE_FORMAT_DISCRETE, // Non-linear range.
|
||||
SCMI_CLOCK_RATE_FORMAT_LINEAR // Linear range.
|
||||
} SCMI_CLOCK_RATE_FORMAT;
|
||||
|
||||
// Clock management protocol version.
|
||||
#define SCMI_CLOCK_PROTOCOL_VERSION 0x10000
|
||||
|
||||
#define SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_MASK 0xFFU
|
||||
#define SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_SHIFT 16
|
||||
#define SCMI_CLOCK_PROTOCOL_NUM_CLOCKS_MASK 0xFFFFU
|
||||
|
||||
/** Total number of pending asynchronous clock rates changes
|
||||
supported by the SCP, Attr Bits[23:16]
|
||||
*/
|
||||
#define SCMI_CLOCK_PROTOCOL_MAX_ASYNC_CLK_RATES(Attr) ( \
|
||||
(Attr >> SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_SHIFT) && \
|
||||
SCMI_CLOCK_PROTOCOL_PENDING_ASYNC_RATES_MASK)
|
||||
|
||||
// Total of clock devices supported by the SCP, Attr Bits[15:0]
|
||||
#define SCMI_CLOCK_PROTOCOL_TOTAL_CLKS(Attr) (Attr & SCMI_CLOCK_PROTOCOL_NUM_CLOCKS_MASK)
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
/* Depending on the format (linear/non-linear) supported by a clock device
|
||||
either Rate or Min/Max/Step triplet is valid.
|
||||
*/
|
||||
typedef struct {
|
||||
union {
|
||||
UINT64 Min;
|
||||
UINT64 Rate;
|
||||
};
|
||||
UINT64 Max;
|
||||
UINT64 Step;
|
||||
} SCMI_CLOCK_RATE;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
typedef struct _SCMI_CLOCK_PROTOCOL SCMI_CLOCK_PROTOCOL;
|
||||
|
||||
// Protocol Interface functions.
|
||||
|
||||
/** Return version of the clock management protocol supported by SCP firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI Clock management protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_GET_VERSION) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
);
|
||||
|
||||
/** Return total number of clock devices supported by the clock management
|
||||
protocol.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
|
||||
@param[out] TotalClocks Total number of clocks supported.
|
||||
|
||||
@retval EFI_SUCCESS Total number of clocks supported is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
OUT UINT32 *TotalClocks
|
||||
);
|
||||
|
||||
/** Return attributes of a clock device.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Enabled If TRUE, the clock device is enabled.
|
||||
@param[out] ClockAsciiName A NULL terminated ASCII string with the clock
|
||||
name, of up to 16 bytes.
|
||||
|
||||
@retval EFI_SUCCESS Clock device attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT BOOLEAN *Enabled,
|
||||
OUT CHAR8 *ClockAsciiName
|
||||
);
|
||||
|
||||
/** Return list of rates supported by a given clock device.
|
||||
|
||||
@param[in] This A pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
|
||||
supports range of clock rates which are non-linear.
|
||||
|
||||
SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
|
||||
range of linear clock rates from Min to Max in steps.
|
||||
|
||||
@param[out] TotalRates Total number of rates.
|
||||
|
||||
@param[in,out] RateArraySize Size of the RateArray.
|
||||
|
||||
@param[out] RateArray List of clock rates.
|
||||
|
||||
@retval EFI_SUCCESS List of clock rates are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT SCMI_CLOCK_RATE_FORMAT *Format,
|
||||
OUT UINT32 *TotalRates,
|
||||
IN OUT UINT32 *RateArraySize,
|
||||
OUT SCMI_CLOCK_RATE *RateArray
|
||||
);
|
||||
|
||||
/** Get clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
|
||||
@param[out] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_RATE_GET) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
OUT UINT64 *Rate
|
||||
);
|
||||
|
||||
/** Set clock rate.
|
||||
|
||||
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
|
||||
@param[in] ClockId Identifier for the clock device.
|
||||
@param[in] Rate Clock rate.
|
||||
|
||||
@retval EFI_SUCCESS Clock rate set success.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_CLOCK_RATE_SET) (
|
||||
IN SCMI_CLOCK_PROTOCOL *This,
|
||||
IN UINT32 ClockId,
|
||||
IN UINT64 Rate
|
||||
);
|
||||
|
||||
typedef struct _SCMI_CLOCK_PROTOCOL {
|
||||
SCMI_CLOCK_GET_VERSION GetVersion;
|
||||
SCMI_CLOCK_GET_TOTAL_CLOCKS GetTotalClocks;
|
||||
SCMI_CLOCK_GET_CLOCK_ATTRIBUTES GetClockAttributes;
|
||||
SCMI_CLOCK_DESCRIBE_RATES DescribeRates;
|
||||
SCMI_CLOCK_RATE_GET RateGet;
|
||||
SCMI_CLOCK_RATE_SET RateSet;
|
||||
} SCMI_CLOCK_PROTOCOL;
|
||||
|
||||
#endif /* ARM_SCMI_CLOCK_PROTOCOL_H_ */
|
||||
|
@ -1,265 +0,0 @@
|
||||
/** @file
|
||||
|
||||
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
System Control and Management Interface V1.0
|
||||
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
|
||||
DEN0056A_System_Control_and_Management_Interface.pdf
|
||||
**/
|
||||
|
||||
#ifndef ARM_SCMI_PERFORMANCE_PROTOCOL_H_
|
||||
#define ARM_SCMI_PERFORMANCE_PROTOCOL_H_
|
||||
|
||||
#include <Protocol/ArmScmi.h>
|
||||
|
||||
#define PERFORMANCE_PROTOCOL_VERSION 0x10000
|
||||
|
||||
#define ARM_SCMI_PERFORMANCE_PROTOCOL_GUID { \
|
||||
0x9b8ba84, 0x3dd3, 0x49a6, {0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad} \
|
||||
}
|
||||
|
||||
extern EFI_GUID gArmScmiPerformanceProtocolGuid;
|
||||
|
||||
typedef struct _SCMI_PERFORMANCE_PROTOCOL SCMI_PERFORMANCE_PROTOCOL;
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
#define POWER_IN_MW_SHIFT 16
|
||||
#define POWER_IN_MW_MASK 0x1
|
||||
#define NUM_PERF_DOMAINS_MASK 0xFFFF
|
||||
|
||||
// Total number of performance domains, Attr Bits [15:0]
|
||||
#define SCMI_PERF_TOTAL_DOMAINS(Attr) (Attr & NUM_PERF_DOMAINS_MASK)
|
||||
|
||||
// A flag to express power values in mW or platform specific way, Attr Bit [16]
|
||||
#define SCMI_PERF_POWER_IN_MW(Attr) ((Attr >> POWER_IN_MW_SHIFT) & \
|
||||
POWER_IN_MW_MASK)
|
||||
|
||||
// Performance protocol attributes return values.
|
||||
typedef struct {
|
||||
UINT32 Attributes;
|
||||
UINT64 StatisticsAddress;
|
||||
UINT32 StatisticsLen;
|
||||
} SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES;
|
||||
|
||||
#define SCMI_PERF_SUPPORT_LVL_CHANGE_NOTIFY(Attr) ((Attr >> 28) & 0x1)
|
||||
#define SCMI_PERF_SUPPORT_LIM_CHANGE_NOTIFY(Attr) ((Attr >> 29) & 0x1)
|
||||
#define SCMI_PERF_SUPPORT_SET_LVL(Attr) ((Attr >> 30) & 0x1)
|
||||
#define SCMI_PERF_SUPPORT_SET_LIM(Attr) ((Attr >> 31) & 0x1)
|
||||
#define SCMI_PERF_RATE_LIMIT(RateLimit) (RateLimit & 0xFFF)
|
||||
|
||||
// Performance protocol domain attributes.
|
||||
typedef struct {
|
||||
UINT32 Attributes;
|
||||
UINT32 RateLimit;
|
||||
UINT32 SustainedFreq;
|
||||
UINT32 SustainedPerfLevel;
|
||||
UINT8 Name[SCMI_MAX_STR_LEN];
|
||||
} SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES;
|
||||
|
||||
// Worst case latency in microseconds, Bits[15:0]
|
||||
#define PERF_LATENCY_MASK 0xFFFF
|
||||
#define SCMI_PERFORMANCE_PROTOCOL_LATENCY(Latency) (Latency & PERF_LATENCY_MASK)
|
||||
|
||||
// Performance protocol performance level.
|
||||
typedef struct {
|
||||
UINT32 Level;
|
||||
UINT32 PowerCost;
|
||||
UINT32 Latency;
|
||||
} SCMI_PERFORMANCE_LEVEL;
|
||||
|
||||
// Performance protocol performance limit.
|
||||
typedef struct {
|
||||
UINT32 RangeMax;
|
||||
UINT32 RangeMin;
|
||||
} SCMI_PERFORMANCE_LIMITS;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/** Return version of the performance management protocol supported by SCP.
|
||||
firmware.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Version Version of the supported SCMI performance management
|
||||
protocol.
|
||||
|
||||
@retval EFI_SUCCESS The version is returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_GET_VERSION) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
OUT UINT32 *Version
|
||||
);
|
||||
|
||||
/** Return protocol attributes of the performance management protocol.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
|
||||
@param[out] Attributes Protocol attributes.
|
||||
|
||||
@retval EFI_SUCCESS Protocol attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
|
||||
|
||||
);
|
||||
|
||||
/** Return performance domain attributes.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Attributes Performance domain attributes.
|
||||
|
||||
@retval EFI_SUCCESS Domain attributes are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
|
||||
);
|
||||
|
||||
/** Return list of performance domain levels of a given domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] NumLevels Total number of levels a domain can support.
|
||||
|
||||
@param[in,out] LevelArraySize Size of the performance level array.
|
||||
|
||||
@param[out] LevelArray Array of the performance levels.
|
||||
|
||||
@retval EFI_SUCCESS Domain levels are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval EFI_BUFFER_TOO_SMALL LevelArraySize is too small for the result.
|
||||
It has been updated to the size needed.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT UINT32 *NumLevels,
|
||||
IN OUT UINT32 *LevelArraySize,
|
||||
OUT SCMI_PERFORMANCE_LEVEL *LevelArray
|
||||
);
|
||||
|
||||
/** Set performance limits of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
@param[in] Limit Performance limit to set.
|
||||
|
||||
@retval EFI_SUCCESS Performance limits set successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
IN SCMI_PERFORMANCE_LIMITS *Limits
|
||||
);
|
||||
|
||||
/** Get performance limits of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Limit Performance Limits of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance limits are returned.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET) (
|
||||
SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
UINT32 DomainId,
|
||||
SCMI_PERFORMANCE_LIMITS *Limits
|
||||
);
|
||||
|
||||
/** Set performance level of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
@param[in] Level Performance level of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance level set successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
IN UINT32 Level
|
||||
);
|
||||
|
||||
/** Get performance level of a domain.
|
||||
|
||||
@param[in] This A Pointer to SCMI_PERFORMANCE_PROTOCOL Instance.
|
||||
@param[in] DomainId Identifier for the performance domain.
|
||||
|
||||
@param[out] Level Performance level of the domain.
|
||||
|
||||
@retval EFI_SUCCESS Performance level got successfully.
|
||||
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
|
||||
@retval !(EFI_SUCCESS) Other errors.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET) (
|
||||
IN SCMI_PERFORMANCE_PROTOCOL *This,
|
||||
IN UINT32 DomainId,
|
||||
OUT UINT32 *Level
|
||||
);
|
||||
|
||||
typedef struct _SCMI_PERFORMANCE_PROTOCOL {
|
||||
SCMI_PERFORMANCE_GET_VERSION GetVersion;
|
||||
SCMI_PERFORMANCE_GET_ATTRIBUTES GetProtocolAttributes;
|
||||
SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES GetDomainAttributes;
|
||||
SCMI_PERFORMANCE_DESCRIBE_LEVELS DescribeLevels;
|
||||
SCMI_PERFORMANCE_LIMITS_SET LimitsSet;
|
||||
SCMI_PERFORMANCE_LIMITS_GET LimitsGet;
|
||||
SCMI_PERFORMANCE_LEVEL_SET LevelSet;
|
||||
SCMI_PERFORMANCE_LEVEL_GET LevelGet;
|
||||
} SCMI_PERFORMANCE_PROTOCOL;
|
||||
|
||||
typedef enum {
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_DOMAIN_ATTRIBUTES = 0x3,
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_DESCRIBE_LEVELS = 0x4,
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_SET = 0x5,
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_LIMITS_GET = 0x6,
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_SET = 0x7,
|
||||
SCMI_MESSAGE_ID_PERFORMANCE_LEVEL_GET = 0x8,
|
||||
} SCMI_MESSAGE_ID_PERFORMANCE;
|
||||
|
||||
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */
|
||||
|
@ -394,7 +394,7 @@ DisassembleArmInstruction (
|
||||
}
|
||||
|
||||
|
||||
if ((OpCode & 0x0db00000) == 0x01200000) {
|
||||
if ((OpCode & 0x0db00000) == 0x03200000) {
|
||||
// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
|
||||
if (I) {
|
||||
// MSR{<cond>} CPSR_<fields>, #<immediate>
|
||||
|
342
ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
Normal file
342
ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
Normal file
@ -0,0 +1,342 @@
|
||||
/** @file
|
||||
Generic ARM implementation of DmaLib.h
|
||||
|
||||
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include <PiDxe.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/DmaLib.h>
|
||||
#include <Library/DxeServicesTableLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/UefiBootServicesTableLib.h>
|
||||
#include <Library/UncachedMemoryAllocationLib.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
|
||||
#include <Protocol/Cpu.h>
|
||||
|
||||
typedef struct {
|
||||
EFI_PHYSICAL_ADDRESS HostAddress;
|
||||
VOID *BufferAddress;
|
||||
UINTN NumberOfBytes;
|
||||
DMA_MAP_OPERATION Operation;
|
||||
BOOLEAN DoubleBuffer;
|
||||
} MAP_INFO_INSTANCE;
|
||||
|
||||
|
||||
|
||||
STATIC EFI_CPU_ARCH_PROTOCOL *mCpu;
|
||||
|
||||
STATIC
|
||||
PHYSICAL_ADDRESS
|
||||
HostToDeviceAddress (
|
||||
IN PHYSICAL_ADDRESS HostAddress
|
||||
)
|
||||
{
|
||||
return HostAddress + PcdGet64 (PcdArmDmaDeviceOffset);
|
||||
}
|
||||
|
||||
/**
|
||||
Provides the DMA controller-specific addresses needed to access system memory.
|
||||
|
||||
Operation is relative to the DMA bus master.
|
||||
|
||||
@param Operation Indicates if the bus master is going to read or write to system memory.
|
||||
@param HostAddress The system memory address to map to the DMA controller.
|
||||
@param NumberOfBytes On input the number of bytes to map. On output the number of bytes
|
||||
that were mapped.
|
||||
@param DeviceAddress The resulting map address for the bus master controller to use to
|
||||
access the hosts HostAddress.
|
||||
@param Mapping A resulting value to pass to Unmap().
|
||||
|
||||
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
|
||||
@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
|
||||
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
|
||||
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
|
||||
@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
DmaMap (
|
||||
IN DMA_MAP_OPERATION Operation,
|
||||
IN VOID *HostAddress,
|
||||
IN OUT UINTN *NumberOfBytes,
|
||||
OUT PHYSICAL_ADDRESS *DeviceAddress,
|
||||
OUT VOID **Mapping
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
MAP_INFO_INSTANCE *Map;
|
||||
VOID *Buffer;
|
||||
EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor;
|
||||
|
||||
if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL ) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
if (Operation >= MapOperationMaximum) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
//
|
||||
// The debug implementation of UncachedMemoryAllocationLib in ArmPkg returns
|
||||
// a virtual uncached alias, and unmaps the cached ID mapping of the buffer,
|
||||
// in order to catch inadvertent references to the cached mapping.
|
||||
// Since HostToDeviceAddress () expects ID mapped input addresses, convert
|
||||
// the host address to an ID mapped address first.
|
||||
//
|
||||
*DeviceAddress = HostToDeviceAddress (ConvertToPhysicalAddress (HostAddress));
|
||||
|
||||
// Remember range so we can flush on the other side
|
||||
Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
|
||||
if (Map == NULL) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) ||
|
||||
((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) {
|
||||
|
||||
// Get the cacheability of the region
|
||||
Status = gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDescriptor);
|
||||
if (EFI_ERROR(Status)) {
|
||||
goto FreeMapInfo;
|
||||
}
|
||||
|
||||
// If the mapped buffer is not an uncached buffer
|
||||
if ((GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) != 0) {
|
||||
//
|
||||
// Operations of type MapOperationBusMasterCommonBuffer are only allowed
|
||||
// on uncached buffers.
|
||||
//
|
||||
if (Operation == MapOperationBusMasterCommonBuffer) {
|
||||
DEBUG ((EFI_D_ERROR,
|
||||
"%a: Operation type 'MapOperationBusMasterCommonBuffer' is only supported\n"
|
||||
"on memory regions that were allocated using DmaAllocateBuffer ()\n",
|
||||
__FUNCTION__));
|
||||
Status = EFI_UNSUPPORTED;
|
||||
goto FreeMapInfo;
|
||||
}
|
||||
|
||||
//
|
||||
// If the buffer does not fill entire cache lines we must double buffer into
|
||||
// uncached memory. Device (PCI) address becomes uncached page.
|
||||
//
|
||||
Map->DoubleBuffer = TRUE;
|
||||
Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (*NumberOfBytes), &Buffer);
|
||||
if (EFI_ERROR (Status)) {
|
||||
goto FreeMapInfo;
|
||||
}
|
||||
|
||||
if (Operation == MapOperationBusMasterRead) {
|
||||
CopyMem (Buffer, HostAddress, *NumberOfBytes);
|
||||
}
|
||||
|
||||
*DeviceAddress = HostToDeviceAddress (ConvertToPhysicalAddress (Buffer));
|
||||
Map->BufferAddress = Buffer;
|
||||
} else {
|
||||
Map->DoubleBuffer = FALSE;
|
||||
}
|
||||
} else {
|
||||
Map->DoubleBuffer = FALSE;
|
||||
|
||||
DEBUG_CODE_BEGIN ();
|
||||
|
||||
//
|
||||
// The operation type check above only executes if the buffer happens to be
|
||||
// misaligned with respect to CWG, but even if it is aligned, we should not
|
||||
// allow arbitrary buffers to be used for creating consistent mappings.
|
||||
// So duplicate the check here when running in DEBUG mode, just to assert
|
||||
// that we are not trying to create a consistent mapping for cached memory.
|
||||
//
|
||||
Status = gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDescriptor);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
ASSERT (Operation != MapOperationBusMasterCommonBuffer ||
|
||||
(GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) == 0);
|
||||
|
||||
DEBUG_CODE_END ();
|
||||
|
||||
// Flush the Data Cache (should not have any effect if the memory region is uncached)
|
||||
mCpu->FlushDataCache (mCpu, (UINTN)HostAddress, *NumberOfBytes,
|
||||
EfiCpuFlushTypeWriteBackInvalidate);
|
||||
}
|
||||
|
||||
Map->HostAddress = (UINTN)HostAddress;
|
||||
Map->NumberOfBytes = *NumberOfBytes;
|
||||
Map->Operation = Operation;
|
||||
|
||||
*Mapping = Map;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
|
||||
FreeMapInfo:
|
||||
FreePool (Map);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
|
||||
operation and releases any corresponding resources.
|
||||
|
||||
@param Mapping The mapping value returned from DmaMap*().
|
||||
|
||||
@retval EFI_SUCCESS The range was unmapped.
|
||||
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
|
||||
@retval EFI_INVALID_PARAMETER An inconsistency was detected between the mapping type
|
||||
and the DoubleBuffer field
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
DmaUnmap (
|
||||
IN VOID *Mapping
|
||||
)
|
||||
{
|
||||
MAP_INFO_INSTANCE *Map;
|
||||
EFI_STATUS Status;
|
||||
|
||||
if (Mapping == NULL) {
|
||||
ASSERT (FALSE);
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
Map = (MAP_INFO_INSTANCE *)Mapping;
|
||||
|
||||
Status = EFI_SUCCESS;
|
||||
if (Map->DoubleBuffer) {
|
||||
ASSERT (Map->Operation != MapOperationBusMasterCommonBuffer);
|
||||
|
||||
if (Map->Operation == MapOperationBusMasterCommonBuffer) {
|
||||
Status = EFI_INVALID_PARAMETER;
|
||||
} else if (Map->Operation == MapOperationBusMasterWrite) {
|
||||
CopyMem ((VOID *)(UINTN)Map->HostAddress, Map->BufferAddress,
|
||||
Map->NumberOfBytes);
|
||||
}
|
||||
|
||||
DmaFreeBuffer (EFI_SIZE_TO_PAGES (Map->NumberOfBytes), Map->BufferAddress);
|
||||
|
||||
} else {
|
||||
if (Map->Operation == MapOperationBusMasterWrite) {
|
||||
//
|
||||
// Make sure we read buffer from uncached memory and not the cache
|
||||
//
|
||||
mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes,
|
||||
EfiCpuFlushTypeInvalidate);
|
||||
}
|
||||
}
|
||||
|
||||
FreePool (Map);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/**
|
||||
Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
|
||||
mapping.
|
||||
|
||||
@param MemoryType The type of memory to allocate, EfiBootServicesData or
|
||||
EfiRuntimeServicesData.
|
||||
@param Pages The number of pages to allocate.
|
||||
@param HostAddress A pointer to store the base system memory address of the
|
||||
allocated range.
|
||||
|
||||
@retval EFI_SUCCESS The requested memory pages were allocated.
|
||||
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
|
||||
MEMORY_WRITE_COMBINE and MEMORY_CACHED.
|
||||
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
|
||||
@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
DmaAllocateBuffer (
|
||||
IN EFI_MEMORY_TYPE MemoryType,
|
||||
IN UINTN Pages,
|
||||
OUT VOID **HostAddress
|
||||
)
|
||||
{
|
||||
VOID *Allocation;
|
||||
|
||||
if (HostAddress == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
//
|
||||
// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
|
||||
//
|
||||
// We used uncached memory to keep coherency
|
||||
//
|
||||
if (MemoryType == EfiBootServicesData) {
|
||||
Allocation = UncachedAllocatePages (Pages);
|
||||
} else if (MemoryType == EfiRuntimeServicesData) {
|
||||
Allocation = UncachedAllocateRuntimePages (Pages);
|
||||
} else {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
if (Allocation == NULL) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
*HostAddress = Allocation;
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Frees memory that was allocated with DmaAllocateBuffer().
|
||||
|
||||
@param Pages The number of pages to free.
|
||||
@param HostAddress The base system memory address of the allocated range.
|
||||
|
||||
@retval EFI_SUCCESS The requested memory pages were freed.
|
||||
@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
|
||||
was not allocated with DmaAllocateBuffer().
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
DmaFreeBuffer (
|
||||
IN UINTN Pages,
|
||||
IN VOID *HostAddress
|
||||
)
|
||||
{
|
||||
if (HostAddress == NULL) {
|
||||
return EFI_INVALID_PARAMETER;
|
||||
}
|
||||
|
||||
UncachedFreePages (HostAddress, Pages);
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
ArmDmaLibConstructor (
|
||||
IN EFI_HANDLE ImageHandle,
|
||||
IN EFI_SYSTEM_TABLE *SystemTable
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
||||
// Get the Cpu protocol for later use
|
||||
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
50
ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
Normal file
50
ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
Normal file
@ -0,0 +1,50 @@
|
||||
#/** @file
|
||||
#
|
||||
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#**/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = ArmDmaLib
|
||||
FILE_GUID = F1BD6B36-B705-43aa-8A28-33F58ED85EFB
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = DmaLib
|
||||
CONSTRUCTOR = ArmDmaLibConstructor
|
||||
|
||||
[Sources.common]
|
||||
ArmDmaLib.c
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
|
||||
|
||||
[LibraryClasses]
|
||||
DebugLib
|
||||
DxeServicesTableLib
|
||||
UefiBootServicesTableLib
|
||||
MemoryAllocationLib
|
||||
UncachedMemoryAllocationLib
|
||||
IoLib
|
||||
BaseMemoryLib
|
||||
|
||||
[Protocols]
|
||||
gEfiCpuArchProtocolGuid
|
||||
|
||||
[Guids]
|
||||
|
||||
[Pcd]
|
||||
gArmTokenSpaceGuid.PcdArmDmaDeviceOffset
|
||||
|
||||
[Depex]
|
||||
gEfiCpuArchProtocolGuid
|
@ -320,36 +320,3 @@ CommonCExceptionHandler(
|
||||
|
||||
DefaultExceptionHandler(ExceptionType, SystemContext);
|
||||
}
|
||||
|
||||
/**
|
||||
Initializes all CPU exceptions entries with optional extra initializations.
|
||||
|
||||
By default, this method should include all functionalities implemented by
|
||||
InitializeCpuExceptionHandlers(), plus extra initialization works, if any.
|
||||
This could be done by calling InitializeCpuExceptionHandlers() directly
|
||||
in this method besides the extra works.
|
||||
|
||||
InitData is optional and its use and content are processor arch dependent.
|
||||
The typical usage of it is to convey resources which have to be reserved
|
||||
elsewhere and are necessary for the extra initializations of exception.
|
||||
|
||||
@param[in] VectorInfo Pointer to reserved vector list.
|
||||
@param[in] InitData Pointer to data optional for extra initializations
|
||||
of exception.
|
||||
|
||||
@retval EFI_SUCCESS The exceptions have been successfully
|
||||
initialized.
|
||||
@retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid
|
||||
content.
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
InitializeCpuExceptionHandlersEx (
|
||||
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL,
|
||||
IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
|
||||
)
|
||||
{
|
||||
return InitializeCpuExceptionHandlers (VectorInfo);
|
||||
}
|
||||
|
||||
|
@ -29,14 +29,6 @@ ArmGenericTimerEnableTimer (
|
||||
ArmWriteCntpCtl (TimerCtrlReg);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGenericTimerReenableTimer (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGenericTimerDisableTimer (
|
||||
|
@ -26,15 +26,17 @@ ArmGenericTimerEnableTimer (
|
||||
|
||||
TimerCtrlReg = ArmReadCntvCtl ();
|
||||
TimerCtrlReg |= ARM_ARCH_TIMER_ENABLE;
|
||||
ArmWriteCntvCtl (TimerCtrlReg);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
ArmGenericTimerReenableTimer (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// When running under KVM, we need to unmask the interrupt on the timer side
|
||||
// as KVM will mask it when servicing the interrupt at the hypervisor level
|
||||
// and delivering the virtual timer interrupt to the guest. Otherwise, the
|
||||
// interrupt will fire again, trapping into the hypervisor again, etc. etc.
|
||||
// This is scheduled to be fixed on the KVM side, but there is no harm in
|
||||
// leaving this in once KVM gets fixed.
|
||||
//
|
||||
TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;
|
||||
ArmWriteCntvCtl (TimerCtrlReg);
|
||||
}
|
||||
|
||||
VOID
|
||||
|
@ -12,7 +12,7 @@
|
||||
//
|
||||
//
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <AsmMacroIoLibV8.h>
|
||||
|
||||
.arch_extension virt
|
||||
|
||||
|
@ -30,6 +30,3 @@
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
|
||||
[BuildOptions]
|
||||
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15
|
||||
|
@ -1,7 +1,7 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
|
||||
# Copyright (c) 2016, Linaro Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
@ -403,11 +403,9 @@ ASM_FUNC(ArmEnableVFP)
|
||||
mov x1, x30 // Save LR
|
||||
bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
|
||||
mov x30, x1 // Restore LR
|
||||
ubfx x0, x0, #16, #4 // Extract the FP bits 16:19
|
||||
cmp x0, #0xF // Check if FP bits are '1111b',
|
||||
// i.e. Floating Point not implemented
|
||||
b.eq 4f // Exit when VFP is not implemented.
|
||||
|
||||
ands x0, x0, #AARCH64_PFR0_FP// Extract bits indicating VFP implementation
|
||||
cmp x0, #0 // VFP is implemented if '0'.
|
||||
b.ne 4f // Exit if VFP not implemented.
|
||||
// FVP is implemented.
|
||||
// Make sure VFP exceptions are not trapped (to any exception level).
|
||||
mrs x0, cpacr_el1 // Read EL1 Coprocessor Access Control Register (CPACR)
|
||||
@ -482,14 +480,4 @@ ASM_FUNC(ArmReadCurrentEL)
|
||||
mrs x0, CurrentEL
|
||||
ret
|
||||
|
||||
// UINT32 ArmReadCntHctl(VOID)
|
||||
ASM_FUNC(ArmReadCntHctl)
|
||||
mrs x0, cnthctl_el2
|
||||
ret
|
||||
|
||||
// VOID ArmWriteCntHctl(UINT32 CntHctl)
|
||||
ASM_FUNC(ArmWriteCntHctl)
|
||||
msr cnthctl_el2, x0
|
||||
ret
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
@ -187,30 +187,4 @@ ASM_FUNC(ArmReadSctlr)
|
||||
3:mrs x0, sctlr_el3
|
||||
4:ret
|
||||
|
||||
ASM_FUNC(ArmWriteSctlr)
|
||||
EL1_OR_EL2_OR_EL3(x1)
|
||||
1:msr sctlr_el1, x0
|
||||
ret
|
||||
2:msr sctlr_el2, x0
|
||||
ret
|
||||
3:msr sctlr_el3, x0
|
||||
4:ret
|
||||
|
||||
ASM_FUNC(ArmGetPhysicalAddressBits)
|
||||
mrs x0, id_aa64mmfr0_el1
|
||||
adr x1, .LPARanges
|
||||
and x0, x0, #0xf
|
||||
ldrb w0, [x1, x0]
|
||||
ret
|
||||
|
||||
//
|
||||
// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the
|
||||
// physical address space support on this CPU:
|
||||
// 0 == 32 bits, 1 == 36 bits, etc etc
|
||||
// 7 and up are reserved
|
||||
//
|
||||
.LPARanges:
|
||||
.byte 32, 36, 40, 42, 44, 48, 52, 0
|
||||
.byte 0, 0, 0, 0, 0, 0, 0, 0
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
@ -100,6 +100,8 @@ ASM_FUNC(ArmGetTTBR0BaseAddress)
|
||||
// IN VOID *MVA // R1
|
||||
// );
|
||||
ASM_FUNC(ArmUpdateTranslationTableEntry)
|
||||
mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA
|
||||
dsb
|
||||
mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
|
||||
mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
|
||||
dsb
|
||||
@ -151,10 +153,6 @@ ASM_FUNC(ArmReadSctlr)
|
||||
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
|
||||
bx lr
|
||||
|
||||
ASM_FUNC(ArmWriteSctlr)
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
bx lr
|
||||
|
||||
ASM_FUNC(ArmReadCpuActlr)
|
||||
mrc p15, 0, r0, c1, c0, 1
|
||||
bx lr
|
||||
@ -165,12 +163,4 @@ ASM_FUNC(ArmWriteCpuActlr)
|
||||
isb
|
||||
bx lr
|
||||
|
||||
ASM_FUNC (ArmGetPhysicalAddressBits)
|
||||
mrc p15, 0, r0, c0, c1, 4 // MMFR0
|
||||
and r0, r0, #0xf // VMSA [3:0]
|
||||
cmp r0, #5 // >= 5 implies LPAE support
|
||||
movlt r0, #32 // 32 bits if no LPAE
|
||||
movge r0, #40 // 40 bits if LPAE
|
||||
bx lr
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user