f220dcbba8
During CpuDxe initialization, MMU will be setup with the highest mode that HW supports. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
32 lines
467 B
ArmAsm
32 lines
467 B
ArmAsm
/** @file
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*
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* Copyright (c) 2023, Ventana Micro Systems Inc. All Rights Reserved.<BR>
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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**/
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#include <Base.h>
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#include <Register/RiscV64/RiscVImpl.h>
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.text
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.align 3
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//
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// Local tlb flush all.
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//
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//
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ASM_FUNC (RiscVLocalTlbFlushAll)
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sfence.vma
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ret
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//
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// Local tlb flush at a virtual address
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// @retval a0 : virtual address.
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//
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ASM_FUNC (
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RiscVLocalTlbFlush
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)
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sfence.vma a0
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ret
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